HACETTEPE UNIVERSITY ELECTRICAL AND ELECTRONICS ENGINEERING ELE237 FUNDAMENTALS OF DIGITAL SYSTEMS

Experiment 3 Implementation of Registers and Counters Preliminaries: 1) Students who will attend to this experiment are assumed to know: Basic number systems and Boolean algebra Basic combinational logic operations and gates Basic VHDL operators and operands Basic Latches and Flip-Flops. 2) Please study the related pages on the book. Work : Basic Logic Functions are and, nand, or, nor, not, xor, xnor Write Test Bench Programs for all questions.

1) Write a VHDL code to implement a 4-bit universal shift register by using DFlipFlops. 2) Write a VHDL code to implement a 4-bit asynchronous binary ripple counter by using T-FlipFlops. 3) Write a VHDL code to implement a 4-bit Johnson counter by using JKFlipFlops. 4) Write a VHDL code to implement a 4-bit up/down counter by using DFlipFlops.

5) In telephone lines, users at transmitter side are multiplexed and occupy line with an order. This process can be thought as parallel to series data conversion. Order can be determined by a counter that counts 1 to N for occupy all (N) users. It is also clear to see that selection inputs of multiplexer and de-multiplexer connects output of counters that are fully synchronized. This technique is also called in telecommunication area as TDM. (Time Division Multiplexing)

Figure : TDM scheme for order 1,2,,N You are asked to design a TDM system with properties as follows; There are 8 users in system. Users occupy the line with the order User1 User4 User7 User2 User5 User8 User3 User6.

When you write your test bench code, users should have following data; In first cycle, User 1 1 User 2 1 User 3 0 User 4 0 User 5 0 User 6 1 User 7 0 User 8 1

When all users enter the line, first cycle finishes, then second cycle begins and user data refresh as follows, User 1 1 User 2 0 User 3 1 User 4 0 User 5 1 User 6 0 User 7 1 User 8 0

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