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Course Syllabus CS203 Logic Design SY 2009-2010
Course Syllabus CS203 Logic Design SY 2009-2010
Required Textbook(s):
M. Morris Mano and Michael D. Ciletti, “Digital Design” ISBN: 978-0131989245, Publisher:
Prentice-Hall, Inc., Edition: 4th, Year: 2006
Semester - Academic Year
1. David A. Patterson and John L. Hennessy, “Computer Organization and Design: The
hardware/software interface”, ISBN: 978-0123706065, Publishers: Morgan Kaufmann 3rd
Edition, Year 2005
2. Thomas L. Floyd, “Digital fundamentals”, 978-0131946095, Publisher: Prentice-Hall 9th
Edition, Year 2006
Laboratory Requirement(s):
Computer with the following software:
1. MS Windows XP
2. Verilog HDL
4. Sequential Logic 9 – 10
4.1. Timers
4.2. Latches
4.3. Flip-Flops
4.4. Analysis of clocked sequential circuits
Revision 15
Final Examination 16
Instructional Objectives1:
Upon successful completion of this course, the student will be able to:
1. Binary Systems
1.1. Describe digital systems
1.2. Explain Number conversation
1.3. Describe Binary storage and registers
1.4. Explain Binary logic
1.5. Explain Binary arithmetic
1.6. Describe Binary complements
1.7. Explain Floating Point
1.8. Explain Hex Addition
1.9. Explain BCD Addition
4. Sequential Logic
1∗ Conditions and standards for all enabling objectives are implied. They are "after completing this lesson" and "by correctly
answering the corresponding test item".
6. Memory Cells
6.1. Explain Random Access Memory
6.2. Explain Read Only Memory
6.3. Explain Programmable Logic Array
6.4. Explain Programmable Array logic
6.5. Explain Sequential Programmable Devices
INTERVAL 95 - 100 90 - 94 85 - 89 80 - 84 75 - 79 70 - 74 65 - 69 60 - 64 0 - 59
POINTS 4.00 3.75 3.50 3.00 2.50 2.00 1.50 1.00 0
LETTER
A+ A B+ B C+ C D+ D F
GRADE
Prepared by:
___________________
Mr. Gerald Y. Gonzales
Lecturer, CS Department
UCY
Approved by:
___________________
Dr. Fakeer Dawood
Head of Department
Computer Science
____________________
Date: