Cu hi loi 1 im Cu hi 1.1: Kin trc my tnh l g ? Kin trc my tnh c cu thnh t nhng thnh phn no ?

TL: Kin trc my tnh (Computer architecture) l mt khoa hc v la chn v kt ni cc thnh phn phn cng ca my tnh nhm t c cc yu cu: - Hiu nng/tc (performance): nhanh. - Chc nng (functionality): nhiu tnh nng. - Gi thnh (cost): r. Kin trc my tnh l mt trong hai khi nim c bn ca cng ngh my tnh. KTMT bao gm 3 thnh phn c bn l: Kin trc tp lnh (Instruction set architecture ISA). Vi kin trc (micro-architecture). Thit k h thng (System Design).

Cu hi 1.2: Nu s khi chc nng ca h thng my tnh. TL: S khi chc nng h thng my tnh nh hnh bn: Trong : B x l trung tm (CPU) B nh trong (Internal Memory): bao gm: ROM v RAM. Cc thit b vo ra (Peripheral devices). Bus h thng (system bus).

Cu hi 1.3: Thanh ghi ca vi x l l g? Nu chc nng v c im ca thanh ghi tch lu A. TL: Thanh ghi (registers) l cc nh bn trong CPU c c im l kch thc nh, tc rt cao (bng tc CPU) v c chc nng lu tr tm thi lnh v d liu cho CPU x l. S lng thanh ghi tu thuc vo i CPU, cc CPU c (80x86) c 16-32 thanh ghi; cc CPU hin i (Pentium 4 v Core Duo) c hng trm thanh ghi; Kch thc thanh ghi ph thuc vo thit k CPU. Cc kch thc thng dng ca thanh ghi l 8, 16, 32, 64, 128 v 256 bit. Thanh tch lu A l mt trong cc thanh ghi quan trng nht ca hu ht cc CPU. Thanh ghi tch lu A c chc nng: - dng cha ton hng u vo - dng cha kt qu u ra - s dng trao i d liu vi cc thit b vo ra. Kch thc ca A bng kch thc t x l ca CPU: 8, 16, 32 v 64 bit.

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Cu hi 1.4: Nu chc nng v c im ca b m chng trnh PC TL: B m chng trnh PC (Program Counter) hoc con tr lnh (IP Instruction Pointer) lun cha a ch ca nh cha lnh c thc hin tip theo. PC cha a ch ca nh cha lnh u tin ca chng trnh khi chng trnh c kch hot v c H iu hnh np vo b nh. Khi CPU thc hin xong lnh, a ch ca nh cha lnh tip theo c np vo PC. Kch thc PC ph thuc vo thit k CPU. Cc kch thc thng dng l 8, 16, 32 v 64 bit.

Cu hi 1.5: Thanh ghi c (hay thanh ghi trng thi) ca vi x l c chc nng g? Nu ngha ca cc c nh (C), c khng (Z), c du (S). TL: Thanh ghi trng thi (SR - Status Register) hoc thanh ghi c (FR Flag Register) l thanh ghi c bit ca CPU. Mi bt ca FR lu trng thi ca kt qu ca php tnh ALU thc hin. Hai loi bt c: C trng thi (CF, OF, AF, ZF, PF, SF) v c iu khin (IF, TF, DF). Cc bt c thng c s dng nh l cc iu kin trong cc lnh r nhnh to logic chng trnh. Kch thc ca thanh ghi FR ph thuc thit k CPU. ngha ca mt s c: ZF: C Zero, ZF=1 nu kt qu=0 v ZF=0 nu kt qu<>0. SF: C du, SF=1 nu kt qu m v SF=0 nu kt qu dng. CF: C nh, CF=1 nu c nh/mn, CF=0 trong trng hp khc.

Cu hi 1.6: Ch a ch ca vi x l l g ? M t ch a ch tc th. Cho v d. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. Ch a ch tc th: trong ch a ch tc th, gi tr hng ca ton hng ngun (source operand) nm ngay sau m lnh, ton hng ch c th l 1 thanh ghi hoc 1 a ch nh. V d: LOAD R1, #1000; R1 1000; Np gi tr 1000 vo thanh ghi R1. LOAD B, #500; M[B] 500; Np gi tr 500 vo nh B.

Cu hi 1.7: Ch a ch ca vi x l l g ? M t ch a ch trc tip. Cho v d. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. S dng mt hng biu din a ch mt nh lm mt ton hng, ton hng cn li c th l 1 thanh ghi hoc 1 a ch nh; V d: LOAD R1, 1000; R1 M[1000] Np ni dung nh c a ch 1000 vo thanh ghi R1.

Mnh Mc D09VT3

Cu hi 1.8: Ch a ch ca vi x l l g ? M t ch a ch gin tip qua thanh ghi. Cho v d minh ho. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. Trong ch a ch gin tip qua thanh ghi, mt thanh ghi c s dng lu a ch ton hng, ton hng cn li c th l mt hng, mt thanh ghi hoc mt nh. V d: LOAD Rj, (Ri); Rj M[Ri]; Np ni dung nh c a ch lu trong thanh ghi Ri vo thanh ghi Rj. Cu hi 1.9: Ch a ch ca vi x l l g ? M t ch a ch gin tip qua nh. Cho v d minh ho. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. Trong ch a ch gin tip qua nh, mt nh c s dng lu a ch ton hng, ton hng cn li c th l mt hng, mt thanh ghi hoc mt nh. V d: LOAD Ri, (1000); Ri M(M(1000)) Np ni dung nh c a ch lu trong nh 1000 vo thanh ghi Ri.

Cu hi 1.10: Ch a ch ca vi x l l g ? M t ch a ch ch s. Cho v d minh ho. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. Trong ch a ch ch s, a ch ca 1 ton hng c to thnh bi php cng gia 1 hng v thanh ghi ch s (index register), ton hng cn li c th l mt hng, mt thanh ghi hoc mt nh. V d: LOAD Ri, X(Rind); Ri M[X+Rind]; X l hng v Rind l thanh ghi ch s. Cu hi 1.11: Ch a ch ca vi x l l g ? M t ch a ch tng i. Cho v d minh ho. TL: Ch a ch (Addressing modes) l phng thc CPU t chc cc ton hng ca lnh, n cho php CPU kim tra dng v tm cc ton hng ca lnh. Ch a ch tng i: trong ch a ch ny, a ch ca 1 ton hng c to thnh bi php cng gia 1 hng v b m chng trnh PC (Program Counter), ton hng cn li c th l mt hng, mt thanh ghi hoc mt nh. V d: LOAD Ri, X(PC); Ri M[X+PC]; X l hng v PC l b m chng trnh.

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Cu hi 1.12: Nu phng thc trao i d liu gia CPU, cache v b nh chnh. TL:S trao i d liu gia CPU, cache v b nh chnh nh hnh bn. CPU trao i d liu vi cache theo cc n v c s nh byte, t, t kp. Cache trao i d liu vi b nh chnh theo cc khi vi kch thc 16, 32, 64 bytes. S d CPU trao i d liu vi cache theo cc n v c s m khng theo khi do d liu c lu trong cc thanh ghi ca CPU - vn c dung lng rt hn ch. V vy, CPU ch trao i cc phn t d liu cn thit theo yu cu ca cc lnh. Ngc li, cache trao i d liu vi b nh chnh theo cc khi, mi khi gm nhiu byte k nhau vi mc ch bao ph cc mu d liu ln cn theo khng gian v thi gian. Ngoi ra, trao i d liu theo khi (hay m) vi b nh chnh gip cache tn dng tt hn bng thng ng truyn v nh vy c th tng tc truyn d liu. Cu hi 1.13: Nu c im chnh ca a CD v a DVD. TL: c im chnh ca a CD: - Dung lng ti a ca a CD l 700MB hoc 80 pht nu lu m thanh - a s dng tia laser hng ngoi vi bc sng 780 nm c thng tin. - Tc truyn thng tin ca a CD c tnh theo tc c s (150KB/s) nhn vi h s nhn. V d, a c tc c 4x th tc ti a c th c l 4 x 150KB/s = 600 KB/s; nu a c tc c 50x th tc ti a c th c l 50 x 150KB/s = 7500 KB/s. c im chnh ca a DVD: - Dung lng ti a ca a DVD l 4,7GB vi a mt mt v 8,5GB vi a 2 mt. - a DVD s dng tia laser hng ngoi c bc sng 650nm, ngn hn nhiu so vi bc sng tia laser dng trong a CD nn c mt ghi cao hn nhiu so vi CD. - Tc truyn thng tin ca a DVD c tnh theo tc c s (1350KB/s) nhn vi h s nhn. V d, a c tc c 4x th tc ti a c th c l 4 x 1350KB/s = 5 400 KB/s; nu a c tc c 16x th tc ti a c th c l 16 x 1350KB/s = 21600 KB/s. Cu hi 1.14: Nu nguyn l hot ng ca chut quang. TL :Nguyn tc hot ng ca chut quang c th tm tt nh sau: Mt i-t pht nh sng qua ng knh chiu xung mt phng di chut; nh sng phn x t mt phng di chut quay ngc tr li pha di chut. Mt camera t pha di chut lin tc chp nh ca b mt di chut nh nh sng phn x. Tc chp l khong 1500 nh/giy. IC iu khin chut s phn tch v so snh cc nh k nhau v qua pht hin ra chuyn ng chut. Tn hiu biu din chuyn ng chut do IC iu khin chut sinh ra c chuyn cho my tnh x l. 4

Mnh Mc D09VT3

 Cu hi loi 2 im Cu hi 2.1: Nu s khi chc nng v chc nng chnh ca cc thnh phn trong mt h thng my tnh ? TL :

S khi chc nng h thng my tnh nh hnh trn: B x l trung tm (Central Processing Unit - CPU) c chc nng: c lnh t b nh, gii m v thc hin lnh. CPU bao gm: - B iu khin (Control Unit - CU) - B tnh ton s hc v logic (Arithmetic and Logic Unit - ALU) - Cc thanh ghi (Registers) B nh trong (Internal Memory) c chc nng: lu tr lnh (instruction) v d liu (data) cho CPU x l. B nh trong bao gm: - ROM (Read Only Memory): Lu tr lnh v d liu ca h thng, thng tin trong ROM vn tn ti khi mt ngun nui. - RAM (Random Access Memory): Lu tr lnh v d liu ca h thng v ngi dng; thng tin trong RAM s mt khi mt ngun nui. Cc thit b vo ra (Peripheral devices): Thit b vo (Input devices): nhp d liu v iu khin. Bao gm: Bn phm (Keyboard), Chut (Mice), a (Disk drives), My qut (Scanner)... Thit b ra (Output devices): kt xut d liu. Bao gm: Mn hnh (Monitor/screen), My in (Printer), My v (Plotter), a (Disk drives)... Bus h thng (system bus): Bus h thng l mt tp cc ng dy kt ni CPU vi cc thnh phn khc ca my tnh. Bus h thng thng gm: - Bus a ch (Address bus) Bus A - Bus d liu (Data bus) Bus D - Bus iu khin (Control bus) - Bus C

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Cu hi 2.2: Nu s v cc c im ca kin trc my tnh von-Neumann. Kin trc my tnh von-Neumann hin i khc kin trc my tnh von-Neumann c in nhng im chnh no ? TL : Kin trc von-Neumann da trn 3 khi nim c s: - Lnh v d liu c lu tr trong b nh c ghi chia s; - B nh c nh a ch theo vng, khng ph thuc vo ni dung n lu tr; - Cc lnh ca mt chng trnh c thc hin tun t. Cc lnh c thc hin theo 3 giai on (stages) chnh: - CPU c (fetch) lnh t b nh; - CPU gii m v thc hin lnh; nu lnh yu cu d liu, CPU c d liu t b nh; - CPU ghi kt qu thc hin lnh vo b nh (nu c).

So snh C in Cc b CU, ALU nm tch ri nhau. Hin i Cc b CU, ALU u nm trong khi x l trung tm CPU, c b sung thm thanh ghi trong CPU.

Cc thnh phn ca kin trc s dng cc Cc thnh phn ca kin trc cng c kt ni vi ng kt ni ring kt ni vi nhau. nhau bng Bus h thng Cho php cc lnh c thc hin song song nn tc x l d liu cao hn

Mnh Mc D09VT3

Cu hi 2.3: Nu s v cc c im ca kin trc my tnh Harvard. Kin trc my tnh Harvard c nhng u im g so vi kin trc my tnh von-Neumann. Cc my tnh hin i ngy nay s dng kin trc no ? TL : B nh c chia thnh 2 phn: - B nh chng trnh (Program Memory) - B nh lu d liu (Data Memory) CPU s dng 2 h thng bus ring r giao tip vi 2 b nh. Mi h thng bus u c y Bus A, D v C. So snh Kin trc Havard v Kin trc vonNeumann: - Kin trc Harvard nhanh hn kin trc von-Neumann do s dng hai h thng bus c lp, bng thng ca bus ln hn. - Nh c hai h thng bus c lp => h tr nhiu lnh truy cp b nh ti cng mt thi im, gim xung t truy nhp b nh, c bit khi CPU s dng k thut ng ng (pipeline). Tuy nhin h thng my tnh hin nay ph bin s dng kin trc von-Neumann hin i v : Thit k n gin, gi thnh r hn h thng thit k theo KT Harvard. Nh phn cp b nh nn tc x l ca kin trc von-Neumann hin i c ci thin ng k. Kin trc von-Neumann ra i trc nn cc nh sn xut my tnh pht trin cng ngh sn xut trn nn tng ny, s thay i l rt tn km.

Cu hi 2.4: Nu s khi tng qut v chu trnh x l lnh ca CPU. TL : CU : B iu khin ALU : B s hc v logic Internal Bus : Bus trong CPU A : Thanh ghi tch lu (Accumulator Register) PC : B m chng trnh. IR : Thanh ghi lnh MAR : Thanh ghi a ch b nh. MBR : Thanh ghi m d liu. Y, Z : Thanh ghi tm thi. FR : Thanh ghi c. Chu trnh x l lnh ca CPU 1. Khi mt chng trnh c thc hin, h iu hnh (OS - Operating System) np m chng trnh vo b nh trong. 2. a ch ca nh cha lnh u tin ca chng trnh c np vo b m chng trnh PC. 3. a ch nh cha lnh t PC c chuyn n bus A thng qua thanh ghi MAR. 4. Bus A chuyn a ch nh n n v qun l b nh (MMU - Memory Management Unit). 5. MMU chn ra nh v thc hin lnh c ni dung nh. 6. Lnh (trong nh) c chuyn ra bus D v tip theo c chuyn tip n thanh ghi MBR; 7. MBR chuyn lnh n thanh ghi lnh IR; IR chuyn lnh vo b iu khin CU. 8. CU gii m lnh v sinh cc tn hiu iu khin cn thit, yu cu cc b phn chc nng nh ALU thc hin lnh. 9. Gi tr a ch trong b m PC c tng ln 1 n v v n tr n a ch ca nh cha lnh tip theo. 10.Cc bc t 3-9 c lp li vi tt c cc lnh ca chng trnh. 7

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Cu hi 2.5: Nu s khi v chc nng ca cc khi iu khin (CU) v khi tnh ton s hc v logic (ALU). TL :

S khi n v iu khin CU n v iu khin CU (Control Unit) iu khin ton b cc hot ng ca CPU theo xung nhp ng h. CU tip nhn 3 tn hiu u vo: Lnh t IR Gi tr cc c trng thi ca ALU Xung ng h T , CU gii m lnh, pht sinh 2 nhm tn hiu iu khin ti u ra: Nhm tn hiu iu khin cc b phn bn trong CPU; Nhm tn hiu iu khin cc b phn bn ngoi CPU CU s dng nhp ng h ng b cc n v chc nng trong CPU v gia CPU vi cc b phn bn ngoi.

n v s hc & logic ALU ALU (Arithmetic and Logic Unit) bao gm mt lot cc n v chc nng con thc hin cc php ton s hc v logic trong CPU. Trong ALU c cc n v ch nng con: Cc n v tnh ton: B cng (ADD), b tr (SUB), b nhn (MUL), b chia (DIV),.... Cc b dch (SHIFT) v quay (ROTATE) Cc b logic: B ph nh (NOT), b v (AND), b hoc (OR) v b hoc loi tr (XOR) u vo ALU c 2 cng vo IN: nhn ton hng t cc thanh ghi. u ra l 1 cng ra OUT: kt ni vi bus trong chuyn kt qu n thanh ghi.

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Cu hi 2.6: Lnh my tnh l g ? Chu k lnh l g ? Nu cc pha in hnh trong chu k thc hin lnh. Nu dng lnh tng qut v cc thnh phn ca n. TL : Lnh my tnh (Computer Instruction) l mt t nh phn (binary word) c gn mt nhim v c th. Cc lnh ca chng trnh c lu trong b nh v chng ln lt c CPU c, gii m v thc hin. Chu k thc hin lnh (Instruction execution cycle): l khong thi gian m CPU thc hin xong mt lnh. Mt chu k thc hin lnh c th gm mt s giai on thc hin lnh. Mt giai on thc hin lnh c th gm mt s chu k my. Mt chu k my c th gm mt s chu k ng h. Cc pha in hnh trong chu k thc hin lnh: - c lnh (Instruction fetch - IF): lnh c c t b nh v CPU; - Gii m (Instruction decode - ID): CPU gii m lnh; - Thc hin (Instruction execution EX): CPU thc hin lnh; - Lu kt qu (Write back - WB): kt qu thc hin lnh (nu c) c lu vo b nh. Dng tng qut ca lnh gm 2 thnh phn chnh: - M lnh (Opcode - operation code): mi lnh c m lnh ring - a ch ca cc ton hng (Addresses of Operands): mi lnh c th gm mt hoc nhiu ton hng. C th c cc dng a ch ton hng sau: 3 a ch; 2 a ch; 1 a ch; 1,5 a ch; 0 a ch.

Mnh Mc D09VT3

Cu hi 2.7: Nu cc dng a ch ca lnh. Cho v d minh ho vi mi dng a ch. TL : Ton hng 3 a ch: Dng: opcode addr1, addR2, addr3 Mi a ch addr1, addR2, addr3 tham chiu n mt nh hoc mt thanh ghi. V d: ADD R1, R2, R3; R1 R2 + R3 R2 cng vi R3, kt qu gn vo R1. (Ri l thanh ghi ca CPU) ADD A, B, C; M[A] M[B] + M[C] A, B, C l a ch cc nh. Ton hng 2 a ch: Dng: opcode addr1, addR2 Mi a ch addr1, addR2 tham chiu n mt nh hoc mt thanh ghi. V d: ADD R1, R2; R1 R1 + R2 R1 cng vi R2, kt qu gn vo R1. (Ri l thanh ghi ca CPU) ADD A, B; M[A] M[B] + M[B] A, B l a ch cc nh. Ton hng 1 a ch: Dng: opcode addr1 a ch addr1 tham chiu n mt nh hoc mt thanh ghi. dng 1 a ch, thanh ghi tch lu A (Accumulator) c s dng nh a ch addR2 trong dng 2 a ch. V d: ADD R1; Racc Racc + R1 R1 cng vi Racc, kt qu gn vo Racc. R1 l thanh ghi ca CPU. ADD A; Racc Racc + M[A] A l a ch mt nh. Ton hng 1,5 a ch: Dng: opcode addr1, addR2 Mt a ch tham chiu n mt nh v a ch cn li tham chiu n mt thanh ghi. Dng 1,5 a ch l dng hn hp gia nh v thanh ghi. V d: ADD A, R1; M[A] M[A] + R1 Ni dung nh A cng vi R1, kt qu lu vo nh A R1 l thanh ghi ca CPU v A l a ch mt nh. Ton hng 0 a ch: c s dng trong cc lnh thao tc vi ngn xp: PUSH v POP.

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Cu hi 2.8: C ch x l xen k dng lnh (ng lnh pipeline) l g ? Nu cc c im ca c ch ng lnh. TL : C ch ng lnh (pipeline) hay cn gi l c ch thc hin xen k cc lnh ca chng trnh l mt phng php thc hin lnh tin tin, cho php ng thi thc hin nhiu lnh, gim thi gian trung bnh thc hin mi lnh v nh vy tng c hiu nng x l lnh ca CPU.

c im ca c ch ng lnh: - L dng x l song song mc lnh (instruction level parallelism (ILP)). Vic thc hin lnh c chia thnh mt s giai on v mi giai on c thc thi bi mt n v chc nng khc nhau ca CPU. Nh vy CPU c th tn dng ti a nng lc x l ca cc n v chc nng ca mnh, gim thi gian ch cho tng n v chc nng. - Mt pipeline l y (fully pipelined) khi n lun tip nhn mt lnh mi ti mi chu k ng h. Ngc li, mt pipeline l khng y khi c mt s chu k tr trong tin trnh thc hin. - C nhiu lnh ng thi c thc hin gi nhau trong CPU v hu ht cc n v chc nng ca CPU lin tc tham gia vo qu trnh x l lnh. S lng lnh c x l ng thi ng bng s giai on thc hin lnh. S lng cc giai on (stages) trong pipeline ph thuc vo thit k vi x l: 2,3, 5 giai on (pipeline n gin) 14 giai on (PII, PIII) 20-31 giai on (P4) 12-15 giai on (Core)

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Cu hi 2.9: Nu cu trc phn cp ca h thng b nh my tnh TL : Cu trc phn cp h thng b nh c th hin nh hnh bn. Trong cu trc phn cp h thng nh, dung lng cc thnh phn tng theo chiu t cc thanh ghi ca CPU n b nh ngoi. Ngc li, tc truy nhp hay bng thng v gi thnh mt n v nh tng theo chiu t b nh ngoi n cc thanh ghi ca CPU. Nh vy, cc thanh ghi ca CPU c dung lng nh nht nhng c tc truy cp nhanh nht v cng c gi thnh cao nht. B nh ngoi c dung lng ln nht, nhng tc truy cp thp nht. B li, b nh ngoi c gi thnh r nn c th c s dung vi dung lng ln. CPU registers (cc thanh ghi ca CPU): Dung lng rt nh, khong t vi chc bytes n vi KB Tc truy nhp rt cao (cc thanh ghi hot ng vi tc ca CPU); thi gian truy nhp khong 0,25ns Gi thnh rt t S dng lu ton hng u vo v kt qu ca cc lnh. Main memory (b nh chnh): Gm ROM v RAM, c kch thc kh ln; vi h thng 32 bt, dung lng khong 256MB-4GB Tc truy nhp tng i chm; thi gian truy nhp khong 50-70ns Gi thnh tng i r S dng lu lnh v d liu ca h thng v ca ngi dng. Cache (b nh cache): Dung lng tng i nh (khong 64KB n 32MB) Tc truy nhp cao; thi gian truy nhp khong 1-5ns Gi thnh t Cn c gi l b nh thng minh (smart memory) s dng lu lnh v d liu cho CPU x l gip gim thi gian truy cp b nh, tng tc x l. Secondary memory (b nh th cp b nh ngoi): C dung lng rt ln, khong t 20GB1000GB Tc truy nhp rt chm; thi gian truy nhp khong 5ms Gi thnh r S dng lu d liu lu di di dng cc tp (files). Gim gi thnh sn xut: Nguyn tc: Cc thnh phn t tin (thanh ghi v cache) c s dng vi dung lng nh; Cc thnh phn r tin hn (b nh chnh v b nh ngoi) c s dng vi dung lng ln;

Gii thch: Phn cp b nh lm tng hiu nng h thng v: Cache dung ho c CPU c tc cao v phn b nh chnh v b nh ngoi c tc thp; Cache ng vai tr trung gian chuyn tip d liu gia CPU v b nh chnh. Hn ch vic CPU phi truy cp d liu trc tip t b nh chnh gy tn thi gian.

Tng gi thnh ca h thng nh theo m hnh phn cp s r hn so vi h thng nh khng phn cp c cng tc . 12

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Cu hi 2.10: Phn bit b nh RAM tnh v RAM ng. Ti sao b nh RAM ng cn qu trnh lm ti v RAM ng thng r hn RAM tnh ? TL : SRAM DRAM

* SRAM (Static Ram) l loi RAM s dng mt mch lt trigo lng n lu mt bit thng tin. * Thng tin trong SRAM lun n nh v khng phi lm ti nh k.

* DRAM (Dynamic Ram): Mi bit DRAM da trn mt t in v mt transitor:Hai mc tch in ca t biu din 2 mc logic 0 v 1. Khng tch in: mc 0; Tch y in: mc 1. * Thng tin lu trong cc bit DRAM khng n nh v phi c lm ti nh k.

* Tc truy nhp SRAM nhanh hn nhiu so vi DRAM do cc bit c cu trc i xng. Cc * DRAM c gi thnh sn xut r hn mch nh SRAM chp nhn tt c cc chn a ch ti mt thi im (khng dn knh). RAM ng cn qu trnh lm ti v t thng t phng in, in tch trong t c xu hng b tn hao theo thi gian nn: Cn np li thng tin trong t thng xuyn trnh mt thng tin. Vic np li thng tin cho t l qu trnh lm ti (refresh), phi theo nh k. DRAM thng r hn SRAM do: Mi bt DRAM dng t transitor hn so vi 1 bit SRAM Do cu trc bn trong ca DRAM bit n gin hn nn mt cy linh kin trong DRAM thng cao hn nhiu so vi SRAM.

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Cu hi 2.12: So snh cc chun ghp ni a cng IDE, SATA v SCSI. TL : Ging Khc u l cc giao din ghp ni a cng vi my tnh. IDE SATA SCSI

Kt ni

Tc

u im

Nhc im

SATA s dng cng tp ATA/IDE s dng cp lnh mc thp nh ATA S dng Bus SCSI cng kiu dt 40 hoc 80 si nhng SATA s dng kt ni tt c cc thit b (8ghp ni cng vi ng truyn tin ni tip 16 thit b SCSI) bng mch chnh; tc cao qua 2 i dy; 5, 10, 20, 40MB/s vi cc 16, 33, 66, 100 v 1,5 Gb/s, 3,0 Gb/s v 6,0 SCSI c 133MB/s. Gb/s 160, 320, 640 MB/s vi cc SCSI mi. * Truyn d liu nhanh v * SCSI cung cp tc truyn hiu qu d liu v tnh n nh rt cao; * H tr cm nng * H tr cm nng cho php * S dng t dy hn ATA thm bt cng m ko cn tt truyn d liu. my Tc truyn d liu Gi thnh sn xut cc cng cn chm SCSI thng rt t.

Cu hi 2.13: Trnh by nguyn l c thng tin trn a CD. TL : Nguyn l c CD-ROM Tia laser t it pht laser i qua b tch tia n gng quay; Gng quay c iu khin bi tn hiu c, li tia laser n v tr cn c trn mt a; Tia phn x t mt a phn nh mc li lm trn mt a quay tr li gng quay; Gng quay chuyn tia phn x v b tch tia v sau n b cm bin quang in; B cm bin quang in chuyn i tia laser phn x thnh tn hiu in u ra. Cng ca tia laser c biu din thnh mc tn hiu ra.

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Cu hi 2.14: Nu nguyn l hot ng ca my in laser. TL : My in laser hot ng da trn nguyn tc chp nh in t bng tia laser. C th: Trng cm quang c np mt lp in tch nh 1 in cc; Tia laser t ngun sng laser i qua mt gng quay v b iu ch tia c iu khin bi tn hiu cn in n mt trng; nh sng laser lm thay i mt in tch trn mt trng; Mt in tch trn mt trng thay i theo tn hiu cn in; Khi trng cm quang quay n hp mc th in tch trn trng ht cc ht mc c tch in tri du. Cc ht mc dnh trn trng biu din m bn ca vn bn/thng tin cn in; Giy t khay c ko ln cng c in cc np in tch tri du vi in tch ca mc nn ht cc ht mc khi trng cm quang. Giy tip tc i qua trng sy nng lm cc ht mc chy ra v b p cht vo giy.

Cu hi 2.15: Nu nguyn l to hnh nh ca mn hnh LCD. TL : Mn hnh LCD (Liquid Crystal Display) l mn hnh to nh da trn s linh ng ca cc tinh th lng (Liquid Crystals). Tinh th lng l cc cht bn rn lng rt nhy cm vi nhit v dng in. Cc tinh th lng khng th t pht sng, chng c kh nng iu khin lng nh sng i qua theo nhit v dng in. Nguyn l to nh ca TFT LCD: - TFT LCD l thit b c iu khin bng cc tn hiu in. - Lp tinh th lng nm gia 2 lp trong sut cha cc in cc ITO (Indium Tin Oxide). - Cc phn t tinh th lng c sp t theo cc hng khc nhau theo s thay i in p t vo cc in cc ITO; - Hng ca cc phn t tinh th lng trc tip nh hng n cng nh sng i qua v n gin tip iu khin mc sng/ti (cn gi l mc xm) ca nh hin th; - Mu ca hnh nh c to bi mt lp lc mu; - Mc xm ca cc im nh c thit lp theo mc in p ca tn hiu video a vo. 15

Mnh Mc D09VT3

Cu hi 2.11: B nh cache l g ? Nu vai tr ca cache. Gii thch hai nguyn l hot ng ca cache. TL : Cache hay cn gi l b nh m l mt thnh phn trong h thng nh phn cp ca my tnh, cache ng vai trong trung gian, trung chuyn d liu t b nh chnh v CPU v ngc li. Vai tr ca cache Tng hiu nng h thng Dung ho c CPU c tc cao v b nh chnh c tc thp; Cache on v chun b trc mc tin CPU cn hn ch vic CPU phi truy nhp d liu t b nh chnh. T , lm cho thi gian trung bnh CPU truy nhp d liu t h thng nh tim cn thi gian truy nhp cache. Gim gi thnh sn xut Tuy Cache c gi thnh cao nhng c dung lng nh v ci thin ng k hiu nng cho h thng. V vy: Nu hai h thng nh c cng gi thnh, h thng nh c cache c tc truy nhp nhanh hn; Nu hai h thng nh c cng tc , h thng nh c cache c gi thnh r hn. Cc nguyn l hot ng ca cache Cache on trc yu cu v d liu v lnh ca CPU; D liu v lnh cn thit c chuyn trc t b nh chnh v cache CPU ch truy nhp cache gim thi gian truy nhp h thng nh. Cache hot ng da trn 2 nguyn l c bn: Nguyn l ln cn v khng gian (Spatial locality) Nguyn l ln cn v thi gian (Temporal locality) Nguyn l ln cn v khng gian: Nguyn l ln cn v thi gian: Nu mt nh ang c truy nhp th Nu mt nh ang c truy nhp th xc xut cc nh lin k vi n c truy xc xut n c truy nhp li trong tng lai nhp trong tng lai gn l rt cao; gn l rt cao; Ln cn v khng gian c p dng cho nhm Ln cn v thi gian c p dng cho d liu lnh/d liu c tnh tun t cao trong khng v nhm lnh trong vng lp; gian chng trnh; Cache s np sn khi lnh cha c vng lp t Do cc lnh trong mt chng trnh thng b nh chnh ph c c khi lnh ca tun t cache c c khi lnh t b nh vng lp theo nguyn l ln cn thi gian chnh ph c cc nh ln cn ca nh ang c truy nhp. -

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Mnh Mc D09VT3

 Cu hi loi 3 im Cu hi 3.1: Nu s v c im ca hai dng kin trc cache : Look Aside v Look Through. Trong hai dng kin trc trn, dng no c s dng nhiu hn trong thc t hin nay? Ti sao? TL: Look Aside Look Through

SRAM: RAM lu d liu cache - Tag RAM: RAM lu a ch b nh Cache Controller: B iu khin cache CPU: B x l trung tm- System Bus: Bus h thng. * Cache v b nh chnh cng kt ni vi bus * Cache nm gia CPU v b nh chnh. h thng ti CPU. * Cache thy chu k bus ca CPU trc, sau * Cache v b nh chnh thy chu k bus ca n chuyn chu k bus cho b nh chnh; CPU ti cng mt thi im. u im: u im * Thit k n gin, cc thnh phn dng chung * Hit nhanh do CPU kt ni vi cache bng Bus h thng, d thc hin. knh ring c tc cao. * Miss nhanh v khi CPU ko tm thy mc tin trong cache, n ng thi tm mc tin trong b nh chnh ti cng mt chu k xung nhp. * Gi thnh h thng r. Nhc im: Nhc im: Hit chm do cache kt ni vi CPU s dng bus * Thit k phc tp do ng truyn gia cache h thng thng c tn s lm vic khng cao v CPU v Cache vi b nh chnh l khc v bng thng hp. nhau. * Gi thnh h thng t tin * Miss chm do khi CPU khng tm thy mc tin trong cache, n cn tm mc tin trong b nh chnh ti mt chu k xung nhp tip theo. Look Through c dng nhiu hn do nhanh hn tuy c phc tp hn. Nhanh hn do c bus ring tc cao, bng thng rng kt ni cache vi CPU (hit nhanh)

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Mnh Mc D09VT3

Cu hi 3.2: So snh 3 phng php nh x cache: TL : Ging nhau : u l phng php nh x cache memory v u chia cache thnh cc dng. Tiu ch nh x trc tip nh x kt hp y nh x tp kt hp Cch chia b -Cache chia lm n dng t nh v 0 n n-1 cache -B nh chia m trang nh s t 0 n m-1. Mi trang li chia lm n dng nh s t 0 n n-1 c im nh x -Cache chia lm k ng nh s t 0 n k-1. Mi -Cache chia lm n dng ng chia lm n dng nh s t 0 n n-1 nh s t 0 n n-1 - B nh chia lm m dng -B nh chnh chia lm m nh s t 0 n m-1 (m trang nh s t 0 n m-1. >> n) Mi ng chia lm n dng nh s t 0 n n-1 Mt trang ca b nh c th nh x n mt ng bt k ca cache. nh x dng ca trang n dng ca ng l nh x c nh. TAG SET WORD Tag : a ch trang b nh cha dng c np vo cache

m dng b nh nh x n 1 dng trong b nh c 1 dng cache (nh x c nh x vo mt dng bt k trong cache (nh x mm) nh) TAG LINE WORD

TAG WORD Cch Tag : a ch trang b nh Tag : a ch dng trong b cache cha dng c np vo nh c np vo cache Word : a ch ca t trong qun l cache dng nh Set :a ch dng trong Line : a ch dng cache ng cache Word : a ch ca t trong Word : a ch ca t trong dng dng Cc tiu - Thit k n gin ch khc : - nh x c inh - Nhanh do nh x l c nh: khi bit ch nh c th tm c v tr ca n trong cache rt nhanh chng. - D gy xung t v c th to ra nhiu dng cache b nt c chai trong qu trnh hot ng ca cache. - Hiu qu tn dng khng gian cache khng cao - H s Hit thp - Thit k phc tp (cn b sung b so snh a ch). - nh x mm do. - Chm do vic s dng nh x khng c nh, nn vic truy tm a dng nh trong cache tn nhiu thi gian - Gim c xung t do nh x l khng c nh - Thit k phc tp (do chia cache thnh nhiu ng). - C nh + Mm do. - Nhanh do nh x trc tip c s dng cho nh x dng (chim s ln nh x); - Gim xung t do nh x t cc trang b nh n cc ng cache l mm do.

-Hiu qu tn dng khng -Phn b s dng khng gian cache c nng cao gian cache ng u, hiu sut cao - H s Hit cao. - H s Hit cao.

Trong thc t ngi ta s dng nh x tp kt hp nhiu nht v n pp ti nht kt hp c tt c u im ca 2 phng php trc. Nhc im c th khc phc bng cng ngh thit k hin i 18

Mnh Mc D09VT3

Cu hi 3.3: Nu cc phng php c ghi v cc chnh sch thay th dng cache. Ti sao thay th dng cache s dng phng php LRU c kh nng cho h s on trng (hit) cao nht ? TL : Phng php c : - Trng hp hit (mu tin cn c c trong cache): Mu tin c c t cache vo CPU. Thi gian CPU truy cp mu tin bng thi gian truy cp cache. B nh chnh khng tham gia. - Trng hp miss (mu tin cn c khng c trong cache): Mu tin trc ht c c t b nh chnh vo cache; Sau n c chuyn t cache vo CPU. y l trng hp miss penalty: thi gian truy nhp mu tin bng tng thi gian truy nhp cache v b nh chnh. Phng php ghi : - Trng hp hit: (mu tin cn c c trong cache) Ghi thng (write through): mu tin c ghi ng thi ra cache v b nh chnh; => nht qun d liu song tn bng thng. Ghi tr (write back): mu tin trc ht c ghi ra cache v dng cha mu tin c ghi ra b nh chnh khi dng b thay th; => tng tc v gim bng thng. - Trng hp miss (mu tin cn ghi khng c trong cache) Ghi c c li (write allocate / fetch on write): mu tin trc ht c ghi ra b nh chnh v sau dng cha mu tin c c vo cache; Ghi khng c li (write non-allocate): mu tin ch c ghi ra b nh chnh (dng cha mu tin khng c c vo cache).

Chnh sch thay th xc nh cc dng cache no c chn thay th bi cc dng khc t b nh. Cc chnh sch thay th: Random Replacement, FIFO (vo trc ra trc), LRU (Dng t c s dng gn y). Random Replacement * Cc dng cache c chn thay th mt cch ngu nhin. Do vy n cha tnh n vic dng cache ang thc s c s dng, v vy h s miss cao. FIFO * Cc dng cache no c ghi vo trc s b thay ra trc. Phng php ny c khuynh hng lc b nhng dng cache gi nht => c th gim miss do c tnh ton n yu t ln cn thi gian nhng vn cha thc x xt n mt dng cache gi vn c th s dng. * Thit k n gin, d ci * Thit k phc tp v cn c cc mch t. in t theo di trt t np vo dng cache LRU * Cc dng cache c la chn thay th l cc dng t c s dng gn y nht. Phng php ny cho h s miss thp nht so vi thay th ngu nhin v thay th FIFO * Thit k phc tp v cn c mch in t kim tra tn sut hot ng cc dng. Chnh sch LRU c h s hit cao nht v n c xem xt n cc dng ang c s dng, tun theo nguyn l ln cn thi gian cht ch nht. Cc dng c s dng gn y vi tn sut cao s c xc sut c s dng li ln, v vy cc dng s c gi li, cc dng t dng th u tin thay th.

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Mnh Mc D09VT3

Cu hi 3.4: RAID l g? Ti sao RAID c th nng cao c tnh tin cy v tc truy nhp h thng lu tr? Cu hnh RAID no ph hp hn vi my ch c s d liu trong ba loi RAID 0, RAID 1 v RAID 10? TL : - RAID (Redundant Array of Independent Disks) l mt cng ngh to cc thit b lu tr tin tin trn c s a cng, nhm t c cc mc ch: Tc cao, tnh tin cy cao, dung lng ln. - RAID l mt mng ca cc a cng. Ch cc cng theo chun SATA v SCSI mi h tr to RAID. - RAID to nn t 2 k thut l to lt a v soi gng a. To lt a (Disk Stripping) Soi gng a (Disk Mirroring)

RAID cung cp kh nng ghi v c song song cc khi ca cng mt n v d liu. * Ghi: D liu c chia thnh cc khi, mi khi c ghi ng thi vo mt a c lp; * c: Cc khi d liu c c ng thi cc a c lp, v c ghp li to d liu hon chnh. Tc truy nhp (c/ghi) c ci thin (bng tng dung lng ca cc a c lp tham gia k thut ny)

K thut soi gng a nhm t tin cy cao cho h thng lu tr. * Ghi: D liu c chia thnh cc khi, mi khi c ghi ng thi vo nhiu a c lp; Ti mi thi im ta lun c nhiu hn 1 bn sao vt l ca d liu. Tnh tin cy c ci thin.

Trong ba loi RAID 0, RAID 1 v RAID 10 RAID 10 ph hp hn vi my ch c s d liu v: RAID 10 kt hp c hai k thut soi gng v to lt a nn t tc v tnh tin cy cao (do ti mi thi im RAID lun cha nhiu bn copy ca d liu cc a vt l khc nhau) p ng c cho cc my ch i hi tnh an ton cao v hiu nng ln.

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Mnh Mc D09VT3

Cu hi 3.5: Nu cc c im chnh ca kin trc bus PCI v PCI-Express. Ti sao bus PCI-Express c kh nng h tr nhiu cp thit b truyn d liu ng thi vi tc cao? TL : Bus l mt h thng con (subsystem) c nhim v truyn d liu gia cc b phn trong my tnh. Bus PCI Bus PCI-Express - PCI (PeripheralComponent Interconnect) - Bus PCI Express (cn gi l PCIe) do Intel do Intel pht trin nm 1993. pht trin nm 2004. - Bng thng: 32 hoc 64 bits - PCI Express c cu trc t cc lin kt ni tip im n im. Bng thng 1-32 bit. - Tc truyn d liu: 133 MB/s (32bit, - Tc truyn d liu: Mt lung (lane): 33MHz); 266 MB/s (32bit, 66MHz hoc v1.x: 250 MB/s 64bit, 33MHz); 533 MB/s (64bit, 66MHz) v2.0: 500 MB/s - PCI h tr nhiu thit b kt ni ng thi, v3.0: 1 GB/s nhng ti mi thi im, ch c mt cp thit Knh 16 ln: b c s dng bus trao i d liu v1.x: 4 GB/s - PCI thc hin truyn d liu qua cc gioa v2.0: 8 GB/s dch, mi giao dch c thc hin trong 3 v3.0: 16 GB/s pha: Pha tu chn (khi to giao dch), Pha Cc khe cm PCI Express vt l c th cha a ch (xc nh a ch bn tham gia giao t 1 n 32 ln. dch), Pha d liu (truyn d liu). Khc vi PCI l bus chia s, bus PCI Express c kh nng cung cp ng truyn ring cho cc cp thit b tham gia s dng bus. ng thi PCI Express cng h tr nhiu cp thit b cng tham gia truyn d liu s dng cc lung truyn khc nhau nh b chuyn mch (crossbar switch) trn bng mch chnh. PCI Express s dng giao thc truyn ni tip v trnh c vn timing skew (lch thi gian) do giao thc ny khng i hi tt c cc bit ca mt n v d liu phi n ch ti mt thi im. Lch thi gian chnh l mt trong cc yu t lm gim tc .

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Mnh Mc D09VT3

Cu hi 3.6: C ch ng lnh (pipeline) ca CPU thng gp phi nhng vn g? Nu mt hng gii quyt xung t d liu trong pipeline khi thc hin on chng trnh sau: ADD R4, R4, #300 ; R4 R4+300 ADD R1, R2, R3 ; R1 R2+R3 CMP R1, #100 ; so snh R1 vi 100 SUB R5, #2000 ; R5 R5 - 2000 bit rng mi lnh c chia thnh 5 giai on trong pipeline: c lnh (IF), gii m & c ton hng (ID), truy nhp b nh (MEM), thc hin (EX) v lu kt qu (WB). TL : C ch ng lnh thng gp phi nhng vn : - Vn xung t ti nguyn (resource conflicts): Gm xung t truy nhp b nh v xung t truy nhp cc thanh ghi - Tranh chp d liu (Data hazards): vn read after write hazard (RAW). - Cc lnh r nhnh (Branch instructions): Khng iu kin, C iu kin, Gi thc hin v tr v t chng trnh con.

Xt on chng trnh: (1) ADD R4, R4, #300 ; R4 R4+300 (2) ADD R1, R2, R3 ; R1 R2+R3 (3) CMP R1, #100 ; so snh R1 vi 100 (4) SUB R5, #2000 ; R5 R5 - 2000 Nh vy, khi lnh 2 cha thc hin n bc ghi kt qu WB th lnh 3 c c, gii m v c ton hng. Trng hp ny l xung t tranh chp d liu RAW. Khc phc : Ta vit on chng trnh theo th t sau : (2). ADD R1, R2, R3 ; R1 R2+R3 (1). ADD R4, R4, #300 ; R4 R4+300 (4). SUB R5, #2000 ; R5 R5 2000 (5). No-op ; chn lnh rng (3). CMP R1, #100 ; so snh R1 vi 100 Ta thy rng sau khi kt qu ca R1 trong lnh u tin c ghi th n mi tham gia vo bc gii m v c ton hng ca lnh cui => khc phc c RAW

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Mnh Mc D09VT3

Cu hi 3.7: C ch ng lnh (pipeline) ca CPU thng gp phi nhng vn g? Nu mt hng gii quyt xung t d liu trong pipeline khi thc hin on chng trnh sau: ADD R4, R4, #300 ; R4 R4+300 Bit rng mi lnh c chia thnh 5 giai ADD R1, R1, R3 ; R1 R1+R3 on trong pipeline: c lnh (IF), gii m & SUB R1, R1, #100 ; R1 R1 - 100 c ton hng (ID), truy nhp b nh SUB R5, #2000 ; R5 R5 - 2000 (MEM), thc hin (EX) v lu kt qu (WB). TL : C ch ng lnh thng gp phi nhng vn : - Vn xung t ti nguyn (resource conflicts): Gm xung t truy nhp b nh v xung t truy nhp cc thanh ghi - Tranh chp d liu (Data hazards): vn read after write hazard (RAW). - Cc lnh r nhnh (Branch instructions): Khng iu kin, C iu kin, Gi thc hin v tr v t chng trnh con. Xt on chng trnh: (1) ADD R4, R4, #300 ; R4 R4+300 (2) ADD R1, R1, R3 ; R1 R1+R3 (3) SUB R1, R1, #100 ; R1 R1 - 100 (4) SUB R5, #2000 ; R5 R5 - 2000 Nh vy, khi lnh 2 cha thc hin n bc ghi kt qu WB th lnh 3 c c, gii m v c ton hng. Trng hp ny l xung t tranh chp d liu RAW. Khc phc : Ta vit on chng trnh theo th t sau : (2). ADD R1, R1, R3 ; R1 R1+R3 (1). ADD R4, R4, #300 ; R4 R4+300 (4). SUB R5, #2000 ; R5 R5 2000 (5). No-op ; chn lnh rng (3). SUB R1, R1, #100 ; R1 R1 100 Ta thy rng sau khi kt qu ca R1 trong lnh u tin c ghi th n mi tham gia vo bc gii m v c ton hng ca lnh cui => khc phc c RAW Cu hi 3.8: Cho on chng trnh sau (R1, R2 l cc thanh ghi): Lnh ngha Ch LOAD R2, #400 R2 100 Tc th LOAD R1, #1200 STORE (R1), R2 SUBSTRACT R2, #15 ADD 1200, #10 ADD R2, (R1) R1 1200 M(R1) R2 R2 R2 - 15 M(1200)M(1200) + 10 R2 R2 + M(R1) Tc th Gin thip qua thanh ghi Trc tip Tc th Gin tip qua thanh ghi

GT R2 400 400 400 385 385 795 23

Mnh Mc D09VT3

Cu hi 3.9: Cho on chng trnh sau (R1, R2 l cc thanh ghi): Lnh LOAD R2, #500 LOAD R1, #2000 STORE (R1), R2 ADD 2000, #30 ngha R2 500 R1 2000 M(R1) R2 M(2000) M(2000) + 30 Ch Tc th Tc th Gin tip thanh ghi Trc tip Tc th Gin tip thanh ghi GT R2 500 500 500 500 485 1015

SUBSTRACT R2, R2R2 - 15 #15 ADD R2, (R1) R2R2 + M(R1)

Cu hi 3.10: Cho mt dy s nguyn gm 10 phn t lu trong b nh bt u t a ch 1000. Vit chng trnh s dng tp lnh ca CPU tnh: a. Tng ca cc s dng lu kt qu vo nh c a ch 2000. b. Tng ca tt c cc s trong dy lu kt qu vo nh c a ch 2010. TL : a). LOAD R1,#10 LOAD R2,#1000 LOAD R0,#0 Loop: CMP (R2),0 ; R20? BRANCH-IF-LESS-THAN Skip: ADD R0,(R2) Skip: INCREMENT R2 DECREMENT R1 BRACNH-IF-GREATER-THAN Loop: STORE 2000,R0 Loop: ADD R0,(R2) INCREMENT R2 DECREMANT R1 BRANCH-IF-GREATER-THAN Loop: STORE 2000,R0 b). LOAD R1,#10 LOAD R2,#1000 LOAD R0,#0

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Mnh Mc D09VT3