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ABSTRACT

Rapid growth in the VLSI fabrication has lead to the decreased device geometries and the increased transistor densities of mixed signal high-frequency integrated circuits. ircuits consume high power. !his pro"ect wor# has been carried out for the designing a $%S &LL frequency synthesi'er targeting ()*+) applications in the ,.+)-' range to provide low-"itter output with low power consumption. !his frequency synthesi'er in a wireless communication acts as a local oscillator providing a constant frequency of ,.+)-. at all the time. In wireless transceiver system it is implemented as an integrated circuit /I or chip0 that allows very high-speed /1 2)3&S0 communication between the transmitter and receiver.

!his research focuses on the analysis and design of low noise4 low power and high resolution R5 &LL frequency synthesi'ers in $%S technology. !his is an important topic because the recent rapid growth in wireless communication has increased the demand for fully integrated4 small si'e4 low cost and low power consumption transceivers. 6ith a constantly decreasing feature si'e in $%S processes4 it is possible to design a fully integrated radio-frequency /R50 front-end transceiver in building bloc#s of a $%S R5 front-end transceiver. $%S technology. 7 &hase-loc#ed loop /&LL0 based frequency synthesi'er is one of the #ey

7 &LL based 5requency Synthesi'er consists of four bloc#s namely &hase and 5requency 8etector /&5804 harge &ump and Loop 5ilter / & 9 L&:4 Voltage ontrolled %scillator /V %0 and 5requency 8ivider /580.!his pro"ect wor# implements a modified latch-based architecture for the &hase-5requency 8etector /&580 to reduce the dead-'one problem. !his pro"ect wor# also implements a modified &584 which reduces

the node capacitances and lea#age paths4 in turn reducing overall power by ;:< in &58. 7 modified charge pump is proposed to match the charging and discharging of currents into and from the loop filter. 7 L -V % is designed and characteri'ed= it has minimal non-linearity in its characteristics and maintains a low-gain which enhances closed-loop stability. !he L based V % operates at frequency of ,.+)-' with the control voltage varying from :.+-2.>V. !he entire design of &LL has been carried out in :.2?um $%S technology. 5or all the bloc#s of &LL4 the schematic is captured and the layout implementation is done for :.2?um technology. !he suitable test setup to analy'e the performance of &584 &4 V %4 58 and the complete &LL is created. !he simulation results for all these bloc#s are verified. !he output frequency of &LL is ,.+)-..Since the entire wireless communication standard operates in this frequency range. !his frequency is specified in the IS$ band by I!@-! for communication purpose. !he :.2?um $%S technology supports up to ,)-.4 but the 8ivide-by-,+ circuit has been designed to provide the exact result of ,.+)-..!he complete &LL is implemented and the loc#ing time is found to be :.+,> ns4 "itter is found to be A.,ps and a power consumption of the design is found to be 2.>m6. !he area of the complete &LL frequency synthesi'er is found to be >,(.B;2CmD(A2.:B: Cm. &reviously we had frequency synthesi'er which has a &LL and V % chip implemented separately on the & 3 in order to avoid the electromagnetic interference caused by inductors. In this wor#4 the number of inductors is reduced from > to ,.!his provides the implementation of V % on the chip &LL.!his not only consumes less area but also consumes less power.

!73LE %5 %F!EF!S
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(. 8ESI)F 7F8 I$&LE$EF!7!I%F %5 &&LL 5REH@EF I SIF!-ESI.ER (.2. 5@LL @S!%$ 8ESI)F 5L%6 (.,. I$&LE$EF!7!I%F %5 3L% GS (.,.2. S -E$7!I 8ESI)F %5 E7 - 3L% G (.,.2.2. S -E$7!I 8ESI)F %5 &58 (.,.2.,. S -E$7!I 8ESI)F %5 & 7F8 L&5 (.,.2.(. S -E$7!I %5 V % (.,.2.+. S -E$7!I %5 5REH@EF I 8IVI8ER (.,.2.>. S -E$7!I %5 &&LL 5REH@EF I SIF!-ESI.ER (.,.2.;. &R%!E !I%F IR @I! (.,.2.B. S -E$7!I %5 &&LL 5REH@EF I SIF!-ESI.ER I +. &-ISI 7L 8ESI)F I$&LE$EF!7!I%F +.2. 8ES RI&!I%F %5 &-ISI 7L L7I%@! +.2.2. &-ISI 7L L7I%@! %5 &58 +.2.,. &-ISI 7L L7I%@! %5 & 7F8 L&5 +.2.(. &-ISI 7L L7I%@! %5 V % +.2.+. &-ISI 7L L7I%@! %5 58 +.2.>. &-ISI 7L L7I%@! %5 &R%!E !I%F IR @I! +.2.;. &-ISI 7L L7I%@! %5 5IF7L -I& +.,. L7I%@! VERI5I 7!I%F

2A

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+B +A >2 >, >( >(

>+ >> >B >? >A ;: ;, ;A

LIS! %5 5I)@RES
5I)@RE 2.2. )EFERI 6IRELESS !R7FS EIVER SIS!E$ 5I)@RE 2.,. IS$ 37F8 5I)@RE 2.(. ()*+) 6IRELESS !ER$IF7L 5I)@RE 2.+. 5REH@EF I SIF!-ESI.ER 5I)@RE 2.>. JI!!ER 5I)@RE ,.2. 37SI 3L% G 8I7)R7$ %5 &LL 5I)@RE ,.,. 3L% G 8I7)R7$ %5 LIFE7R &LL 5I)@RE ,.(. 3L% G 8I7)R7$ %5 8I)I!7L &LL 5I)@RE ,.+. EK%R )7!E &-7SE 8E!E !%R 5I)@RE ,.>. %@!&@! %5 &-7SE 8E!E !%R 5I)@RE ,.;. 3L% G 8I7)R7$ %5 7LL 8I)I!7L &LL 5I)@RE ,.B. 3L% G 8I7)R7$ %5 &&LL 5I)@RE (.2. 5@LL @S!%$ 8ESI)F 5L%6 5I)@RE (.,. S -E$7!I %5 &58 5I)@RE (.(. SI$@L7!I%F %5 &58 L% G S!7!E 5I)@RE (.+. SI$@L7!I%F %5 &58 LE78 S!7!E 5I)@RE (.>. SI$@L7!I%F %5 &58 L7) S!7!E 5I)@RE (.;/a0. -7R)E &@$& 7F8 L%6 &7SS 5IL!ER 5I)@RE (.;/b0 S -E$7!I %5 -7R)E &@$& 7F8 L%6 &7SS 5IL!ER 5I)@RE (.B. S -E$7!I %5 -7R)E &@$& (: 2 , , ( > ; 2, 2( 2+ 2+ 2> 2B 2A ,+ ,> ,> ,; ,? (:

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(2 (( (+ (> (; (B (B (? (A +:

5I)@RE (.2B/b0.S -E$7!I %5 &&LL 5REH@EF I SIF!-ESI.ER I 5I)@RE (.2?.SI$@L7!I%F %5 &&LL 5REH@EF I SIF!-ESI.ER I 5I)@RE +.2. L7I%@! %5 &58 5I)@RE +.,. . L7I%@! %5 & 9 L& 5I)@RE +.( . L7I%@! %5 V % 5I)@RE +.+. L7I%@! %5 5REH@EF I 8IVI8ER 3I ,+ IR @I! 5I)@RE +.> . L7I%@! %5 &R%!E !I%F IR @I! 5I)@RE +.; . L7I%@! %5 &&LL 5REH@EF I SIF!-ESI.ER I 5I)@RE +.B .8R VERI5I 7!I%F %5 &&LL 5REH@EF I SIF!-ESI.ER I 5I)@RE +.? .LVS VERI5I 7!I%F %5 &&LL 5REH@EF I SIF!-ESI.ER I 5I)@RE +.A./a04/b04/c0.R EK!R7 !E8 VIE6S 5I)@RE +.2:. &%S! L7I%@! SI$@L7!I%F %5 &&LL 5REH@EF I

+2 +2 +( ++ +> +> +; +B +?

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>: >2

SIF!-ESI.ER I

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LIS! %5 !73LES
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733REV7!I%FS
78 -7nalog !o 8igital onverter 3&5-3and &ass 5ilter $%S - omplementary $etal %xide Semiconductor &&LL - harge &ump &hase Loc#ed Loop & - harge &ump 87S - 8irect 7nalog Synthesis 8 88S - 8irect 8igital Synthesis 8F L 8own 8R 58 - 5requency 8ivider 5$ - 5requency $odulation 5SG - &hase Shift Geying )8SII)S$I - Integrated ircuit IS$-Industrial 4Scientific and $edicine L7F L5 - Loop 5ilter LF7-Low Foise 7mplifier L% - Local %scillator LVSF$%S - F-channel $%S &7-&ost 7mplifier

&7F &8 - &hase 8etector &58 - &hase and 5requency 8etector &LL - &hase loc#ed Loop &$%S - &-channel $%S R KR5-Radio 5requency V % - Voltage ontrolled %scillator VLSI - Very Large Scale Integration 67F 6 8$7-6ideband ode 8ivision $ultiple 7ccess 6i-5i6i-$7K-

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