Lab 3 Questions: 1.

What is the purpose of the tmp_reg from the Verilog code provided in lab, and what happens if this register is removed from the code !he tmp_reg holds the product of slv_reg" and slv_reg1, which is then put into slv_reg# in the proceeding line. $s the code uses non%bloc&ing s'nta(, this happens in one instance. !he reason wh' this is necessar' is because slv_reg# is because slv_reg# changes values as an output and ma' not hold its value in the ne(t cloc& c'cle. tmp_reg, on the other hand, can be the temporar' product and be assigned to slv_reg# during the cloc& c'cle. #. What values of slv_reg" and slv_reg1 would produce incorrect results from the multiplication bloc& What is the name commonl' assigned to this t'pe of computation error, and how would 'ou correct this )rovide a Verilog e(ample and e(plain what 'ou would change during the creation of the corrected peripheral. *f slv_reg" and+or slv_reg1is a fractional number or has a decimal value ,ie.. 1.- or #.3 or etc., then the value produced will be a whole number rather than a fractional+decimal number because the program we made ta&es in int values and therefore it drops the numbers after the decimal. !his is usuall' a precision error. /o to correct this, the variable can be declared as a double ,and can have long or short if that is needed according to the precision needed in the calculation. and during the peripheral creation, 'ou might change the version of the multipl'.h file used ,if that e(ists. and in the case of the verilog file, there might be changes in the si0e of the register re1uired.