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5

Compal Confidential

Fortworth20 EDW10 Schematic Document


Intel Protability Processor with ATi RC300ML + IXP150
2004-05-26
B

REV: 1.0

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


Cover Sheet
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

Block Diagram

Compal confidential
D

Model Name : Fortworth 20


File Name : LA-2301 Rev: 0.1

NorthWood-MT -- 533
Presscot-MT--533
uFCPGA 478 Pin

Fan Control
page 37

Thermal Sensor

Clock Generator

ADM1032

ICS951402

page 5

page 17

page 4,5,6
HA#(3..31)

HD#(0..63)

FSB

400/533 MHz

CRT Connector

Memory BUS(DDR)

200pin DDR-SODIMM X1

2.5V 200MHz DDR266/333

page 18

BANK 0, 1, 2, 3

ATi RC300ML

LVDS Connector

page 15,16

BGA-718 Pin

page 18

TV Connector

page 13,14

page 7,8,9,10,11,12

page 10

On Board RAM
x 8 cells

A-Link

66MHz 4X 266MB/s

PCI BUS

Mini-PCI

IEEE 1394

LAN

TI TSB43AB21A

Realtek RTL8100CL

page 28

page 27

3.3V 33MHz

CardBus / SD / SM /
MMC / MS Pro / XD

ENE CB714

page 26

USB port 0, 1, 2, 3 USBx3

ATi SB200C
IXP 150
BGA-457Pin

USB conn

3.3V 48MHz USB2.0

page 29

3.3V 24.576MHz

AC-Link

page 19,20,21,22

page 24

3.3V ATA100

RJ45

page 26

Slot 0

page 25

5 in 1
Conn.
page 25

LPC BUS

AC97 Codec

3.3V 33MHz

Super I/O

K/B Controller

SMsC
LPC47N217
page 32

Power On/Off
Reset & RTC

HDD

CDROM

page 23

ALC250

MDC
page 30

page 30

page 23

AMP& Phone
Jack page 31

ENE KB910
page 33

RJ11
page 30

page 35

DC/DC Interface
Suspend page 37
A

Power Circuit
DC/DC

Parallel Port

Int.KBD

FIR Module

EC I/O Buffer

page 32

TFDU6102-TR3
page 32

page 33

Touch Pad

T/P Switch Board

page 34
A

Flash ROM
SST39VF040-90-4C-NH
page 34

page 38,39,40,41
42,43,44,45,46

Title
Size
B
Date:

Compal Electronics, Inc.


Block Diagram
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

Voltage Rails

Board ID Table for AD channel

Power Plane

Description

S0-S1

S3

S5

Vcc
Ra

VIN

Adapter power supply (19V)

N/A

N/A

N/A

Board ID

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A
OFF

0
1
2
3
4
5
6
7

+CPU_CORE

Core voltage for CPU

ON

OFF

+CPU_VID

1.2V rail for Processor VID

ON

OFF

OFF

+1.25VS

1.25V switched power rail

ON

OFF

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+2.5VALW

2.5V always on power rail

ON

ON*

ON*
OFF

+2.5V

2.5V power rail

ON

ON

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5V

5V power rail

ON

ON

OFF

+5VS

5V switched power rail

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

RTCVCC

RTC power

ON

ON

ON

External PCI Devices


DEVICE

IDSEL #

REQ/GNT #

NB Internal VGA

N/A

N/A

1394

AD16

LAN

AD19

CARD BUS

AD20

5 in 1

AD20

Mini-PCI

AD18

C/D

EC SM Bus1 address

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

Board ID
0
1
2
3
4
5
6
7

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

VAD_BID min
0V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

VAD_BID typ
0V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

VAD_BID max
0V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

PCB Revision

0.1

PIRQ

EC SM Bus2 address

Device

Address

Device

Address

Smart Battery

0001 011X b

ADM1032

1001 100X b

EEPROM(24C16)

1010 000X b

ALC250

0000 000X b

I2C / SMBUS ADDRESSING


A

DEVICE

HEX

ADDRESS

DDR SO-DIMM 0

A0

1010001X

CLOCK GENERATOR (EXT.)

D2

1101001X

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


Notes
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

HA#[3..31]

+CPU_CORE

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

H_BR0# PU R :
Intel
220 Ohm
ATi RC300 51 Ohm
ATi RS250 56 Ohm

+CPU_CORE

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#

H_ADS#

R1 1

2 56_0402_5%

R2 1
2 51_0402_5%
H_BREQ0#
H_BPRI#
H_BNR#
H_LOCK#

7
7
7
7

17 CLK_EXT_CPU
17 CLK_EXT_CPU#

7
7
7

H_HIT#
H_HITM#
H_DEFER#

H_BREQ0#

CLK_EXT_CPU
CLK_EXT_CPU#

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

J1
K5
J4
J3
H3
G1

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AC1
V5
AA3
AC3

AP#0
AP#1
BINIT#
IERR#

H6
D2
G2
G4

BR0#
BPRI#
BNR#
LOCK#

AF22
AF23

BCLK0
BCLK1

F3
E3
E2

POWER

HOST
ADDR

Northwood-MT
Prescott-MT

HOST
ADDR

CONTROL

CLK

CON
TROL

HIT#
HITM#
DEFER#

GND

H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

H_IERR#

K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
AB1

HD#[0..63]

POWER
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74

JP1A

BOOTSELECT

H_REQ#[0..4]

F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12

H_REQ#[0..4]

AD1

HA#[3..31]

+CPU_CORE

A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

HD#[0..63] 7

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

+CPU_CORE

AMP_1473129-1

H_BOOTSELECT 44

R_C

1
2
R5
@0_0402_5%
@

Pop: Northwood
Depop: Prescott

Title
Size
B
Date:
5

Compal Electronics, Inc.


CPU(1/2)
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

C1
R17
@10P_0402_50V8J@22_0402_5%

2
C4
2
C5
2
C6
2
C7
2
C8
2
C9
2
C10
2
C11

H_INTR
1
180P_0402_50V8J
H_NMI
1
180P_0402_50V8J
H_CPUSLP#
1
180P_0402_50V8J
H_SMI#
1
180P_0402_50V8J
H_STPCLK#
1
180P_0402_50V8J
H_IGNNE#
1
180P_0402_50V8J
H_A20M#
1
180P_0402_50V8J
H_INIT#
1
180P_0402_50V8J

7
7
7

H_RS#0
H_RS#1
H_RS#2

H_TRDY#

19
19
19
19
19
19

H_A20M#
H_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#

19
19
19
7

H_INTR
H_NMI
H_INIT#
H_RESET#

7
7
12,17
12,17

H_DBSY#
H_DRDY#
BSEL0
BSEL1

H_A20M#
C6
H_FERR#
B6
H_IGNNE#
B2
H_SMI#
B5
H_PW RGD AB23
H_STPCLK#
Y4
H_INTR
H_NMI
H_INIT#
H_RESET#

51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%

2
2
2
2
2
2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

THERMDA
THERMDC
THERMTRIP#

THER
MAL

Northwood-MT
Prescott-MT

AC6
AB5
AC4
Y6
AA5
AB4

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

D4
C1
D5
ITP_TMS F7
ITP_TRST# E6

TCK
TDI
TDO
TMS
TRST#

MISC

2 61.9_0603_1% COMP0 L24


2 61.9_0603_1% COMP1 P1

1
1

VSSA
ITP_CLK0
ITP_CLK1

ITP
CLK

GROUND

AMP_1473129-1

CPU Temperature Sensor

1
2
3
4

R39

+3VS

10mil

C15
H_THERMDA
@2200P_0603_50V7K
10mil
2
H_THERMDC
30,33 EC_SMC2
30,33 EC_SMD2

D+

D-

SCLK

SDATA

VDD1

ALERT#

THERM#

GND

H_DPSLPR#

R93
17,19,44 PM_STPCPU#

Q4
MMBT3904_SOT23

U1

R86
4.7K_0402_5%

R42
10K_0402_5%

C14
0.1U_0402_10V6K

R40
R41

+3VS_THMSEN

200_0402_5%

2 2

4.7K_0402_5%

44
44
44
44
44
44

R_G

Pop: Northwood Imp: 50 Ohm


Depop: Prescott Imp:60 Ohm

2
@0_0402_5%
1
R19
1
R20

+CPU_CORE

7
7
7
7

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

F21
J23
P23
W23

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

7
7
7
7

ADDR

ADSTB#0
ADSTB#1

L5
R5

H_ADSTB#0 7
H_ADSTB#1 7

DATA

DBI#0
DBI#1
DBI#2
DBI#3

E21
G25
P26
V21

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

DBR#

AE25

NC: W/O ITP

PROCHOT#
MCERR#
SLP#

C3
V6
AB26

H_PROCHOT#

NC1
NC2
NC3
NC4
NC5

A22
A7
AF25
AF24
AE21

R21
R22
R23
R24
R25
R26
R27

1
1
1
1
1
1
1

H_CPUSLP#

56_0402_5%

56_0402_5%

2 56_0402_5%
2 56_0402_5%
2 56_0402_5%
2 56_0402_5%
2 56_0402_5%
2 300_0402_5%
2 56_0402_5%
CPU_GHI# 20

for mobile CPU


C

7
7
7
7

+CPU_CORE

1
R34
H_PROCHOT# 43

2
51_0402_5%

H_CPUSLP# 19

Intel 852GME RDDP 56Ohm.


ATi RC300 51Ohm
ATi RS250 56 Ohm

+CPU_VID

8
7
6
5

C13
0.1U_0402_10V6K

Pop: Prescott
Depop: Northwood

R38
680_0402_5%
2
1

10K_1206_8P4R_5%
1
2 10K_0402_5%
1
2 10K_0402_5%

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

+CPU_VID

H_VID_PWRGD 35
A

Title
Size
B
Date:
3

1
R18

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

Q3
MMBT3904_SOT23

+GTLVREF1

E22
K22
R22
W22

25mil

ADM1032ARM_RM8

R16
86.6_0603_1%
2

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

+3VS

RP2

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12

MISC

+3VS

1
C3
1U_0603_10V6K
2

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
CPU_GHI#
A6
AD25 H_DPSLPR#

MISC

COMP0
COMP1

width= 10mil
51.1 Ohm for Northwood,
61.9 Ohm for Prescott

AE26

C2
220P_0402_50V7K

VCCVID

AC26
AD26

OPTIMIZED/COMPAT#

AF4

R36
R37

25mil

VIDPWRGD

R25 ->
Pop: Prescott
Depop: Northwood

MISC

VCCSENSE
VSSSENSE
VCCVIDLB

AD2

VCCSENSE
A5
VSSSENSE
A4
2 +VCCVIDLB AF3
0_0603_5%
VSSA
AD22

VCCSENSE
VSSSENSE
1
+CPU_VID R35

VID0
VID1
VID2
VID3
VID4
VID5

44
44

VCCIOPLL
VCCA

AE5
AE4
AE3
AE2
AE1
AD3

C12
33U_D2_8M_R35

+VCCIOPLL AD20
+VCCA
AE23

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

LQG21F4R7N00_0805

1K_1206_8P4R_5%

VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181

LQG21F4R7N00_0805
L1 1
2
L2 1
2

ITP

F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5

+CPU_CORE

ITP_TCK
ITP_TDI

8
7
6
5

AA21
AA6
F20
F6

DATA

RP1

1
2
3
4

AF26

MISC

J26
K25
K26
L25

GTLREF0
GTLREF1
GTLREF2
GTLREF3

ITP

R28 1
R29 1
R30 1
R31 1
R32 1
R33 1

DP#0
DP#1
DP#2
DP#3

LEGACY

DBSY#
DRDY#
BSEL0
BSEL1

15mil

+GTLVREF1

REF

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

H5
H2
AD6
AD5
B3
C4

R10
0_0402_5%

GROUND

CON
TROL

LINT0
LINT1
INIT#
RESET#

H_THERMTRIP#A2

+CPU_CORE 6 H_THERMTRIP#

RS#0
RS#1
RS#2
RSP#
TRDY#

D1
E5
W5
AB25

H_THERMDA
H_THERMDC

Place within 1.5" from CPU

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128

F1
G5
F4
AB2
J6

+CPU_CORE

1. < 1.5" from the CPU Ball.


2. 220P cap. has to be closed
to the ball as possible.
R12
3. Intel: 0.63VCC.
51.1_0603_1%
ATi: 0.66VCC.

JP1B

SKTOCC#

H_FERR#
2
56_0402_1%
H_PW RGD
2
300_0402_1%
H_THERMTRIP#
2
56_0402_1%
2 H_RESET#
51_0402_5%

AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D10
D12
D14
D16
D18
D20
D21
D24
D3
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5

+CPU_CORE

1
R11
1
R13
1
R14
1
R15

GTL Reference Voltage

H_SKTOCC#

GND

Compal Electronics, Inc.


CPU(2/2)
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

+CPU_CORE

1
+

+CPU_CORE

+
D

C16
220U_6SVPC220MV_6.3VM_R15

1
+
C18
220U_6SVPC220MV_6.3VM_R15

1
+
C19
220U_6SVPC220MV_6.3VM_R15

1
C20
220U_6SVPC220MV_6.3VM_R15

1
C21
22U_1206_10V4Z

1
C22
@22U_1206_10V4Z

1
C23
22U_1206_10V4Z

1
C24
22U_1206_10V4Z

1
C25
22U_1206_10V4Z

1
C26
22U_1206_10V4Z

C27
22U_1206_10V4Z

+CPU_CORE
+CPU_CORE

C28
220U_6SVPC220MV_6.3VM_R15

1
+
C30
220U_6SVPC220MV_6.3VM_R15

1
+
C31
220U_6SVPC220MV_6.3VM_R15

C32
220U_6SVPC220MV_6.3VM_R15

1
C33
22U_1206_10V4Z

1
C34
@22U_1206_10V4Z

1
C35
22U_1206_10V4Z

1
C36
22U_1206_10V4Z

1
C37
22U_1206_10V4Z

1
C38
22U_1206_10V4Z

C39
22U_1206_10V4Z

+CPU_CORE
+CPU_CORE

1
+

1
+
C649
220U_6SVPC220MV_6.3VM_R15

1
+

C17
220U_6SVPC220MV_6.3VM_R15

+
C29
C650
@220U_6SVPC220MV_6.3VM_R15 220U_6SVPC220MV_6.3VM_R15
2
2

2
C

1
C40
@22U_1206_10V4Z

1
C41
@22U_1206_10V4Z

1
C42
@22U_1206_10V4Z

1
C43
@22U_1206_10V4Z

1
C44
@22U_1206_10V4Z

1
C45
@22U_1206_10V4Z

C46
@22U_1206_10V4Z

+CPU_CORE

+CPU_CORE

1
+

C651
@220U_6SVPC220MV_6.3VM_R15

1
C47
@22U_1206_10V4Z

1
C48
@22U_1206_10V4Z

1
C49
@22U_1206_10V4Z

1
C50
@22U_1206_10V4Z

1
C51
@22U_1206_10V4Z

1
C52
22U_1206_10V4Z

C53
22U_1206_10V4Z

+CPU_CORE

Layout note :
Place close to CPU power and
gro und pin as possible
(<1inch)

Sanyo : SGA27221300 (220uF, 13m Ohm)

1
C55
@22U_1206_10V4Z

1
C56
@22U_1206_10V4Z

1
C57
@22U_1206_10V4Z

C54
@22U_1206_10V4Z

2
R43

1
300_0402_5%

2
C58

1
@1U_0603_10V6K

+CPU_CORE

Q1
1

H_THERMTRIP#

5 H_THERMTRIP#

MAINPWON 38,39,41

2SC2411K_SC59

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


CPU Decoupling
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

of

48

HA#[3..31]
D

HA#[3..31] 4

H_REQ#[0..4]

H_REQ#[0..4] 4

HD#[0 ..63]

HD#[0..63] 4

U51A

RB751V_SOD323

R801

19,23,32,33 NB_RST#

NB_RST#_R

270K_0402_5%

0.1U_0402_10V6K
C655
2
1
R709

Note: PLACE CLOSE TO RC300M,


USE 10/10 WIDTH/SPACE
+CPU_CORE

PLACE CLOSE TO U27 Ball


W28, USE 20/20
WIDTH/SPACE

R716

51.1_0603_1%

R712
86.6_0603_1%

1U_0603_10V6K

+1.8VS

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ0#
H_LOCK#

5
5
5
5

H_RESET#
H_RS#2
H_RS#1
H_RS#0

5
4
4

H_TRDY#
H_HIT#
H_HITM#

22
+CPU_CORE

H_ADSTB#1

CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
CPU_BR0#
CPU_LOCK#

H_RESET#
H_RS#2
H_RS#1
H_RS#0

A17
G25
G26
J25

CPU_CPURSET#
CPU_RS2#
CPU_RS1#
CPU_RS0#

H_TRDY#
H_HIT#
H_HITM#

F26
J26
H25

CPU_TRDY#
CPU_HIT#
CPU_HITM#

A9
AH5
AG5
C7

CPU_RSET
SUS_STAT#
SYSRESET#
POWERGOOD

V28

CPU_COMP_N

W29

CPU_COMP_P

H23

CPVDD

J23

CPVSS

SUS_STAT#_R
NB_RST#_R
NB_PWRGD

R710 1

2 24.9_0603_1% COMP_N

R711 1
2 49.9_0402_1% COMP_P
L40
CPVDD
1
2
HB-1M2012-121JT03_0805
10U_0805_10V4Z
1
2CPVSS
C656
+NB_GTLREF

C658
220P_0402_50V8K

W28

CPU_VREF

Y29
Y28

THERMALDIODE_N
THERMALDIODE_P

B17

TESTMODE

1
A

B26
C30
A27
B29
C28
C29
B28
D28
D26
B27
C26
E25
E26
A26
B25
C25
A28
D27
E27

HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
H_DBI#1
H_DSTBN#1
H_DSTBP#1

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#

F24
D24
E23
E24
F23
C24
B24
A24
F21
A23
B23
C22
B22
C21
E21
D22
D23
E22
F22

HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
H_DBI#2
H_DSTBN#2
H_DSTBP#2

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#

B21
F20
A21
C20
E20
D20
A20
D19
C18
B20
E18
B19
D18
B18
C17
A18
F19
E19
F18

HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
H_DBI#3
H_DSTBN#3
H_DSTBP#3

DATA GROUP 1

ADDR. GROUP 0

PART 1 OF 6

L27
K25
H26
J27
L26
G27
F25
K26

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#

DATA GROUP 0

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRD Y#
H_DBSY#
H_BREQ0#
H_LOCK#

C657

1
330_0402_5%

5
4
4
4
4
5
5
4
4

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
H_DBI#0
H_DSTBN#0
H_DSTBP#0

PENTIUMAGTL+ I/F
IV

D71

CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#

L30
K29
J29
H28
K28
K30
H29
J28
F28
H30
E30
D29
G28
E29
D30
F29
E28
G30
G29

DATA GROUP 2

R803
330K_0402_5%

U30
T30
R28
R25
U25
T28
V29
T26
U29
U26
V26
T25
V25
U27
U28
T29

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#

DATA GROUP 3

SUS_STAT#_R

RB751V_SOD323

HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_ADSTB#1

ADDR. GROUP 1

SUS_STAT#

R800
27K_0402_5%

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#

CONTROL

H_ADSTB#0

M28
P25
M25
N29
N30
M26
N28
P29
P26
R29
P30
P28
N26
N27
M29
N25
R26
L28
L29
R27

MISC.

1
2

R802
27K_0402_5%
D70
20

+1.8VS

+2.5V
C

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0

R713

H_DBI#0 5
H_DSTBN#0 5
H_DSTBP#0 5
C

H_DBI#1 5
H_DSTBN#1 5
H_DSTBP#1 5

H_DBI#2 5
H_DSTBN#2 5
H_DSTBP#2 5

H_DBI#3 5
H_DSTBN#3 5
H_DSTBP#3 5

CHS-216IGP9050A21_BGA718

4.7K_0402_5%

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


ATi RC300ML-HOST(1/5)
Document Number

Rev
1.0

LA-2301

Friday, May 28, 2004

Sheet
1

of

48

19

A_AD[0..31]

12,19 A_AD[0..31]
D

A_CBE#[0..3]

A_CBE#[0..3]

U51C

19
19

A_SBREQ#
A_SBGNT#
+3VS

ALINK_SBREQ#
ALINK_SBGNT#

V5
V6

PCI_REQ#0/ALINK_NC
PCI_GNT#0/ALINK_NC

K5
K6

AGP2_GNT#/AGP3_GNT
AGP2_REQ#/AGP3_REQ

M5

AGP8X_DET#

AGP8X_DET#
AGPREF_4X

J6

AGP_VREF/TMDS_VREF

C663

1
+1.5VS

+1.5VS
R660
1

AGP_COMP

J5

AGP_COMP

@52.3_0603_1%
R661
1K_0603_1%

Ra

@0_0402_5%

@10P_0402_25V8K

R654

@0_0402_5%

Xin/CLK SSCLK

LVDS_SSIN2

AGP_SBA7

@0_0402_5%

S0

Xout

S1

SSCC

@SM561BS_SO8
R656
@0_0402_5%
LVDS SPREAD SPECTRUM
R657
@0_0402_5%

S1

AGP_SBA6

C662

@10P_0402_25V8K
2
R658

@0_0402_5%

L6
M6
L5

S0

R651

AGP_ST0
AGP_ST1
AGP_ST2

R653
@0_0402_5%

R655

R715

C3
C2
D4
E4
F6
F5
G6
G5

R652
@0_0402_5%

U52

VDD

AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0
AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON#
AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON
AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#
AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#
AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT
AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN

VSS

P5
R6
T6
T5
P6
R5
C1
D3
N6
N5

@0_0402_5%

Note: PLACE CLOSE TO U2 (NB RC300M)

AGP_SBA6
AGP_SBA7

EDID_CLK 18
EDID_DAT 18
ENBK#
33
ENVDD
18
AGP_STP# 20
AGP_BUSY# 20

+3VS
CHS-216IGP9050A21_BGA718

AGPREF_4X

0.1U_0402_10V6K

AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK
AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK
AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA
AGP_PAR
AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA
AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA
AGP2_PIPE#/AGP3_DBI_HI
AGP2_NC/AGP3_DBI_LO
AGP2_RBF#/AGP3_RBF
AGP2_WBF#/AGP3_WBF

2
@10U_0805_6.3V6M

L41 1
2
+3VS
@BLM21P300S_0805
R714
LVDS_SSOUT2
1
1
C661
@0_0402_5%

W5
W6

1
2 R659
8.2K_0402_5%

R3
M1
L3
H1

C660

A_SBREQ#
A_SBGNT#

AGP2_CBE#0/AGP3_CBE0/TMD2_D7
AGP2_CBE#1/AGP3_CBE1/TMD2_DE
AGP2_CBE#2/AGP3_CBE2
AGP2_CBE#3/AGP3_CBE3/TMD1_D5

PCI_PAR/ALINK_NC
PCI_FRAME#/ALINK_STROBE#
PCI_IRDY#/ALINK_ACAT#
PCI_TRDY#/ALINK_END#
INTA#
ALINK_DEVSEL#
PCI_STOP#/ALINK_OFF#

A_DEVSEL#
A_OFF#

AD5
AC6
AC5
AD2
W4
AD3
AD6

E5
E6
T3
U2
G3
H2

C659

+3VS_SSVDD

A_PAR
A_STROBE#
A_ACAT#
A_END#

AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON
AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL
AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK#
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK
AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK#
AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK

@0.1U_0402_10V6K

ALINK_CBE#0
ALINK_CBE#1
ALINK_CBE#2
ALINK_CBE#3

Y2
W3
W2
V3
V2
V1
U1
U3
T2
R2
P3
P2
N3
N2
M3
M2
L1
L2
K3
K2
J3
J2
J1
H3
F3
G2
F2
F1
E2
E1
D2
D1

AG4
AE2
AC3
AA3

AGP_AD0/TMD2_HSYNC
AGP_AD1/TMD2_VSYNC
AGP_AD2/TMD2_D1
AGP_AD3/TMD2_D0
AGP_AD4/TMD2_D3
AGP_AD5/TMD2_D2
AGP_AD6/TMD2_D5
AGP_AD7/TMD2_D4
AGP_AD8/TMD2_D6
AGP_AD9/TMD2_D9
AGP_AD10/TMD2_D8
AGP_AD11/TMD2_D11
AGP_AD12/TMD2_D10
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC
AGP_AD18/TMD1_DE
AGP_AD19/TMD1_D0
AGP_AD20/TMD1_D1
AGP_AD21/TMD1_D2
AGP_AD22/TMD1_D3
AGP_AD23/TMD1_D4
AGP_AD24/TMD1_D7
AGP_AD25/TMD1_D6
AGP_AD26/TMD1_D9
AGP_AD27/TMD1_D8
AGP_AD28/TMD1_D11
AGP_AD29/TMD1_D10
AGP_AD30/TMDS_HPD
AGP_AD31

A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3

PART 3 OF 6

ALINK_AD0
ALINK_AD1
ALINK_AD2
ALINK_AD3
ALINK_AD4
ALINK_AD5
ALINK_AD6
ALINK_AD7
ALINK_AD8
ALINK_AD9
ALINK_AD10
ALINK_AD11
ALINK_AD12
ALINK_AD13
ALINK_AD14
ALINK_AD15
ALINK_AD16
ALINK_AD17
ALINK_AD18
ALINK_AD19
ALINK_AD20
ALINK_AD21
ALINK_AD22
ALINK_AD23
ALINK_AD24
ALINK_AD25
ALINK_AD26
ALINK_AD27
ALINK_AD28
ALINK_AD29
ALINK_AD30
ALINK_AD31

PCI BUS 1 / AGP Bus (GPIO , TMDS , ZVPort)

12,19
A_PAR
19
A_STROBE#
19
A_ACAT#
19
A_END#
19,24,27 PCI_PIRQA#
19
A_DEVSEL#
19
A_OFF#

AK5
AJ5
AJ4
AH4
AJ3
AJ2
AH2
AH1
AG2
AG1
AG3
AF3
AF1
AF2
AF4
AE3
AE4
AE5
AE6
AC2
AC4
AB3
AB2
AB5
AB6
AA2
AA4
AA5
AA6
Y3
Y5
Y6

PCI Bus 0 / A-Link I/F

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31

R662
1K_0603_1%

R663

@47K_0402
A

AGP8X_DET#

Close to Pin J6
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Compal Electronics, Inc.


ATi RC300ML-A-LINK/AGP(2/5)

Size
Document Number
Custom

Rev
1.0

LA-2301

Date:

Tuesday, May 18, 2004

Sheet
1

of

48

U51B
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
13,14,15,16 DDR_SBA0
13,14,15,16 DDR_SBA1

13,14,15,16 DDR_SRAS#
13,14,15,16 DDR_SCAS#
C

13,14,15,16 DDR_SWE#

14,15 DDR_CLK0
14,15 DDR_CLK0#
14,15 DDR_CLK1
14,15 DDR_CLK1#

13 DDR_CLK3
13 DDR_CLK3#
13 DDR_CLK4
13 DDR_CLK4#

DDR_SMA13
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

AH7
AF10
AJ14
AF21
AH23
AK28
AD29
AB26

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

DDR_SRAS#
DDR_SCAS#

AF24
AF25

MEM_RAS#
MEM_CAS#

DDR_SWE#

AE24

MEM_WE#

DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

AJ8
AF9
AH13
AE21
AJ23
AJ27
AC28
AA25

MEM_DQS0
MEM_DQS1
MEM_DQS2
MEM_DQS3
MEM_DQS4
MEM_DQS5
MEM_DQS6
MEM_DQS7

DDR_CLK0
DDR_CLK0#

AK10
AH10

MEM_CK0
MEM_CK0#

DDR_CLK1
DDR_CLK1#

AH18
AJ19

MEM_CK1
MEM_CK1#

AG30
AG29

MEM_CK2
MEM_CK2#

DDR_CLK3
DDR_CLK3#

AK11
AJ11

MEM_CK3
MEM_CK3#

DDR_CLK4
DDR_CLK4#

AH17
AJ18

MEM_CK4
MEM_CK4#

AF28
AG28

MEM_CK5
MEM_CK5#

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

AF13
AE13
AG14
AF14

MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

AH26
AH27
AF26
AG27

MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3

MEM_CAP2

AA29

MPVDD

AC18

MPVDD

MEM_COMP

AK19

C666
1
2MPVSS

AD18

MPVSS

MEM_DDRVREF

AK20

+1.8VS

14,16
15,16
13,16
13,16

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

14,16
15,16
13,16
13,16

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

L42 1
2
HB-1M2012-121JT03_0805

PART 2 OF 6

AH19
AJ17
AK17
AH16
AK16
AF17
AE18
AF16
AE17
AE16
AJ20
AG15
AF15
AE23
AH20
AE25

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15

MEM I/F

DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

AG6
AJ7
AJ9
AJ10
AJ6
AH6
AH8
AH9
AE7
AE8
AE12
AF12
AF7
AF8
AE11
AF11
AJ12
AH12
AH14
AH15
AH11
AJ13
AJ15
AJ16
AF18
AG20
AG21
AF22
AF19
AF20
AE22
AF23
AJ21
AJ22
AJ24
AK25
AH21
AH22
AH24
AJ25
AK26
AK27
AJ28
AH29
AH25
AJ26
AJ29
AH30
AF29
AE29
AB28
AA28
AE28
AD28
AC29
AB29
AC26
AB25
Y26
W26
AE26
AD26
AA26
Y27

MEM_CAP1

AF6

C664 1

0.47U_0603_16V7K

C665 1

0.47U_0603_16V7K

DDR_DM[0..7]
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_SMA[0..13]

DDR_DM[0..7] 13,14,16
DDR_DQ[0..63] 13,14,16
DDR_DQS[0..7] 13,14,16
DDR_SMA[0..13] 13,14,15,16

MEN_COMP R664 1

2 49.9_0402_1%
+2.5V

10U_0805_10V4Z
CHS-216IGP9050A21_BGA718

R665
1K_0603_1%
C668
0.1U_0402_10V6K

+DDR_VREF

C669
0.1U_0402_10V6K

R666
1K_0603_1%
A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


ATi RC300ML-DDR(3/5)
Document Number

Rev
1.0

LA-2301

Friday, May 28, 2004

Sheet
1

of

48

L43
+2.5VS

+3VS_VDDR

1
L44

G9
H9

0.1U_0402_10V6K
+1.8VS

+1.8VS_AVDDDI

2
L46 10_0603_5%
C673
0.1U_0402_10V6K

+1.8VS

+1.8VS_AVDDQ
C674
0.1U_0402_10V6K

L47
1
2
KC FBM-L11-201209-221LMAT_0805 1
C675
10U_0805_10V4Z

+PLLVDD_18

1
C676
0.1U_0402_10V6K

C677

1
R667

R668 1

PART 4 OF 6

AVDD_25

B13

AVSSN

B14

AVDDDI_18

C13

AVSSDI

A15

AVDDQ

B15

AVSSQ

H11

PLLVDD_18

G11

PLLVSS

2 715 _0402_1% NB_RSET

F14
F15
E14
C8
D9

RED
GREEN
BLUE
DACHSYNC
DACVSYNC

C14

RSET

@10_0402_5%

VDDR3
VDDR3

A14

0.1U_0402_10V6K

18 CRT_R
18 CRT_G
18 CRT_B
18 CRT_HSYNC
18 CRT_VSYNC

CLK_EXT_AGP66

C671
0.1U_0402_10V6K

LVDS

+1.8VS

KC FBM-L11-201209-221LMAT_0805
L45
1
2
1
C672

FBM-11-160808-121-T_0603

0.1U_0402_10V6K

U51D
+2.5VS_AVDD

1
D

17 REFCLK1_NB

@15P_0402_50V8J

C681

R669

CLK_EXT_NB
CLK_EXT_NB#

17 CLK_EXT_NB
17 CLK_EXT_NB#

CLK_EXT_MEM66

A5
B5

HCLKIN
HCLKIN#

B6
A6

SYS_FBCLKOUT
SYS_FBCLKOUT#

B2

2
2

XTALIN
XTALOUT

D8

@10_0402_5%

A4
B4

56_0402_5%
R671

C685
@15P_0402_50V8J

17 CLK_EXT_AGP66

AGPCLKIN

CLK_EXT_MEM66 A3

EXT_MEM_CLK

R673

10K_0402_5%

D12
E12
F11
F12
D13
D14
E13
F13

TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKTZCLK+

18
18
18
18
18
18
18
18

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXCLK_LN
TXCLK_LP

E10
D10
B9
C9
D11
E11
B10
C10

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+

18
18
18
18
18
18
18
18

LPVDD_18

A12

+1.8VS_LPVDD

LPVSS

A11

LPVSS

C678

LVDDR_18
LVDDR_18

B12
C12

+1.8VS_LVDDR

2
2
0.1U_0402_10V6K

LVSSR
LVSSR

B11
C11

LVSSR

C_R

E15

TV_CRMA

Y_G

C15

TV_LUMA

COMP_B

D15

DACSCL

D6

NB_DDC_CLK 18

DACSDA

C6

NB_DDC_DATA 18

CPUSTOP#

D5

SYSCLK

A8

SYSCLK#

B8

AGPCLKOUT

17 CLK_EXT_MEM66

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXCLK_UN
TXCLK_UP

ALINK_CLK

CLK_EXT_AGP66 B3

+3VS

C670

CRT

KC FBM-L11-201209-221LMAT_0805

+3VS

SVID

D7
B7

USBCLK
REF27

C5

OSC

CLK. GEN.

+1.8VS
KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L48
1
1
C679
C680

+1.8VS
KC FBM-L11-201209-221LMAT_0805
0.1U_0402_10V6K
1
2
L49
1
1
1
C682
C683
C684

2
0.1U_0402_10V6K

TV_COMPS 1
R670

R672

2
10U_0805_10V4Z

2
10U_0805_10V4Z

2
@75_0402_1%

2
1K_0402_5%

+3VS

CHS-216IGP9050A21_BGA718

TV-OUT CONN.

C103 1

2 @33P_0402_50V8J
CHB2012U121_0805
2

TV_CRMA

L5
1

CHB2012U121_0805
2

L4
1

TV_LUMA

R102
75_0402_1%

C109
100P_0402_25V8K

C110

1
2
C104 @33P_0402_50V8J1

100P_0402_25V8K

LUMA_1
JP2

1
2
3
4

CRMA_1

1
2
3
4

SUYIN_030008FR004T100ZL
C111
100P_0402_25V8K

C112
100P_0402_25V8K

R101
75_0402_1%

D2
V-PORT-0603-220 M-V05_0603

D1
V-PORT-0603-220 M-V05_0603

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


ATi RC300ML-VEDIO(4/5)
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

10

of

48

+CPU_CORE
+1.5VS

U51F

+2.5V
0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

U51E

+3VS

AA1
AA7
AA8
AC7
AC8
AD1
AD7
AD8
AK3
W8

VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK
VDDL_ALINK

MEM I/F PWR

CORE PWR

PART 5 OF 6

VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU
VDDR2_CPU

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33

AGP PWR

C16
D16
D17
E16
E17
F16
F17
G17
G21
G23
G24
H16
H17
H19
H21
H24
K23
K24
M23
P23
P24
T23
T24
U23
U24
W30

POWER

+CPU_CORE

CPU I/F PWR

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

ALINK PWR

F10
F9
G12
H12
H13
M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
P18
P19
U12
U13
U14
U17
U18
U19
V12
V13
V14
V17
V18
V19
W12
W13
W14
W17
W18
W19

VDD_18
VDD_18
VDD_18
VDD_18

AA23
AA27
AB30
AC10
AC12
AC13
AC15
AC17
AC19
AC21
AC23
AC24
AC25
AC27
AD10
AD12
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AD25
AD27
AE10
AE14
AE15
AE19
AE20
AE30
AE9
AF27
AG11
AG12
AG17
AG18
AG23
AG24
AG26
AG8
AG9
AJ30
AK14
AK23
AK8
V23
W23
W24
W25
Y25
A2
G4
H5
H6
H7
J4
K8
L4
M7
M8
N4
P1
P7
P8
R4
T8
U4
U5
U6
E7
F7
G8

C686

C687

C688

C689

C690

C691

C692

C693

C694

22U_1206_10V4Z

2
2
0.1U_0402_10V6K

2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

2
2
0.1U_0402_10V6K

0.1U_0402_10V6K

+2.5V
0.1U_0402_10V6K

1
+

C695
100U_D2_10VM

C696

C697

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C698

C699

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C700

C701

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C702

C703

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C704

C705

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C706

C707

2
0.1U_0402_10V6K

C708
0.1U_0402_10V6K

+2.5V
0.1U_0402_10V6K

C709
0.1U_0402_10V6K

C710

C711

C712

0.1U_0402_10V6K

C713
0.1U_0402_10V6K

0.1U_0402_10V6K
+1.5VS

+1.5VS
0.1U_0402_10V6K
0.1U_0402_10V6K

1
+

C715
47U_B_6.3VM

C725

C726

C727

0.1U_0402_10V6K

2
2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K

C714 +
C728
47U_B_6.3VM
2

C716

C717

2
0.1U_0402_10V6K

0.1U_0402_10V6K

C718

C719

2
0.1U_0402_10V6K

C720

0.1U_0402_10V6K

C721

2
0.1U_0402_10V6K

C722

0.1U_0402_10V6K

C723

2
0.1U_0402_10V6K

C724

2
0.1U_0402_10V6K

+1.5VS
0.1U_0402_10V6K
+1.5VS

C729

C730

0.1U_0402_10V6K 2

C731

2
2
0.1U_0402_10V6K

@0.01U_0402_16V7Z

C733

C734

0.1U_0402_10V6K

C735

2
2
2
0.1U_0402_10V6K
0.1U_0402_10V6K

C736

0.1U_0402_10V6K

C737

2
2
0.1U_0402_10V6K

C738

0.1U_0402_10V6K

C739

2
2
0.1U_0402_10V6K

C740

0.1U_0402_10V6K

C741

2
2
0.1U_0402_10V6K

C742

0.1U_0402_10V6K

C743

2
2
0.1U_0402_10V6K

ATI request

+1.5VS

C744

C732

0.1U_0402_10V6K

C745

C746

@0.01U_0402_16V7Z

C747

C748

@0.01U_0402_16V7Z

C749

C750

@0.01U_0402_16V7Z

C751

C752

A29
AB23
AB24
AB27
AB4
AB8
AC1
AC11
AC14
AC16
AC20
AC30
AD11
AD14
AD16
AD20
AD4
AE27
AF30
AF5
AG10
AG13
AG16
AG19
AG22
AG25
AG7
AH28
AH3
AJ1
AK13
AK2
AK22
AK29
AK4
AK7
B1
B16
B30
C19
C23
C27
C4
D21
D25
E3
E8
E9
F27
F4
F8
G14
G15
G18
G20
H14
H15
H18
H20
H27
H4
H8
J7

@0.01U_0402_16V7Z

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

PART 6 OF 6

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

R23
R7
R8
T12
T13
T14
T15
T16
T17
T18
T19
T27
T4
U15
U16
U7
U8
V15
V16
V27
V4
V7
V8
W15
W16
W27
Y1
Y23
Y24
Y30
Y4
Y7
Y8
R19
R18
R17
R16
R15
R14
R13
R12
R1
P4
P27
P16
P15
N8
N24
N23
N16
N15
M4
M27
M16
M15
L8
L7
L25
L24
L23
K4
K27
J8

CHS-216IGP9050A21_BGA718
B

C753

2
2
2
2
2
2
2
2
2
2
@0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z @0.01U_0402_16V7Z
+3VS

AC22
AC9
H10
H22

+1.8VS

CHS-216IGP9050A21_BGA718

+1.8VS

+3VS
0.1U_0402_10V6K

C754
10U_0805_10V4Z
A

C755

C756

2
0.1U_0402_10V6K

C757

10U_0805_10V4Z

2
0.1U_0402_10V6K

C758

C759

0.1U_0402_10V6K

C760

0.1U_0402_10V6K

C761

C762

0.1U_0402_10V6K

C763

2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K

0.1U_0402_10V6K

C764

C765

2
2
0.1U_0402_10V6K

C766

0.1U_0402_10V6K

C767

2
2
0.1U_0402_10V6K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


ATi RC300ML-Power(5/5)
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

11

of

48

A_CBE#[0..3]

8,19

A_AD[0..31]

A_CBE#[0..3] 8,19

A_AD[0..31]

R674 1
A_AD31

R676
1

A_AD30

R679
1

R681 1
A_AD29

R683
1

2 10K_0402_5%

4.7K_0402_5% 2
1
D51
RB751V_SOD323
R678 1
10K_0402_5%
2
4.7K_0402_5% 2
1
D52
RB751V_SOD323

2 10K_0402_5%

+3VS

A_AD[31..30] : FSB CLK SPEED

+3VS
BSEL1

5,17

DEFAULT: 01

+3VS
BSEL0

5,17

A_AD18

00: 100 MHZ


01: 133 MHZ
10: 200MHZ
11:166 MHZ

2@4.7K_0402_5%

R677
1

24.7K_0402_5%

A_AD18 : ENABLE PHASE CALIBRATION

+3VS

DEFAULT: 0
0: DISABLE
1:ENABLE

A_AD29: STRAP CONFIGURATION

A_AD17

DEFAULT:1

2@4.7K_0402_5%

R675
1

R680
1

2@4.7K_0402_5%

R682
1

24.7K_0402_5%

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

+3VS

DEFAULT: 0
00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

0: REDUCEDE SET
1: FULL SET(internal Pull high)
R684 1
A_AD28

R686
1

2 @10K_0402_5%

+3VS

A_AD28: SPREAD SPECTRUM ENABLE

R685 1

DEFAULT:0

24.7K_0402_5%

A_AD25

0: DISABLE
1: ENABLE

R687
1

2 10K_0402_5%

A_AD25/A_AD17 : CPU VOLTAGE[1..0]

+3VS

DEFAULT: 10

2@4.7K_0402_5%

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

R688 1
A_AD27

R689
1

R692 1
A_AD26

R693
1

A_AD24

R694 1

2 10K_0402_5%

+3VS

A_AD27: FrcShortReset#

+3VS

0: TEST MODE
1: NORMAL
MODE
A_AD26 : ENABLE IOQ

DEFAULT: 1

2@4.7K_0402_5%

2 10K_0402_5%

A_PAR

A_PAR

+3VS

R690
1

2@4.7K_0402_5%

PAR: EXTENDED DEBUG MODE

R691
1

24.7K_0402_5% +3VS

DEFAULT : 1
0: DEBUG MODE
1: NORMAL

DEFAULT: 1

2@4.7K_0402_5%

2 10K_0402_5%

8,19

AD25=1 DESTOP CPU


AD25=0 MOBILE CPU
AD17--DON'T CARE

0: IOQ=1
1:
IOQ=12
A_AD24 : MOBILE CPU SELECT

DEFAULT: 1
0: BANIAS CPU
1: OTHER CPU
R695 1
B

A_AD23

R696
1

2 10K_0402_5%

+3VS

A_AD23 : CLOCK BYPASS DISABLE

DEFAULT: 1

2@4.7K_0402_5%

0: TEST MODE
1: NORMAL(internal Pull high)
A_AD22

R697
1

2@4.7K_0402_5%

A_AD22 : OSC PAD OUTPUT PCICLK

DEFAULT : 1
0:PCICLK OUT
1: OSC CLK OUT
R698 1
A_AD21

R699
1

2 10K_0402_5%

+3VS

A_AD21 : AUTO_CAL ENABLE

DEFAULT : 1

2@4.7K_0402_5%

0: DISABLE
1: ENABLE

A_AD20

R700
1

2@4.7K_0402_5%

R701
1

24.7K_0402_5%

+3VS

A_AD20 : INTERNAL CLK GEN ENABLE

DEFAULT : 0
0: DISABLE
1: ENABLE

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


ATi RC300ML-SYS. CONFIG.
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

12

of

48

+2.5V
+2.5V
+2.5V
JP3
DDR_DQ1
DDR_DQ5
DDR_DQS0
DDR_DQ6
DDR_DQ2
DDR_DQ8

DDR_DQ12
DDR_DQS1
DDR_DQ14
DDR_DQ15
9
9

DDR_CLK3
DDR_CLK3#

DDR_DQ20
DDR_DQ16
DDR_DQS2
DDR_DQ18
DDR_DQ22
DDR_DQ24
DDR_DQ29
DDR_DQS3

DDR_DQ[0..63]

DDR_DQ[0..63] 9,14,16

DDR_DQS[0..7]
C

DDR_DQ26
DDR_DQ30

DDR_DQS[0..7] 9,14,16

DDR_DM[0..7]

DDR_DM[0..7] 9,14,16

DDR_SMA[0..13]

DDR_SMA[0..13] 9,14,15,16

RP112
10_0804_8P4R_5%
5
4 DDR_CKE3
DDR_SMA12 6
3 DDR_SMAA12
DDR_SMA9
7
2 DDR_SMAA9
DDR_SMA7
8
1 DDR_SMAA7

9,16 DDR_SCKE3

DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10

5
6
7
8

4
3
2
1

DDR_SMAA5
DDR_SMAA3
DDR_SMAA1
DDR_SMAA10

RP113
10_0804_8P4R_5%
5
4
6
3
7
2
DDR_SMA13 8
1

9,14,15,16 DDR_SBA0
9,14,15,16 DDR_SWE#
9,16 DDR_SCS#2
B

RP115
10_0804_8P4R_5%

DDR_BA0
DDR_WE#
DDR_CS#2
DDR_SMAA13
DDR_DQ33
DDR_DQ36
DDR_DQS4
DDR_DQ38
DDR_DQ39
DDR_DQ45
DDR_DQ40
DDR_DQS5
DDR_DQ46
DDR_DQ43

DDR_DQ52
DDR_DQ49
DDR_DQS6
DDR_DQ50
DDR_DQ51
DDR_DQ60

Layout note
Place these resistors
close to DIMM0,
all trace length<500 mil

DDR_DQ61
DDR_DQS7
DDR_DQ62
DDR_DQ58
17,20 SM_DATA_SB
17,20 SM_CLK_SB
+3VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
A13
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
NC.TEST

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DDR_DQ4
DDR_DQ0

R702
1K_0603_1%
C768
0.1U_0402_10V6K

2
+DDR_VREF0

DDR_DM0
DDR_DQ3

DDR_DQ7
DDR_DQ9

R703
1K_0603_1%

C769
0.1U_0402_10V6K

DDR_DQ13
DDR_DM1
DDR_DQ10
DDR_DQ11

DDR_DQ17
DDR_DQ21

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DM2
DDR_DQ23
DDR_DQ19
DDR_DQ28
DDR_DQ25
DDR_DM3
DDR_DQ27
DDR_DQ31
C

DDR_CKE2
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BA1
DDR_RAS#
DDR_CAS#
DDR_CS#3
DDR_DQ32
DDR_DQ37

RP117
10_0804_8P4R_5%
5
4
6
3
7
2 DDR_SMA11
8
1 DDR_SMA8

5
6
7
8

4
3
2
1

DDR_SCKE2 9,16

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

RP116
10_0804_8P4R_5%
5
4
6
3
7
2
8
1

DDR_SBA1 9,14,15,16
DDR_SRAS# 9,14,15,16
DDR_SCAS# 9,14,15,16
DDR_SCS#3 9,16
B

RP114
10_0804_8P4R_5%

DDR_DM4
DDR_DQ35
DDR_DQ34
DDR_DQ44
DDR_DQ41
DDR_DM5
DDR_DQ47
DDR_DQ42
DDR_CLK4# 9
DDR_CLK4 9
DDR_DQ48
DDR_DQ53
DDR_DM6
DDR_DQ55
DDR_DQ54
DDR_DQ57

Layout note
Place these resistor
close by DIMM0,
all trace length
Max=1.4"

DDR_DQ56
DDR_DM7
DDR_DQ63
DDR_DQ59
+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.


Title

DDR-SODIMM SLOT0

TYCO_1-1612781-1
Size

Document Number

Rev
1.0

LA-2301
Date:
5

Tuesday, May 18, 2004

Sheet
1

13

of

48

9,13,15,16 DDR_SMA[0..13]

1
C150

DDR_SMA[0..13]

2
R164
1K_0603_1%

1
C151
@0.01U_0402_16V7Z

9,13,16 DDR_DQS[0..7]
C152
0.1U_0402_10V6K

9,13,16 DDR_DM[0..7]
9,13,15,16 DDR_SRAS#
9,13,15,16 DDR_SCAS#
9,13,15,16 DDR_SWE#

1K_0603_1%

9,13,16 DDR_DQ[0..63]

DDR_DQS[0..7]

9,15 DDR_CLK1
9,15 DDR_CLK1#

DDR_DM[0..7]

8
7
6
5

1
2
3
4

DQ1
DQ5
DQ4
DQ0

DDR_DM0

10_0804_8P4R_5%
DDR_DQS0 1
DQS0
2
R166
10_0402_5%
RP5
DDR_DQ6
DQ6
8
1
DDR_DQ2
DQ2
7
2
DDR_DQ8
DQ8
6
3
DDR_DQ12
DQ12
5
4

1
R168
RP9
DDR_DQ3 5
DDR_DQ7 6
DDR_DQ9 7
DDR_DQ13 8

+2.5V

DQ3
DQ7
DQ9
DQ13

10_0804_8P4R_5%
DDR_DM1 1
DM1
2
R172
10_0402_5%

10_0804_8P4R_5%
DDR_DQS1 1
DQS1
2
R170
10_0402_5%
RP7
DDR_DQ14 8
DQ14
1
DDR_DQ15 7
DQ15
2
DDR_DQ10 6
DQ10
3
DDR_DQ11 5
DQ11
4

RP14
DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQ21

8
7
6
5

1
2
3
4

DQ20
DQ16
DQ17
DQ21

10_0804_8P4R_5%
DDR_DQS2
DQS2
1
2
R176
10_0402_5%
RP12
DDR_DQ18
DQ18
8
1
DDR_DQ22
DQ22
7
2
DDR_DQ24
DQ24
6
3
DDR_DQ28
DQ28
5
4

DQS0
DM0
DQ4
DQ0
DQ3
DQ7
DQ1
DQ5
DQ6
DQ2

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS1
DM1
DQ9
DQ13
DQ14
DQ15
DQ8
DQ12
DQ10
DQ11

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

+DDR_VREF1

10_0804_8P4R_5%
C

DDR_DM2

1
R174

DDR_DQ23
DDR_DQ19
DDR_DQ29
DDR_DQ25

5
6
7
8

C157
0.1U_0402_10V6K

DM2
2
10_0402_5%
RP15
DQ23
4
DQ19
3
DQ29
2
DQ25
1

Close
pin49

10_0804_8P4R_5%
DM3
1
2
R180
10_0402_5%

DDR_DM3

+2.5V

U3

DM0
2
10_0402_5%

4
3
2
1

DDR_CLK0#

9,15 DDR_CLK0#

1st Bank

DDR_SRAS#
DDR_SCAS#
DDR_SWE#

DDR_CLK0

DDR_CLK0

R163
120_0402_5%

DDR_CKE0
1
2
R806
10_0402_5%
DDR_CLK1
DDR_CLK1#

9,16 DDR_SCKE0

RP3
DDR_DQ1
DDR_DQ5
DDR_DQ4
DDR_DQ0

DM[0..7] 15

DDR_DQ[0..63]

9,15

DDR_SBA0
DDR_SBA1
DDR_CS#0
1
2
R805
10_0402_5%

9,13,15,16 DDR_SBA0
9,13,15,16 DDR_SBA1
9,16 DDR_SCS#0

DQS[0..7] 15

DM[0..7]
+DDR_VREF1

DQ[0..63] 15

DQS[0..7]

R165

DQ[0..63]

2
0.1U_0402_10V6K

+2.5V

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

U4

1
C153
1
C155
1
C775
1
C777

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK0
DDR_CLK0#
DDR_CKE0

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

DQS2
DM2
DQ17
DQ21
DQ23
DQ19
DQ20
DQ16
DQ18
DQ22

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS3
DM3
DQ29
DQ25
DQ27
DQ31
DQ24
DQ28
DQ26
DQ30

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

DDR_SMA13

+DDR_VREF1
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

1
C158
0.1U_0402_10V6K

Close
pin49

29
30
31
32
35
36
37
38
39
40
28
41
42

K4H561638F-TC/LB3_TSOPII66

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
C154
1
C156
1
C776
1
C778

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

DDR_SMA13

DDR_CLK0
DDR_CLK0#
DDR_CKE0

K4H561638F-TC/LB3_TSOPII66

10_0804_8P4R_5%
DDR_DQS3
DQS3
1
2
R178
10_0402_5%
+2.5V

+2.5V

RP17
DDR_DQ26
DDR_DQ30
DDR_DQ27
DDR_DQ31

8
7
6
5

1
2
3
4

DQ26
DQ30
DQ27
DQ31

U5
DQS4
DM4
DQ33
DQ36
DQ35
DQ34
DQ32
DQ37
DQ38
DQ39

10_0804_8P4R_5%
RP4
B

DDR_DQ33
DDR_DQ36
DDR_DQ32
DDR_DQ37

8
7
6
5

1
2
3
4

DQ33
DQ36
DQ32
DQ37

10_0804_8P4R_5%
DDR_DQS4
DQS4
1
2
R167
10_0402_5%
RP6
DDR_DQ38
DQ38
8
1
DDR_DQ39
DQ39
7
2
DDR_DQ45
DQ45
6
3
DDR_DQ40
DQ40
5
4
10_0804_8P4R_5%
DDR_DQS5
DQS5
1
2
R173
10_0402_5%

DDR_DQS6

DQS6
2
10_0402_5%

1
R175
RP18

DDR_DQ50
DDR_DQ51
DDR_DQ60
DDR_DQ61
A

8
7
6
5

DQ50
DQ51
DQ60
DQ61

1
2
3
4

10_0804_8P4R_5%
DDR_DQS7
DQS7
1
2
R181
10_0402_5%
RP16
DDR_DQ62
DQ62
8
1
DDR_DQ58
DQ58
7
2
DDR_DQ63
DQ63
6
3
DDR_DQ59
DQ59
5
4

DDR_DM4
DDR_DQ35
DDR_DQ34
DDR_DQ44
DDR_DQ41

DM4
1
2
R169
10_0402_5%
RP10
DQ35
5
4
DQ34
6
3
DQ44
7
2
DQ41
8
1

DQS5
DM5
DQ44
DQ41
DQ46
DQ43
DQ45
DQ40
DQ47
DQ42

10_0804_8P4R_5%
DM5
1
2
R171
10_0402_5%
RP8
DDR_DQ46
DQ46
5
4
DDR_DQ43
DQ43
6
3
DDR_DQ47
DQ47
7
2
DDR_DQ42
DQ42
8
1
DDR_DM5

DDR_DQ52
DDR_DQ49
DDR_DQ48
DDR_DQ53

10_0804_8P4R_5%
RP13
5
4
6
3
7
2
8
1

+DDR_VREF1

1
DQ52
DQ49
DQ48
DQ53

C163
0.1U_0402_10V6K

10_0804_8P4R_5%
DDR_DM6
DM6
1
2
R177
10_0402_5%
RP11
DDR_DQ55
DQ55
5
4
DDR_DQ54
DQ54
6
3
DDR_DQ57
DQ57
7
2
DDR_DQ56
DQ56
8
1
DDR_DM7

Close
pin49

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

U6

1
C159
1
C161
1
C779
1
C781

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK1
DDR_CLK1#
DDR_CKE0

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

DQS6
DM6
DQ52
DQ49
DQ55
DQ54
DQ48
DQ53
DQ50
DQ51

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

DDR_SMA13
DQS7
DM7
DQ57
DQ56
DQ62
DQ58
DQ60
DQ61
DQ63
DQ59
+DDR_VREF1

1
C164
0.1U_0402_10V6K

Close
pin49

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

K4H561638F-TC/LB3_TSOPII66

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
C160
1
C162
1
C780
1
C782

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK1
DDR_CLK1#
DDR_CKE0

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#0
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

Size
B
Date:

Compal Electronics, Inc.


DDR(256Mb)X4-TOP
Document Number

Rev
1.0

LA-2331

Tuesday, May 18, 2004

DDR_SMA13

K4H561638F-TC/LB3_TSOPII66

10_0804_8P4R_5%
DM7
1
2
R179
10_0402_5%

10_0804_8P4R_5%

16
20
2
4
5
7
8
10
11
13

Sheet
1

14

of

48

9,14

DQ[0..63]

14 DQ[0..63]

DM[0..7]

14 DM[0..7]
9,13,14,16 DDR_SRAS#
9,13,14,16 DDR_SCAS#
9,13,14,16 DDR_SWE#

1
R808

9,16 DDR_SCKE1

DQS[0..7]

14 DQS[0..7]

DDR_SRAS#
DDR_SCAS#
DDR_SWE#

2 DDR_CS#1
10_0402_5%

R182
120_0402_5%

2 DDR_CKE1
10_0402_5%

DDR_CLK1#

9,14 DDR_CLK1#

DDR_CLK0
DDR_CLK0#

9,14 DDR_CLK0
9,14 DDR_CLK0#

DDR_CLK1

DDR_SBA0
DDR_SBA1
1
R807

9,13,14,16 DDR_SBA0
9,13,14,16 DDR_SBA1
9,16 DDR_SCS#1

DDR_SMA[0..13]

9,13,14,16 DDR_SMA[0..13]

DDR_CLK1

+2.5V

+2.5V

2nd Bank
U7

U8
DQS3
DM3
DQ30
DQ26
DQ28
DQ24
DQ31
DQ27
DQ25
DQ29

+2.5V

2
C171
0.1U_0402_10V6K
C

DQS2
DM2
DQ22
DQ18
DQ16
DQ20
DQ19
DQ23
DQ21
DQ17

+DDR_VREF1
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
C166
1
C168
1
C784
1
C786

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK0
DDR_CLK0#
DDR_CKE1

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

DDR_SMA13

DDR_CLK0

+2.5V

2
C172
@1.5P_0402_50V8C

C170
0.1U_0402_10V6K

DQS1
DM1
DQ11
DQ10
DQ12
DQ8
DQ15
DQ14
DQ13
DQ9

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS0
DM0
DQ2
DQ6
DQ5
DQ1
DQ7
DQ3
DQ0
DQ4

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

+DDR_VREF1
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_CLK0#

Close to U8 pin5 and 6.


Close
pin49

1
C165
1
C167
1
C783
1
C785

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK0
DDR_CLK0#
DDR_CKE1

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

DDR_SMA13
DDR_CLK0

C169
@1.5P_0402_50V8C

DDR_CLK0#
C

Close to U7 pin5 and 6.

K4H561638F-TC/LB3_TSOPII66

K4H561638F-TC/LB3_TSOPII66
+2.5V
+2.5V

U9

U10

+2.5V

2
C180
0.1U_0402_10V6K

DQS7
DM7
DQ59
DQ63
DQ61
DQ60
DQ58
DQ62
DQ56
DQ57

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS6
DM6
DQ51
DQ50
DQ53
DQ48
DQ54
DQ55
DQ49
DQ52

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

+DDR_VREF1
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

49

VREF

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
C174
1
C176
1
C788
1
C790

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

DDR_CLK1
DDR_CLK1#
DDR_CKE1

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K

DDR_SMA13
DDR_CLK1

+2.5V

C179
@1.5P_0402_50V8C

C178
0.1U_0402_10V6K

DQS5
DM5
DQ42
DQ47
DQ40
DQ45
DQ43
DQ46
DQ41
DQ44

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS4
DM4
DQ39
DQ38
DQ37
DQ32
DQ34
DQ35
DQ36
DQ33

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

49

VREF

+DDR_VREF1

DDR_CLK1#

Close to U10 pin5 and 6.


Close
pin49

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
C173
1
C175
1
C787
1
C789

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

BA0
BA1

26
27

DDR_SBA0
DDR_SBA1

CS#
RAS#
CAS#
WE#

24
23
22
21

DDR_CS#1
DDR_SRAS#
DDR_SCAS#
DDR_SWE#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
B

DDR_SMA13
DDR_CLK1

DDR_CLK1
DDR_CLK1#
DDR_CKE1

C177
@1.5P_0402_50V8C

DDR_CLK1#

Close to U9 pin5 and 6.

K4H561638F-TC/LB3_TSOPII66

K4H561638F-TC/LB3_TSOPII66

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


DDR(256Mb)X4-BTN
Document Number

Rev
1.0

LA-2331

Tuesday, May 18, 2004

Sheet
1

15

of

48

9,13,14 DDR_DM[0..7]

DDR_DM[0..7]

DDR_DQS[0..7]

9,13,14 DDR_DQS[0..7]

DDR_SCKE[0..3]

9,13,14,15 DDR_SCKE[0..3]

DDR_DQ[0..63]

9,13,14 DDR_DQ[0..63]

DDR_SMA[0..13]

9,13,14,15 DDR_SMA[0..13]

+1.25VS
+1.25VS
+1.25VS
DDR_SCKE1
2
33_0402_5%
DDR_SCKE0
2
33_0402_5%
DDR_SCKE2
2
33_0402_5%

RP41

1
R203
1
R202
1
R201

2
1
C185 0.1U_0402_10V6K

4
3
2
1

2
1
C193 0.1U_0402_10V6K
2
1
C194 0.1U_0402_10V6K

DDR_DQ1
DDR_DQ5
DDR_DQ4
DDR_DQ0

2
1
C188 0.1U_0402_10V6K

5
6
7
8

RP62

9,13,14,15 DDR_SBA1
9,13,14,15 DDR_SRAS#

5
6
7
8

4
3
2
1

2
1
C199 0.1U_0402_10V6K
2
1
C200 0.1U_0402_10V6K

RP43
9,13,14,15
9,15
9,14
9,13

DDR_SCAS#
DDR_SCS#1
DDR_SCS#0
DDR_SCS#3

DDR_SCAS#
DDR_SCS#1
DDR_SCS#0
DDR_SCS#3

5
6
7
8

4
3
2
1

2
1
C205 0.1U_0402_10V6K
2
1
C206 0.1U_0402_10V6K

DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10

9,13,14,15 DDR_SBA0
9,13,14,15 DDR_SWE#
9,13 DDR_SCS#2

1
2
3
4

33_0804_8P4R_5%
RP54
8
1
7
2
6
3
5
4

33_0804_8P4R_5%
RP51
DDR_SBA0
8
1
DDR_SWE#
7
2
DDR_SCS#2
6
3
DDR_SMA13
5
4

56_0804_8P4R_5%
RP47
5
4
6
3
7
2
8
1

2
1
C195 0.1U_0402_10V6K
2
1
C197 0.1U_0402_10V6K

56_0804_8P4R_5%
RP49
5
4
6
3
7
2
8
1

2
1
C201 0.1U_0402_10V6K
2
1
C203 0.1U_0402_10V6K

56_0804_8P4R_5%
RP52
5
4
6
3
7
2
8
1

2
1
C207 0.1U_0402_10V6K
2
1
C209 0.1U_0402_10V6K

56_0804_8P4R_5%
RP55
5
4
6
3
7
2
8
1

2
1
C212 0.1U_0402_10V6K
2
1
C215 0.1U_0402_10V6K

56_0804_8P4R_5%
RP57
5
4
6
3
7
2
8
1

2
1
C217 0.1U_0402_10V6K
2
1
C220 0.1U_0402_10V6K

56_0804_8P4R_5%
RP60
5
4
6
3
7
2
8
1

2
1
C223 0.1U_0402_10V6K
2
1
C226 0.1U_0402_10V6K

56_0804_8P4R_5%
RP63
5
4
6
3
7
2
8
1

2
1
C228 0.1U_0402_10V6K
2
1
C230 0.1U_0402_10V6K

56_0804_8P4R_5%
RP65
5
4
6
3
7
2
8
1

2
1
C232 0.1U_0402_10V6K
2
1
C234 0.1U_0402_10V6K

DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQ21

RP59

8
7
6
5

2
1
C189 0.1U_0402_10V6K
2
1
C191 0.1U_0402_10V6K

DDR_DQ14
DDR_DQ15
DDR_DQ10
DDR_DQ11

33_0804_8P4R_5%

DDR_SCKE3
DDR_SMA12
DDR_SMA9
DDR_SMA7

56_0804_8P4R_5%
RP44
5
4
6
3
7
2
8
1

DDR_DQ9
DDR_DQ13
DDR_DM1
DDR_DQS1

33_0804_8P4R_5%

2
1
C211 0.1U_0402_10V6K
2
1
C214 0.1U_0402_10V6K

DDR_DQS2
DDR_DM2
DDR_DQ18
DDR_DQ22

2
1
C219 0.1U_0402_10V6K
2
1
C222 0.1U_0402_10V6K

DDR_DQ23
DDR_DQ19
DDR_DQ24
DDR_DQ28

2
1
C225 0.1U_0402_10V6K

33_0804_8P4R_5%

DDR_DQ29
DDR_DQ25
DDR_DQS3
DDR_DM3

RP50

2
1
C183 0.1U_0402_10V6K
2
1
C186 0.1U_0402_10V6K

DDR_DQ3
DDR_DQ7
DDR_DQ8
DDR_DQ12

33_0804_8P4R_5%
DDR_SMA2
DDR_SMA0
DDR_SBA1
DDR_SRAS#

4
3
2
1

DDR_DM0
DDR_DQS0
DDR_DQ6
DDR_DQ2

RP46
DDR_SMA8
DDR_SMA11
DDR_SMA6
DDR_SMA4

5
6
7
8

DDR_DQ26
DDR_DQ30
DDR_DQ27
DDR_DQ31

DDR_DQ33
DDR_DQ36
DDR_DQ32
DDR_DQ37

1
+
C771
100U_D2_10VM

2
1
C184 0.1U_0402_10V6K
2
1
C187 0.1U_0402_10V6K

2
1
C190 0.1U_0402_10V6K
2
1
C192 0.1U_0402_10V6K

56_0804_8P4R_5%
RP42
5
4
6
3
7
2
8
1

2
1
C196 0.1U_0402_10V6K
2
1
C198 0.1U_0402_10V6K

56_0804_8P4R_5%
RP45
5
4
6
3
7
2
8
1

2
1
C202 0.1U_0402_10V6K
2
1
C204 0.1U_0402_10V6K

56_0804_8P4R_5%
RP48
5
4
6
3
7
2
8
1

2
1
C208 0.1U_0402_10V6K
2
1
C210 0.1U_0402_10V6K

DDR_DQ35
DDR_DQ34
DDR_DQ45
DDR_DQ40

DDR_DQ44
DDR_DQ41
DDR_DQS5
DDR_DM5

DDR_DQ46
DDR_DQ43
DDR_DQ47
DDR_DQ42

DDR_DQ52
DDR_DQ49
DDR_DQ48
DDR_DQ53

56_0804_8P4R_5%
RP56
5
4
6
3
7
2
8
1

2
1
C213 0.1U_0402_10V6K
2
1
C216 0.1U_0402_10V6K

2
1
C218 0.1U_0402_10V6K
2
1
C221 0.1U_0402_10V6K

56_0804_8P4R_5%
RP61
5
4
6
3
7
2
8
1

2
1
C224 0.1U_0402_10V6K
2
1
C227 0.1U_0402_10V6K

56_0804_8P4R_5%
RP64
5
4
6
3
7
2
8
1

2
1
C229 0.1U_0402_10V6K
2
1
C231 0.1U_0402_10V6K

DDR_DQ55
DDR_DQ54
DDR_DQ60
DDR_DQ61

DDR_DQ57
DDR_DQ56
DDR_DM7
DDR_DQS7

DDR_DQ62
DDR_DQ58
DDR_DQ63
DDR_DQ59

56_0804_8P4R_5%
RP66
5
4
6
3
7
2
8
1

56_0804_8P4R_5%
RP58
5
4
6
3
7
2
8
1

DDR_DM6
DDR_DQS6
DDR_DQ50
DDR_DQ51

56_0804_8P4R_5%

4
3
2
1

56_0804_8P4R_5%
RP53
DDR_DQS4
5
4
DDR_DM4
6
3
DDR_DQ38
7
2
DDR_DQ39
8
1

2
1
C233 0.1U_0402_10V6K
2
1
C235 0.1U_0402_10V6K

56_0804_8P4R_5%

+2.5V

5
6
7
8

C236
100U_D2_10VM

C237
0.1U_0402_10V6K

C238
0.1U_0402_10V6K

C239
0.1U_0402_10V6K

C240
0.1U_0402_10V6K

C241
0.1U_0402_10V6K

C242
0.1U_0402_10V6K

C243
0.1U_0402_10V6K

C244
0.1U_0402_10V6K

C245
0.1U_0402_10V6K

C246
0.1U_0402_10V6K

+2.5V

+
C772
100U_D2_10VM

C247
100U_D2_10VM

C248
0.1U_0402_10V6K

C249
0.1U_0402_10V6K

C250
0.1U_0402_10V6K

C251
0.1U_0402_10V6K

C252
0.1U_0402_10V6K

C253
0.1U_0402_10V6K

C254
0.1U_0402_10V6K

C255
0.1U_0402_10V6K

C256
0.1U_0402_10V6K

C257

0.1U_0402_10V6K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


DDR-SODIMM Decoupling
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

16

of

48

+3VS

C258
10U_0805_10V4Z

C259
0.1U_0402_10V6K
2

C260
0.1U_0402_10V6K
2

C261
0.1U_0402_10V6K
2

C262
0.1U_0402_10V6K
2

C263
0.1U_0402_10V6K
2
2

+3VS_VDDA

1
+3VS_CLK

42 as posible
48 as posible
30 as posible
19 as posible
13 as posible

XTALIN

14.31818MHz_20P_1BX14318BE1A
C269
10P_0402_50V8K

C270
10P_0402_50V8K

C265
0.1U_0402_10V6K

1
C266
0.1U_0402_10V6K

1
C267
0.1U_0402_10V6K

XIN

VDDA

36

C265 close U11 pin


close U11 pin
C267 close U11 pin
C268 close U11 pin

XOUT

VSSA

37

CPUT0

40

VSSA
EXT_CPU

CLK_EXT_CPU
2
33_0402_5%

1
R205

CLK_EXT_CPU 4

CLK_EXT_CPU

R208

R209

5,19,44 PM_STPCPU#
19 PM_STPPCI#

R732 1
R733 1

CLK_EXT_CPU#

SCLK
SDATA

10K_0402_5%
1

10K_0402_5%

35
34

VTT_PWRGD

20,22 VTT_PWRGD

2@0_0402_5%
2@0_0402_5%

10
45
12
26
11

PCI33/66#

CPUC0

39

EXT_CPU#

CPUT1

44

EXT_NB

VTTPWRGD/PD#
CPU_STP#
PCI_STOP#
24/48#SEL
PCI33/66#SEL

20 CLK_EXT_48M
24 CLK_EXT_SD48

10 REFCLK1_NB
32 CLK_SIO_14M
20 CLK_SB_14M

43

EXT_NB#

SDRAMOUT

47

EXT_MEM66M

R221 1
CLK_SIO_14M R222 1
R226 1
R219 1

1
1

R217

2
2 33_0402_5%
33_0402_5%

EXT_48M 27
EXT_SD48 28

AGPCLK0
AGPCLK1

32
31

EXT_AGP66M

FS3/PCICLK_F0
FS4/PCICLK_F1

14
15

2 68_0402_5%
2 33_0402_5%
2 33_0402_5%

FS2
FS1
FS0

2 @33_0402_5%

4
3
2

CLK_IREF

38

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

16
17
20
21
22
23

48MHz_1
48MHz_0

FS2/REF2
FS1/REF1
FS0/REF0
IREF

R225

2
49.9_0402_1%
2
49.9_0402_1%

1
R212
1
R213

2
49.9_0402_1%
2
49.9_0402_1%

CLK_EXT_NB 10

1
R214
1
R215
1
R218

CLK_EXT_NB#
2
CLK_EXT_NB# 10
33_0402_5%
2
CLK_EXT_MEM66 10
33_0402_5%
2
CLK_EXT_AGP66 10
33_0402_5%

1
R220

2
33_0402_5%

CLK_EXT_ALINK 19

8
5
18
24
25
33
46
41

GNDXTAL
GNDREF
GNDPCI
GNDPCI
GND48M
GNDAGP
GNDSD
GNDCPU

475_0402_1%

FS3
FS4

1
R206
1
R207

CLK_EXT_CPU# 4

CLK_EXT_NB#

30 CLK_AUDIO_14M

CLK_EXT_48M
CLK_EXT_SD48

CLK_EXT_CPU#
2
33_0402_5%
CLK_EXT_NB
2
33_0402_5%

1
R210
1
R211

CLK_EXT_NB

CPUC1
R216

Termination R close
U11 as possible.

+3VS

13,20 SM_CLK_SB
13,20 SM_DATA_SB

1 as posible
9 as posible
29 as posible
36 as posible

+3VS_VDDA

@1M_0402_5%
XTALOUT

+3VS

C264
C266
10U_0805_10V4Z

ICS951402AGT_TSSOP48

CLOCK FREQUENCY SELECT TABLE

R233
10K_0402_5%

R234

5,12

BSEL1

D3

2 RB751V_SOD323

5,12

BSEL0

D4

2 RB751V_SOD323

10K_0402_5%
2

2
4

R228
@10K_0402_5%

R236

R238
10K_0402_5%

4.7K_0402_5%

R231
10K_0402_5%

R239
10K_0402_5%

R240
10K_0402_5%

R241
@10K_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

R230
@10K_0402_5%

R237

4.7K_0402_5%

Compal Electronics, Inc.

Title

R229
@10K_0402_5%

33MHZ

66MHZ

PCI33/66# = LOW

1
R235

10K_0402_5%

PCI33/66# = HIGH

R232
10K_0402_5%

**

FS0
FS1
FS2
FS3
FS4
PCI33/66#

+3VS_CLK

+3VS

+3VS

Spread OFF OR
Center spread +/-0.3%

100

133

100

133

+3VS_CLK

A-LINK FREQ
*

200

200

Note: 0 = PULL LOW


1 = PULL HIGH

With Spread Enabled

MEM

CPU

**

FS4 FS3 FS2 FS1 FS0

C268
0.1U_0402_10V6K

R204
2
2

VDDCPU
VDDSD
VDDAGP
VDD48M
VDDPCI
VDDPCI
VDDREF
VDDXTAL

XTALOUT

VSSA

U11

L7
1
2
CHB2012U121_0805

+3VS_VDDA

42
48
30
29
19
13
1
9

C259 close U11 pin


C260 close U11 pin
C261 close U11 pin
C262 close U11 pin
C263 close U11 pin

XTALIN

+3VS_CLK

1
2
CHB2012U121_0805

Y5

Width=40 mils

L6

Clock Generator
Size

Document Number

Rev
1.0

LA-2301
Date:

Wednesday, May 26, 2004


G

Sheet

17
H

of

48

1
3

R246
200K_0402_5%

1
C274
0.1U_0402_10V6K

2
2

ENVDD

1
C275
4.7U_0805_10V4Z

1
C276
4.7U_0805_10V4Z

C277
0.1U_0402_16V4Z

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

DAC_BRIG
INVT_PWM
EDID_CLK

EDID_CLK

10
10

TZCLKTZCLK+

10
10
10
10
10
10

TZOUT1TZOUT1+
TZOUT2+
TZOUT2TZOUT0+
TZOUT0-

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

IB+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

DISPOFF#
+LCDVDD
EDID_DAT

EDID_DAT 8
TXCLK+ 10
TXCLK- 10
TXOUT2+
TXOUT2TXOUT1TXOUT1+
TXOUT0TXOUT0+

10
10
10
10
10
10

ACES_88107-3000

Q8
DTC124EK_SC59

R247
1.2K_0402_5%

C273
0.1U_0402_16V4Z

80mil

2N7002_SOT23
8

1
+LCDVDD

JP4

IB+
33
33

Q5
SI2302DS_SOT23

Q7

2
G

2
G

2
1

Width: 40mils

C271
4.7U_0805_10V4Z
+3VS

2
G
C272
0.047U_0402_16V4Z

R244
100K_0402_5%

Q6
2N7002_SOT23

80mil

R242
100K_0402_5%

1
R243
100_0402_1%

+3VS

+12VALW

+LCDVDD

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
+12VALW VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

L8

+3VS

B+

1
R248
10K_0402_5%

33

BKOFF#

D5

IB+

FBM-L11-201209-121LMT_0805

1
C278
0.1U_0603_50V4Z

DISPOFF#

1
R249
1
R250

C279
@10U_1210_35V4Z

RB751V_SOD323

EDID_DAT
+R_CRT_VCC

+5VS_BEAD

CRT Connector

+CRT_VCC

D8

40mil

F1

1
C283

2
0.1U_0402_10V6K

RB491D_SOT23 1A_6VDC_MINISMDC110

+3VS

@V-PORT-0603-220 M-V05_0603

@V-PORT-0603-220 M-V05_0603

D7

40mil

D9

2
D6

JP5

10

CRT_R

1
L10

10

CRT_G

1
L11

2
FCM2012C-800_0805

10

CRT_B

1
L12

2
FCM2012C-800_0805
1

R256
75_0402_1%

C284
C285
3.3P_0402_50V8C 3.3P_0402_50V8C
2

2
FCM2012C-800_0805

C286
3.3P_0402_50V8C

C287
5P_0402_50V8C

CRTR
CRTG
CRTB

1
C288
5P_0402_50V8C

NB_DDC_DATA
2
4.7K_0402_5%
NB_DDC_CLK
2
4.7K_0402_5%

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

C289
5P_0402_50V8C

R255
75_0402_1%

R254
75_0402_1%

@V-PORT-0603-220 M-V05_0603

40mil

Close to CRT
connector

+3VS

C280 47P_0402_50V8J
1
2
C282
47P_0402_50V8J
1
2

EDID_CLK
C281
1000P_0402_50V7K

2
2.2K_0402_5%
2
2.2K_0402_5%

1
R251
1
R252

+CRT_VCC
CRT_DDC_DATA
2
2.2K_0402_5%
CRT_DDC_CLK
2
2.2K_0402_5%

1
R253
1
R257

TYCO_1470801-1

U12

R258

1
D76

2
G

C292
100P_0402_25V8K

C294
100P_0402_25V8K

D77

NB_DDC_CLK 10

C293
100P_0402_25V8K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3NB_DDC_CLK
Q10
2N7002_SOT23

@V-PORT-0603-220 M-V05_0603

NB_DDC_DATA 10

2
G
1
D

1
R259
1K_0402_5%

NB_DDC_DATA

VSYNC

1
2
FCM2012C-800_0805

74AHCT1G125GW_SOT353-5
A

CRT_DDC_CLK
CRTVSYNC

10 CRT_VSYNC

L14

+3VS

@V-PORT-0603-220 M-V05_0603

U13

2.2K_0402_5%

CRT_DDC_DATA
C290
100P_0402_25V8K

1
C291

OE#

2
0.1U_0402_10V6K

Q9
2N7002_SOT23

H SYNC

74AHCT1G125GW_SOT353-5

1
2
L13
FCM2012C-800_0805

CRT HSYNC

5
P
2

10 CRT_HSYNC

OE#

+CRT_VCC

Size
B
Date:

Compal Electronics, Inc.


LVDS, CRT& TV CONN
Document Number

Rev
1.0

LA-2301

Wednesday, May 26, 2004

Sheet
1

18

of

48

8,12
8

A_AD[0..31]
A_CBE#[0..3]

+3VALW

C295
@15P_0402_50V8J

1
R271
2

2
@0_0402_5%

R272
8.2K_0402_5%
1

PULL DOWN FOR S3

+3VS

1
8.2K_0402_5%
2
1K_0402_5%
2
4.7K_0402_5%

A_SERR#
PM_STPCPU#
PM_STPPCI#

8
A_STROBE#
8
A_DEVSEL#
8
A_ACAT#
8
A_END#
8,12
A_PAR
8
A_OFF#

Clo se SB

8
8

H_CPUSLP#
2
200_0402_5%
H_A20M#
2
200_0402_5%
H_IGNNE#
2
200_0402_5%
H_SMI#
2
200_0402_5%
H_STPCLK#
2
200_0402_5%
H_INTR
2
200_0402_5%
H_NMI
2
200_0402_5%
H_INIT#
2
200_0402_5%

10K_0402_5%
2
R646

+3VS

R279
4.7K_0402_5%

5,17,44 PM_STPCPU#
17 PM_STPPCI#
8,24,27
24
28
26,28

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

5
5
5
5
5
5
5
5

H_PWRGD
H_INTR
H_NMI
H_INIT#
H_SMI#
H_CPUSLP#
H_IGNNE#
H_A20M#

H_STPCLK#

R296
2
100K_0402_5%

1
R297

AC11
B18
E4
H_INTR
B17
H_NMI
B16
H_INIT#
C17
H_SMI#
C16
H_CPUSLP#
F19
H_IGNNE#
D17
H_A20M#
D18
H_CPUFERR# E19
H_STPCLK#
E16
GPIO0
E17
DPRSLPVR
E18
SB_APIC_D0
C19
SB_APIC_D1
C18
CLK_14M_APIC B19
OVCUR#4
AB7
AB8
AC8
AC10
AB11

10K_0402_5%
10K_0402_5%
1K_0402_5%
10K_0402_5%

NC

+SB_VBAT

Part 1

A_INTA#
INTB#
INTC#
INTD#
X1

X2
CPURSTIN#
CPU_PWRGD
INTR/LINT0
NMI/LINT1
INIT
SMI#
SLP#
IGNNE#
A20M#
FERR#
STPCLK#
SSMUXSEL/GPIO0
DPRSLPVR
APIC_D0
APIC_D1
APIC_CLK
RTC_ALE/USBOC4#/GPIO3
RTC_WR#/RTC_CLKOUT
RTC_CS#/USBOC3#/GPIO2
VBAT
RTC_GND

B15
D16
A14
A15
A16
A17
D15
A18
A19
C15
B1
C1
A1
D2
B2
C2
A2
D3
C3
A3
D4
B4
C4
A4
D5
B5
C8
D8
B8
A8
C9
D9
B9
A9
C10
B10
D11
A10
C11
B11
D12
A11
B3
C5
A7
D10
B7
A6
C7
D7
A5
B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20
AB5
Y14
AA14
AB14
AA13
AB13
AC14
Y13
AC13
AA2

PCI_1394
PCI_LAN
PCI_PCM
PCI_MINI
PCI_EC
PCI_SIO

W=20mils

1
R300

2
200_0805_5%

1
R305
20M_0603_5%

1
R301

2
200_0805_5%

PCI_CLK_R R270 1
PCI_CLK_FB
PCI_RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DEVSEL#
PCI _IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CLKRUN#
RAM_SEL0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1
SERIRQ
OVCUR#5 1
10K_0402_5%

2
2
2
2
2
2

39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%
39_0402_5%

C299
1U_0603_10V6K

+3VALW
0.1U_0402_16V4Z C298
1
2

8.2K_1206_8P4R_5%
RP67
4
3
2
1

5
6
7
8

8.2K_1206_8P4R_5%
RP70
PCI_REQ#2
4
5
PCI_REQ#3
3
6
PCI_REQ#0
2
7
PCI_REQ#1
1
8
8.2K_1206_8P4R_5%
RP71

PCI_GNT#2
PCI_GNT#3
PCI_GNT#0
PCI_GNT#1

4
3
2
1

5
6
7
8

8.2K_1206_8P4R_5%
RP69
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

4
3
2
1

5
6
7
8

8.2K_1206_8P4R_5%
PCI_REQ#4
1
R276
PCI_GNT#4
1
R277

PCI_C/BE#[0..3]

SERIRQ
LPC_FRAME#
LPC_AD3
LPC_DRQ#0

PCI_C/BE#[0..3] 24,26,27,28

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

27
26
24
28

2
8.2K_0402_5%
2
8.2K_0402_5%
RP73

4
3
2
1

5
6
7
8

10K_1206_8P4R_5%
RP72
4
5
3
6
2
7
1
8

PCI_FRAME# 24,26,27,28
PCI_DEVSEL# 24,26,27,28
PCI_IRDY# 24,26,27,28
PCI_TRDY# 24,26,27,28
PCI_PAR 24,26,27,28
PCI_STOP# 24,26,27,28
PCI_PERR# 24,26,27,28
PCI_SERR# 24,26,27,28
PCI_REQ#0 27
PCI_REQ#1 26
PCI_REQ#2 24
PCI_REQ#3 28

LPC_AD2
LPC_DRQ#1
LPC_AD1
LPC_AD0
PM_CLKRUN#

RAM_SEL0
20

RAM_SEL1

20

RAM_SEL2

RAM_SEL1
RAM_SEL2

PM_CLKRUN# 26,27,28,32,33
LPC_AD0 32,33
LPC_AD1 32,33
LPC_AD2 32,33
LPC_AD3 32,33
LPC_FRAME# 32,33
LPC_DRQ#0 33
LPC_DRQ#1 32
SERIRQ
24,32,33
2
+3V
R291

100K_1206_8P4R_5%
2
1
R280
10K_0402_5%

2
R283
1
R644
1
R645

1 @10K_0402_5%

2
R647
2
R648
2
R292

1 10K_0402_5%

2 @10K_0402_5%

+3V

2 @10K_0402_5%

1 10K_0402_5%
1 10K_0402_5%

G POC3#

G POC2#

GPIO1

RAM_SEL2

RAM_SEL1

RAM_SEL0

Size
256M(16X16)

Vendor C e l l s

256M(16X16) Infienon

512M(32X16)

SAM

512M(32X16)

HYN

14

P
2

U33A
O

C804
2

SAM

256M(16X16)

HYN

256M(16X16)

Elpida

512M(32X16)

Elpida

512M(32X16) Infienon

3PCIRST#

PCIRST#

Title

Compal Electronics, Inc.


IXP150(1/4)- PCI/CPU/LPC

H_CPUFERR#

20,24,26,27,28

SN74LVC125APWLE_TSSOP14

R295

0.1U_0402_10V6K

C803
2

10K_0402_5%

2 2
MMBT3904_SOT23
1

PCI_RST#

PCI_RST#

1000P_0402_50V7K

R294
330_0402_5%

470_0402_5%

23

+3VS

OE#

Size
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5
6
7
8

+CPU_CORE

+CPU_CORE

4
3
2
1

PCI_FRAME#
PCI _IRDY#
PCI_TRDY#
PCI_DEVSEL#

2 39_0402_5%
C2971
2 22P_0402_50V8J
PCI_AD[0..31] 22,24,26,27,28

Add for EMI

J1

No short

Q12

CLK_PCI_1394 27
CLK_PCI_LAN 26
CLK_PCI_PCM 24
CLK_PCI_MINI 28
CLK_LPC_EC 33
CLK_PCI_SIO 32

PCI_AD[0..31]

R293

RP68

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_SERR#

+RTCVCC

C301
12P_0402_50V8K

H_FERR#

1
1
1
1
1
1

CHS-215IXP150-11_BGA457

RTCX1

1
2
20M_0603_5%

R263
R264
R265
R266
R267
R268

+SB_VBAT

R304

CPU_STP#/DPSLP#
PCI_STP#

C20
P20
B23
P21
AC12

Y2
32.768KHZ_12.5P_1TJS125DJ2A073

IN

RTCX2

C300
12P_0402_50V8K

1
2
R299 1
2
R302 1
2
R298 1
2
+3V
R290
2
1
R312
10K_0402_5%

OUT

NC

+3V

N20
R23

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
RTCX1

0_0402_5%

PM_STPCPU#
PM_STPPCI#

RTCX2
CPURSTIN#

GPIO0

44 PM_DPRSLPVR

A_SBREQ#
A_SBGNT#

1
R281
1
R282
1
R284
1
R285
1
R286
1
R287
1
R288
1
R289

SB150 SB

+CPU_CORE

2
R273
1
R274
1
R275

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
of 3
PCICLK7
PCICLK_FB
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24/RTC_AD7
AD25/RTC_AD6
AD26/RTC_AD5
AD27/RTC_AD4
AD28/RTC_AD3
AD29/RTC_AD2
AD30/RTC_AD1
AD31/RTC_AD0
CBE#0/ROMA10
CBE#1/ROMA1
CBE#2/ROMWE#
CBE#3/RTC_RD#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR
STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2
REQ#3/PDMAREQ0#
REQ#4/PLLBP33/PDMAREQ1#
GNT#0
GNT#1
GNT#2
GNT#3/PDMAGNT0#
GNT#4/PLLBP50/PDMAGNT1#
CLKRUN#
GPIO1/ROMCS#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
USBOC5#/GPM1

PCI CLKS

2
1

NBRST#

PCICLKF
A_RST#
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

PCI INTERFACE

TC7SH08FU_SSOP5

B22
R22
H22
P23
L23
N23
N22
M23
M22
K22
M21
M20
L21
K21
L20
N21
K23
K20
F23
G21
F20
H21
F22
F21
G20
E21
E20
D23
D22
E22
D20
C23
D21
C22
L22
J23
G22
E23
H20
J21
G23
H23
J20
J22
P22
B21
B20

L PC

Y
G

NBRST#
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

RTC

NB_RST#

7,23,32,33 NB_RST#

@10_0402_5%

1K_0402_5%

Trace length of PCI_CLK_R + PCI_CLK_FB should


be less than 200 mils.

A-LINK INTERFACE

R269

U15

R261

+3VS

Layout note:

XTAL

1
1

1C296

0.1U_0402_16V4Z2

A_CBE#[0..3]
U14A

CLK_EXT_ALINK

17 CLK_EXT_ALINK

A_AD[0..31]

CPU

Document Number

Rev
1.0

LA-2301
Date:

Sheet

Tuesday, May 18, 2004


1

19

of

48

USB20P4+
USB20P4-

48MHZ_4P_FN4800002
C304
0.1U_0402_16V4Z

USB20P3+
USB20P3-

Note: Place close


to ATI SB
For ATI USB2.0 only .

1
2
3
4

RP76 15K_1206_8P4R_5%
USB20P58
USB20P5+
7
USB20P46
USB20P4+
5

1
2
3
4

RP79 15K_1206_8P4R_5%
USB20P08
USB20P0+
7
USB20P36
USB20P3+
5

4
3
2
1

RP81 15K_1206_8P4R_5%
USB20P1+
5
USB20P16
USB20P2+
7
USB20P28

USB20P2+

USB20P2+

29

USB20P2-

USB20P2-

29

USB20P1+

USB20P1+

29

USB20P1-

USB20P1-

29

USB20P0+

USB20P0+

29

USB20P0-

USB20P0-

22
22
22
22
22

EC_RSMRST#
2
100K_0402_5%
EE_DI
1
10K_0402_5%
FANOUT0
1
10K_0402_5%

1
R313
2
R314
2
R315

29

MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
MII_TXEN
CLK25M
EE_DI

22
SB_EEDO
22
SB_EECLK
33 EC_RSMRST#
17 CLK_SB_14M
34 FLASH#
29
OVCUR#2
22 32KHZ_S5_OUT
29
OVCUR#1
30
SB_SPK

AGP_STP#

CPU_GHI#

2
D19
2
D20
2
R316

17,22 VTT_PWRGD

30

AGP_STP#_R
1
RB751V_SOD323
GHI
1
RB751V_SOD323
SB_VGATE
1
33_0402_5%

IAC_RST#

R809

R810

3
Q13
2
R319
2
R320

2N7002_SOT23
1 IAC_SDATAO_NB
33_0402_5%
1 IAC_SYNC_NB
33_0402_5%

1 RB751V_SOD323

EC_THERM#

EC_THERM# 33

1 RB751V_SOD323

PM_BATLOW#

PM_BATLOW# 33

SB_EC_SWI#

D12

1 RB751V_SOD323

EC_SWI#

EC_SWI#

SB_GA20

D13

1 RB751V_SOD323

GATEA20

GATEA20

33

SB_KBRST#

D14

1 RB751V_SOD323

KBRST#

KBRST#

33

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
PCI_ACT_REQ#
SUS_STAT#
SB_TEST1
SB_TEST0
SB_GA20
SB_KBRST#
SB_AC_IN
SB_EC_SWI#
LPC_SMI#
SB_EC_SMI#
SB_SCI#
SB_LID_OUT#
SM_CLK_SB
SM_DATA_SB

SB_AC_IN

D15

1 RB751V_SOD323

ACIN

ACIN

33,34,38

SB_EC_SMI#

D16

1 RB751V_SOD323

EC_SMI#

EC_SMI#

33

SB_SCI#

D17

1 RB751V_SOD323

EC_SCI#

EC_SCI#

33

SB_LID_OUT#

D18

1 RB751V_SOD323

EC_LID_OUT#

EC_LID_OUT# 33

PWR_STRP
I DE_PDIORDY
INT_IRQ14
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDDACK#
IDE_PDDREQ
IDE_PDIOR#
IDE_PDIOW#
IDE_PDCS1#
IDE_PDCS3#
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
I DE_SDIORDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

SB_EC_THERM#
SB_PM_BATLOW#

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD

33
33
33
22

SUS_STAT# 7

SM_CLK_SB 13,17
SM_DATA_SB 13,17
RAM_SEL1 19
RAM_SEL2 19
PWR_STRP 22

RP83

PDD0
PDD14
PDD1
PDD13

4
3
2
1

5
6
7
8

IDE_PDD[0..15]

IDE_PDD[0..15] 23

5
6
7
8

IDE_SA2 23
IDE_SA0 23
IDE_CSA#1 23
IDE_CSA#0 23

33_0804_8P4R_5%
INT_IRQ14
4
IDE_PDA1
3
IDE_PDIOR# 2
IDE_PDDACK# 1

RP82
5
6
7
8

IDE_IIRQA 23
IDE_SA1 23
IDE_IORA# 23
IDE_ACKA# 23

33_0804_8P4R_5%

33_0804_8P4R_5%
RP77
4
5 IDE_PDD6
3
6 IDE_PDD7
2
7 IDE_PDD8
1
8

IDE_PDIOW# 4
I DE_PDIORDY 3
IDE_PDDREQ 2
PDD15
1

33_0804_8P4R_5%

RP78
5
6
7
8 IDE_PDD15

IDE_IOWA# 23
IDE_IORDYA 23
IDE_REQA 23

33_0804_8P4R_5%

IDE_SDCS1#
IDE_SDCS3#
IDE_SDA0
IDE_SDA2

RP85
1
2
3
4

ODD_CSB#0
ODD_CSB#1
ODD_SA0
ODD_SA2

8
7
6
5

INT_IRQ15
1
IDE_SDA1
2
I DE_SDIORDY 3
IDE_SDDACK# 4

33_0804_8P4R_5%
RP87
ODD_IIRQB
8
ODD_SA1
7
6 ODD_IORDYB
5 ODD_ACKB#

IDE_SDIOR#
IDE_SDDREQ
IDE_SDD15
IDE_SDD0

1
2
3
4

33_0804_8P4R_5%
RP89
8 ODD_IORB#
ODD_REQB
7
6 ODD_SDD15
5 ODD_SDD0

1
2
3
4

33_0804_8P4R_5%
RP84
8 ODD_IOWB#
7 ODD_SDD14
6 ODD_SDD1
5 ODD_SDD3

IDE_SDIOW#
IDE_SDD14
IDE_SDD1
IDE_SDD3

ODD_CSB#0 23
ODD_CSB#1 23
ODD_SA0 23
ODD_SA2 23

ODD_SDD[0..15] 23

ODD_IIRQB 23
ODD_SA1 23
ODD_IORDYB 23
ODD_ACKB# 23

ODD_IORB# 23
ODD_REQB 23

RP90

IDE_SDD13
IDE_SDD11
IDE_SDD2
IDE_SDD4

1
2
3
4

IDE_SDD12
IDE_SDD10
IDE_SDD5
IDE_SDD8

1
2
3
4

33_0804_8P4R_5%
RP86
8 ODD_SDD12
7 ODD_SDD10
6 ODD_SDD5
5 ODD_SDD8

IDE_SDD6
IDE_SDD9
IDE_SDD7

1
2
3
4

33_0804_8P4R_5%
RP88
8 ODD_SDD6
7 ODD_SDD9
6 ODD_SDD7
5

ODD_IOWB# 23

ODD_SDD13
ODD_SDD11
ODD_SDD2
ODD_SDD4

8
7
6
5

33_0804_8P4R_5%

33_0804_8P4R_5%
RP91
1
2
3
4

8
7
6
5

PCI_ACT_REQ#
SM_CLK_SB
SM_DATA_SB

1
2
3
4

8
7
6
5

+3VALW

10K_1206_8P4R_5%
2
1
R804
10K_0402_5%
1
2
R649
2.2K_0402_5%
1
2
R650
2.2K_0402_5%

+3VS

RP96

AGP_STP#
AGP_BUSY#
SB_TEST1
SB_TEST0

10K_1206_8P4R_5%
RP97
1
8
2
7
3
6
4
5

1
2
3
4

8
7
6
5

8.2K_1206_8P4R_5%
RP98

IAC_SDATAI2
IAC_SDATAI1
IAC_SDATAI0
IAC_RST_R#

10K_1206_8P4R_5%
1
2
R323
8.2K_0402_5%

1
2
3
4

8
7
6
5

+3V

8.2K_1206_8P4R_5%

C306
Title

@15P_0402_50V8J

RP92

PM_SLP_S5#
PBTN_OUT#
PM_SLP_S3#

+3V

Compal Electronics, Inc.


IXP150(2/4) - IDE/USB/MII

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALSize
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
5

4
3
2
1

RP76~RP79,RP82,RP103,RP104 near SB.

IAC_BITCLK

@10_0402_5%

RP75

IDE_PDA2
IDE_PDA0
IDE_PDCS3#
IDE_PDCS1#

33_0804_8P4R_5%
RP80
PDD4 4
5 IDE_PDD4
PDD10 3
6 IDE_PDD10
PDD5 2
7 IDE_PDD5
PDD9 1
8 IDE_PDD9

PDD6
PDD7
PDD8

33

RP72~RP75,RP81,RP101,RP102 near SB.

IDE_PDD0
IDE_PDD14
IDE_PDD1
IDE_PDD13

33_0804_8P4R_5%
RP74
PDD2 4
5 IDE_PDD2
PDD12 3
6 IDE_PDD12
PDD3 2
7 IDE_PDD3
PDD11 1
8 IDE_PDD11

SB_AC_IN
GHI
AGP_STP#_R
CLK25M

IAC_BITCLK

@10_0402_5%

@15P_0402_50V8J

D11

10K_1206_8P4R_5%
RP95
SB_PM_BATLOW#1
8
AGP_BUSY#_R 2
7
SB_LID_OUT# 3
6
SB_EC_THERM# 4
5

1
2

AGP_BUSY#_R

R322

C305

D10

SB_PM_BATLOW#

10K_1206_8P4R_5%
RP93
1
8
2
7
3
6
SB_KBRST#
4
5

R321

2
1

SB_EC_THERM#

SB_EC_SMI#
SB_SCI#

CLK_SB_14M

AB4
AC9
AC7
AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6
Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6
AA12
W12
Y12
AB12
AA8
AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15
AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17
AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22
W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22

+3V

LPC_SMI#
SB_EC_SWI#
SB_GA20

IAC _SYNC

22,30 IAC_SYNC

CHS-215IXP150-11_BGA457

19,24,26,27,28

@0_0402_5%

IAC_SDATAO

22,30 IAC_SDATAO

AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT

2
1K_0402_5%

AGP_BUSY#

AGP_BUSY#

E1
E2
Y1
Y2
Y3
E3
V5
E5

1
R318

IAC_BITCLK
IAC_SDATAI0
IAC_SDATAI1

+3VS

IAC_BITCLK
IAC_SDATAO_NB
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAI2
IAC_SYNC_NB
IAC_RST_R#
SPDIF_OUT
SPDIF_OUT

30

22
PCIRST#

PIDERST#
SIDERST#

30
30
IAC_RST_R#

0_0402_5%

23
23

EC_RSMRST#
CLK_SB_14M
FLASH#
OVCUR#2
32KHZ_S5_OUT
OVCUR#1
SB_SPK
FANOUT0
AGP_STP#_R
AGP_BUSY#_R
GHI
SB_VGATE

Part 2 of 3

GND

OE

USB20P5-

TALERT#/ETH_TALERT#
PME#/EXT_EVNT0#
RI#/EXT_EVNT1#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
PCI_REQACT#
SUS_STAT#
TEST1
TEST0
GA20_IN/GEVNT0#
KB_RST#/GEVNT1#
SMB_ALERT#/GEVNT2#
LPC_PME#/GEVNT3#
LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#
GEVENT7#/ETH_CALERT#
GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1
RTC_IRQ#/PWR_STRP
PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#
PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#
SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15

ACPI / WAKE UP EVENTS

2 USB_RCOMP
12K_0603_1%

USBCLK/CLK48
USB_RCOMP
USB_VREFOUT
USB_ATEST1
USB_ATEST0
USBOC0#/GPM7
USB_HSDP5+
USB_FLDP5+
USB_HSDM5USB_FLDM5USB_HSDP4+
USB_FLDP4+
USB_HSDM4USB_FLDM4USB_HSDP3+
USB_FLDP3+
USB_HSDM3USB_FLDM3USB_HSDP2+
USB_FLDP2+
USB_HSDM2USB_FLDM2USB_HSDP1+
USB_FLDP1+
USB_HSDM1USB_FLDM1USB_HSDP0+
USB_FLDP0+
USB_HSDM0USB_FLDM0MCOL
MCRS
MDCK
MDIO
RX_CLK
RXD3
RXD2
RXD1
RXD0
RX_DV
RX_ERR
TX_CLK
TXD3
TXD2
TXD1
TXD0
TX_EN
PHY_PD
PHY_RST#
CLK_25M
EE_CS
EE_DI
EE_DO
EE_CK
RSMRST#
OSC_IN
SIO_CLK
BLINK/GPM0
FANOUT1/USBOC2#/GPM2
32KHZ_IN/GPM3
USBOC1#/GPM4
SPEAKER/GPM5
FANOUT0/GPM6
GPIO_X0/AGP_STP#
GPIO_X1/AGP_BUSY#
GPIO_X2/GHI#
GPIO_X3/VGATE
GPIO_X4
GPIO_X5

SECONDARY ATA 66/100

2
@15P_0402_50V8J

U14B
P3
R1
P1
N4
N3
P4
M2
M1
N2
N1
L4
L3
M4
M3
K2
K1
L2
L1
H2
H1
J2
J1
G3
J3
H3
K3
F1
F2
G1
G2
R5
W1
V4
V2
T1
T3
U2
T5
W4
T2
U1
T4
U4
V1
U3
V3
W2
W3
U5
Y7
P2
R3
R2
R4
AB9
A23
W6
AB2
AA3
W11
AB1
Y4
AA1
AC1
AC6
AC2
AC3
AC4
AC5

SB150 SB

OUT

R396
10K_0402_5%

OVCUR#0
USB20P5+

OVCUR#0

1
C303

PRIMARY ATA 66/100

1
2

10K_0402_5%
X3
4 VDD

29

2
@10_0402_5%

USB INTERFACE

1
R311

1
R307

1
2
R309
33_0402_5%

R310
D

CLK_USB_48M_R

ETHERNET MII

1
R851
0_0402_5%

2
@0_0402_5%

EEPROM
GPIO CLK / RST
GPIO_XTRA

1
R308

17 CLK_EXT_48M

AC97

+3V

Document Number

Rev
1.0

LA-2301
Tuesday, May 18, 2004

Sheet
1

20

of

48

+3VS

C307
10U_0805_10V4Z

C308

1
C309

1
C310

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

1
C311

1
C312

2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K
10U_0805_10V4Z

1
C313

1
C314

1
C315

1
C316

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

1
C317

1
C318

1
C319

1
C320

1
C321

1
C322

2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

+3VS
C323

U14C

0.1U_0402_10V6K

+2.5VS
0.1U_0402_10V6K
C329
10U_0805_10V4Z

1
C331

0.1U_0402_10V6K

1
C332

1
C333

0.1U_0402_10V6K

1
C334

1
C335

+3VS

1
C330

1
C336

0.1U_0402_10V6K
2
2
2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

ATI request

@0.01U_0402_16V7Z

C337

C324

C325

@0.01U_0402_16V7Z
2

C326

C327

C328
@0.01U_0402_16V7Z

+2.5V
@0.01U_0402_16V7Z
0.1U_0402_10V6K
C338
10U_0805_10V4Z

1
C339

Add for EMI

1
C340

1
C341

2
2
2
0.1U_0402_10V6K

+2.5VS
C342

+2.5VS

@0.01U_0402_16V7Z

C343
C

1
1000P_0402_50V7K

1000P_0402_50V7K

1
C805

1
C806

1
C807

C808

ATI request

1
C809

ATI request

0.1U_0402_10V6K

+3VS
1000P_0402_50V7K

@0.01U_0402_16V7Z

0.1U_0402_10V6K

C344

@0.01U_0402_16V7Z
2

C345

C346
@0.01U_0402_16V7Z

@0.01U_0402_16V7Z

+3V

+2.5V
0.1U_0402_10V6K

+3V

C352
@0.1U_0402_16V7K

0.1U_0402_10V6K 0.1U_0402_10V6K
C347
10U_0805_10V4Z

1
C348

1
C349

1
C350

2
2
0.1U_0402_10V6K

C351
0.1U_0402_10V6K

+2.5V

C354
@0.1U_0402_16V7K

C353

+2.5V

@0.1U_0402_16V7K

ATI request CLOSE TO


L6,H6,J6
C355

+3V_AVDDC
+3V

+5VS

C356

+3V_AVDDUSB

0.1U_0402_16V7K

0.1U_0402_10V6K

R324

L15

1K_0402_5%
1

RB751V_SOD323 C357

+3V_AVDDC

1U_0603_10V6K

1
2
MVB2012301YZT_0805

C358
1U_0603_10V6K

C359
0.1U_0402_10V6K

C797
470P_0402_50V7K

C798

C360

680P_0402_50V7K

@10U_0805_10V6K

1
C371
0.1U_0402_10V6K

1
C365

1
C366

1
C367

C368

2
2
2
2
2
2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

C799

C361
C800

@47U_B_6.3VM

680P_0402_50V7K

2
G
Q60
2N7002_SOT23

S
+SB_2.5VALW

+2.5V_AVDDCK

D72

C369
@10U_0805_10V4Z

1
2
MVB2012301YZT_0805
1

C372
1U_0603_10V6K

C373

C801

LM431SC_SOT23

470P_0402_50V7K

C770
1U_0603_10V6K

C370
0.1U_0402_10V6K

L17

2
C802
680P_0402_50V7K

Title

Compal Electronics, Inc.


IXP150(3/4) - PWR

0.1U_0402_10V6K

R642
10K_0402_5%

1
1

+2.5V_AVDDCK

+2.5VS

1
C364

1
C363

470P_0402_50V7K

ATI request
A

E10
E13
E14
E6
E9
F10
F13
F14
F18
F6
F9
G6
J12
J15
J18
J19
J9
K10
K11
K12
K13
K14
K18
K19
L10
L11
L12
L13
L14
L18
L19
M10
M11
M12
M13
M14
M15
M6
M9
N10
N11
N12
N13
N14
N6
P10
P11
P12
P13
P14
P18
P19
R12
R15
R18
R19
R9
V14
V15
V16
V19
V6
V7
V8
W14
W15
W16
W19
W7
W8
H5
G5

+3V_AVDDUSB

0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

Part 3 of 3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_USB
VSS_USB

CHS-215IXP150-11_BGA457

+3VALW

C362
10U_0805_10V4Z

SB150 SB

+3V_AVDDUSB

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
STB_2.5V
VDD_USB
VDD_USB
VDD_USB
AVDDC
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
STB_3.3V
AVDDTX0
AVDDTX1
AVDDTX2
AVDDRX0
AVDDRX1
AVDDRX2
VREF_CPU
5V_VREF
AVDD_CK
S5_2.5V
S5_3.3V
AVSSC
AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0
AVSSCK

ATI request

L16
1
2
MVB2012301YZT_0805

+SB_2.5VALW

+3VALW

+12VALW

+3V

+2.5VS

+2.5V_AVDDCK

+5VS_VREF

+3V

D21
2

ATI request

+3V_AVDDC

+3VS

@0.1U_0402_16V7K

E11
E12
E15
E7
E8
F11
F12
F15
F16
F17
F7
F8
G18
G19
H18
H19
M18
M19
N18
N19
T18
T19
U18
U19
V17
V18
W17
W18
J10
J11
J13
J14
K15
K9
L15
L9
N15
N9
P15
P9
R10
R11
R13
R14
P6
R6
V13
W13
V12
L6
H6
J6
P5
T6
U6
V9
V10
V11
W9
W10
F4
J4
K5
F3
K4
L5
D19
D1
A21
Y9
AA9
N5
M5
J5
G4
K6
H4
F5
A22

POWER

0.1U_0402_10V6K
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Size

Document Number

Rev
1.0

LA-2301
Date:

Sheet

Wednesday, May 26, 2004


1

21

of

48

+3VS
1

+3VALW

R325

+3VALW

U18A

C375

14
P

0.47U_0603_16V7K 5

U18B

U18C

R329 1

2 47_0402_5%

U18D

R331

SN74LVC14APWLE_TSSOP14

@10K_0402_5%

2
SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

1K_0402_5%

SB_PWRGD 20

14

0.1U_0402_16V7K

R328
1
2
150K_0402_5%

P
2

C374

SN74LVC32APWLE_TSSOP14

1
2
150K_0402_5%

R332
2

14

14
R327
P

14
P

U17A

R330
@1M_0402_5%

0_0402_5%

VGATE

R326
44

+3VALW

VTT_PWRGD 17,20

10K_0402_5%
1

+3VALW

+3VALW

+2.5VS

R333

1K_0402_5%

NB_PWRGD 7
D
Q14
2N7002_SOT23

R334
47K_0402_5%

+3VALW

+3V

+3V

+3V

+3V

R346

10K_0402_5%

10K_0402_5%

R345

10K_0402_5%
2

R344

10K_0402_5%
2

R343

10K_0402_5%
2

R342

10K_0402_5%
2

R341

1
R340

R339

R338

@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%


2

R336

10K_0402_5%
2

R337

+3V

+3VS

+3VS

+3VS

R335

+3V

+3V

+3VALW

2
G

20
PWR_STRP
20
SB_EEDO
20
SB_EECLK
20,30 IAC_SYNC
20,30 IAC_SDATAO
20
SPDIF_OUT

PWR_STRP
MANUAL
PWR ON

STRAP
HIGH

IGN DEBUG
EEDO
USE
DEBUG
STRAPS

EECK
ROM ON
PCI BUS

INIT ACTIVE
HIGH

33MHz NB
BUS

SIO 24MHz

SPEEDSTEP
CPU_STP#
ENABLE
SPEED
STEP

STRAP
LOW

FREQLTCH
TX_EN

ROM ON
LPC
BUS

INIT ACTIVE
LOW (PIII)

HI SPEED
A-LINK

SIO 48MHz

DISABLE
SPEED
STEP

DE FAULT

DE FAULT

DE FAULT

DE FAULT

DE FAULT

DE FAULT

R358

32KHZ_S5

ETHERNET TXD[3:0]

32KHZ
OUTPUT
FROM SB200
(INT RTC)

DISABLE
CPU FREQ
SETTING
DE FAULT

IGNORE
DEBUG
STRAPS

R357

SPDIF_OUT

R356

AC_SDOUT

R355

AC_SYNC

R354

@10K_0402_5%@10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5%


2

R353

10K_0402_5%
2

R352

10K_0402_5%

DE FAULT

AUTO
PWR
ON

R351

10K_0402_5%

R350

10K_0402_5%

REQUIRED SYSTEM STRAPS

2
B

R349

R348

@10K_0402_5% 10K_0402_5%

R347

20
MII_TXEN
20
MII_TXD3
20
MII_TXD2
20
MII_TXD1
20
MII_TXD0
20 32KHZ_S5_OUT

PROCESSOR FREQ MULTIPLIER

DE FAULT

ENABLE CPU
FREQSETTING

32KHZ INPUT
TO SB200
(EXT RTC)

+3VS

R359

10K_0402_5%

19,24,26,27,28 PCI_AD26

R360

@10K_0402_5%
Title

Compal Electronics, Inc.


IXP150(4/4) - STRAPS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
1.0

LA-2301
Date:

Sheet

Tuesday, May 18, 2004


1

22

of

48

20 IDE_PDD[0..15]

PIDE_RST#
IDE_PDD7
IDE_PDD8
IDE_PDD6
IDE_PDD9
IDE_PDD5
IDE_PDD10
IDE_PDD4
IDE_PDD11
IDE_PDD3
IDE_PDD12
IDE_PDD2
IDE_PDD13
IDE_PDD1
IDE_PDD14
IDE_PDD0
IDE_PDD15

30,31,33 EC_IDERST
+3V

SN74LVC08APW_TSSOP14

1
5.6K_0402_5%
1
8.2K_0402_5%
1
10K_0402_5%

U19A

A
B

PIDE_RST#

SN74LVC08APW_TSSOP14

GND:Master
NC: Slave
2
475_0402_1%

IDE_IORDYA
2
4.7K_0402_5%

1
R362

+3VS

PHDD_LED#
2
100K_0402_5%

1
R361

+5VS

C376
0.1U_0402_16V4Z
1
2

1
R365

IDE_REQA

2
R363
2
R364
2
R366

IDE_IIRQA
IDE_PDD7

20

IDE_REQA

20

IDE_IOWA#

20

IDE_IORA#

20

IDE_IORDYA

20

IDE_ACKA#

20

IDE_IIRQA

20

IDE_SA1

20
20
20
20
33

IDE_SA0
IDE_SA2
IDE_CSA#0
IDE_CSA#1
PHDD_LED#

IDE_REQA
IDE_IOWA#
IDE_IORA#
IDE_IORDYA
PCSEL
IDE_ACKA#
IDE_IIRQA
IDE_SA1
IDE_SA0
IDE_SA2
IDE_CSA#0
IDE_CSA#1
PHDD_LED#

+5VS

60mil

+5VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

RESET#
GND
DD7
DD8
DD6
DD9
DD5
DD10
DD4
DD11
DD3
DD12
DD2
DD13
DD1
DD14
DD0
DD15
GND

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44

DMARQ
GND
DIOW# / STOP
GND
DIOR# / HDMARDY# / HSTROBE
GND
IORDY / DDMARDY# / DSTROBE
CSEL
DMACK#
GND
INTRQ
Reserved
DA1
PDIAG#
DA0
DA2
CS0#
CS1#
DASP#
GND
+5VCC
+5VCC
GND
NC

Place caps. near HDD CONN.

1
C377
10U_0805_10V4Z

ALLTOP_C17864-14401_REVERSE

Q15
AOS 3401_SOT23

1
4

14

Place caps. near CDROM CONN.

R367
10K_0402_5%

U16B

OE#

10

1
C381
10U_0805_10V4Z

1
C382
1U_0603_10V4Z

C385
10U_0805_10V4Z

C386
0.1U_0402_16V4Z

R368

1
C383
0.1U_0402_16V4Z

+5VCD

C384
@1000P_0402_25V8K

1
2
240K_0402_5%

+5VALW

C387
1
2

SIDE_RST#

R370
2

10K_0402_5%
1

1U_0603_10V4Z

SIDERST#

1
1

20

IDE_RST# 9

PCMRST#
U19C

C380
@1000P_0402_25V8K

+5VCD

+3V
33

Net width should be 60mil wide

CD-ROM Connector

1
C379
0.1U_0402_16V4Z

+5VALW
+5VCD

1
C378
1U_0603_10V4Z

PIDERST#

U19B

20

PCI_RST#

19

IDE_RST# 4
2
@0_0402_5%
5

1
R731

2
0_0402_5%

14

1
R730

14

+3V
7,19,32,33 NB_RST#

JP6

HDD Connector

IDE_PDD[0..15]

SN74LVC125APWLE_TSSOP14

R371
10K_0402_5%

+3V

+5VCD

2
R372

33

SHDD_LED#
1
100K_0402_5%

G_PCI_RST#

PCI_RST# 2
G

2
R373

2N7002_SOT23
Q17

ODD_IOWB#
ODD_IORDYB
ODD_IIRQB
ODD_SA1
ODD_SA0
SW_ODD_CSB#0
SHDD_LED#
+5VCD
SEC_CSEL
1
475_0402_1%

ODD_CSB#1

ODD_CSB#1

ODD_REQB 20
ODD_IORB# 20

1
I

1
SW_ODD_CSB#1

SN74LVC125APWLE_TSSOP14
+5VCD

1 100K_0402_5% +5VCD
ODD_SA2 20

G_PCI_RST#

+5VCD
+5VCD

20

ODD_CSB#0

ODD_CSB#0

R375
10K_0402_5%
U16C

SW_ODD_CSB#0
A

SN74LVC125APWLE_TSSOP14

C388
0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

R376
10K_0402_5%
U16A

ODD_ACKB# 20

CBLIDB
R369 2
ODD_SA2
SW_ODD_CSB#1

Title

G_PCI_RST#

0.1U_0402_16V4Z C389
1
2

20

ODD_ACKB#

FOX_QT8H0506-L201R-F

+3V

14

ODD_SDD8
ODD_SDD9
ODD_SDD10
ODD_SDD11
ODD_SDD12
ODD_SDD13
ODD_SDD14
ODD_SDD15
ODD_REQB
ODD_IORB#

INT_CD_R 30,31
1
2
R829
@0_0402_5%

INT_CD_R

OE#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

INT_CD_R
GND
ODD_SDD8
ODD_SDD9
ODD_SDD10
ODD_SDD11
ODD_SDD12
ODD_SDD13
ODD_SDD14
ODD_SDD15
ODD_REQB
ODD_IORB#
GND
ODD_ACKB#
N/A
CBLIDB
ODD_SA2
ODD_CSB#1
+5VS
+5VS
+5VS
GND
GND
GND
N/A

INT_CD_L
CD_AGND
SIDE_RST#
ODD_SDD7
ODD_SDD6
ODD_SDD5
ODD_SDD4
ODD_SDD3
ODD_SDD2
ODD_SDD1
ODD_SDD0
GND
ODD_IOWB#
ODD_IORDYB
ODD_IIRQB
ODD_SA1
ODD_SA0
ODD_CSB#0
SHDD_LED#
+5VS
+5VS
GND
GND
SEC_CSEL
N/A

20 ODD_IOWB#
20 ODD_IORDYB
20 ODD_IIRQB
20
ODD_SA1
20
ODD_SA0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

10

ODD_REQB
2
5.6K_0402_5%
ODD_IIRQB
2
8.2K_0402_5%
ODD_SDD7
1
5.6K_0402_5%

R374
10K_0402_5%

INT_CD_L
CD_AGND
SIDE_RST#
ODD_SDD7
ODD_SDD6
ODD_SDD5
ODD_SDD4
ODD_SDD3
ODD_SDD2
ODD_SDD1
ODD_SDD0

30,31 INT_CD_L
30 CD_AGND

ODD_IORDYB
2
4.7K_0402_5%

OE#

1
R378
1
R379
2
R380

+5VCD

JP7

1
R377

CD_PLAY 31,33

20 ODD_SDD[0..15]

+3VS

CD_PLAY

Q16
DTC124EK_SC59

SN74LVC08APW_TSSOP14

Size
B
Date:

Compal Electronics, Inc.


IDE/CDROM CONN.
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

23

of

48

CLK_PCI_PCM
C

R381
10_0402_5%

19,26,27,28
19,26,27,28
19,26,27,28
19,26,27,28

C402
15P_0402_50V8J

+3VS

SDCD#

43K_0402_5%
Q65
@AOS 3401_SOT23

+VCC_5IN1

25

CLK_PCI_PCM

26,27,28,33 PCM_PME#
1
+3VS
R384
IDSEL:
PCI_AD20 1
PCI_AD20
R386

2+3V_PCM_SUSP
10K_0402_5%
2 PCM_ID
100_0402_1%
PCI_PIRQA#
SD_PULLHIGH
PCI_PIRQB#

8,19,27 PCI_PIRQA#
19 PCI_PIRQB#
19,32,33 SERIRQ

25

R852

PCIRST#

19,20,26,27,28 PCIRST#
19,26,27,28 PCI_FRAME#
19,26,27,28 PCI_IRDY#
19,26,27,28 PCI_TRDY#
19,26,27,28 PCI_DEVSEL#
19,26,27,28 PCI_STOP#
19,26,27,28 PCI_PERR#
19,26,27,28 PCI_SERR#
19,26,27,28 PCI_PAR
19
PCI_REQ#2
19
PCI_GNT#2
19 CLK_PCI_PCM

+VCC_5IN1

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

SM_CD#
35

25

5IN1_LED#
SDOC#

SDOC#

R832
@0_0805_5%

B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

A7
G13
VCCA2
VCCA1

M12
N12
VPPD1
VPPD0

VCCD1#
VCCD0#
E1
J3
N1
N5

CBE3#
CBE2#
CBE1#
CBE0#

G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK

L8
L11

RIOUT#_PME#
SUSPEND#

F4

M10

GRST#

S1_D[0..15]

2
C392
0.1U_0402_16V4Z

C393
0.1U_0402_16V4Z

S1_D[0..15] 25

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#

B7
A11
E11
H13

S1_REG#
S1_A12
S1_A8
S1_CE1#

CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
C5
D5

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
1
R382
S1_BVD1
S1_WP

D11

S1_A19

D6

S1_RDY#

M9
B5

PCM_SPK#
S1_BVD2

A4
L12
D9
C6
A2
E10
J13

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#

IDSEL
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

S1_A[0..25] 25

1
C391
0.1U_0402_16V4Z

CBLOCK#/A19
CINT#/READY_IREQ#
SPKROUT
CAUDIO/BVD2_SPKR#
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14

1
C394
0.1U_0402_16V4Z

1
C395
0.1U_0402_16V4Z

1
C396
0.1U_0402_16V4Z

C397
0.1U_0402_16V4Z

+S1_VCC

1
S1_IOWR# 25
S1_IORD# 25
S1_OE#
S1_CE2#

1
C398
0.1U_0402_16V4Z

1
C399
0.1U_0402_16V4Z

1
C400
0.1U_0402_16V4Z

C401
0.1U_0402_16V4Z

25
25

S1_REG# 25
S1_CE1#

25

S1_RST

25

S1_CD1#
C403
10P_0402_50V8K

S1_CD2#

C404
10P_0402_50V8K

Closed to Pin L12

Closed to Pin A4

S1_WAIT# 25
S1_INPACK# 25
S1_WE# 25
S1_A16
2
33_0402_5%

Close chip termenal

S1_BVD1 25
S1_WP
25
MSD0_XDD2
S1_RDY# 25

MSD1_XDD6

PCM_SPK# 30
S1_BVD2 25
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1

MSD2_XDD5
MSD3_XDD3

25
25
25
25

MSBS_XDD1

1
R397
1
R399
1
R400
1
R401
1
R403

2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%

PCIRST#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

K8
N9
K9
N10
L10
N11
M11
J9

S1_A[0..25]

1
C390
0.1U_0402_16V4Z

+3VS

C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8

CARDBUS

+3VS

PCI_AD[0..31]
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

+S1_VCC
+3VS

U21

19,22,26,27,28 PCI_AD[0..31]

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI Interface

25
25
25
25

M13
N13

SDCD#
SDWP
SDPWREN#

17 CLK_EXT_SD48

R398

2 0_0402_5%
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

1
25 SDCK_XDWE#
25 SDCM_XDALE
25 SDDA0_XDD7
25 SDDA1_XDD0
25 SDDA2_XDCL
25 SDDA3_XDD4

+3VS

1
R391
1
R392
1
R836

SDCD#
2
@43K_0402_5%
SDWP
2
@43K_0402_5%
MSINS#
2
@43K_0402_5%

VCC_SD

E8
F8
G7

SDCD#
SDWP/SMWPD#
SDPWREN33#

H5

SDCLKI

F6
E5
E6
F7
F5
G6

SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4

G5

GND_SD

MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

H7
J8
H8
E9
G9
H9
G8
F9

SMBSY#
SMCD#
SMWP#
SMCE#

H6
J7
J6
J5

XD_MS_PWREN#
MSBS_XDD1
1
MSD0_XDD2
R394
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

MSINS# 25
XD_MS_PWREN# 25
MSBS_XDD1 25

2
33_0402_5%
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

MSCLK_XDRE# 25
25
25
25
25

XDBSY# 25
XDCD# 25
XDWP# 25
XDCE# 25
A

R831
2.2K_0402_5%

CB714_LFBGA169

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close chip termenal


5

SD/MMC/MS/SM

E7

25
25
25

SDCD#
SDWP
SDPWREN#

+VCC_5IN1

D3
H2
L4
M8
K11
F12
C10
B6

SD_PULLHIGH
1
0_0805_5%
SDCM_XDALE
2
43K_0402_5%
SDDA0_XDD7
2
43K_0402_5%
SDDA1_XDD0
2
43K_0402_5%
SDDA2_XDCL
2
43K_0402_5%
SDDA3_XDD4
2
43K_0402_5%

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

2
R833
1
R383
1
R385
1
R387
1
R388
1
R389

Size
B
Date:

Compal Electronics, Inc.


PCMCIA Controller ENE CB714
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

24

of

48

PCMCIA Power Controller


CardBus Socket

VCC
VCC
VCC

12V

13
12
11

40mil

+S1_VPP
+5VS
0.1U_0402_16V4Z

C412

4.7U_0805_10V4Z

C413

5
6

S1_A[0..25]

VCCD0#
VCCD1#
VPPD0
VPPD1

JP8

S1_D[0..15]

Close to
CardBus Conn.

24
24
24
24

+S1_VCC

C415
0.1U_0402_16V4Z
2

24

S1_CE1#

24

S1_OE#

24
24

S1_WE#
S1_RDY#
+S1_VCC
+S1_VPP

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

+S1_VPP

8
1

CP-2211_SSOP16
C418
4.7U_0805_10V4Z

1
C419
0.01U_0402_25V7Z

24

SD CLK
xD PU and PD. Close to Socket
2
R413

XDCD#
1
@43K_0402_5%

C420
10P_0402_50V8K

XDCD# 24

Reserve for Debug.

+VCC_5IN1
XDBSY#
1
10K_0402_5%
2
2.2K_0402_5%
1 MSCLK_XDRE#
10K_0402_5%
1 SDCK_XDWE#
10K_0402_5%

XDBSY# 24
XDCE# 24

+S1_VCC

1
R408
1
R410
1
R412
1
R414
1
R416

MSCLK_XDRE#

24 MSCLK_XDRE#

2
C421
@10P_0402_50V8K

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

34
33
32
31
21
22
23
24

XDWP#
SDWP
SDCK_XDWE#
SDCM_XDALE

35
43
36
37

SM_CD#
+VCC_5IN1

JP9

XDBSY#
SDCM_XDALE
XDCD#
SDDA2_XDCL

26
31
9
36
20

SM_-RE / XD_-RE
SM_-WP / XD_-WP
SM_-CE / XD_-CE
SM_-WE / XD_-WE
SM_R/-B / XD_R/-B
SM_ALE / XD_ALE
SM_CD / XD_CD
SM_CLE / XD_CLE
SM_LVD

24

SM_CD#

SM_CD#
SDWP

2
38

SM-CD2 / SW-CD2
SM-WP2 / SW-WP2

SD_VCC
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
SD_CLK
SD_CMD

11
6
5
37
34
8
32

MS_VCC
MS_D0
MS_D1
MS_D2
MS_D3
MS_SCLK
MS_BS
MS_INS

29
17
16
19
25
27
13
22

GND
GND
GND
GND
GND

1
42
41
40
39

SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCK_XDWE#
SDCM_XDALE

+VCC_5IN1
SDDA0_XDD7 24
SDDA1_XDD0 24
SDDA2_XDCL 24
SDDA3_XDD4 24

XDBSY#
MSCLK_XDRE#
XDCE#
XDCD#
SDDA2_XDCL

25
3
29
26
27
28
30
2
38

SDCM_XDALE 24
+3VS

SD-SW-CD1 / SW-CD1
SD-SW-WP1 / SW-WP1

3
4

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSBS_XDD1
MSINS#

+VCC_5IN1
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

24
24
24
24

MSBS_XDD1 24
MSINS# 24

30
24
33
28

SM_VCC / XD_VCC
SM_D0 / XD_D0
SM_D1 / XD_D1
SM_D2 / XD_D2 5 IN 1 CONN
SM_D3 / XD_D3
SM_D4 / XD_D4
SM_D5 / XD_D5
SM_D6 / XD_D6
SM_D7 / XD_D7

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_CD1# 24
D

S1_CE2# 24
S1_VS1
24
S1_IORD# 24
S1_IOWR# 24

+S1_VCC
+S1_VPP

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

S1_VS2
24
S1_RST
24
S1_WAIT# 24
S1_INPACK# 24
S1_REG# 24
S1_BVD2 24
S1_BVD1 24

S1_CD2# 24

SDPWREN#

24 XD_MS_PWREN#

SDCD#
SDWP

11
12
6
7
5
10
8
9
4
42
41

SDDA3_XDD4
SDDA2_XDCL
SDDA1_XDD0
SDDA0_XDD7
SDWP
SDCM_XDALE
SDCK_XDWE#

15
14
16
18
19
17
13
20

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSINS#
MSBS_XDD1

+VCC_5IN1
SDCD#
B

+VCC_5IN1

40
39
1
44

+VCC_5IN1

XDCD#

TAITWUN_R007-L30-15-S
+3VS

SD PWR Control
+3VS

U23

1
2
3
4

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

R815
10K_0402_5%

8
7
6
5

R834

+VCC_5IN1

22U_1206_10V4Z
SDOC# 241
1
+
C845
C823
@150U_D2_6.3VM
2
2

0_0402_5%

TPS2041ADR_SO8
SDCD#
SDWP

SD-DAT3
SD-DAT2
SD-DAT1
5 IN 1 CONN SD-DAT0
SD-WP-SW
SD-CMD
SD_CLK
SD-VCC
SD-CD-SW
SM_WP-IN / XD_WP-IN
SD-VCC-SW
SM-WP-SW
SD-COM-SW
#SM_-WE / XD_-WE
#SM-ALE / XD-ALE
MS-DATA0
MS-DATA1
SM-LVD
MS-DATA2
SM-VCC-SW
MS-DATA3
SM_-VCC / XD_-VCC
MS-SCLK
#SM_R/-B / XD_R/-B
MS-INS
#SM_-RE / XD_-RE
MS-BS
#SM_-CE / XD_-CE
MS-VCC
#SM_-CD
SM-COM-SW
XD-VCC
SM-CLE / XD-CLE
XD-CD
GND
GND

+VCC_5IN1

R418
43K_0402_5%

24

SM-D0
SM-D1 / XD-D1
SM-D2 / XD-D2
SM_D3 / XD_D3
SM-D4 / XD-D4
SM-D5 / XD-D5
SM-D6 / XD-D6
SM-D7 / XD-D7

XDWP#

MSCLK_XDRE#
XDWP#
XDCE#
SDCK_XDWE#

35
21
18
15
12
7
10
14
23

24

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
72
74
76
78
80
82
84

JP27

MS CLK
R417
@0_0402_5%

+VCC_5IN1

GND
GND
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
S1_VCC
S1_VCC
S1_VPP
S1_VPP
S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3 S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

FOX_1CA41502-TC-AW_84P_LT

2
R415
1
R411
2
R407
2
R409

S1_WP
2
43K_0402_5%
S1_OE#
2
47K_0402_5%
S1_RST
2
47K_0402_5%
S1_CE1#
2
47K_0402_5%
S1_CE2#
2
47K_0402_5%

S1_WP

SDCK_XDWE#

24 SDCK_XDWE#
+3VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
69
71
73
75
77
79
81
83

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

R405
10K_0402_5%

OC

SHDN

3.3V
3.3V

GND

C417

VCCD0
VCCD1
VPPD0
VPPD1

1
2
15
14

20mil

S1_A[0..25]
S1_D[0..15]

C414
10U_0805_10V4Z

16

4.7U_0805_10V4Z

3
4
2

C416

10

C407 0.1U_0402_16V4Z
1
2
C409 10U_0805_10V4Z
1
2
C410 0.01U_0402_25V4Z
1
2
C411
1U_0603_10V4Z

24
24

5V
5V

+3VS
0.1U_0402_16V4Z

VPP

1
2
C406 0.1U_0402_16V4Z

Don't support 12V card


D

+S1_VCC

U22

24
24

0.1U_0402_16V4Z

1
C824

C825

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1
C826

C827
A

0.1U_0402_16V4Z

TAISOL_152-4001004-00-1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


PCMCIA Socket
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

25

of

48

31

PME#

19,20,24,27,28 PCIRST#

27

RST#

19 CLK_PCI_LAN
19,27,28,32,33 PM_CLKRUN#

CLK_PCI_LAN 28
PM_CLKRUN# 65

LAN_X2

25MHZ_20P_1BX25000CK1A
C432
27P_0402_50V8J

C433
27P_0402_50V8J

35
52
80
100

10
120

NC/HSDAC+
NC/HG
NC/LG2
NC/LV2

11
123
124
126

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND
GND
GND
GND

11
10
9

RJ45_TX+
RJ45_TX-

R426
49.9_0402_1%

NS0013_16P

1
C424
0.01U_0402_25V7Z

R429
75_0402_1%

R430
75_0402_1%

C425
C426
0.01U_0402_25V7Z
0.1U_0402_16V7K
2
2

1
2

CT
TX+
TX-

1
2

+3VS

2 1K_0402_5%
2 15K_0402_5%
2 5.36K_0603_1%

CT
TD+
TD-

RJ45_GND

+LAN_DVDD
+3V

NC/VSS
NC/VSS

9
13

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

22
48
62
73
112
118

RTT3/CRTL18

125

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

26
41
56
71
84
94
107

CLK
CLKRUN#

GND/VSS
GND/VSS
GND/VSS

R424 1
R427 1
R428 1

6
7
8

RJ45_RX+
RJ45_RX-

88

CTRL25

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL

3
7
20
16

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

32
54
78
99

Power

Y3

NC/M66EN
NC/AVDDH
NC/HV

10mil
10mil

R423
49.9_0402_1%
R425
49.9_0402_1%

16
15
14

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

2
B

Q18
2SB1197K_SOT23

40mil

1
C427
10U_0805_10V4Z

+2.5V_LAN

+3V

C428
0.1U_0402_16V4Z

CTRL25

Q19
DTA114YKA_SOT23
1 1
2
R432
300_0402_5%

JP10

10mil

12

Amber LED+

11

Amber LED-

CTRL25

PR4+

PR2-

PR3-

PR3+

RJ45_RX+

PR2+

RJ45_TX-

PR1-

RJ45_TX+

PR1+

ACTIVITY#
RJ45_RX+3V

+LAN_AVDDL

40mil

1
C429

1
L18

2
0_0805_5%

+3V

1
1
0.1U_0402_16V4Z C431

0.1U_0402_16V4Z
2

C430
2

+3V

0.1U_0402_16V4Z
2

1 1

+LAN_DVDD

40mil

24
45
64
110
116

1
R436
1

2
0_0805_5%

C435

2
0.1U_0402_16V4Z

10

Green LED-

Green LED+

10mil

2
R433
300_0402_5%

Q20
DTA114YKA_SOT23

RJ45_GND

C437
C4360.1U_0402_16V4Z
2
2

SHLD4

16

SHLD3

15

SHLD2

14

SHLD1

13
B

TYCO_1566735-1

R434
R435
75_0402_1% 75_0402_1%

LINK10_100#

+2.5V_LAN

1
1
0.1U_0402_16V4Z

PR4-

24,27,28,33 LAN_PME#

LAN_X1

105
23
127
72
74

R422
49.9_0402_1%

RX+
RXCT

INTA#

21
38
51
66
81
91
101
119

LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA

LAN_TD+
LAN_TD-

RD+
RDCT

25

4
17
128

X1
X2

LAN_X1
LAN_X2

1
2
3

19,28 PCI_PIRQD#

14
15
18
19
121
122

REQ#
GNT#

U26
LAN_RD+
LAN_RD-

10K

30
29

PCI_REQ#1
PCI_GNT#1

C422
0.1U_0402_16V4Z

19
19

PERR#
SERR#

AT93C46-10SI-2.7_SO8

10K

70
75

19,24,27,28 PCI_PERR#
19,24,27,28 PCI_SERR#

VCC
NC
NC
GND

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

CS
SK
DI
DO

8
7
6
5

76
61
63
67
68
69

1
2
3
4

47K

19,24,27,28 PCI_PAR
19,24,27,28 PCI_FRAME#
19,24,27,28 PCI_IRDY#
19,24,27,28 PCI_TRDY#
19,24,27,28 PCI_DEVSEL#
19,24,27,28 PCI_STOP#

2 LAN_IDSEL
100_0402_1%

LAN_TD+
LAN_TDLAN_RD+
LAN_RD-

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

+3V

IDSEL

1
R431

1
2
5
6

2
R420
5.6K_0402_5%

46

PCI_AD19

ACTIVITY#
LINK10_100#

LAN RTL8100C(L)

U25

47K

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

117
115
114
113

NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

LED0
LED1
LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-

92
77
60
44

19,24,27,28
19,24,27,28
19,24,27,28
19,24,27,28

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

108
109
111
106

C423
15P_0402_50V8J

+3V

EEDO
AUX/EEDI
EESK
EECS

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

LAN I/F

1
2

R421
10_0402_5%

104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

PCI I/F

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

CLK_PCI_LAN
D

U24

PCI_AD[0..31]

19,22,24,27,28 PCI_AD[0..31]

20mil

LANGND

C434
1000P_1206_2KV7K

1
C438

C439
4.7U_0805_10V4Z

+3V

AVDD25/HSDACRTL8100C_QFP128

12

+2.5V_LAN_VDD
20mil
1

C440
0.1U_0402_16V4Z

1
R437

2
0_0805_5%

0.1U_0402_16V4Z

+2.5V_LAN

0.1U_0402_16V4Z
1
1

C441
10U_0805_10V4Z

C442

2
2
0.1U_0402_16V4Z

C443

0.1U_0402_16V4Z
1
1
C444

2
2
0.1U_0402_16V4Z

C445

1
C446

2
2
0.1U_0402_16V4Z

C447
0.1U_0402_16V4Z

Termination plane should be closed


to chassis ground and also depends
on safety concern

Title

Compal Electronics, Inc.


LAN REALTEK RTL8100CL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
1.0

LA-2301
Date:

Wednesday, May 26, 2004

Sheet
1

26

of

48

+3VS

1
R438
1
R439
1
R440
1
R441
2
R442

2
4.7K_0402_5%
2
10K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
1
4.7K_0402_5%

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

15
27
39
51
59
72
88
100
7
1
2
107
108
120

CPS

106

NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)

125
124
123
122
121

+3VS

PCIRST#

86
96
10
11

BIAS CURRENT

R0

OSCILLATOR

FILTER

118

R1

119

X0

X1

FILTER0

FILTER1

+3VS

0.01U_0402_25V4Z
1
1
1
C461
C462

1
R443

C463 1

C465 1

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

220_1206_8P4R_5%

C468

C456

C457

C458

C459

C460

2
+3VS
0_0805_5%

2 18P_0402_50V8J

C464 1

2 18P_0402_50V8J

R446
56.2_0603_1%
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-

116
115
114
113
112

C466
0.33U_0603_16V4Z
JP11

4
3
2
1
R448
56.2_0603_1%

TSB43AB21A_PQFP128

1
R447
56.2_0603_1%

AMP_440168-2
R449
56.2_0603_1%

C467

R451
5.11K_0603_1%

220P_0402_50V7K

C469

0.1U_0402_16V4Z
2
2 0.1U_0402_16V4Z

CLK_PCI_1394

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SCL_1394

101
102
104
105

C455

99
98
97

TEST3
TEST2
TEST1
TEST0

GPIO3
GPIO2

0.1U_0402_16V4Z

G_RST

C454

SCL_1394
SDA_1394

14
89
90

0.1U_0402_16V4Z

4.7U_0805_10V4Z

8
7
6
5

C453

X5
24.576MHz_16P_3XG-24576-43E1

PC0
PC1
PC2

PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND

RP118

1
2
3
4

0.1U_0402_16V4Z

SDA_1394

94
95

C452

1
2
R444
6.34K_0603_1%

91

TEST9
TEST8

2
1K_0402_5%

SCL

TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -

0.1U_0402_16V4Z

L19
+1394_PLLVDD

92

PHY PORT 1

C451

@1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K @1000P_0402_50V7K


2
2
2
2
2

+3VS

EEPROM 2 WIRE BUS SDA


POWER CLASS

0.1U_0402_16V4Z

CYCLEOUT/CARDBUS
CNA
TEST17
TEST16

TSB43AB21A
/(TSB43AB22)

C450

+3VS

19,24,26,28 PCI_FRAME#
19,24,26,28 PCI_IRDY#
19,24,26,28 PCI_TRDY#
19,24,26,28 PCI_DEVSEL#
19,24,26,28 PCI_STOP#
19,24,26,28 PCI_PERR#
8,19,24 PCI_PIRQA#
24,26,28,33 1394_PME#
19,24,26,28 PCI_SERR#
19,24,26,28 PCI_PAR
19,26,28,32,33 PM_CLKRUN#
19,20,24,26,28 PCIRST#

0.1U_0402_16V4Z

19,24,26,28 PCI_C/BE#3
19,24,26,28 PCI_C/BE#2
19,24,26,28 PCI_C/BE#1
19,24,26,28 PCI_C/BE#0
19 CLK_PCI_1394
19
PCI_GNT#0
19
PCI_REQ#0

C449

2 1394_IDSEL
100_0402_5%

0.1U_0402_16V4Z

1
R445

C448

PCI_AD16

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

IDSEL:PCI_AD16

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

PCI BUS INTERFACE

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

CYCLEIN

U27

VDDP
VDDP
VDDP
VDDP
VDDP

19,22,24,26,28 PCI_AD[0..31]

20
35
48
62
78

PCI_AD[0..31]

87

+3VS

R452
10_0402_5%

C470
Title

15P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.


TI 1394 Controller TSB43AB21A

Size
Document Number
Custom LA-2301
Date:

Tuesday, May 18, 2004

Rev
1.0
Sheet
E

27

of

48

12

33,35

13

KILL_SW#

SN74LVC08APW_TSSOP14

U19D
O

MINI_PCI SOCKET

11

WL_OFF#

33

14

+3V

TIP

LAN RESERVED

INTB#

+3V_MINIPCI
L20
1

PCI_PIRQD#

19,26 PCI_PIRQD#
W=40mils

2
0_0603_5%

CLK_PCI_MINI

19 CLK_PCI_MINI

C472
0.1U_0402_16V4Z

19

PCI_REQ#3
PCI_AD31
PCI_AD29

C473
0.1U_0402_16V4Z

PCI_AD27
PCI_AD25

19,24,26,27 PCI_C/BE#3

PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17

19,24,26,27 PCI_C/BE#2
19,24,26,27 PCI_IRDY#
19,26,27,32,33 PM_CLKRUN#
19,24,26,27 PCI_SERR#
19,24,26,27 PCI_PERR#
19,24,26,27 PCI_C/BE#1

PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7

CLK_PCI_MINI

PCI_AD5
R454
10_0402_5%

PCI_AD3
W=30mils
PCI_AD1

+5VS_MINIPCI
2

+3V

RB751V_SOD323
D22
1
2

C478
15P_0402_50V8J

+5VS

1
L22

W=30mils
2
0_0603_5%

JP12
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

PCI_AD[0..31]

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils
PCI_PIRQC#
W=40mils

+5VS_MINIPCI
PCI_PIRQC# 19

INTA#

+3V_MINIPCI

+3V
PCIRST#

19,20,24,26,27

WLANPME# 24,26,27,33
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1
R453
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16

2 PCI_AD18
100_0402_5%

C474
0.1U_0402_16V4Z

+3V_MINIPCI

L21

W=40mils

2
0_0603_5% +3V

PCI_GNT#3 19
2

C475
0.1U_0402_16V4Z

1
C476
0.1U_0402_16V4Z

C477
10U_0805_10V4Z

IDSEL:PCI_AD18

PCI_PAR 19,24,26,27

PCI_FRAME# 19,24,26,27
PCI_TRDY# 19,24,26,27
PCI_STOP# 19,24,26,27
PCI_DEVSEL# 19,24,26,27
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_C/BE#0 19,24,26,27
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

W=20mils

QTC_C102A-056B11-01
+5VS_MINIPCI

PCI_AD[0..31] 19,22,24,26,27

LAN RESERVED

+3V

C479
0.1U_0402_16V4Z

+5VS_MINIPCI

1
C480
1000P_0402_50V7K

1
C481
0.1U_0402_16V4Z

1
C482
0.1U_0402_16V4Z

C483
10U_0805_10V4Z

Title

Compal Electronics, Ltd.


Mini PCI Slot

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2301
Date:

Tuesday, May 18, 2004

Rev
1.0
Sheet

28

of

48

U55

1
2
3
4

+5V

GND
IN
IN
EN#

8
7
6
5

OUT
OUT
OUT
OUT

+USB_VCCB

G528_SO8

+3V

+USB_VCCA

+USB_VCCB
+USB_VCCB

+USB_VCCB

R455
100K_0402_5%

+5V
U29

+
C490
@150U_D2_6.3VM

1
2
3
4

C491
0.1U_0402_16V4Z

GND
IN
EN1#
EN2#

OC1#
OUT1
OUT2
OC2#

8
7
6
5

100K_0402_5%
R456

C484
100U_D2_10VM

40mil

+
C487
@470P_0402_50V7K

C485
100U_D2_10VM

+
C488
@470P_0402_50V7K

C486
100U_D2_10VM

C489
@470P_0402_50V7K

40mil

40mil

1
R727

2
@0_0402_5%

1
R457

2
47K_0402_5%

1
R728

2
@0_0402_5%

1
R458

2
47K_0402_5%

@TPS2042ADR_SO8

C492
0.1U_0402_16V4Z

OVCUR#0 20
OVCUR#2 20

C493
0.1U_0402_16V4Z

+USB_VCCB

+USB_VCCB
JP13

20
20

1
2
3
4

USB20P0USB20P0+

9
10
11

+3V
+USB_VCCA

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G1
G2
G3

12
13
14

G4
G5
G6

USB20P2- 20
USB20P2+ 20

FOX_UB91123-ST2-FR

+5V

R459
100K_0402_5%

+
C494
@150U_D2_6.3VM

C495
0.1U_0402_16V4Z

GND
IN
IN
EN#

OUT
OUT
OUT
OUT

8
7
6
5

EMI Request
close connector

U30

1
2
3
4

1
R729

2
@0_0402_5%

G528_SO8

1
R460

2
47K_0402_5%
C496
0.1U_0402_16V4Z

C828

2.2P_0402_50V8C

OVCUR#1 20

C829

C830

2.2P_0402_50V8C

2.2P_0402_50V8C

C831

2.2P_0402_50V8C

+USB_VCCA

USB
CONNECTOR
JP14

20
20

USB20P1USB20P1+

1
C832

@2.2P_0402_16VCJ
2

USB1USB1+
1
C833

1
2
3
4

5
@2.2P_0402_16VCJ 6
2

VCC
D0D0+
VSS
G1
G2
SANTA_360111-4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


USB/PCI-Debug
Document Number

Rev
1.0

LA-2301

Tuesday, May 18, 2004

Sheet
1

29

of

48

+5VALW

1
2
@CHB2012U121_0805

C497
@4.7U_0805_10V4Z

+AC97_DVDD

20,22 IAC_SYNC

C_MD_SPK

C529
2

31,33

1
1U_0402_6.3V4Z

2
22_0402_5%
1
22_0402_5%
1
22_0402_5%
1
@0_0402_5%

System Sound

MONO_OUT/VREFOUT3

37

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

SDATA_IN

XTL_IN

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

AFILT1

29

12

PC_BEEP

AFILT2

30

VREFOUT

28

11

RESET#

10

SYNC

5
45
46

XTL_OUT

XTL_OUT

4
7

DVSS1
DVSS2

DCVOL

32

NC
VREFOUT2
VAUX
DISABLE#
SCK

31
33
34
43
44

NC
AVSS1
AVSS2

40
26
42

1
C517
1
C520
1
R476

C536
0.22U_0402_10V4Z

IAC_BITCLK 20

1U_0402_6.3V4Z 560_0402_5%
SN74LVC14APWLE_TSSOP14
+3V POWER

2
0_0603_5%

+AVDD_AC97

AGND
1

AGND

C534
10U_0805_10V4Z

+3VS

2
C537
2
1

2
1

2
B

2
0_0805_5%

1
2
L32
CHB1608B121_0603
C535
10U_0805_10V4Z

MONO_IN

C
MONO_IN_I

560_0402_5%

2
@0_0402_5%

CLK_AUDIO_14M 17

C527

C522

C523

C524

C525
0.1U_0402_16V4Z

C526
4.7U_0805_10V4Z

+3VS

1
R486
1
R487

2
@0_0402_5%
2
@0_0402_5%

EC_IDERST 23,31,33
EC_SMC2 5,33

1
R488 2

Q21
R498
2SC2411K_SC59 2.4K_0402_5%

IAC_SDATAO
IAC_RST#

JP15

1
+3VS_MDC

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

MONO_OUT/PC_BEEP
AUDIO_PWRDN/DETECH
GND
MONO_PHONE
AUXA_RIGHT
RESERVED/BT_ON#
AUXA_LEFT
GND
CD_GND
+5Vmain
CD_RIGHT
RESERVED/USB+
CD_LEFT
RESERVED/USBGND
RESERVED/PRIMARY_DN
+3.3Vaux/BT_VCC
RESERVED/+5VD/WAKEUP
GND
RESERVED/GND
+3.3Vmain
AC97_SYNC
AC97_SDATA_OUT
AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

ACES_88018-3010

MD_SPK
+5VS_MDC
2

L31
1
2
CHB1608B121_0603

+5VS

C532 1U_0603_10V4Z
1

+3VS_MDC_R

R494
1
2
10K_0402_5%

IAC _SYNC
2
1
R495
0_0402_5%
1

+3VS

R496 2
1
22_0402_5%

IAC_SDATAI1 20

2IAC_BITCLK

R497
22_0402_5%

R500
10K_0402_5%

1U_0402_6.3V4Z

C538
1
2

PCM_SPK#

1
R471

10K_0402_5%

1U_0402_6.3V4Z
R499

C519
22P_0402_50V8J

R484
@0_0402_5%

+3V

MONO_IN_O

MDC Connector

1
R493
10K_0402_5%

R734
@10K_0402_5%

IAC_SDATAI0 20

C521
1
R482

2
R492
1

+3VS

2
1000P_0402_50V7K
2
1000P_0402_50V7K
2
+AUD_VREF
0_0603_5%

C531
10U_0805_10V4Z

C533
1
2

10

31

+AUD_VREF

2
@0_0805_5%
2
@0_0805_5%
2
0_0805_5%
2
@0_0805_5%

11
1

SN74LVC125APWLE_TSSOP14

U18E

R491
1
2
8.2K_0402_5%

14

4
OE#

U33B

XTL_OUT

24.576MHz_16P_3XG-24576-43E1

C518
22P_0402_50V8J

R735
@10K_0402_5%

+3V_MDC

R853

R489
10K_0402_5%

0.1U_0402_16V4Z

24

2
22_0402_5%
2
22_0402_5%

ALC250-C_LQFP48
1
L27
1
L28
1
L29
1
L30

XTL_IN

27

VREF

SPDIFI/EAPD

X6

AMP_RIGHT 31

R472
@1M_0402_5%

SDA
XTLSEL

SPDIFO

C530
1
2

R490
100K_0402_5%

1
R469
1
R470

XTL_IN

1
BEEP#

AMP_LEFT 31

L_OUT_R 31

+3VALW

1
33

C774
27P_0402_50V8J

+AVDD_AC97
+3V

2
@0_0402_5%
2
@0_0402_5%

SDATA_OUT

48

R485
@0_0402_5%

1
R463
1
R464

L_OUT_L

2
BIT_CLK

L_OUT_R

41

HP_OUT_R

C499
@4.7U_0805_10V4Z

39

HP_OUT_L

L_OUT_L

2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z

JD1

1
C507
1
C508

R462
@24K_0402_1%

1
DVDD1

JD2

DGND

DVDD2

38

16

47

EAPD

R483
@10K_0402_5%

Ra

25

LINER

LINEL

36

C528
0.1U_0402_16V4Z

EC_SMD2

5,33

@0.01U_0402_25V4Z

35

LINE_OUT_R

C504
@0.1U_0402_16V4Z

2
@1000P_0402_25V8K
2
@1000P_0402_25V8K

1
R477
2
R478
2
R479
2
R481

IAC_RST#

20,22 IAC_SDATAO

0_0402_5%

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1 CD_LIN
1U_0402_6.3V4Z
1 CD_R IN
1U_0402_6.3V4Z
1 CD_GNA1
1U_0402_6.3V4Z
1 C_MIC
1U_0402_6.3V4Z

6.8K_0402_5%

R480
1

LINE_OUT_L

AUX_R

+VDDA

R461
@69.8K_0603_1%
1

SUSP#

31,33,34,37 SUSP#

C_MD_SPK 2
C516
MONO_IN

R475

20

MD_SPK

AUX_L

15

1
2

MIC

2
1

31

CD_GNA

R473
20K_0402_5%
R474
0_0402_5%

1
C510
1
C511
CD_L
2
C512
CD_R
2
C513
CD_GNA
2
C514
MIC
2
C515

CD_AGND

14

17

R468
6.8K_0402_5%

R467
6.8K_0402_5%

23

2
1U_0402_6.3V4Z

CD_R

23,31 INT_CD_R

1
C509

CD_L

1
20K_0402_5%
1
20K_0402_5%

NBA_PLUG

NBA_PLUG

1
C505
1
C506

GND

@SI9182DH-AD_MSOP8

C503
10U_0805_10V4Z

INT_CD_L 2
R465
INT_CD_R2
R466

23,31 INT_CD_L

AVDD1

bypass EQ when NBA_PLUG = High

AVDD2

U32

CNOISE

SD

+VDDA

C502
0.1U_0402_16V4Z

ERROR

DELAY

1U_0402_6.3V4Z

C501
10U_0805_10V4Z

31

VOUT
SENSE or ADJ

VIN

1
C500
0.1U_0402_16V4Z

U31
1

+VDDA

Adjustable Output

@0.1U_0402_16V4Z 4
1
2
C498
7
2

L26

2
+3V
@CHB2012U121_0805
2
+3VS
CHB2012U170_0805

1
L24
1
L25

+AVDD_AC97

0.1U_0402_16V4Z

1
2
CHB2012U170_0805

1U_0402_6.3V4Z

+5VAMP

0.01U_0402_25V4Z

AC97 Codec

L23

1U_0402_6.3V4Z

+3VALW

12

C539
1
2

1U_0402_6.3V4Z
SN74LVC14APWLE_TSSOP14

R501
1

560_0402_5%

13

SB_SPK

D23
RB751V_SOD323
2

R502
10K_0402_5%
2

20

14

+3V POWER
U18F

Title

Compal Electronics, Ltd.


AC97 Codec ALC250

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Wednesday, May 26, 2004


1

30

of

48

+5VALW

POWER ON PATH

14
P

PIN 9,5 ACTIVE

R515
1M_0402_5%

30

AMP_RIGHT

NBA_PLUG
VOL_AMP

1
C544
1
C546

AMP_RIGHT

AMP_L
2
1
0.47U_0603_16V4ZC545
AMP_R
2
1
0.47U_0603_16V4ZC547

SN74HCT4066PW_TSSOP14

1
C551
1
C553

AMP_LIN
AMP_RIN

2
0.47U_0603_16V4Z
2
0.47U_0603_16V4Z

2
0.47U_0603_16V4Z
2
0.47U_0603_16V4Z

2
3
4
21
5
23
6
20

SN74HCT4066PW_TSSOP14

1
2

C556
@0.1U_0402_16V4Z

JP26
1
2

C560

1
R522
1
R523

30

1
L33

2
FBM-11-160808-700T_0603

5
4

C566

1
C567
2

1
C568
2

C569

C570

4.99K_0603_1%

NBA_PLUG
INTSPK_R1 1
C571
INTSPK_L1 1
C572

2
100U_D2_10VM
2
100U_D2_10VM

L36

1
2
CHB2012U121_0805

+5VAMP

R830
47K_0402_5%
1

L34 1
2
FBM-11-160808-700T_0603
L35 1
2
FBM-11-160808-700T_0603
1
C573
330P_0402_50V7K

+5VALW TO +5VLDO
+5VLDO

3
6
2
1
FOX_JA6033L-5S1-TR

0.1U_0402_16V4Z

R527

MIC-1
1

C820
2

@0.1U_0402_10V6K

1
C565

0.1U_0402_10V6K

C564

@1U_0603_10V4Z

D24

JP16

2
2.2K_0402_5%
2
@2.2K_0402_5%

C562
220P_0402_50V8K

1U_0603_10V4Z

A
R

MIC

MIC

(4.5V)

@4.7U_0805_10V4Z

K
1

+AUD_VREF_J

4.7U_0805_10V4Z

3.9K_0603_1%

HP

MICROPHONE
IN JACK

+5VAMP DECOUPLING

22U_1206_10V4Z

R526
LM431SC_SOT23

SPK
10 dB

C561

Bias
(Gain)

-6dB

+AUD_VREF

+5VLDO

C563

R520 3.09K

HEADPHONE
OUT JACK

4
3
2
1
@1U_0805_25V4Z

S 2N7002_SOT23

R520
3.09K_0603_1%

(4.5V)

2
1
3
D

R519 7.15K

R511
100K_0402_5%
1

G
S
S
S

SI4800DY_SO8
U36

R516 3.9K
2

1
S

1
2
1
3

23,33 CD_PLAY

1
C559

1U_0603_10V4Z

1U_0603_10V4Z

C558

Q25
2N7002_SOT23

@22U_1206_10V4Z

22U_1206_10V4Z

+5VAMP

VR - A-Type

7.15K_0603_1%
Q24
2N7002_SOT23

D
D
D
D

5
6
7
8

AOS 3401_SOT23

+5VLDO

D
Q27

2
G

CD_PLAY 2
G
Q28
2N7002_SOT23

2
3.9K_0603_1%

2
1

Q26

1K_0402_5%

C550

(0.47U~1U)

NBA_PLUG 2
G

2
G

+5VALW

R525

R519

+5VALW DECOUPLING
+5VALW

R524

C549

+5VALW TO +5VLDO

10K_0402_5%

1/20W_10KA_XV0107GPV2N-9508

R518
100K_0402_5%

+12VALW

C548

VR1

VOL_AMP

Regulator for AMP

+5VALW

+5VAMP

JP17
5
4
3
6
2
1

C574
330P_0402_50V7K

FOX_JA6033L-5S1-TR

+5VAMP

L37
1
2
CHB2012U121_0805
Title

Compal Electronics, Ltd.


Audio AMP & JACK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

1
2
C543
0.1U_0402_16V4Z
INTSPK_L2
INTSPK_R2

1
12
13
24

C554
0.047U_0402_16V4Z

1
R516

Reserve for noise.

ACES_85204-0200

30,33

JP25

INTSPK_L1
INTSPK_L2

INTSPK_R1
INTSPK_R2

C557
1U_0603_10V4Z

EAPD

NBA_PLUG

ACES_85204-0200

22
15
14
11
9
16
10
8

TPA0232PWP_TSSOP24

HP_R

AMP_RIGHT

PATH_SEL_1

R521 10K_0402_5%
1
2

2
G

D
Q22

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
HP/LINE#
LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK

17

HP_L

U34D
A

1U_0603_10V4Z

AMP_LEFT

AMP_LEFT

+5VAMP

U35
7
18
19

P
8

C555
1
2

23,30 INT_CD_R
3

R514
1
1M_0402_5%

+5VAMP

R513
1M_0402_5%

1U_0603_10V4Z

14

C552
1
2

23,30 INT_CD_L

U34C

30

1
100K_0402_5%

0.47U_0603_16V4Z

INTSPK_L1
INTSPK_R1
AMP_LEFT

DIRECT PLAY PATH

R512
2
1
1M_0402_5%

30,33,34,37

14

SUSP#

0_0402_5%
+5VAMP

PIN 10,4 ACTIVE

LOW

30 NBA_PLUG

PATH_SEL

2
G

EC_IDERST 23,30,33

2N7002_SOT23S

HIGH

PATH_SEL

2
1
@0_0402_5%
R718
2
1

D
Q23
2N7002_SOT23 S

Pin 22

PATH_SEL_1

R717

C541
4.7U_0805_10V4Z

fo=1/(2*3.14*R*C)=260Hz
R=1.5K / C=0.47U

R510
10K_0402_5%

2
R505

C540
0.1U_0402_16V4Z

0.47U_0603_16V4Z

SN74HCT4066PW_TSSOP14

SHUTDOWN#
1

R = R385, R386
C = C537, C539

AMP_L
1
R506
AMP_R
1
R508
1 C542 VOL_AMP
0.1U_0402_16V4Z

2
1.5K_0402_5%
2
1.5K_0402_5%

AMP_RIGHT
10

W=40Mil

R385=R386= 1.3K Ohm


C537=C539= 0.47U

0.47U_0603_16V4Z

13

14
A
G

L_OUT_R

W/O EQ

30

R509
1M_0402_5%

+5VAMP

U34B

12

+5VALW

11

2AMP_LEFT

SN74HCT4066PW_TSSOP14

R507
2
1
1M_0402_5%

+5VAMP

B
C

1
R504
1M_0402_5%

L_OUT_L
2

30

1
+5VAMP 2
1M_0402_5%

Audio AMP

U34A

R503

Direct CD
CTL

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Tuesday, May 18, 2004


E

31

of

48

SUPER I/O SMsC LPC47N217

RP99

1
R530 1
R531 1
R533

+3VS

SIO_PD#
SIO_SMI#
SIO_PME#

2
2 10K_0402_5%
2 10K_0402_5%
10K_0402_5%

17 CLK_SIO_14M

17
18

PCI_RESET#
LPCPD#

PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#

19
20
21
6

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

CLK_SIO_14M

LPT_DET#
R816 @100K_0402_5%
2
1
SIO_GPIO11
SIO_SMI#
SIO_IRQ

R538

CLK14

RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#

62
63
64
1
2
3
4
5

IRRX2
IRTX2
IRMODE/IRRX3

37
38
39

IRRX
IRTXOUT
IRMODE

INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#

41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61

INIT#
SLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#

VTR
VCC
VCC
VCC
VCC

7
11
26
45
54

SERIAL I/F

SIO_PD#

CLK_PCI_SIO

R537
@10K_0402_5%

FIR

CLOCK

23
24
25
27
28
29
30
31
32
33
34
35
36
40

GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

8
22
43
52

VSS
VSS
VSS
VSS

POWER

1
2
3
4

+3VS
8
7
6
5

4.7K_1206_8P4R_5%

SIO_IRQ

2
R528

1
10K_0402_5%

RXD1

1
R532
1
R534

2
1K_0402_5%
2
10K_0402_5%

IRRX

Serial Port
for Debug

+3VS

C580

+3VS

+5VS

15P_0402_50V8J
JP18

@15P_0402_50V8J

DCD#1
RI#1
CTS#1
DSR#1

LPC47N217_STQFP64

10_0402_5%

C579

LFRAME#
LDRQ#

FIR_DET#

LPC_AD[0..3]

+3VS

CLK_SIO_14M

15
16

R535 @100K_0402_5%
2
1

+3VS
19,33 LPC_AD[0..3]

LPC_FRAME#
LPC_DRQ#1

LPC I/F

19,26,27,28,33 PM_CLKRUN#
19 CLK_PCI_SIO
19,24,33 SERIRQ

LAD0
LAD1
LAD2
LAD3

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

PARALLEL I/F

7,19,23,33 NB_RST#
1

10
12
13
14

GPIO

19,33 LPC_FRAME#
19 LPC_DRQ#1

U37

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

+3VS

L50
1
1
C812

LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#

+5V_PRN
8
7
6
5

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

F D0
F D1
F D2
F D3

1
2
3
4

2.7K_1206_8P4R_5%
RP110
F D0
8
F D1
7
F D2
6
F D3
5

1
2
3
4

2.7K_1206_8P4R_5%
RP111
F D7
8
F D6
7
F D5
6
F D4
5

220P_1206_8P4C_50V8K
CP4
5
6
7
8

F D4
F D5
F D6
F D7

220P_1206_8P4C_50V8K

LPTAFD#
F D0
LPTERR#
F D1
INIT#
F D2
SLCTIN#
F D3
F D4

F D6

RP103
5
6
7
8

F D0
F D1
F D2
F D3

F D7
F D6
F D5
F D4

F D7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

C581
2

+3VS
+3VS

1
R546
1
R548

(60mil)
1

220P_0402_50V8K

JP19
1
R544

1
2
R541 0_0402_5%

C582

1
2
14
33_0402_5%
2
15
3
LPTINIT#
2
16
33_0402_5%
4
LPTSLCTIN#
2
17
33_0402_5%
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

C583
@10U_0805_10V4Z

22U_1206_10V4Z

C584
10U_0805_10V4Z

2
4
6
8

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE

1
3
5
7

IRTXOUT
IRMODE

TFDU6102-TR3_8P
PCB Footprint : TFDU6101E

C585
0.1U_0402_16V4Z

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE


MODE: HIGH/LOW SPEED SELECT
4

Title

Compal Electronics, Ltd.


LPC-Super I/O

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

(60mil)

U38
IRRX

+IR_3VS
1 (30mil)

2
4.7_1206_5%
R545

R547
47_1206_5%

R543 @4.7_1206_5%
+IR_ANODE
2

TYCO_1470802-1

68_1206_8P4R_5%
A

AFD#/3M#

68_1206_8P4R_5%

4
3
2
1

FIR_DET#

47_0402_5%

RP102

LPD7
LPD6
LPD5
LPD4

L: R POP; FIR Enable


H: R De-POPFIR Disable

R540
2.2K_0402_5%

R542

LPTSTB#

2.7K_1206_8P4R_5%

8
7
6
5

RB420D_SOT23

2.7K_1206_8P4R_5%
RP109
8 AFD#/3M#
7 LPTERR#
6 LPTINIT#
5 LPTSLCTIN#

1
2
3
4

+5VS_BEAD

1
2
3
4

LPD0
LPD1
LPD2
LPD3

FIR Module

D25
1

RP108
1
2
3
4

F D5

220P_1206_8P4C_50V8K
CP3
8
1
7
2
6
3
5
4

4
3
2
1

@E&T_96212-1011S

1000P_0402_50V7K

1
2
R817 0_0402_5%

220P_1206_8P4C_50V8K
CP2
LPTACK#
1
8
LPTBUSY
2
7
LPTPE
3
6
LPTSLCT
4
5

R539
1K_0402_5%

8
7
6
5

C813

+5V_PRN

CP1

* 0 = 02Eh
1 = 04Eh

SIO_GPIO11

C578
0.1U_0402_16V4Z

KC FBM-L11-201209-221LMAT_0805

Parallel Port

1
2
3
4

1
C577
0.1U_0402_16V4Z

0.1U_0402_10V6K

LPT_DET#

+5VS_BEAD

1
C576
0.1U_0402_16V4Z

1
C575
4.7U_0805_10V4Z

1
2
3
4
5
6
7
8
9
10

Base I/O Address

1
1

1
2
3
4
5
6
7
8
9
10

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

Add for EMI


+5VS

R536
@10K_0402_5%

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Tuesday, May 18, 2004


E

32

of

48

+3VALW

19,24,32 SERIRQ
19 LPC_DRQ#0
19,32 LPC_FRAME#

19 CLK_LPC_EC

C773

0.1U_0402_16V4Z

R553
10_0402_5%

2
R552

910_NUM_LED#

1
EC_RST#

1
47K_0402_5%

C597
15P_0402_50V8J

20
20

1
C596
0.1U_0402_16V4Z

GATEA20
KBRST#
34
34
34
34

For KB910

591_NUM_LED# 1
R555
591_EC_SCI#
1
R556
591_HDD_LED# 1
R557

GATEA20

5
6

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

71
72
73
74
77
78
79
80

EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

NUM_LED#

2
@0_0402_5%
2
@0_0402_5%
2
@0_0402_5%

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_SCI# 20
HDD_LED# 35

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

pin110 reserve for KSO16


pin111 reserve for KSO17

+5VALW

For KB910

+3VALW
1
R571
1
R573

+5VS
RP104
1
2
3
4

8
7
6
5

PSCLK1
PSDAT1
PSCLK2
PSDAT2

34
34
35

1
2
3
4

8
7
6
5

EC_PME#

1394_PME#
WLANPME#
PCM_PME#
LAN_PME#

2
@10K_0402_5%
2
10K_0402_5%

1
R818
1
R819

2
1

34
2

BKOFF#
FSEL#

FSEL#

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN

C RY2

160

32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

1
IN

Y4
32.768KHZ_12.5P_1TJS125DJ2A073

OUT

C600
12P_0402_50V8K

161

LPCPD

124
125
126
127
128
131
132
133

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

PORTI

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

138
139
140
141
144
145
146
147

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

PORTJ-1

IOPJ0/RD
IOPJ1/WR0

150
151

FR D#

SELIO#

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55

591_NUM_LED#
CAPS_LED#
PADS_LED#

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19

PORTD-2

PORTJ-2

PORTK
PORTM

SEL0#
SEL1#
CLK

JP21
NUM_LED#
PADS_LED#
CAPS_LED# R554
1
2
KSO15
300_0402_5%
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
R560
1
2

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

EC_UTXD/KSO17 34
EC_SMC1 34,39
EC_SMD1 34,39
NB_RST# 7,19,23,32
R726 2
1
PBTN_OUT# 20
EC_SMC2 5,30 47K_0402_5%
EC_SMD2 5,30
FAN_SPEED1 35

ACIN
20,34,38
KILL_SW# 28,35
PM_SLP_S3# 20

2
L39
0_0402_5%2
0_0402_5%2

1 ECAGND
CHB1608B121_0603
910_GND0
1 R562
910_GND1
1 R563
910_EC_SCI#

LPCPD

R835
EAPD
4

@0_0402_5%
1

CP7
5
6
7
8

4
3
2
1

100P_1206_8P4C_50V8
CP8

KSI6
KSI5
KSO6
KSO5

5
6
7
8

4
3
2
1

100P_1206_8P4C_50V8
KSI3
KSI0
KSO0
KSO1

+3VS

CP9
5
6
7
8

4
3
2
1

100P_1206_8P4C_50V8
+3VS

CP10
KSI1
KSI2
KSO2
KSO4

5
6
7
8

4
3
2
1

I/O Address
BADDR1(KBA3) BADDR0(KBA2)
ADB[0..7]

ADB[0..7] 34

FRD#
FWR#

34
34

SELIO#

34

Index

Data

2E

2F

4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1


Reserved

ENV0 (KBA0) ENV1 (KBA1) TRIS (KBA4)


0
IRE
0
0
* OBD
0
1
0
DEV
0
0
1
1
PROG
1
0
SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use

PHDD_LED# 23

+3VALW
KBA[0..19]

KBA[0..19] 34

KBA1

1
R576
1
R577
1
R578
1
R579
1
R580
1
R581
1
R583

KBA2
KBA3
KBA5

40

SKU_ID1

BATT_LOW_LED# 34
910_WL_LED# 34
910_PWR_LED# 34
910_CHGI_LED# 34
910_ODD_LED# 34

For 551. C601 @1U_0402_6.3V4Z

Title

2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
@10K_0402_5%
2
@10K_0402_5%
2
@10K_0402_5%
1
R586
1
R587
1
R588

2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%

Compal Electronics, Ltd.


K/B-CTRL/ENE KB910

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

4
3
2
1

2
1K_0402_5%

SKU_ID0

CP6
5
6
7
8

100P_1206_8P4C_50V8
1
R566

FSTCHG

4
3
2
1

100P_1206_8P4C_50V8

PM_CLKRUN# 19,26,27,28,32

910_HDD_LED#
551_GND

KSO8
KSO9
KSO13
KSI7

KSO3
KSO7
KSO12
KSI4

R564
1
2
300_0402_5%
ELCO_00-6278-034-001-800

ON/OFF 35
PM_SLP_S5# 20

5
6
7
8

100P_1206_8P4C_50V8
+3VS

300_0402_5%

SKU_ID2

For KB910
30,31

PORTE

KSO15
KSO14
KSO10
KSO11

KEYBOARD CONN.

ACIN

2
44
24
25

PORTH

CP5

EC_THERM# 20
FAN_SPEED2 35
CD_PLAY 23,31

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

ALI/MH# 39
S4_DATA 36
MUL_KEY# 34

EC_PME#
EC_THERM#

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

EC_URXD
EC_UTXD/KSO17
EC_USCLK

BATT_OVP 40

EC_SMC2
EC_SMD2

PORTD-1

PORTL

PC87591L-VPCN01 A2_LQFP176

NC

Analog Board ID definition,


Please see page 3.

C599
10P_0402_50V8K

168
169
170
171
172
175
176
1

NC

0.1U_0402_16V4Z

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

+3VALW

@E&T_96212-1011S

INVT_PWM 18
BEEP#
30
PWR_SUSP_LED 34,35
ACOFF
40
PM_BATLOW# 20
EC_ON
35
EC_LID_OUT# 20
S4_LATCH 36

26
29
30

PS2 interface

158

173
174
47

EC_URXD
EC_UTXD/KSO17
EC_USCLK
EC_SMC1
EC_SMD1
NB_RST#

40,43

0.22U_0603_10V7K

DAC_BRIG 18
EN_DFAN2 35
IREF
40
EN_DFAN1 35

153
154
162
163
164
165

ADP_I

C844

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

BATT_TEMP 39

99
100
101
102

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

PORTC

JTAG debug port

R585
0_0402_5%

C598

PORTB

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

110
111
114
115
116
117
118
119

148
149
155
156
3
4
27
28

95

Key matrix scan

BATT_TEMPB
BATT_TEMP
81
82 VBATTA ADP_I1
83
84 VBATTB AD_BID0
87
88
MUL_KEY#
89
90
SKU_ID0
93
SKU_ID1
94

INVT_PWM

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PWM
or PORTA

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

32
33
36
37
38
39
40
43

GA20/IOPB5
KBRST/IOPB6

TINT#
TCK
TDO
TDI
TMS

62
63
69
70
75
76

DA0
DA1
DA2
DA3

DA output

IOPD3/ECSCI#

105
106
107
108
109

SYSON
SUSP#
VR_ON

C RY2

@20M_0603_5%

2
1

R582
C RY11

AD_BID0
1

SKU_ID2

512_SEL

AD Input

C RY1

EC_SMI#

36,37,42 SYSON
30,31,34,37 SUSP#
44
VR_ON
23
PCMRST#
20 EC_RSMRST#
23 SHDD_LED#
8
ENBK#
18
BKOFF#

Remove 20M
Ohm R for
KB910

R584
100K_0402_5%

R589
0_0402_5%

591_HDD_LED#

20
EC_SMI#
23,30,31 EC_IDERST
28
WL_OFF#
20
EC_SWI#

+3VALW

Rb

TP_CLK
TP_DATA
LID_SW#

MUL_KEY#
FR D#
SELIO#
FSEL#

VR_ON
1
47K_0402_5%
SYSON
1
10K_0402_5%
SUSP#
1
10K_0402_5%

PSCLK1
PSDAT1
PSCLK2
PSDAT2
TP_CLK
TP_DATA

10K_0804_8P4R_5%

+3VALW

Ra

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

1
100K_0402_5%

RP105

1 EC_SMC1
4.7K_0402_5%
1 EC_SMD1
4.7K_0402_5%

2
R569
2
R570
2
R572

24,26,27,28
24,26,27,28
24,26,27,28
24,26,27,28

2
R565

1 GATEA20
47K_0402_5%
1 EC_PME#
47K_0402_5%

2
R574
2
R575

+5VALW

For KB910

+3VALW

10K_0804_8P4R_5%
1
2 TP_CLK
R567
4.7K_0402_5%
1
2 TP_DATA
R568
4.7K_0402_5%

2
R596
2
R595

2 EC_SMC2
4.7K_0402_5%
2 EC_SMD2
4.7K_0402_5%

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

Host interface

GND1
GND2
GND3
GND4
GND5
GND6
GND7

1
R558
910_EC_SCI#
1
R559
910_HDD_LED#
1
R561

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

R850
1
2
100K_0402_1%

ADP_I1

0.1U_0402_16V4Z

910_NUM_LED#

7
8
9
15
14
13
10
18
19
22
23

591_EC_SCI# 31

Place D69
Close to EC Chip
+3VALW

EC_RST#

LPC_AD[0..3]

19,32 LPC_AD[0..3]

@SSM14_SMA

2
@0_0402_5%
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

C589

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

1
R551

VBAT

1 BATT_TEMP
0.1U_0402_16V7K

D26
1

U39

AGND

ECAGND 2
C595

AVCC

0.1U_0402_16V4Z

For EC Tools
1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10

Add for Battery

+EC_AVCC

1
C591
0.1U_0402_16V4Z

JP20

11
12
20
21
85
86
91
92
97
98

R549 for KB910


R550 for NS591L

C592

+EC_VDD

34
45
123
136
157
166

+3VS

2
CHB1608B121_0603

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

+RTCVCC

96

L38

1
0.1U_0402_16V4Z
1
1000P_0402_50V7K
1
1000P_0402_50V7K
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
0_0402_5%
2
@0_0402_5%

VDD

2
C586
2
C587
2
C588
2
C590
1
C593
1
C594

+EC_VCC

1
R549
1
R550

+3VALW

+EC_VCC

+EC_VCC

17
35
46
122
159
167
137

+EC_AVCC

1
2
R736 0_0805_5%

16

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Friday, May 28, 2004


1

33

of

48

Touch Pad Connector


JP22

Extension IO

TP_CLK
TP_DATA
+5VS
+5V
+5VALW
20,33,38
ACIN

+5VALW
C602
1
2
@0.1U_0402_16V4Z

AA
LARST#

11
1

CLK
OE

C604
+5VALW

1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q

2
5
6
9
12
15
16
19

BATT_LOW_LED#
PWR_LED#
WL_LED#
BATT_CHGI_LED#
ODD_LED#

PWR_LED#
PW R_SUSP_LED
BATT_CHGI_LED#
BATT_LOW_LED#

ODD_LED# 35

EMI Request

PWR_LED#
BATT_CHGI_LED#
ODD_LED#
WL_LED#

ACES_85201-1205

1
2
3
4
5
6
7
8
9
10
11
12

2R838
2R839
2R840
2R841
2R842
2R843
2R844
2R845
2R846
2R847

@470P_0402_50V8J
@470P_0402_50V8J
@470P_0402_50V8J
1
1 @470P_0402_50V8J
1
1
C834
C836
C838
C840
1
1
1
1
1 C842
1
C835
C837
C839
C841
@470P_0402_50V8J
2
2
2
2
C843
2
@470P_0402_50V8J
2
2
2
2
2
@470P_0402_50V8J
@470P_0402_50V8J
@470P_0402_50V8J
@470P_0402_50V8J

BATT_LOW_LED# 33
PWR_LED# 35
WL_LED# 35

@SN74HCT374PW_TSSOP20

R591

@1U_0603_10V4Z

33,35 PWR_SUSP_LED

20
VCC

SELIO# 10

SN74LVC32APWLE_TSSOP14

1D
2D
3D
4D
5D
6D
7D
8D

10

SELIO#

U17C

33

3
4
7
8
13
14
17
18

KBA2

14

@100K_0402_5%
R590
@0.1U_0402_16V4Z

U40

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

GND

+3VALW
+3VALW
C603
1
2

0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1
0_0402_5%1

33
33

@1.2M_0402_5%

close connector

RP107
1
2
3
4

8
7
6
5

910_PWR_LED# 33
910_CHGI_LED# 33
910_ODD_LED# 33
910_WL_LED# 33

For MP3 / BUTTON LOCK

0_1206_8P4R_5%

MUL_KEY_ESD#

/ CD-PLAY

MUL_KEY_ESD# 35

For KB910
D28
1

3
5

R592
10K_0402_5%

12

13

FLASH#

Q29
2N7002_SOT23
FWR#

SMBus EEPROM

EC_SMC1
EC_SMD1

2
R594
100K_0402_5%
1
2
3
4

0.1U_0402_16V4Z
U43
8 VCC
A0
7 WP
A1
6 SCL
A2
5 SDA
GND

AT24C16AN-10SI-2.7_SO8
2

33,39
33,39

33

20

R597
100K_0402_5%

3
5

EC_REVBTN#

SW2
TC010-PS11CET_5P

EC_REVBTN# 33

D49
2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

+5VALW
+5VALW
C607
1
2

SN74LVC32APWLE_TSSOP14

1
14
P
11

FWE#

U17D

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

33 EC_UTXD/KSO17

0.1U_0402_16V4Z

U41

1
30,31,33,37

2
G

SUSP#

C605
1
2

A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

+3VALW

FRD BTN

FRD#

33

FSEL#

33

+3VALW

U42
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

EC_FRDBTN#

EC_FRDBTN# 33

SW3
TC010-PS11CET_5P

PLAY BTN

1MB Flash ROM


21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

512K8-90_PLCC32

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

@PSOT24C_SOT23

4
VCC0
VCC1

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

3
5

+3VALW
R593
100K_0402_5%

REV BTN

ADB[0..7]

512KB Flash ROM

+3V
+3VALW

KBA[0..19]

35,38

MUL_KEY# 33

DAN202U_SC70
SW1
TC010-PS11CET_5P

KBA[0..19]
ADB[0..7]

51ON#
MUL_KEY#

1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

C608

EC_PLAYBTN# 33

D50
2
1

STOP BTN

@PSOT24C_SOT23

2
1
2
R598
@100K_0402_5%

EC_PLAYBTN#

SW4
TC010-PS11CET_5P

@0.1U_0402_16V4Z

+3VALW

3
5

System BIOS

33
33

EC_STOPBTN#

EC_STOPBTN# 33

SW5
TC010-PS11CET_5P

@SST39VF080-70_TSOP40

Title

Compal Electronics, Ltd.


BIOS & Ext.I/O

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2301
Date:

Tuesday, May 18, 2004

Rev
1.0
Sheet

34

of

48

Power Button

+3VALW

LID_SW#

34 MUL_KEY_ESD#

R599

100K_0402_5%
+3VALW

33

LID_SW#

1
D

SW7
TC010-PS11CET_5P

51ON#

DAN202U_SC70

ON/OFF

33

51ON#

34,38

4.7K_0402_5%

+3V

VID_PWRGD

R604
1

R603
2

+3VALW

33K_0402_5%

2
C609
1000P_0402_25V8K

D
Q34
2N7002_SOT23

R605
10K_0402_5%

DTC124EK_SC59

EC_ON

D35
RLZ20A_LL34

44

VID_PWRGD

44

ENLL

2
R607

EC_ON

Q32
33

3
1

4
ESE11MV9_4P

2
G

1
0_0402_5%

+3V POWER

U33C

5 H_VID_PWRGD

10

DAN202U_SC70
D31
V-PORT-0603-220 M-V05_0603

OE#

D33

R601
100K_0402_5%

36 S4_LID_SW#

SW6
1

D73
3
1

D30
@PSOT24C_SOT23

ON/OFFBTN# 36

SN74LVC125APWLE_TSSOP14

1
D38
1SS355_SOD323

C613
0.1U_0402_16V4Z 1

Q59
SUSP LED 2N7002_SOT23

+5V
C612

D57
1

10U_0805_10V4Z

2
R725
300_0402_5%

R610
100K_0402_5%

KILL_SW# 28,33

DS-1208_3P

HT-191UD_AMBER_0603

D39

JP23

+FAN_VCC1
1
1
2
@1000P_0402_25V8K
3
C614
ACES_85205-0300
D41
2
1N4148_SOT23

1
1
R614

SW8

2
8.2K_0402_5%

ODD_LED

+5V
1

2
B

C615
@1000P_0402_25V8K

ODD_LED# 34

RTC BATT

HDD LED

+5V

BATT1
2

+RTCBATT

D42

1
2

HDD_LED# 33

ML1220T13RE

HT-191UYG-DT_GRN_0603

R615
300_0402_5%

C618
0.1U_0402_16V4Z
1
2

+RTCBATT

BAS40-04_SOT23
D45
+RTCVCC
3

33 FAN_SPEED2

1
HT-191UYG-DT_GRN_0603

R613
300_0402_5%

PWR_SUSP_LED 33,34

D40

+3VS

R617
10K_0402_5%

V-PORT-0603-220 M-V05_0603

FAN CONN 1

SYS. FUNT. LED--Right Angle


+12VALWP

C622

WL LED

+5V

+5VALW

100_0402_1%

R619
10K_0402_5%

C620
0.1U_0402_16V4Z 1

C621
D46
2
1N4148_SOT23

2
8.2K_0402_5%

WL_LED# 34

HT-110UD_1204

5IN1 LED
D47

10U_0805_10V4Z

+FAN_VCC2
1

+3VS

C619

R639
120_0402_5%

@1000P_0402_25V8K 1
1
R620

R616
300_0402_5%

Q41
FMMT619_SOT23 C
D44
2
B
1SS355_SOD323
2
E

R618

33 EN_DFAN1

U44B
LM358A_SO8
0 7

+CHGRTC

D43
1

0.1U_0402_16V4Z

PWR_LED# 34

100_0402_1%

Q37
FMMT619_SOT23 C
2
B
2
E

1
HT-191NB_BLUE_0603

R612
10K_0402_5%

R611

+3V

U44A
LM358A_SO8
0 1

33 EN_DFAN2

2
R640
300_0402_5%

+5VALW
C611
0.1U_0402_16V4Z

C610
0.1U_0402_16V4Z

Kill SWITCH

D48

+5V

+12VALWP

FAN CONN 2

SYS. FUNT. LED--Flate


PWR ON LED

2
G

5IN1_LED# 24

HT-110UYG-CT_YEL/GRN

JP24
1
2
3

ACES_85205-0300

+3VS

R621
10K_0402_5%

C623
@1000P_0402_25V8K

33 FAN_SPEED1

1
Title

PWRGD/Fan/PWRBTN/TP/LID.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Ltd.

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Tuesday, May 18, 2004


1

35

of

48

H22
H_S315D110

H1
H_C394D177

H4
H_C394D177

H2
H_C394D177

H3
H_C394D177

FD1
FD2
FD3
FIDUCAL FIDUCAL FIDUCAL

11

CF14
SMD40M80

CF9
SMD40M80

CF10
SMD40M80

CF11
SMD40M80

CF12
SMD40M80

CF13
SMD40M80

CF6
SMD40M80

CF8
SMD40M80

CF5
SMD40M80

1
H11
H_C315D169

CF7
SMD40M80

CF4
SMD40M80

H10
H_C315D181

H33
H_C146D63

1
1

H9
H_C315D181
H29
H_S394D110

CF3
SMD40M80

11

CF2
SMD40M80

CF1
SMD40M80

U33D
SN74LVC125APWLE_TSSOP14

H28
H_S394D110

H7
H_C315D91

H6
H_C315D91

H8
H_C315D91

H5
H_C315D91

H26
H_S315D110

H25
H_S315D110

H27
H_S315D110

H24
H_S315D110

12

OE#

13

FD4
FD5
FD6
FIDUCAL FIDUCAL FIDUCAL

SN74LVC125APWLE_TSSOP14

H21
H_S315D110

H23
H_S315D110

H20
H_S315D110

U16D

OE#

12

13

H19
H_O224X146D146X67

H18
H_C276D169

H36
H_S394D110

M2
H_C79D79N

M3
M4
H_O118X79D118X79N H_C148D148N

M1
H_O201X148D201X148N
1

H34
H_C315D169

H32
H_S354D181

M5
H_C138D138N

Battery mode Hibernation


1

RTCVREF

RTCVREF
1N4148_SOT23
D74
RTCVREF

0.1U_0402_10V6K
2

ON/OFFBTN# 35

U53

C791
1

R822

100K_0402_5%

R821

R820
100K_0402_5%

680K_0402_5%

2
G
Q63
2N7002_SOT23

33,37,42 SYSON

1
2
R824
10K_0402_5%

R825
1
2
10K_0402_5%
S4_LATCH

1
R826
10K_0402_5%

C795

@1U_0805_16V7K

+3VALW
33

S4_DATA

U54

1
2
R827
10K_0402_5%

1
2
C793 1U_0603_10V4Z

1
2
3
4
5
6
7

RTCVREF

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

14
13
12
11
10
09
08

RTCVREF
0.1U_0402_10V6K
1
2
C794

74LCX74MTC_TSSOP14
Q64

D75
2

D_SET_S4

1
CH751H-40_SC76

2
G
2N7002_SOT23

33

RTCVREF

Q62
2N7002_SOT23

2
G

S4_LID_SW#

Q61
2N7002_SOT23

2
G

35

1
3

C792 1U_0603_10V6K

1
2
R823
10K_0402_5%
NC7SZ14M5X_SOT23-5

Y
G

C796
@220P_0402_50V7K

Title

Compal Electronics, Ltd.


ScrewHole

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Document Number
CustomLA-2301
Date:

Rev
1.0
Sheet

Tuesday, May 18, 2004


E

36

of

48

+2.5V To +2.5VS Transfer

+2.5V & +2.5VS Discharge

+2.5V

1
1
0.1U_0402_10V6K

C817

1
0.1U_0402_10V6K

C818

1
1
0.1U_0402_10V6K

10U_0805_10V4Z

10U_0805_10V4Z

R625

C631
S

@0.1U_0402_16V4Z

C637

+12VALW

0.1U_0402_16V7K
S

+3VS

@0.1U_0402_16V4Z

R626
@470_0402_5%

D
C638
S

SUSP
2
G
Q46
2N7002_SOT23

SYSON# 2
G
S

SUSP
Q48
@2N7002_SOT23

10U_0805_10V4Z

47K_0603_1%

D
C647

0.1U_0402_16V7K

10U_0805_10V4Z

+5V
+5VS

C642

R634
10K_0402_5%

@0.1U_0402_16V4Z

SI4800DY_SO8

C643

+12VALW

R630
470_0805_5%

R633

R631
470_0402_5%

SYSON#

27K_0603_1%

C648

0.1U_0402_16V7K

SYSON#
2
G
Q50
2N7002_SOT23

SUSP
2
G
Q51
2N7002_SOT23

2
G

33,36,42 SYSON

Q54
2N7002_SOT23

SYSON# 2
G

SUSP
Q52
2N7002_SOT23

1 2

+12VALW

S
S
S
G

C646

D
D
D
D

@0.1U_0402_16V4Z

C640

R632

Q49
2N7002_SOT23

+5VALW

10U_0805_10V4Z

1
2
3
4

C641

8
7
6
5

SI4800DY_SO8

2
G

+5V & +5VS Discharge

+5VS
U50

1
2
3
4

S
S
S
G

D
D
D
D

R627
470_0402_5%

+5VALW To +5VS Transfer


+5VALW

10U_0805_10V4Z

+3V
C632

+5V
U49

C645

+5VALW To +5V Transfer

10U_0805_10V4Z

0.1U_0402_16V7K

SYSON#
2
G
Q47
2N7002_SOT23

+5VALW

8
7
6
5

Q43
@2N7002_SOT23

95.3K_0603_1%

D
C639

R628

C633

95.3K_0603_1%

SI4800DY_SO8

1 2

S
S
S
G

C634

D
D
D
D

C635
10U_0805_10V4Z

10U_0805_10V4Z

+12VALW

1 2

R629

+3VS

1
2
3
4

SI4800DY_SO8

2
G

+3V & +3VS Discharge


8
7
6
5

1
2
3
4

S
S
S
G

SUSP
Q42
@2N7002_SOT23

+3VALW AND +2.5VALW MUST RISING SAME TIME


+1.5V MUST DELAY AFTER +2.5V

+3VALW
U48

D
D
D
D

SYSON# 2
G

2 SUSP
G
Q45
2N7002_SOT23

R623
@470_0402_5%

+3VALW To +3VS Transfer


+3V

U47

C636

@0.1U_0402_16V4Z

+3VS

+3VALW

10U_0805_10V4Z

0.1U_0402_16V7K

+3VALW To +3V Transfer


8
7
6
5

R622
@470_0402_5%

C626

2
+3VS

100K_0603_1%

1
0.1U_0402_10V6K

1 2

SI4800DY_SO8

+12VALW

C819

C627

1 2

C816

+2.5VS

C815

C629

1
2
3
4

C814

0.1U_0402_10V6K
2
2

S
S
S
G

0.1U_0402_10V6K
2
2

D
D
D
D

8
7
6
5

+3V

+2.5V

U46

Add for EMI


+2.5V

+2.5VS

2
G

Q53
2N7002_SOT23

+1.5VS Discharge
+5VALW

+1.5VS

42,43

SUSP
Q55
2N7002_SOT23

1 2

SUSP

R708
@470_0603_5%
SUSP

SUSP# 2
G

30,31,33,34 SUSP#

R635
4.7K_0402_5%

2
G

Q58
@2N7002_SOT23

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
Date:

Compal Electronics, Inc.


DC-DC Circuit Interface
Document Number

Rev
1.0

LA-2301

Friday, May 28, 2004

Sheet
1

37

of

48

VS

12A_65VDC_451012

ACIN <20,33,34>
1

PACIN

LM393M_SO8

PD2

PACIN <40,41>

PC6
0.1U_0402_16V7K

PR7
10K_0402_5%

RLZ4.3B_LL34
PR8

Vin Detector

RTCVREF

10K_0402_5%

3.3V

High 18.384 17.901 17.430


Low 17.728 17.257 16.976

VIN

20K_0402_1%

PR6

PC5
1000P_0402_50V7K

SINGA_2DC-G213-B04

2
3
15.4K_0402_1%
2

PU1A

1
PR5

PC4
100P_0402_50V8J

1
2
PR4
1K_0402_5%

88.7K_0402_1%

1
PC3
1000P_0402_50V7K

PC2
100P_0402_50V8J

PC1
1000P_0402_50V7K

EC10QS04_SOD106

G
G

PR2

PR3

3
4

2
1M_0402_1%

VS

5.6K_0402_5%

PD1

1
1

1
PR1

PJP1

DC_IN_S2

DC_IN_S1

VIN

VIN
PL1
C8B BPH 853025_2P
1
2

PF1

PD3

1N4148_SOD80
PD4

BATT+

RB751V_SOD323

PR9

VS

33_1206_5%

1
2
PR10
1K_1206_5%

2
CHGRTCP

N1

1
2
PR11
200_0603_5%

1
PQ1
TP0610T_SOT23
2

VIN
PC8
0.1U_0603_25V7K

N3

1
2
PR12
1K_1206_5%

1N4148_SOD80

B+

100K_0402_5%

PC7
0.22U_1206_25V7M

PR13

PD5

1
PR14

<34,35> 51ON#

2
22K_0402_5%

1
2
PR15
1K_1206_5%
1

RTCVREF

PR19
499K_0402_1%

PC13
1000P_0402_50V7K

1 VL

34K_0402_1%
PR24
66.5K_0402_1%

PR23
499K_0402_1%
PR25
191K_0402_1%

PC11
1000P_0402_50V7K

PC12
1000P_0402_50V7K

2 PR22

RB715F_SOT323

2
5

LM393M_SO8

<40> ACON

PU1B

PD7

<6,39,41> MAINPWON

PD6
RLZ16B_LL34

PC9
1U_0805_25V4Z

GND
PC10
10U_0805_10V4Z

N2

1
2.2M_0402_5%

IN

200_0603_5%

OUT

2
PR18

2
100K_0402_5%

200_0603_5%

1
PR17

VL

200_0603_5%

+CHGRTC

3.3V

PR21

PR20

PR16
PU2
S-812C33AUA-C2N-T2_SOT89

PJ1
+3VALWP

PJ7

+3VALW

+1.8VSP

JUMP_43X118

+1.8VS

JUMP_43X79

(1A,40mils ,Via NO.= 2)

(5A,200mils ,Via NO.= 10)

PJ3

+5VALW
PJ4

JUMP_43X118

(5A,200mils ,Via NO.= 10)

+CPU_VIDP

PJ5
+12VALWP

+12VALW

+CPU_VID

JUMP_43X39

2PQ2
2
G SN7002N_SOT23
PR26

Precharge detector
15.97V/14.84V FOR
ADAPTOR

PQ3
DTC115EUA_SC70

(120mA,20mils ,Via NO.= 1)

JUMP_43X39

(120mA,40mils ,Via NO.= 2)

+5VALWP

PJ2

JUMP_43X118
PJ8
2 2
1 1

+2.5V

+1.5VSP

+1.5VS

PJ6
+2.5VP

PACIN
1
47K_0402_5%

+5VALWP

JUMP_43X118

(3A,120mils ,Via NO.= 6)

JUMP_43X118

(8A,320mils ,Via NO.= 16)

PJ9
+1.25VSP

+1.25VS

JUMP_43X118

(2A,80mils ,Via NO.= 4)


A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
C

Compal Electronics, Inc.


DCIN & DETECTOR
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
D

38

of

48

PH1 under CPU botten side :


CPU thermal protection at 84 degree C
Recovery at 45 degree C
VMB

PR32
1
2
16.9K_0402_1%
TM_REF1

1
2

PR34
100_0402_5%

MAINPWON <6,38,41>

PQ4
DTC115EUA_SC70

PD9

1SS355_SOD323
LM393M_SO8

PR35
+3VALWP

3.32K_0402_1%

1K_0402_5%

PR37
2
1
VL
100K_0402_1%

0.22U_0805_16V7K_V2

1
25.5K_0402_1%

PR38

PC17

ALI/MH# <33>
PR36

@ BAS40-04_SOT23

PU3A

PR33
100_0402_5%

47K_0402_1%

10KB_0603_1%_TH11-3H103FT

PC16
0.01U_0402_25V7Z

PC15
1000P_0402_50V7K

PR27
PC14
0.1U_0603_25V7K
PR30
1
2
47K_0402_1%

1
PH1

BATT+

PD8

PR31
1K_0402_5%

SUYIN_200275MR009G116ZL_RV

+3VALWP

VL

PL2
1
2
C8B BPH 853025_2P

2
15A_65VDC_451015
PR29 2
1
47K_0402_5%

VS

1K_0402_5%
1 PR28
2

BATT_S1
ALI/NIMH#
AB/I
TS_A
EC_SMDA
EC_SMCA

GND
GND

1
2
3
4
5
6
7
8
9

10
11

PF2

BATT+
BATT+
ID
B/I
TS
SMD
SMC
GNDGND-

PJP2

VL

PD10

PR39

PC18
1000P_0402_50V7K

100K_0402_1%

3
1
2
@ BAS40-04_SOT23
BATT_TEMP <33>

EC_SMD1 <33,34>

EC_SMC1 <33,34>

PH2 near main Battery CONN :


BAT. thermal protection at 79 degree C
Recovery at 45 degree C

PD11
@ BAS40-04_SOT23

PD12
@ BAS40-04_SOT23
VL

VL

PH2

PR40
47K_0402_1%

PR41
1
2
47K_0402_1%

2
14.7K_0402_1%
TM_REF2

PU3B
PD13

1
1SS355_SOD323

LM393M_SO8

1
PR42

+5VALWP

10KB_0603_1%_TH11-3H103FT

PC19

PR43
PR44
3.48K_0402_1%

VL

100K_0402_1%

PR45
100K_0402_1%
PC20
1000P_0402_50V7K

0.22U_0805_16V7K_V2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


BATTERY CONN / OTP
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
D

39

of

48

8
7
6
5

PL3
1
2
C8B BPH 853025_2P

0.01_2512_1%(1W)

PC21
4.7U_1206_25V6K

PC22
4.7U_1206_25V6K

PC23

1
2
3

4.7U_1206_25V6K

8
7
6
5
4

PR46

1
2
3

1
2
3

8
7
6
5

200K_0402_1%

PC31
PR57
1
2 1
2
1K_0402_5%
1000P_0402_50V7K

PC30
0.1U_0402_16V7K

2
G

205K_0402_1%
1
2
PR59

<33> IREF

PQ14
S SN7002N_SOT23
PR64

21

FB2

OUT

20

VH

19

VCC

18

VREF

FB1

-INE1

RT

17

+INE1

-INE3

16

FB3

15

OUTC1

11

OUTD

CTL

14

0.1U_0402_16V7K

12

-INC1

+INC1

13

IREF=1.31*Icharge
IREF=0.73~3.3V

2
3
2
1

1
1

PD15
1SS355_SOD323

PC26
1
2
0.1U_0603_25V7K

RLZ22B_LL34

-INE2 VCC(o)

1
10
10K_0402_5%

PC34
100K_0402_1%

CS

1
PD16

PQ12
LXCHRG

1
2
PC29
0.1U_0603_25V7K

1
PR58
68K_0402_5%

1
2
PC32
0.1U_0603_25V7K
2

ACOFF <33>

1SS355_SOD323

DTC115EUA_SC70

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

PL4
PR61
1
2
1
2
22UH_SPC-1204P-220_2.9A_20%
0.02_2512_1%

PR63
PC33
1
2
1
2
47K_0402_5%
1500P_0402_50V7K
ACON

BATT+
4.7U_1206_25V6K

ACON

<38> ACON

2
PR62

PACIN 1
2
PR60
3K_0402_1%

<38,41> PACIN

1SS355_SOD323

22

CS

PQ10
AO4407_SO8
ACOFF#

PD18

PC35

PC36

4.7U_1206_25V6K
RB051L-40_SOD106

PD17
ACOFF#1

PC28
PR55
2 1
2
10K_0402_5%
4700P_0402_25V7K

+INE2

N18

SN7002N_SOT23

PQ13

PR56
150K_0402_1%

PR54
33.2K_0402_1%
10K_0402_1%

PC25
0.022U_0402_16V7K
1
2

PR53

1
3

1
2
G

PC27

23

PD14

0.1U_0402_16V7K
D

OUTC2 GND

VIN

PR51
10K_0402_5%

PC37

4.7U_1206_25V6K

DTC115EUA_SC70

0_0402_5%

PR49
1
2
47K_0402_5%

PQ11

24

1
100K_0402_5%

+INC2

2
PR52

PR50

5
6
7
8

<33,43> ADP_I

PU4
1 -INC2

PC24
0.1U_0603_25V7K

47K

47K

PQ9
DTA144EUA_SC70

PR47
PR48
47K_0402_5%

AO4407_SO8

PQ8

8
7
6
5

1
2
3

B+

PQ7
AO4407_SO8

PQ6
AO4407_SO8
VIN

Iadp=0~5.8A

P3

PQ5
AO4407_SO8

B++

P2

MB3887_SSOP24

+3VALWP
CS

PR65

PR67
47K_0402_5%

PQ15
DTC115EUA_SC70

PR66

4.2V

95.3K_0603_0.1%

143K_0603_0.1%

PR68

95.3K_0603_0.1%

PQ16
DTC115EUA_SC70

VMB

<33> FSTCHG

75W Iadp=0~3.5A

PR46=0.02_2512_1%

PR53=25.5K_0402_1%

Unpop PQ8

90W Iadp=0~4.2A

PR46=0.015_2512_1%

PR53=29.4K_0402_1%

Unpop PQ8

120W Iadp=0~5.8A

PR46=0.01_2512_1%

PR53=33.2K_0402_1%

Pop PQ5 and PQ8

PR69
340K_0402_1%

OVP voltage : LI
4S2P : 17.4V--> BATT_OVP= 1.935V

+12VALWP

PR70
499K_0402_1%

8
P

PU5A
LM358A_SO8
1 0

<33> BATT_OVP

(BAT_OVP=0.1111 *VMB)

2.2K_0402_5%
105K_0402_1%

PR72

0.1U_0402_16V7K

PR71

PC38

PC39
0.01U_0402_25V7Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:

Compal Electronics, Inc.


CHARGER
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
D

40

of

48

PC40
N4

PQ17
SI4800DY-T1_SO8

5
6
7
8

2
1
2
1

G
S
S
S
4
3
2
1

PR84
698_0402_1%

PC57
4.7U_0805_6.3V6K

+5VALWP

PR87
10.2K_0402_1%

PC59
100P_0402_50V8J

470U_6.3V_M

1
+

1
470U_6.3V_M PD23
+
1

MAX1902EAI_SSOP28

PC54

0.47U_0603_16V7K

PC60

PC61 SSM14_SMA

2
1

PC62
@ 0.047U_0402_16V4Z

CSH5

1
2.5VREF

10K_0402_1%

1
4
3
2
1
5
6
7
8
D
D
D
D

PC58
1000P_0402_50V7K

PR81
2 0_0402_5%
1

2
2

47K_0402_5%

CSL5

RUN/ON3

1
2

21

22

TIME/ON5

2M_0402_1%
PDL5

VS

7
28
1

PR86

PC52
47P_0402_50V8J

CSH3
CSL3
FB3
SKIP#
SHDN#

0_0402_5%

PR78

PLX5

1
2
3
10
23

PR75

1
2

PC56
100P_0402_50V8J

PR88

PR74
1.54K_0402_1%

LX3
DL3

VL

DH3

26
24

PQ20
SI4810DY_SO8

4
5
18
16
17
19
20
14
13
12
15
9
6
11

1
2
PR83
10K_0402_5%

SSM14_SMA

PC50
4.7U_1206_25V6K

3.32K_0402_1%
<38,40> PACIN
PR85

PC46
PC47
4.7U_1206_25V6K 4.7U_1206_25V6K

27

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

GND

1
1

BST3

0_0402_5%

PD22

PC55

25

V+

PU6

0.47U_0603_16V7K

PR82
CSH3
CSL3
2 620_0402_5%
1

1
1

2
1

PC53

PR79

SI4800DY-T1_SO8

PDH5

2
2

PR77
1.27K_0402_1%

1
S
S
S
G
1
2
3
4

1
2

PR76
2
1
1.27K_0402_1%

PR80

+3VALWP

PC49
0.1U_0603_25V7K

PC48
4.7U_0805_6.3V6K

PDH3

PDL3

PQ18

D
D
D
D

+12VALWP

8
7
6
5
D
D
D
D

PQ19
SI4810DY_SO8

10uH_SDT-1205P-100-118_5A_20%

B+++

PD21
1SS355_SOD323

PC51
47P_0402_50V8J

2 PC45

G
S
S
S

VL

1M_0402_1%

0.1U_0603_25V7K

1
2
3
4

S
S
S
G

DAP202U_SOT323

PLX3

PL6
10UH_SPC-1205P-100_4.5A_20%

PD20

VS

4.7U_1206_25V6K

PT1

D
D
D
D

PC44

PC43
4.7U_1206_25V6K

470U_6.3V_M

EC11FS2_SOD106

1 FLYBACK
22_1206_5%

SNB 2
PR73

8
7
6
5

HCB4532K-800T90_1812

PC41
470P_0805_100V7K

BST51

2
4.7U_1206_25V6K

B+

2 PC42 BST31
0.1U_0603_25V7K

B+++

PL5
D

PD19

PR89

VL

2
1
PR90
220K_0402_5%

10K_0402_1%

MAINPWON <6,38,39>

PC63
0.47U_0603_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


5V/3.3V/12V
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
1

41

of

48

PR91

PQ21
SI4800DY-T1_SO8

PHASE

LGATE

G
S
S
S

UGATE

4
3
2
1

PL7
4.7U_SPC-1205P-4R7A_+40-20%
2
1

FB

APW7057KC-TR_SOP8

2
PQ24
DTC115EUA_SC70

+
PQ23
SI4810DY_SO8

PC68
470U_6.3V_M

PR94
5.1K_0402_1%
1
2

PC123

+2.5VP

4
3
2
1

PR158
68K_0402_5%
1
2

7> SYSON

GND

G
S
S
S

+5VALWP

BOOT

1
2

PC67
0.1U_0402_16V7K

5
6
7
8

PR93
100K_0402_5%
2
1

PC65
4.7U_0805_6.3V6K

D
D
D
D

VL

OCSET

VCC

PD24
1N4148_SOD80

D
D
D
D

PU7

PQ22
DTC115EUA_SC70

PC64
1U_0603_6.3V6M

JUMP_43X118

5
6
7
8

PC66
470P_0603_50V7K

7.15K_0402_1%

PR92

PJ10

2
10_0603_5%

0.1U_0402_16V7K

PR95

PC69
0.1U_0402_16V7K

2.4K_0402_1%

PR96

UGATE

PHASE

1
2

D
D
D
D

PQ25
SI4800DY-T1_SO8

4
3
2
1
S

FB

+1.5VSP

D
D
D
D

0.1U_0402_16V7K

GND

LGATE

APW7057KC-TR_SOP8

+
PQ27
SI4810DY_SO8

PC74
470U_6.3V_M

4
3
2
1

G
S
S
S

PC124

PL8
3UH_SPC-07040-3R0_5A_30%
2
1

5
6
7
8

PQ26
SN7002N_SOT23

PC71
4.7U_0805_6.3V6K

G
S
S
S

1
BOOT

+5VALWP

OCSET

2
G
3

PR159
33K_0402_5%
1
2

5
6
7
8

PD25
1N4148_SOD80
PC73
0.1U_0402_16V7K

VCC

PU8

1
<37,43> SUSP

1U_0603_6.3V6M

JUMP_43X118

PC70

2
PC72
470P_0603_50V7K

10_0603_5%

2
PR97
3.32K_0402_1%

PJ11

2
2

PR98
3K_0402_1%
1
2

PR99

PC75
0.1U_0402_16V7K

3.4K_0402_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:
A

Compal Electronics, Inc.


2.5V/1.5V
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
D

42

of

48

PJ12

PU9
APL1085UC-TR_TO252
VIN VOUT 2

1
2
PR101
@ 2M_0402_1%
VS

PQ28
@ SN7002N_SOT23

2
G

PU10A
@ LM393M_SO8

PC82
@ 10P_0402_50V8J

PC81
@ 1000P_0402_50V7K

PR107
@ 100K_0402_1%

1
+

H_PROCHOT# <5>

PR102
@ 100K_0402_1%
PC79
0.1U_0603_25V7K

@ 124K_0402_1%
1
2
PR105
2

1
PR106
@ 196K_0402_1%

VL

@ 0.01U_0402_25V7Z

PC80

<33,40> ADP_I

PR104
@ 10.2K_0402_1%
2
1

1
2

PR103
44.2_0402_1%

PC78
100P_0402_50V8J

VL

PC76
4.7U_0805_6.3V6K

PC77
4.7U_0805_6.3V6K

PR100
100_0402_1%

1
D

85W THROTTLING
70W REVOVERY

+1.8VSP

ADJUST

JUMP_43X118

+3VS

PU10B
@ LM393M_SO8

PJ13
JUMP_43X118

+2.5V

NC

VREF

NC

VOUT

NC

TP

+3VALWP

VCNTL

GND

PR108
1K_0402_1%

VIN

PC84
1U_0603_6.3V6M

PC83
10U_1206_6.3V7K

PU11

APL5331KAC-TR_SO8
+1.25VSP

1
2

PC85
0.1U_0402_16V7K

PR109
1K_0402_1%

PC86
10U_1206_6.3V7K

PC125
@ 0.1U_0402_16V7K

2
G
PQ29
S
SN7002N_SOT23
3

0_0402_5%
1
2

<37,42> SUSP

PR160

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


1.8V/1.25V/PROCHOT
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet
1

43

of

48

B+

+5VS

<35> ENLL

1 PR113 2
0_0402_5%
1 PR114 2
0_0402_5%

VID4
VID3
VID2
VID1
VID0
VID5

PGOOD

34

ENLL

33

DRSEN
DSEN#

35

1
PR118
69.8K_0402_1%

PR121
118K_0402_1%

31

ISEN4+
ISEN4-

30
29

COMP

15

DRSV

FB

13

NC

NC

14
16
17
18

NC

12

GND

VDIFF
VSEN
VRTN

GND

OFS

2
PR122
@ 0_0402_5%
2
1

Place close to IC

PR132
PC94
27K_0402_5%
1U_0603_6.3V6M
PR130
681K_0402_1%
PR131
5.1K_0402_1%

EN

2
B

1
2

PR133
0_0402_5%
2
1

+CPU_CORE

PR135
0_0402_5%
2
1

PQ33
SN7002N_SOT23
2
1
PR136
@ 0_0402_5%

2
1
PR134
@ 0_0402_5%

VCCSENSE <5>

Place near +VCC_CORE


output capacitor

VSSSENSE <5>

PQ34
MMBT3904_SOT23

2
GND

2
G

PG

PR138
100K_0402_5%

+CPU_VIDP

PR128
1
2 16.2K_0402_1%
1
PQ30
SN7002N_SOT23

MIC5258_SOT23-5

PR140
0_0402_5%
2
1

PC96
4.7U_0805_6.3V6K

PR141
100K_0402_5%

<33> VR_ON

<4> H_BOOTSELECT
PU13

<35> VID_PWRGD

PR137
22K_0402_5%
2
1

Remote
Sensing

PR125
2.26K_0402_1%
1
2

PC93
0.1U_0402_16V7K

PC95
4.7U_0805_6.3V6K

PC92
PR124
@ 1000P_0402_50V7K @ 0_0402_5%
2
1
2
1

1 PC91
22P_0402_50V8J

+5VCPUVCC

PR127
1M_0402_1%

1.2VDD

OUT

PWM4 <46>
ISEN4+ <46>
ISEN4- <46>

2PQ32
G SN7002N_SOT23

IN

+5VCPUVCC

PC89
PR120
2200P_0402_50V7K 20K_0402_1%
2
1
1
2

PR126
32.4K_0402_1%

PQ31 2
TP0610T_SOT23 G

ISEN3+ <46>
ISEN3- <46>

ISL6248ACR-T_QFN40

Unpop PR115
Pop PR116

PR139
0_0603_5%
2
1

PWM3 <46>

PR116
@ 0_0402_5%

+3VALWP

+5VCPUVCC

Unpop PR115
& PR116

17.4K_0402_1%

Others

20K_0402_1%

PWM4

ISEN2+ <45>
ISEN2- <45>

PR115
2
1
@ 0_0402_5%

PR119

20
21
22

PR129
45.3K_0402_1%

PWM3
ISEN3+
ISEN3-

40

19

300_0402_1%

38

PWM2 <45>

360_0402_1%

37

26
27
28

PR117

FS

PWM2
ISEN2+
ISEN2-

PR123
10K_0402_1%

3 Phase

36

ISEN1+ <45>
ISEN1- <45>

LM358A_SO8

4 Phase

PWM1 <45>

25
24
23

DSV

PWM1
ISEN1+
ISEN1-

PU5B
5

1
2

PR119
20K_0402_1%

SOFT

Frequency Select
PC90
100P_0402_50V8J

11

VGATE <22>

PR117
360_0402_1%

OCSET

PR112
10K_0402_5%
2
1

10
PC88
0.047U_0603_16V7K
2
1

7
39

<5,17,19> PM_STPCPU#

1
2
3
4
5
6

<19> PM_DPRSLPVR

RAMPADJ

CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
CPU_VID5

VCC

PU12

32

<5>
<5>
<5>
<5>
<5>
<5>

PR111
80.6K_0402_1%

PC87
+5VCPUVCC
1U_0603_6.3V6M
2
1

Battery Feed
Forward

PR110
10_0603_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
Date:

Compal Electronics, Inc.


CPU_CORE (1)
Document Number

Rev
1.0

LA-2331
Tuesday, May 18, 2004

Sheet

44

of

48

CPU_B+

+5VS

1
+

PQ35
SI7840DP_SO8

PR142
2.2_0603_1%

PL9
1
2
HCB4532K-800T90_1812

PC100
1
PC99
4.7U_1206_25V6K
+
4.7U_1206_25V6K
PC101
@ 100U_25V_M
PC98
4.7U_1206_25V6K
2

PC97
0.22U_0805_16V7K_V2
2
1

PC131
220U_25V_M

DELAYPHASE

GND

LGATE

Panasonic ETQ-P4LR56WFC
N5

PL10
0.56UH_ETQP4LR56WFC_21A_20%
1
2

PQ36
PHASE1
IRL7833S_D2PAK

PQ37
@ IRF7831TR_SO8

2
1

PQ38
@ IRF7831TR_SO8

PC103
1U_0805_16V7K

PD27
SSM14_SMA

PR145
39.2K_0402_1%
1

PC104
0.01U_0402_25V7Z
1

B+

BOOT

PWM UGATE

ISL6209CB-T_SO8

5
6
7
8

VCC

3
2
1

5
6
7
8

PWM1 <44>

PR144
57.6K_0402_1%

4
PU14

PR143
499K_0402_1%

PC130
220U_25V_M

PC102
@ 100U_25V_M

3
2
1

3
2
1

PC126
4700P_0402_25V7K

N6
PH3
820_0402_5%
2
1

<44> ISEN1<44> ISEN1+

DELAYPHASE

GND

LGATE

PHASE2

PQ41
@ IRF7831TR_SO8

PD28
SSM14_SMA

+CPU_CORE

PR149
39.2K_0402_1%
2
1

PC110
0.01U_0402_25V7Z
2
1

PD26
EC31QS04

PC127
4700P_0402_25V7K

3
2
1

3
2
1

1
2

PQ42
IRL7833S_D2PAK

PQ40
@ IRF7831TR_SO8

PR148
ISL6209CB-T_SO8
57.6K_0402_1%

Panasonic ETQ-P4LR56WFC
PL11
0.56UH_ETQP4LR56WFC_21A_20%
1
2

N7

1000P_0402_50V7K 820P_0603_50V7K
PC133
PC135
PC134
820P_0603_50V7K

PWM UGATE

PC132

5
6
7
8

2
3
2
1

BOOT

5
6
7
8

PC109
1U_0805_16V7K

PR147
499K_0402_1%

PWM2 <44>

VCC

1000P_0402_50V7K

Local Transistor
Swtich Decoupling

PU15

PC108
4.7U_1206_25V6K

PQ39
SI7840DP_SO8

PR146
2.2_0603_1%

PC107
4.7U_1206_25V6K

PC106
4.7U_1206_25V6K

CPU_B+

PC105
0.22U_0805_16V7K_V2
1
2

N8
<44> ISEN2<44> ISEN2+

PH4
820_0402_5%
2
1

Local Transistor
Swtich Decoupling

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.

Compal Electronics, Inc.


CPU_CORE (2)
Document Number
Tuesday, May 18, 2004

Rev
1.0
Sheet

45

of

48

PC113
4.7U_1206_25V6K

PC114
4.7U_1206_25V6K

PC112
4.7U_1206_25V6K

PQ43
SI7840DP_SO8

PR150
2.2_0603_1%

4
PU16

PHASE3

GND LGATE
PR152
57.6K_0402_1% ISL6209CB-T_SO8

PQ45
@ IRF7831TR_SO8

IRL7833S_D2PAK

PQ46
@ IRF7831TR_SO8

PR153
39.2K_0402_1%
1

PC116
0.01U_0402_25V7Z
2
1

3
2
1

3
2
1

PC128
4700P_0402_25V7K

PD29
SSM14_SMA

PQ44

DELAYPHASE

PL12
0.56UH_ETQP4LR56WFC_21A_20%
1
2

N9

PWM UGATE

Panasonic ETQ-P4LR56WFC

3
2
1

2
1

VCC

PR151
499K_0402_1%

BOOT

5
6
7
8

2
PC115
1U_0805_16V7K

PWM3 <44>

5
6
7
8

CPU_B+

PC111
0.22U_0805_16V7K_V2
1
2
+5VS

N10
PH5
820_0402_5%
2
1

<44> ISEN3<44> ISEN3+


CPU_B+
PC119
4.7U_1206_25V6K

GND

LGATE

ISL6209CB-T_SO8

PQ50
IRL7833S_D2PAK

PHASE4

+CPU_CORE

PQ48
@ IRF7831TR_SO8

PQ49
@ IRF7831TR_SO8

SSM14_SMA
PC129
4700P_0402_25V7K

PR157
39.2K_0402_1%
1

PC122
0.01U_0402_25V7Z
2
1

3
2
1

3
2
1

PD30

1
2

DELAYPHASE

Panasonic ETQ-P4LR56WFC

PL13
0.56UH_ETQP4LR56WFC_21A_20%
1
2

N11

PWM UGATE

5
6
7
8

PC120
4.7U_1206_25V6K

Local Transistor
Swtich Decoupling
3
2
1

PR156
4
57.6K_0402_1%

PC121
1U_0805_16V7K

PR155
499K_0402_1%

BOOT

5
6
7
8

2
2

PWM4 <44>

VCC

PC118
4.7U_1206_25V6K

PU17

1
PQ47
SI7840DP_SO8

PR154
2.2_0603_1%

PC117
0.22U_0805_16V7K_V2
1
2

N12

PH6
820_0402_5%
2
1

<44> ISEN4<44> ISEN4+

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY


Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date:
INC.
5

Compal Electronics, Inc.


CPU_CORE (2)
Document Number
Tuesday, May 18, 2004

Rev
1.0
Sheet
1

46

of

48

REV 0.2
Date

Page

Description

Location
ADD C775 ~ C790

03/10

P.14,15

Add 16 Cap in on board DDR chip VDD pin

03/10

P.18

Del L9 & change L8 to bead for EMI

DEL L9 Change L8 to Bead

03/15

P.19

Redefine On board DDR strap pin

DEL R643, R646

03/15

P.21

Change SB +2.5valw power design

DEL R641 ADD Q60,D72

03/15

P.25

Change 5 In 1 connector

Change JP9

03/15

P.32

Add Parallel Port detect strap pin

ADD R817

03/15

P.27

Change 1394 connector footprint

NONE

03/16

P.33

Change EC SMbus2 pull high plwer


plan from +5VALW to +3V

NONE

03/16

P.36

Add Battery Hibernation circuit

ADD U54,Q61 ~ Q64,U53,D75,D74,R822,R823 ~ R827,C791, C794,C792, C793,R820,R821

REV 0.3
04/5

P.23

Change ODD Conn. layout

04/6

P.23

Del pull high resistor in SIO for with FIR & LPT

Unmount R535,R816

04/6

P.24

Add SMWP# Pull Low

Add R831

04/6

P.24

Add SDDA0~SDDA3 pull low

Add R833

04/12

P.30;31

Change SWDJ design

DEL R481,R486,R487,R463,R464,L24

04/12

P.30;31

Change SWDJ design

Add Q23,U34,C552,C555,R510,R503,R504,R507,R509,R512,R513,R514,R515,L25,R718

REV 0.4
04/22

P.35

Swap FAN1 & FAN2

04/22

P.33

change SMBUS2 pull high from +3V to +5VALW

04/22

P.25

Change XDBSY# power plan from +3VS to +5in_VCC

04/22

P.25

Change SD_CLK damping value

Change R398 from 33ohm to 0ohm

04/29

P.20

For EMI request

Change USB 48MHZ R309 from 0 to 33

04/29

P.29

For EMI request

Add C828,C829,C830,C831,C832,C833

04/29

P.34

For EMI request

Add R838,R839,R840,R841,R842
Add R843,R844,R845,R846,R847 with Bead
C834,C835,C836,C837,C838,C839,C840,C841,C842,C843

04/29

P.29

For POWER request

Add R850,C844

05/03

P.25

Change 5 in 1 design

05/03

P.29

ADD CODEC DISABLE PULL HIGH

Add R853

05/03

P.29

LCD power up soft start

Change R246 from 150k to 200k & add C272

05/03

P.29

Change USB power switch

Change U55,U30 to G528

05/03

P.24

Change SM_CD# deaign

Add R852

05/03

P.25

Del PCMCIA 12V Cap

Del C408

05/06

P.20

Change USB 12.4K to 12K to improve USB signal quality Change R311 from 12.4K to 12K

05/06

P.25

Reserve Q65 and C845 and change C823 to 1206 size

05/16

P.25

Change Audio CLK from CLK GEN to Crystal

05/26

P.21

Change R324 from 100 ohm to 1k ohm solve ODD noice issue

Del R391,R392,R397,R399,R400,R401,R403,R413
Change R415,R407 FROM 43K TO 10K
Change R411,R831 FROM 43K TO 2.2K
Change R409 FROM 2.2K TO 10K
Change R418 FROM 10K TO 43K

REV 1.0
Add X6,C518,C519 Del R471,R485,R219

Title

Compal Electronics, Ltd.


PIR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Document Number
CustomLA-2301
Date:

Wednesday, May 26, 2004

Rev
1.0
Sheet

47

of

48

PWR PIR LIST


EVT2
page
45
45,46

45,46
45,46

Reason for change


Change material for ME limit
For CPU transient and loadline

Change material's tolerance


Intersil suggest

Modify list
Change PC101 from 220U_25V(10X10.5) to 100U_25V(6.3X7.7)
Change PR145,PR149,PR153,PR157 from 34.8K to 39.2K
Change PR130 from 340K to 681K
Change PC103,PC109,PC115,PC121 from Y5V to X7R
Add PD27,Pd28,PD29,PD30(SSM14)
Add PC126,PC127,PC128,PC129(3300P)

Create 90W BOM


38,42,43

Add bead for EMI require

Add PL14,PL15,PL16,PL17,PL18

38

Modify ACIN detect signal

Change PR3 from 88.7K to 84.5K


Change PR5 from 15.4K to 22K
Change PR48 from 150K_5% to 47K_5%

41

Adjust 3.3V and 5V OCP

Change
Change
Change
Change
Change

PR76
PR77
PR82
PR74
PR84

from
from
from
from
from

1.27K to 1.87K
1.27K to 3.74K
620 to 1.24K
1.54K to 1.27K
698 to 1.82K

42

Add 2.5V delay for HW require

Change PR158 from 0 to 68K


Add 0.1u at PC123

42

Modify 1.5V OCP point

Change PR97 from 3.32K to 2.8K


Change PL8 from 5u to 3u

42

Add 1.5V delay for HW require

Change PR159 from 0 to 33K


Add 0.1u at PC124

45

Add CAP at CPU_CORE input for EMI

Add 1000P at PC132,PC133


Add 820P at PC134,PC135

Delete bead for EMI

Delete PL14~PL18 and change to jumper

Change CPU_CORE input CAP

Delete PC101
Add 220U_25V(10X10.5) at PC130,131

45,46

Add 2.2 ohm at CPU_CORE


driver's boost for EMI

Change PR142,PR146,PR150,PR154 to 2.2_0603_1%

38,39

Change to common parts

Change PC7 to 0.1U_0805_25V


change PC17,PC19 to 0.22U_0805_16V

42,43

DVT
45

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

EDW10 PIR LIST


Document Number

Rev
1.0

FortWorth 20
Tuesday, May 18, 2004

Sheet

48

of

48

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