8

Cover Sheet

Block Diagram

GPIO Spec.

Clock CY28324 & ATA100 IDE CONNECTORS

mPGA478-B INTEL CPU Sockets

5-6

INTEL Brookdale MCH -- North Bridge

7-8

INTEL ICH2 -- South Bridge

9 - 10

LPC I/O W83627HF

11

CNR RISER

12

AC'97 Codec

13

Audio Amp TL072 & GAME

14

FWH-- BIOS & VCCVID

15

SDR DIMM-168PIN DIMM1,2

16

AGP 4X SLOT (1.5V)

17

PCI SLOT 1 & 2 & 3

18

Front Panel & Connectors

19

USB & FAN Connectors

20

D-LED & AUDIO 6 CHANNEL CONTROL

21

Votlage Regulator

22

HIP6301V CPU Power ( PWM )-VRM9.2

23

IO Connectors

24

Realtek RTL8100(L) LAN

25

DDR Damping

26

DDR Termination

27

DDR Termination Power

28

Jumper setting

29

Power Delivery Map

30

MS-6507

Version 0B
06/29/2001 Update

INTEL (R) Brookdale Chipset

Willamette/Northwood 478pin mPGA-B Processor Schematics

CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale Chipset:

INTEL MCH (North Bridge) +

INTEL ICH2 (South Bridge)
On Board Chipset:
BIOS -- FWH
LPC Super I/O -- W83627HF
Clock Generation -- CY28324
PCI SOUND -- C-MEDIA CMI8738

Expansion Slots:
AGP2.0 SLOT * 1
PCI2.2 SLOT * 3

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Cover Sheet
Last Revision Date:

Monday, July 23, 2001

8

Sheet

1
1

of

36

(478PINS)
(100MHz)

Power
Supply
CONN

VRM
9.2

Willamette/Northwood
Socket (mPGA478-B)
(400MHz)

AGP
4X(1.5V)
AGP CONN

CK408 Clock
(100MHz)

Scalable Bus

Scalable Bus/2

4 X (66MHz) AGP

AGP 4X
(1.5V)

MCH: Memory
Controller HUB
( 5 93PINS/FCBGA)

(133MHz)
DDR 1:2

( 66MHz X 4 )

HUB Interface
(14.318MHz)

Heceta Hardware
Monitor

SM Bus

ICH2: I/O

PCI (33MHz)

PCI Slots 1:3

( 3 60PINS/EBGA)

Controller HUB

IDE CONN 1&2

LPC Bus

USB Port 0:3

(33MHz)

(33MHz)

(48MHz)

AC Link

AC '97 Audio
Codec

FWH: Firmware HUB

PCI LAN /
Realtek
RTL8100

CNR Riser
(Shared slot)

AMP

SIO
Line Out
Telephone In
MIC In
Audio In

PS2 Mouse &

Keyboard

Parallel (1)
Serial (2)

Floppy Disk
Drive CONN

Line In

DLED

CD-ROM

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Block Diagram
Last Revision Date:

Monday, July 23, 2001

8

Sheet

2
1

of

36

General Purpose I/O Spec.

D

ICH2
GPIO Pin

Type

Function

GPIO 0

Non Connect

GPIO 1

Non Connect

GPIO 2~4

Not Implemented

GPIO 5

Non Connect

GPIO 6

AC97 Enabled/Disabled

FWH
GPIO Pin

Type

DEVICE

ICH INT Pin

IDSEL

PCI Slot 1

INTA#
INTB#
INTC#
INTD#

AD16

PCI Slot 2

INTB#
INTC#
INTD#
INTA#

AD17

PCI Slot 3

INTC#
INTD#
INTA#
INTB#

AD18

PCI Audio

INTD#/INTE#
INTA#
INTB#
INTC#

AD23

INTC#/INTF#
INTD#
INTA#
INTB#

AD22

Function

GPIO 7

None

GPIO 8

LAN Wake Up

GPIO 9

AC'97 Serial Data In

GPIO 10

Non Connect

GPIO 11

Non Connect

GPIO 12

External SMI

GPIO 13

LPC PME

GPIO 14~15

Not Implemented

GPIO Pin

Type

Function

GPIO 16

Non Connect

GP32

I/OD

DLED1

GPIO 17

Non Connect

GP24

I/OD

DLED2

GPIO 18

Not Implemented

GP34

I/OD

DLED3

GPIO 19

Not Implemented

GP33

I/OD

DLED4

GPIO 20

Not Implemented

GPIO 21

Audio 6 channel control

GPIO 22

Non

GPIO 23

OD

GPIO 24

Non

GPIO 25

Non

GPIO 26

Non

GPIO 27

I/O

Non

GPIO 28

I/O

non

GPIO 29~31

I/O

Not Implemented

GPI 0

ATA IDE 1 Detect

GPI 1

ATA IDE 2 Detect

GPI 2

Reserved

GPI 3

Reserved

DLED-Super I/O

PCI Lan

BIOS Locked/Unlocked

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

GPIO Spec.
Last Revision Date:
Sheet

Monday, July 23, 2001

5

of

36

*Trace less 0.5"

CLOCK GENERATOR BLOCK

Shut Source Termination Resistors

Pull-Down Capacitors

for good filtering from 10K~1M

CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
ITP_CLK
ITP_CLK#

U18
FB18

X_600

39

CPU_VDD

VCC3

CB145
0.1u

CT34

Rubycon

CB144
1u

CB154
0.1u
36

CPU_GND

X_COPPER
CP600 10u

46

32

FB20

X_600

CB166
0.1u

VCC3V
CT36

Rubycon

CB178
1u

9
CB183
0.1u

X_COPPER
CP601 10u

PCI_GND

18

24

SMBCLK
SMBDATA

R318

X_1KVTT_GD# 19

R304 220

+12V

R719

4.7K

MUL0/REF0
MUL1/REF1
CORE_VDD

5
5

MCHCLK
MCHCLK#

7
7

R243
R244

X_33
X_33

ITP_CLK
ITP_CLK#

ITP_CLK
ITP_CLK#

5
5

MCH_66
ICH_66
AGPCLK
C157 10p

MCH_66
ICH_66
AGPCLK

7
10
17

ICH_PCLK
FWH_PCLK
SIO_PCLK

ICH_PCLK
FWH_PCLK
SIO_PCLK

9
15
11

C_STP
P_STP

1
RN17 3
5
7
3V66_3

Q705
NPN-3904LT1-S-SOT23

C702
4.7u-0805

4.7K
HD_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDD[0..7]

10
10
10
10
10
9
10
10
10
19

PD_DREQ
PD_IOW#
PD_IOR#
PD_IORDY
PD_DACK#
IRQ14
PD_A1
PD_A0
PD_CS#1
PD_LED

6
7
8

FS2
FS3
MODE

10
11
12
14
15
16
17

FS4

7
5
3
1

CORE_GND

X2

SCLK
SDATA

IREF

PCICLK0
PCICLK1
PCICLK2
PCICLK3

18
18
18
25

BSEL0

4.7K

R188

33

33
C79
220p

8.2K

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

100/133 select

10K
10K
R282
R283

VCC3V
VCC3V
X_10K
10K

FS0

R321
R322

10K
X_10K

FS2

R326
R325

X_10K
10K

2
4
6
8

CN18
X_10p

VCC3V

SIO_PCLK
FWH_PCLK
ICH_PCLK

8
6
4
2

PCICLK0
PCICLK1
PCICLK2
PCICLK3

7
5
3
1

7
5
3
1

VCC3V
CN17
X_10p
VCC3V

R307
R281

33
33

ICH_48
SIO_48

ICH_48
SIO_48

10
11

MODE

R336

X_10K

48
1

MUL0
MUL1

R251

33

ICH_14

ICH_14

10

MUL0

R241
R231

X_10K
10K

VCC3V

MUL1

R316
R315

10K
X_10K

VCC3V

CRST#

R305

10K

VCC3V

SMBCLK
SMBDATA

R255
R254

4.7K
4.7K

C_STP
P_STP

R242
R235

X_1K
X_1K

C171
18p
32pF
14M-32pf-HC49S-D
C166
18p

35

R227

475

R306
R245

0
4.7K

R119
10K
VCC3

22
24
26
28
30
32
34
36
38
40

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

R129

CRST#

CLK_RST#
CLK_RST#
VCC3V
VCC3V

PDD[8..15]

10

10

19

8
6
4
2

PD_DET
PD_A2
PD_CS#3

15
10
10

SDD[0..7]

C76
X_4700p

R407
14
8
7

1K

C175 10p
C169 10p

ICH_14

C164 10p

used only for EMI issue

VCC3

VCC3V

SECONDARY IDE BLOCK

HD_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

SD_DREQ
SD_IOW#
SD_IOR#
SD_IORDY
SD_DACK#
IRQ15
SD_A1
SD_A0
SD_CS#1
SD_LED

VCC5

ICH_48
SIO_48

Trace less 0.2"

10
10
10
10
10
9
10
10
10
19

470

PCIRST#

R186

4.7K

R187

33

R101

R103

8.2K

33
C81
220p

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

IDE2
D2x20-1:21-WH-SBT
2
4
6
8
10
12
14
16
18

R120
10K
VCC3

22
24
26
28
30
32
34
36
38
40

SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

R128

SDD[8..15]

10

470

SD_DET
SD_A2
SD_CS#3

15
10
10

C77
X_4700p

VCC5
A

HD_RST#

U21D
7407-SOIC14
R388

PCIRST# 1

FS1
X_10K

BSEL0 R749

ATA100 IDE CONNECTORS

IDE1
D2x20-1:21-BL-ZBT
2
4
6
8
10
12
14
16
18

VCC5_SB

PCIRST#

R324
R334

FS0
FS1

VCC5_SB

14
2
7

U21A
7407-SOIC14

330

Title

VCC3

M i c ro-Star

VCC5_SB
PCIRST#1
C199

7,11,15,25

R197
PCIRST#

X_10p
8

FS4
FS3

22
23

20
42

RST#
PWR_DN#

VTT_GD#
CYP-CY28324

RESET BLOCK

PCICLK0
PCICLK1
PCICLK2
PCICLK3

CN16
X_10p
1
3
5
7

MCH_66
ICH_66
AGPCLK

CLOCK STRAPPING RESISTORS

33
8
6
4
2

7
RN24 5
33
3
1

X1

PRIMARY IDE BLOCK

R190

R189

R191

VCC5

2
4
6
8
RN25
8
6
4
2

33

Trace less 0.2"

49.9ohm for 50ohm M/B impedance

ICS950208
CY28323

R718 220

10

CPUCLK
CPUCLK#

MCHCLK
MCHCLK#

X1

R733

CPUCLK
CPUCLK#

33
33

REF_GND

26
25

Q36
NPN-3904LT1-S-SOT23

VCCP

REF_VDD

CB152
0.1u
33

10,11,12,16 SMBCLK
10,11,12,16 SMBDATA

33
33

R239
R240

49.9
49.9
49.9
49.9
X_49.9
X_49.9

48_GND

34

* Different mode spacing 7mils on itself

VTT_GD#

FS0/48MHz
FS1/24_48MHz

CB165
0.1u
47

* Same Group spacing 15mils

* Different Group spacing 30mils

R323
10K

48_VDD

* Trace Width 7mils.

VCC3

PCI_GND

CB164
0.1u
21

FS4/PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

PCI_VDD

CB177
0.1u
13

*Put GND copper under Clock Gen.

connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around it
* put close to every power pin

FS2/PCI_F0
FS3/PCI_F1
MODE/PCI_F2

PCI_VDD

R246
R247

38
37

31
30
28
27

3V66_0
3V66_1
3V66_2
3V66_3

3V66_GND

VCC3

3V66_VDD

41
40

45
44

3VMREF/CPU_STP#
3VMREF#/PCI_STP#
MREF_GND

CB153
0.1u
29

R228
X_0

CPU1
CPU1#

MREF_VDD

CB151
0.1u
43

for good filtering from 10K~1M

CPU0
CPU0#

R233
R234
R229
R230
R232
R236

14
4
7

330

VCC3

PCIRST#2

0B

Document Number

Clock CY28323/4 & ATA100 IDE

17,18

U21B
7407-SOIC14
6

Rev

MS-6507

Last Revision Date:

Monday, August 06, 2001

5

Sheet

4
1

of

36

CPU SIGNAL BLOCK

CPU GTL REFERNCE VOLTAGE BLOCK

VCCPS+
VCCPSITP_CLK#
ITP_CLK
VID[0..4]

HINIT#

AC3
V6
B6
Y4
AA3
W5
AB2

7
7
7

HDBSY#
HDRDY#
HTRDY#

H5
H2
J6

7
7
7
7
7
7
7

HADS#
HLOCK#
HBNR#
HIT#
HITM#
HBPRI#
HDEFER#

G1
G4
G2
F3
E3
D2
E2

9
9

FERR#
STPCLK#

9,15

Trace : 10
mil width
10mil space
11
11
15
10
9
9
9
9

CPU_TMPA
VTIN_GND
THERMTRIP#
PROCHOT#
IGNNE#
HSMI#
A20M#
SLP#

ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK

C1
D5
F7
E6
D4
B3
C4
THERMTRIP# A2
AF26
C3
B2
B5
C6
AB26
R78
X_0

100/133 select
4
B

BSEL0

BSEL0

A22
A7
AD2
AD3
AE21
AF24
AF25
AD6
AD5

10

CPU_GD

CPU_GD

CPURST#

CPURST#

AB25

HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

AA24
AA22
AA25
Y21
Y24
Y23
W25
Y26
W26
V24

HD#[0..63]

AB23

AD26
AC26

A5
A4

AE25

DBSY#
DRDY#
TRDY#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

P1
L24

COMP1
COMP0

PWRGOOD
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR

2/3*Vccp

R32
X_49.9

C36
C35
C13
X_220p X_220pX_1u

R34
X_100

BPM#1
BPM#0
HREQ#[0..4]

Every pin put one 220pF cap near it.

Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the

R77

4.7K

R46

4.7K

R82

4.7K

R45

4.7K

first GTLREF Pin

C

CPU ITP BLOCK

VCCP
CPUCLK#
CPUCLK

HRS#2
HRS#1
HRS#0

HRS#[0..2]

HBR#0
R47
R80

4
4

49.9
49.9

* Short trace

L25
K26
K25
J26

DP3#
DP2#
DP1#
DP0#

Differential
Host Data
Strobes

HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0

VCCP

GTLREF2

V5
AC1
H6

AP1#
AP0#
BR0#

RESET#

H3
J3
J4
K5
J1

F4
G5
F1

RS2#
RS1#
RS0#

BSEL0
BSEL1

BPM#5
BPM#4

AF23
AF22

BCLK1#
BCLK0#

RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6

GTLREF1
GTLREF2

AB4
AA5
Y6
AC4
AB5
AC6

AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24

TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

R79
100

AE1
AE2
AE3
AE4
AE5

AA21
AA6
F20
F6

GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

C58
1u

IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

C48
220p

VID4#
VID3#
VID2#
VID1#
VID0#

DBI0#
DBI1#
DBI2#
DBI3#

R81
49.9

2/3*Vccp
GTLREF1
C49
220p

R5
L5
W23
P23
J23
F21
W22
R22
K22
E22

HADSTB#1
HADSTB#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0

7
7
7
7
7
7
7
7
7
7

E5
D1

NMI
INTR

9
9

ITP_TMS

R17

39

ITP_TDO

R10

75

ITP_TCK

R15

VCCP
B

27

PGA-S478-F02

HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0

V22
U21 D53#
V25 D52#
U23 D51#
U24 D50#
U26 D49#
T23 D48#
T22 D47#
T25 D46#
T26 D45#
R24 D44#
R25 D43#
P24 D42#
R21 D41#
N25 D40#
N26 D39#
M26 D38#
N23 D37#
M24 D36#
P21 D35#
N22 D34#
M23 D33#
H25 D32#
K23 D31#
J24 D30#
L22 D29#
M21 D28#
H24 D27#
G26 D26#
L21 D25#
D26 D24#
F26 D23#
E25 D22#
F24 D21#
F23 D20#
G23 D19#
E24 D18#
H22 D17#
D25 D16#
J21 D15#
D23 D14#
C26 D13#
H21 D12#
G22 D11#
B25 D10#
C24 D9#
C23 D8#
B24 D7#
D22 D6#
C21 D5#
A25 D4#
A23 D3#
B22 D2#
B21 D1#
D0#

E21
G25
P26
V21

ITP_CLK1
ITP_CLK0

HDBI#0
HDBI#1
HDBI#2
HDBI#3

HDBI#[0..3]

DBR#

A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

U7A

VCC_SENSE
VSS_SENSE

AB1
Y1
W2
V3
U4
T5
W1
R6
V2
T4
U3
P6
U1
T2
R3
P4
P3
R2
T1
N5
N4
N2
M1
N1
M4
M3
L2
M6
L3
K1
L6
K4
K2

VCCP

23
23
4
4
11,23

VID4
VID3
VID2
VID1
VID0

HA#[3..31]

HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3

CPU STRAPPING RESISTORS

ALL COMPONENTS CLOSE TO CPU

Title

BPM#0
BPM#1
BPM#4
BPM#5

R41
R42
R44
R43

49.9
49.9
49.9
49.9

VCCP

ITP_TDI

R26

150

ITP_TRST#

R16

680

PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#

VCCP

R27
R76
R64
R83
R66

62
300
49.9
49.9
X_62

M i c ro-Star

VCCP

Rev

MS-6507

0B

Document Number

INTEL mPGA478-B CPU1

Last Revision Date:

Thursday, August 09, 2001

8

Sheet

5
1

of

36

CPU VOLTAGE BLOCK

VCC_VID

15,23

AE23

AF3

AD20
VCCA

VCC-IOPLL

AF4
VCC-VID

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC-VIDPRG

D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1

AD10
AD12VSS
AD14VSS
AD16VSS
AD18VSS
AD21VSS
AD23VSS
AD4 VSS
AD8 VSS
AE11VSS
AE13VSS
AE15VSS
AE17VSS
AE19VSS
AE22VSS
AE24VSS
AE26VSS
AE7 VSS
AE9 VSS
AF1 VSS
AF10VSS
AF12VSS
AF14VSS
AF16VSS
AF18VSS
AF20VSS
AF6 VSS
AF8 VSS
B10 VSS
B12 VSS
B14 VSS
B16 VSS
B18 VSS
B20 VSS
B23 VSS
B26 VSS
B4 VSS
B8 VSS
C11 VSS
C13 VSS
C15 VSS
C17 VSS
C19 VSS
C2 VSS
C22 VSS
C25 VSS
C5 VSS
C7 VSS
C9 VSS
D12 VSS
D14 VSS
D16 VSS
D18 VSS
D20 VSS
D21 VSS
D24 VSS
D3 VSS
D6 VSS
D8 VSS
E1 VSS
E11 VSS
E13 VSS
E15 VSS
E17 VSS
E19 VSS
E23 VSS
E26 VSS
E4 VSS
E7 VSS
E9 VSS
F10 VSS
F12 VSS
F14 VSS
F16 VSS
F18 VSS
F2 VSS
F22 VSS
F25 VSS
F5 VSS
F8 VSS
G21 VSS
G24 VSS
G3 VSS
G6 VSS
H1 VSS
H23 VSS
H26 VSS
H4 VSS
J2 VSS
J22 VSS
J25 VSS
J5 VSS
K21 VSS
VSS

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

U7B

A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10
E12
E14
E16
E18
E20
E8
F11
F13
F15
F17
F19
F9

VCCP

C57
10u-1206
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C53
10u-1206

C56
22u-1206

L2

4.7u-10%

L1

4.7u-10%

VCCP

C52
22u-1206

AD22
D

Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24

PGA-S478-F02

CPU DECOUPLING CAPACITORS

VCCP
VCCP
CB32
10u-1206
CB29
10u-1206
CB47
10u-1206

VCCP
CB38
10u-1206
CB55
10u-1206
CB61
10u-1206
CB41
10u-1206
CB14
10u-1206
CB35
10u-1206
CB39
10u-1206
CB44
10u-1206

CPU DECOUPLING CAPACITORS

VCCP
CB49
10u-1206
CB34
10u-1206
CB27
10u-1206
CB54
10u-1206
CB50
10u-1206
CB52
10u-1206
CB58
10u-1206
CB22
10u-1206

CB21
10u-1206
CB20
10u-1206
CB17
10u-1206
CB51
10u-1206
CB42
10u-1206
CB48
10u-1206
CB45
10u-1206
CB25
10u-1206

VCCP
+
+
+

CT9
150u
CT11
150u
CT10
150u

PLACE CAPS WITHIN CPU CAVITY SOLDER

Title

M i c ro-Star

PLACE CAPS WITHIN CPU CAVITY

Rev

MS-6507

0B

Document Number

INTEL mPGA478-B CPU2

Last Revision Date:

Monday, September 03, 2001

8

Sheet

6
1

of

36

U12A
5

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HA#[3..31]

5
5
5
5
5

T4
T5
T3
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3
K4
M4
M3
L3
L5
K3
J2
M5
J3
L2
H4
N5
G2
M6
L7
V7
W3
Y7
W5

HBR#0
HBNR#
HBPRI#
HLOCK#

5
HADS#
HREQ#[0..4]

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

V3
U6
T7
R7
U5
U2
Y5
Y3
Y4

5
5
5

HIT#
HITM#
HDEFER#

5
5 HRS#[0..2]

HTRDY#

5
5

HDBSY#
HDRDY#

5
5

HADSTB#0
HADSTB#1

R5
N6

HDSTBN#0
HDSTBP#0
HDSTBN#1
HDSTBP#1
HDSTBN#2
HDSTBP#2
HDSTBN#3
HDSTBP#3

AD4
AD3
AE6
AE7
AE11
AD11
AC15
AC16

5
5
5
5
5
5
5
5
5

V5
V4

HDBI#0
HDBI#1
HDBI#2
HDBI#3

HDBI#[0..3]

4
4

U7
W2
W7
W6

HRS#0
HRS#1
HRS#2

AD5
AG4
AH9
AD15
J8
K8

MCHCLK
MCHCLK#
R98
R118

24.9

AC2
AC13

24.9
9

HL[0..10]

HL[0..10]

9
9

HL0
HL1
HL2
HL3
HL4
HL5

N25
N24

HL_STB
HL_STB#
VCCP

P25
P24
N27
P23
M26
M25

M8
U8
AA9
AB8
AB18
AB20
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23

HOST

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

BR0#
BNR#
BPRI#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
RS0#
RS1#
RS2#
DBSY#
DRDY#
HAD_STB0#
HAD_STB1#
HD_STBN0#
HD_STBP0#
HD_STBN1#
HD_STBP1#
HD_STBN2#
HD_STBP2#
HD_STBN3#
HD_STBP3#

66IN
RSTIN#
CPURST#

DBI0#
DBI1#
DBI2#
DBI3#

H_VREF0
H_VREF1
H_VREF2
H_VREF3
H_VREF4

BCLK
BCLK#
H_RCOMP0
H_RCOMP1
HI0
HI1
HI2
HI3
HI4
HI5

H_SWNG0
H_SWNG1

HUB LINK

HI6
HI7
HI8
HI9
HI10
HI_REF

HI_STB
HI_STB#
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
INT-82845

U12C

HL_RCOMP

POWER

VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD7
RSVD8
RSVD9
NC0
NC1

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AD7
AC7
AC6
AC3
AC8
AE2
AG5
AG2
AE8
AF6
AH2
AF3
AG3
AE5
AH7
AH3
AF4
AG8
AG7
AG6
AF8
AH5
AC11
AC12
AE9
AC9
AE10
AD9
AG9
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]

MCH_66
PCIRST#1
CPURST#
HVREF

AA7
AD13

HSWNG

P27
L25
L29
M22
N23
N26
G9
G10
H6
J25
J23
G16
G17
H7
H27
K23
K25

HL6
HL7
HL8
HL9
HL10

4
4,11,15,25
5

VTT_GND1
VTT_GND2

HL[0..10]

HUB_MREF
R172

40.2

VCC1_8

VCC1_8

AD26
AD27

R22
R29
U22
U26
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
T13
T17
A5
A9
A13
A17
A21
A25
C1
C29
D7
D11
D15
D19
D23
D25
F6
F10
F14
F18
F22
G1
G4
G29
H8
H10
H12
H14
H16
H18
H20
H22
H24
J5
J7
K6
K22
K24
K26
L23

V_DIMM

M7
R8
Y8
AB11
AB17

P26

VCC_AGP

VTT1
VTT2

P22
J27
AE17

L28
L27
M27
N28
M24

U13
U17
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ3
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ27

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

POWER

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

INT-82845

A3
A7
A11
A15
A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J26
J29
K5
K7
K27
L1
L4
L6
L8
L22
L24
L26
M23
N1
N4
N8
N13
N15
N17
N22
N29
P6
P8
P14
P16
R1
R4
R13
R15
R17
R26
T6
T8
T14
T16
T22
U1
U4
U15
U29
V6
V8
V22
W1
W4
W8
W26
Y6
Y22
AA1
AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10

MCH REFERENCE BLOCK

VTT1

L5

VTT_GND1

CB107
0.1u

C99
22u-1206

CB108
0.1u

C101
10u-1206

4.7u_1206

VTT2

L4

VTT_GND2

4.7u_1206

VCC_AGP

C98
22u-1206

VCCP

R130
301
HSWNG
C68
0.1u

C90
0.01u

C87
0.01u

R122
150

Place 1 Cap. as Close as possible to

every pin of MCH
Trace width use 15 mils and 15mils space
VCCP

R100
49.9
HVREF
C93
0.01u

C70
0.01u

C69
0.01u

C88
0.01u

C71
0.01u

R99

C72
0.1u

100

Place 1 Cap. as Close as possible to

every pin of MCH
Trace width use 15 mils and 15mils space
VCC1_8
R178
150
HUB_MREF
C106
0.01u

C107
0.1u

C108
0.1u

R176
150

Place 0.01uF Cap. as Close as possible to MCH

Trace width use 15 mils and 15mils space

MCH Trace Decoupling Capacitors

VCCP

VCCP

VCC1_8

CB24
X_0.1u
CB12
X_0.1u
CB46
X_0.1u

CB3
X_0.1u
CB73
X_0.1u
CB60
X_0.1u
CB69
X_0.1u

ADDRESS

CB148
0.1u
CB85
0.1u

MCH & ICH2

DATA
A

Title

Rev

M i c ro-Star

MS-6507

0B

Document Number

Brookdale MCH1
Last Revision Date:
Sheet

Wednesday, August 29, 2001

5

VCC_AGP

C102
10u-1206

of

36

1" trace

U12B
26

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

MD[0..63]

G3
H3

1" Trace

17

GAD[0..31]

17 GC_BE#[0..3]

G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E5
C3
D3
F4
F3
B2
C2
E2
G5

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
AA28
AB25
AB27
AA27
AB26
Y23
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24

GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3

V25
V23
Y25
AA23

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63

DDR

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SCS#0
SCS#1
SCS#2
SCS#3
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCKE0
SCKE1
SCKE2
SCKE3
SRAS#
SCAS#
SWE#
SBS0
SBS1
SM_RCOMP

RCVENIN#
RCVENOUT#
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

close MCH

SD_REF0
SD_REF1

AGP

G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR

Tri-Stated
during
RSTIN#
assertion

G_REQ#
G_GNT#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
ST0
ST1
ST2
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#

G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#

AGPREF
G_RCOMP
TESTIN#

E12
F17
E16
G18
G19
E18
F19
G21
G20
F21
F13
E20
G22

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12

E9
F7
F9
E7

DDRCS#0
DDRCS#1
DDRCS#2
DDRCS#3

C16
D16
B15
C14
B17
C17
C15
D14

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

5/23 update

DDRMAA[0..12] 16,26,27

DDR_VTT

MCH REFERENCE VOLTAGE

R500
30

DIMMREF

MRCOMP
D

SM_REF
C500
0.1u

DDRCS#[0..3]

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

E14
F15
J24
G25
G6
G7
G15
G14
E24
G24
H5
F5

DCLK0
DCLK#0
DCLK1
DCLK#1
DCLK2
DCLK#2
DCLK3
DCLK#3
DCLK4
DCLK#4
DCLK5
DCLK#5

G23
E22
H23
F23

DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3

F11
G8
G11

RASA#
CASA#
WEA#

J28

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

CB[0..7]

RN538

26

DCLK#1
DCLK1
DCLK#4
DCLK4

DCLK#1
DCLK1
DCLK#4
DCLK4

DCLK#1
DCLK1
DCLK#4
DCLK4

16,26
16,26
16,26
16,26

RN539
1
3
5
7

2
4
6
8

DCLK3
DCLK#3
DCLK0
DCLK#0

DCLK3
DCLK#3
DCLK0
DCLK#0

16,26
16,26
16,26
16,26

2
4
6
8

DCLK2
DCLK#2
DCLK#5
DCLK5

DCLK2
DCLK#2
DCLK#5
DCLK5

16,26
16,26
16,26
16,26

1
3
5
7
X_0

DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
RASA#
CASA#
WEA#

16,27
16,27
16,27
16,27

MCH DECOUPLING CAPACITOR

26
26
26

DDRBS0
DDRBS1

16,26,27
16,26,27
VCCP

SM_REF

GFRAME#
GIRDY#
GTRDY#
GDEVSEL#
GSTOP#
GPAR

17
17
17
17
17
17

GREQ#
GGNT#

17
17

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

SBA[0..7]

VCC1_8
CB93
1u
CB98
0.1u
CB94
0.1u
CB97
0.1u
CB100
0.01u
CB96
10u-1206
CB90
10u-1206

17

VCC_AGP
CB117
1u
CB116
0.1u

V_DIMM
CB114
0.1u
CB115
0.1u
CB126
0.1u
CB118
0.1u
CB106
0.1u

CB89
0.1u
CB76
0.1u
CB101
0.1u
CB86
0.1u
CB78
0.1u
CB84
0.1u
CB81
0.1u

VCC5

V_DIMM

SB_STB
SB_STB#
ST0
ST1
ST2

AF22
AE22
AE23
X_0.1u
40.2
X_4.7K

GAD_STB0
GAD_STB#0
GAD_STB1
GAD_STB#1

17
17
17
17

PIPE#
RBF#
WBF#

17
17
17

AGPREF

C105
C104

0.1u
1u

AGPREF

0.1u

17
17

BACK

ST[0..2]

R24
R23
AC27
AC28

VCC5
C21

C211 0.1u
C208 0.1u
C8
0.1u

17

VCCP

V_DIMM
CB219
X_0.1u

CB225
X_0.1u
CB221
X_0.1u

VCC_AGP
CB222
X_0.1u
CB220
X_0.1u
CB227
X_0.1u
CB223
X_0.1u
CB226
X_0.1u

17

VCC1_8

INT-82845

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Brookdale MCH 2
Last Revision Date:
Sheet

Wednesday, August 29, 2001

5

EMI

AF27
AF26

R165
R168

8
6
4
2
X_0

DCLK3
DCLK#3
DCLK0
DCLK#0

MRCOMP

CB224

7
5
3
1

RN540

AG24
AH25

AA21
AD25
H26

CB[0..7]
26
26
26
26
26
26
26
26
26

DCLK2
DCLK#2
DCLK#5
DCLK5

Y24
W27
W24
W28
W23
W25

AG25
AF24
AG26

16,26,27

X_0

DDRBS0
DDRBS1

J9
J21

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

DDRCS#[0..3]

C97
0.1u

MCH MEMORY CLOCK RC CIRCUITS

F26
C26
C23
B19
D12
C8
C5
E3
E15

G12
G13

C95
0.1u

of

36

ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS

C_BE#0
C_BE#1
C_BE#2
C_BE#3

18,25 C_BE#[0..3]

AA3
AB6
Y8
AA9
AB7
V3
W8
V4
W1
W2
AA7
W7
Y7
Y15

18,25 DEVSEL#
18,25
FRAME#
18,25
IRDY#
18,25
TRDY#
18,25
STOP#
18,25
PAR
18
PLOCK#
18,25
SERR#
18,25
PERR#
17,18,25
PME#
REQA#
GNTA#

M3
L2

ICH_PCLK

W11

PCIRST#

AA15
F4
G4
H3
H4
J1
K4
K3
J4
J3

12
E_EECS
12 CNR_EEDIN
12 CNR_EEDOUT
12 CNR_SHCLK

V14
V15
V16
H5
J5

A22
B21
B22
D3
C1
D1
E1
E2
E3
E4
J2
GND68
GND69
GND70
GND71
NC5
NC6
NC8
NC9
NC10
NC11
NC17

E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8

VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8

D10
D2
E5
K19
L19
P5
V9

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
W10
T4
Y10
T3
AA10

VCC1_8SB

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
HLCOMP
HUBREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#

CBE#0
CBE#1
CBE#2
CBE#3

IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GPIO1/REQB#/REQ5#

GPIO0/REQA#
GPIO16/GNTA#

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GPIO17/GNTB#/GNT5#

PCICLK
PCIRST#
NC12
NC13
NC14
NC15
NC16
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK

A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE

LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GND67
GND66
82801BA-VB11

A1
A2 GND1
A10 GND2
B1 GND3
B2 GND4
B3 GND5
B9 GND6
B10 GND7
C2 GND8
C3 GND9
C4 GND10
C9 GND11
D5 GND12
D6 GND13
D7 GND14
D8 GND15
D9 GND16
E6 GND17
E7 GND18
E8 GND19
E9 GND20
J9 GND21
J10 GND22
J11 GND23
J12 GND24
J13 GND25
J14 GND26
K9 GND27
K10 GND28
K11 GND29
K12 GND30
K13 GND31
K14 GND32
K1 GND33
AA1 GND58
AA2 GND59
AA21GND60
AA22GND61
AB1 GND62
AB2 GND63
AB21GND64
GND65

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

AD[0..31]

VCC3

VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8

U17A
18,25

ICH2 SMI# SIGNAL

VCC1_8

D11
A12
R22
A11
C12
C11
B11
B12
C10
B13
C13

A20M#

A4
B5
A5
B6
B7
A8
B8
A9
C8
C6
C7
C5
A6
A7
A3

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10

B4

HUB_IREF

SMI#

A20M#
SLP#
FERR#
IGNNE#
HINIT#
INTR
NMI

5
5
5
5
5,15
5
5

KB_RST#
A20GATE#

STPCLK#
KB_RST#
A20GATE#

5
11
11

FERR#

HL[0..10]

SMI#

R218
C143

33
100p

HSMI#

This resistor less than 0.5"

from ICH use 15 mils trace

R221

40.2

P1
P2
P3
N4

HL_STB
HL_STB#
VCC1_8

7
7

INTA#
INTB#
INTC#
INTD#

17,18
17,18
18
18

IRQ14
IRQ15

4
4

SERIRQ

11,18

ICH2 STRAPPING RESISTORS

F21
C16
N20
P22
N19
N21

APIC_CLK
APIC_D0
APIC_D1
SERIRQ

R2
R3
T1
AB10
P4
L3

PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5

PREQ#[0..5]

M2
M1
R4
T2
R1
L4

PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5

PGNT#[0..5]

G3
H2
G2
G1
H1
F3
F2
F1
A21
AB22

FERR#

R279

62

SERIRQ

R256

8.2K

KB_RST#
A20GATE#

R219
R220

10K
10K

VCC3

REQA#
GNTA#

R284
R272

2.7K
X_2.7K

VCC5
VCC3

VCCP

VCC3

18,25

5/23 update
APIC_D0
APIC_D1
APIC_CLK

ELAN_CLK
ELAN_SYNC
ELAN_RXD0
ELAN_RXD1
ELAN_RXD2
ELAN_TXD0
ELAN_TXD1
ELAN_TXD2

12
12
12
12
12
12
12
12

R578
R579
R637

10K
10K
10K

18,25

ICH2 REFERENCE VOLTAGE

VCC1_8
R223
150
HUB_IREF
C142
0.01u

C141
0.1u

C140
0.1u

R222
150

ICH2 DECOUPLING CAPACITORS

VCC3

CB171
0.1u

VCC1_8

CB184
0.1u

CB146
0.1u

CB170
0.1u

CB167
0.1u

CB141
0.01u

CB142
0.01u

CB134
0.1u

Place Cap. as Close as possible to ICH2

Trace width use 15 mils and 15mils space

VCC1_8SB

CB140
0.1u

CB158
0.1u

CB157
0.1u

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Place one 0.1U/0.01U pair in each corner and

2 on opposite sides close to ICH2 if it fit

Distribute near the 1.8V

power pin of the ICH2

Distribute near the VCC1_8SB

Power pin of the ICH2

Brookdale ICH2 PCI

Last Revision Date:

Tuesday, July 24, 2001

Sheet

of

36

VCC5_SB

ICH2 ASIC / RTC / AC'97 / GPIO / LPC / USB / IDE SIGNALS

RTC BLOCK
R331
1.5K

VCC3

VCC5
D19
1N4148-S-LL34

D14

11

RING#
RSMRST#

SUSCLK

4,11,12,16 SMBDATA
4,11,12,16 SMBCLK
18
18

SM_LNK0
SM_LNK1

4
4
4

21

INTRUDER#
RTCRST#

T20

VBIAS

T21

RTCX1

U22

RTCX2

T22
D4
M19
P20

ICH_66
ICH_14
ICH_48

12
12,13
12,13
12,13,15
12,13,15
12,15
19
19
11

AA16
AB16
AB17
U19
V20
T19

SMB_ALERT

AC_RST#
AC_SYNC
AC_BCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR

R261

EXTSMI#
SIO_PME#
6CH_CTRL

15

11,15
11,15
11,15
11,15
11

V22
P19
R19
P21
Y22
W22
N22

33

W14
AB15
L1
B14
A14
AB14
AA14

SIO_PME#
6CH_CTRL
GP23

GP23

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3

R327

X_10K

LDRQ#

11,15 LFRAME#/FWH4
20
20
20
20
20
20
12,20
12,20

W17
Y18
AB19
AA19
W18
Y19
AB20
AA20
W19
Y20
Y21
W20

USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3-

20

OC#0

12,20

OC#1

Y12
W12
AB13
AB12
AA12
Y13
W13
AB11

K2
M20

V19

D12
D13

T18
U18
F5
G5
V17
V18

CB161
0.1u

PDCS1#
SDCS1#
PDCS3#
SDCS3#
PDA0
PDA1
PDA2
SDA0
SDA1
SDA2
PDDREQ
SDDREQ
PDDACK#
SDDACK#
PDIOR#
SDIOR#
PDIOW#
SDIOW#
PIORDY
SIORDY

SMBDATA
SMBCLK
GPIO11/SMBALERT#
SMLINK0
SMLINK1
INTRUDER#
RTCRST#
VBIAS

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

RTCX1
RTCX2
CLK66
CLK14
CLK48
AC_RST#
AC_SYNC
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR
GPIO12
GPIO13
GPIO21
GPIO22
GPIO23
GPIO27
GPIO28

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
FS0
LDRQ0#
LDRQ1#
LFRAME#/FWH4
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3OC0#
OC1#
OC2#
OC3#

TP0
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
GPIO6
GPIO7
GPIO8
GPIO18
GPIO19
GPIO20
GPIO24
GPIO25
82801BA-VB11

ICH2 DECOUPLING CAPACITOR

R411

PD_CS#1
SD_CS#1
PD_CS#3
SD_CS#3
PD_A0
PD_A1
PD_A2
SD_A0
SD_A1
SD_A2

4
4
4
4
4
4

G22
B18
F22
B17
G19
D17
G21
C17
G20
A17

PD_DREQ
SD_DREQ
PD_DACK#
SD_DACK#
PD_IOR#
SD_IOR#
PD_IOW#
SD_IOW#
PD_IORDY
SD_IORDY

4
4
4
4
4
4
4
4
4
4

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

U20
N3
N2
N1
M4
Y11
AA11
Y14
A15
D14
C14
V21
W15

BATLOW#

GP6
GP7

PDD[0..15]

390K

1
2
3

1N5817-S-DO-241AC

4
4
4
4

F20
F19
E22
A16
D16
B16

H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20

R567
1K

D20

CB156
0.1u

E21
C15
E19
D15

JBAT1 Clear CMOS

1-2
Normal *
2-3
Clear CMOS

RTC_VCC

R340
4.7K

1N5817-S-DO-241AC

VCC5REF1
VCC5REF2

VRM_GD

VCC5REF_SUS

PWR_GD

THRM#
SLP_S3#
SLP_S5
PWROK
CPUPWRGD
VRMPWRGD
PWRBTN#
RI#
RSMRST#
RSM_PWROK
SUSSTAT#
SUSCLK

VCPU_IO1
VCPU_IO2

THRM#
SLP_S3#
SLP_S5#
PWR_GD
CPU_GD
VRM_GD
PWRBTN#
RING#
RSMRST#

VCCP VCC5_SB

L9
L10 GND34
L11 GND35
L12 GND36
L13 GND37
L14 GND38
M9 GND39
M10 GND40
M11 GND41
M12 GND42
M13 GND43
M14 GND44
N9 GND45
N10 GND46
N11 GND47
N12 GND48
N13 GND49
N14 GND50
P9 GND51
P10 GND52
P11 GND53
P12 GND54
P13 GND55
P14 GND56
GND57

11
11,22
22
19
5
23
11,15
24
11

AA13
W16
AB18
R20
A13
B15
W21
AA17
R21
Y16
Y17
AA18

VCC3_SB

VCC3SUS1
VCC3SUS2
VCC3SUS4
VCC3SUS5
VCC3SUS6
VCC3SUS7

U17B
THRM#

VCCRTC

U21

RTC_VCC

R257
1K

VBAT

D21

R568

C167

1K
1N5817-S-DO-241AC

C215
0.047u

JBAT1
D1x3-BK

R410
1K

0.047u
RTCRST#
VBIAS
R277
20M

RTCX1
R317

10M

R293

10M

RTCX2

X2
BAT1
{MSI-BOM}

R274
5.6M

32K-12.5pf-CSA-309-D
C174
15p

C170
15p

+-30PPM
32pF

PROCHOT BLOCK
THRM#

R211

VCCP

5
SDD[0..15]

4.7K

Q32
NPN-3904LT1-S-SOT23

PROCHOT#

ICH2 STRAPPING RESISTORS

RN28
4.7K
PD_IORDY
SD_IORDY

R133
R224

4.7K
4.7K

PD_DREQ
SD_DREQ

R97
R225

5.6K
5.6K

VCC3

SM_LNK0
SM_LNK1
BATLOW#

1
3
5
7

SMB_ALERT
SLP_S3#

1
3
5
7

2
4
6
8

VCC3_SB

2
4
6
8

VCC3_SB

RN32
10K
INTE#
INTF#
INTG#
INTH#

18
18,25
18
18

INTRUDER#

R280

10K

RSMRST#

R365

10K

LAN_WAKE

24

SPKR

R260

X_10K

PWR_GD

R273

8.2K

RTC_VCC

5/21 update

RN31
4.7K

GP23

1
3
5
7

GP6
GP7
THRM#

R345

10K

VRM_GD

R216

10K

SIO_PME#

R377

4.7K

RING#

R367

8.2K

RSMRST#

R366

1K

PWRBTN#

R329

10K

2
4
6
8

VCC3

VCC3
VCC3
VCC3_SB

EXTSMI#

R574

4.7K

VCC3_SB

VCC3_SB
VCCP

VCC5_SB

RTC_VCC

VCC5

VCC5_SB

Title

Rev

M i c ro-Star
CB193
0.1u

CB143
0.1u

CB147
0.1u

CB181
0.1u

CB169
0.01u

CB179
0.1u

CB180
0.1u

MS-6507

0B

Document Number

Brookdale ICH2 Other

Last Revision Date:

Distribute near the VCC3_SB power pin of the ICH

Wednesday, August 29, 2001

Sheet

10

of

36

H a rdware Monitor

LPC SUPER I/O W83627HF

THERMAL RESISTOR BLOCK

SPEAKER BLOCK
VCC5

U13

20
CPU_TMP
CPU_TMPA
R158
0
5
VTIN_GND

VCC3

TMP_VREF
CPU_TMP
SYS_TMP
VTIN_GND
-5VIN
-12VIN
+12VIN
VTIN_VCC
R143 10K
10K
R153

VCCP
5,23

VID4
VID3
VID2
VID1
VID0

VID[0..4]

20
20
20
20

CPU_CTRL
CPU_FAN
SYS_CTRL
SYS_FAN

10

THRM#

101
102
103
104
93
94
95
96
97
98
99
100
106
107
108
109
110
116
113
115
112
111

VCC5
R702

X_0
10

20
CPUFAN
4,10,12,16 SMBDATA
4,10,12,16 SMBCLK
20
SYSFAN
VCC5

R630
R631
R632
R633

R703

X_0
0
0
X_0

X_0

SIO_PME#

BEEP
CHASISS

105
118
76
19

DLED2

89
91
92

10,15 PWRBTN#
19
PWRBTIN#
19
SUS_LED
19
PWR_LED
19
PSON#
10,22
SLP_S3#
4
SIO_48

67
68
64
90
72
73
18

21

VBAT

61
74

VCC3

28

VCC5_SB

VCC5

12
48
77
114

GPX2/P15/GP14
GPY1/GP15
GPSA1/P12/GP10
GPSA2/GP17
GPX1/P14/GP12
GPY2/P16/GP14
GPSB1/P13/GP11
GPSB2/GP16
MSO/IRQIN0
MSI/GP20
VREF
VTIN3
VTIN2
VTIN1
AGND
-5VIN
-12VIN
+12VIN
AVCC
+3.3VIN
VCOREB
VCOREA

SIO

VID4
VID3
VID2
VID1
VID0

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#

IRRX/GP25
CIRRX/GP34
IRTX/GP26
SUSCLKIN
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#

FANPWM1
FANIO1
FANPWM2
FANIO2
FANIO3
OVT#
BEEP
CASEOPEN#
PME#

DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#

WDTO/GP24
SDA/GP22
SCL/GP21
PSOUT#
PSIN#
SUSLED/GP35
PLED/GP23
PWRCTL#/GP31
SUSCIN/GP30
CLKIN

GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#

VSB
VBAT

RSMRST#/GP33
PWROK/GP32

VCC3
VCC_1
VCC_2
VCC_3
VCC_4
{1ST PART FIELD}
WB-W83627HF-AW-VG

VSS1
VSS2
VSS3
VSS4

42
41
40
39
38
37
36
35
31
32
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85

2
4
6
8
8
RN6
6
33
4
2
7
PE
ACK# 5
RN11
33
3
ACK#
PE
1
SLIN# INIT# 1
INIT#
SLIN# 3
33
5
RN12 7
R142
33
RN5
33

1
3
5
7
7
5
3
1

LP_D0
LP_D1
LP_D2
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7
8
6
4
2
2
4
6
8

120

CB102

0.1u

VCC5
VTIN_GND

TMP_VREF

R162
10K

120

R166
10K
SYS_TMP

RT1
X_10K
VTIN_GND

RT2
10K

DLED3

VTIN_GND

NOTE: LOCATE CLOSE

STATUS PANEL

R163

30K

CPU_TMPA

24

SUPER I/O STRAPPING RESISTOR

CHASISS INTRUSION HEADER
VCC3_SB

VCC5

VBAT

21

VCC5
SUSCLK

RTSA#
SOUTA

SOUTB

R146

X_0 RSMRST#

R148

20
55
86
117

19

4.7K
Q28
NPN-3904LT1-S-SOT23

IRRX
IRTX

ALARM

R164

TMP_VREF

R157
10K
CPU_TMP

TMP_VREF
LP_D[0..7]
LP_SLCT
24
LP_ACK#
24
LP_BUSY
24
LP_PE
24
LP_INIT#
24
LP_SLIN#
24
LP_ERR#
24
LP_AFD#
24
LP_STB#
24

FB12

BEEP

NOTE: LOCATE INSIDE

SOCKET478

59
60
63
62
66
65
58
70
71

FB13

10

DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#

24
24
24
24
24
24
24
24

DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#

24
24
24
24
24
24
24
24

A20GATE#
KB_RST#
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#

9
9 5/22
24
24
24
24
19

RSMRST#
DLED1
DLED4

10
21
21

VCC5

R152
2M

R214

10K

PWRBTN#

R169

4.7K

SOUTA

R151

4.7K

SOUTB

R175

X_4.7K RTSA#

J5
CHASISS

1
2
D1x2

update

SOUTA
SOUTB
RTSA#
DTRA#

+12V

R145 1

2 28K

+12VIN

-12V

R150 1

2 232K

-12VIN

-5V

R160 1

2 120K

-5VIN

L: Disable KBC
L: 24MHZ
L: CFAD=2E
L: PNP Default

H: Enable KBC
H: 48MHZ
H: CFAD=4E
H: PNP no Default

125
123
128
121
126
124
127
122
120
119

VTIN_VCC

24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24

R161
56K

R144
10K
VTIN_GND

R149
56K
2

CPU_TMPA

JYS_AX2
JYS_AX1
JYS_PB0
JYS_PB1
JYS_AX0
JYS_AX3
JYS_PB3
JYS_PB2
MID_OUT
MID_IN

LAD0
LAD1
LAD2
LAD3

DRVDEN0
DRVDEN1
INDEX#
MOT_A#
DRV_B#
DRV_A#
MOT_B#
DIR#
STEP#
WT_DT#
WT_EN#
TRACK0#
WP#
RDATA#
HEAD#
DSKCHG#

27
26
25
24

1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17

14
14
14
14
14
14
14
14
14
14

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3

DRVDEN0
DRVDEN1
INDEX#
MOA#
DSB#
DSA#
MOB#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#

10,15
10,15
10,15
10,15

LRESET#
LCLK
SERIRQ
LDRQ#
LFRAME#

30
21
23
22
29

4,7,15,25 PCIRST#1
4
SIO_PCLK
9,18
SERIRQ
10
LDRQ#
10,15 LFRAME#/FWH4

TMP_VREF

DECOUPLING CAPACITOR
RESUME RESET CIRCUIT BLOCK

VCC3

IR HEADER

S t u f f a ll for D Version bug

VCC5
CB133
0.1u
CB119
0.1u

RSMRST#
IR1

5/21 update
VCC3_SB

R408

22K

U20A
74LCX14MX-SOIC14
1
2
R396

4.7K

19

IRRX

VCC5
IRRX

19
Q44
NPN-3904LT1-S-SOT23

IRTX

IRTX

1
3
4
5

CB111
0.1u

3
4
5
D1x5-1:4-BK

Title
VBAT

C206
1u

VCC5_SB
CB121
0.1u
CB103
0.1u
CB11
0.1u
CB120
0.1u

VCCP
CB104
0.1u

Rev

M i c ro-Star

(VCC3_SB)
C100
0.1u

MS-6507

0B

Document Number

LPC I/O W83627HF

Last Revision Date:

Wednesday, August 29, 2001

Sheet

11

of

36

VCC3

R747
330
13

DN#
R743

PRI_RST#

14
5
6
U21C
7
7407-SOIC14

AC_RST#

JP2

X_0

VCC5_SB

R746

4.7K

Q708
NPN-3904LT1-S-SOT23

R744
10K

1
2
3
D1x3-BK
VCC3
R745

4.7K

R724
C_EEDOUT
10K
+12V
VCC5_SB

RLAN_TXD1
RLAN_SYNC
RLAN_RXD2
RLAN_RXD0

10,20 OC#1
VCC3

B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30

C_EEDIN
C_SHCLK
VCC3
4,10,11,16 SMBCLK

R721
10K

DN#

10,13 AC_SYNC
10,13,15 AC_SDOUT
10,13 AC_BCLK
C705
10p

CNR1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19

-12V

RESV1
RESV2
RESV3
GND1
RESV4
RESV5
GND2
LAN_TXD1
LAN_RSTSYNC
GND3
LAN_RXD2
LAN_RXD0
GND4
RESV6
+5VDUAL
USB_OC#
GND5
-12V
+3.3VD
GND6
EE_DOUT
EE_SHCLK
GND7
SMB_A0
SMB_SCL
PRIMARY_DN#
GND8
AC97_SYNC
AC97_SDATA_OUT
AC97_BITCLK
CNR-D60

C706
100p

RESV7
RESV8
GND9
RESV9
RESV10
GND10
LAN_TXD2
LAN_TXD0
GND11
LAN_CLK
LAN_RXD1
RESV11
USB+
GND12
USB+12V
GND13
+3.3VDUAL
+5VD
GND14
EE_DIN
EE_CS
SMB_A1
SMB_A2
SMB_SDA
AC97_RESET#
RESV12
AC97_SDATA_IN1
AC97_SDATA_IN0
GND15

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30

VCC3_SB

RLAN_TXD2
RLAN_TXD0

VCC3_SB

RLAN_CLK
RLAN_RXD1
10,20

USBP3-

10,20

RN702 22
2
4
6
8

C_SHCLK
RLAN_RXD2
RLAN_SYNC
RLAN_RXD1

ELAN_RXD0
ELAN_TXD2
ELAN_CLK
ELAN_TXD0

1
3
5
7

RN700 22
2
4
6
8

RLAN_RXD0
RLAN_TXD2
RLAN_CLK
RLAN_TXD0

9
ELAN_TXD1
9 CNR_EEDOUT
9
CNR_EEDIN

1
3
5
7

9
9
9
9

C703
0.1u
USBP3+

1
3
5
7

9
9
9
9

CNR_SHCLK
ELAN_RXD2
ELAN_SYNC
ELAN_RXD1

RN701

0
2
4
6
8

RLAN_TXD1
C_EEDOUT
C_EEDIN

VCC5

C_EEDOUT
E_EECS

SMBDATA
AC_RST#

4,10,11,16
10

AC_SDIN1
AC_SDIN0

10,15
10,13,15

VCC3
AC_RST#

R723
10K

R722
10K

ADDRESS AE

C704
100p

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

CNR RISER
Last Revision Date:

Thursday, August 09, 2001

8

Sheet

12
1

of

36

AUDIO CODE CRYSTAL CIRCUIT

AD1885 AC97 CODEC

R391
R752 1

+5VR

2 X_4.7K

XTALOUT

SROUT_R
SROUT_L

X_10

SROUT_R
SROUT_L

X3

14

X_10
4.7K

MONO_OUT

23
24

21
22

18
19
20

16
17

14
15

13

VREF_OUT

CB194
0.1u
CODEC-AAD1885

1
2

0.1u

+ CT42

X_10u

C200 + CT700 C204

X_10u
0.047u

VDD3

1u
X_1u-0805

10u

120

C201

1
+ CT701 C195

X_10u
270p

C190
2

+ CT40

270p

26
25
+5VR

C193 C194

X_0.22u
27

FB29

0.1u

28

PRI_RST#

C202
1
2

C198
1
2

PHONE

AVSS1
AVDD1

30
29

NC
VREF

PC_BEEP

DECOUPLING CAPACITOR

32
31

38
37

DACOUTR
TEST2
DACOUTL

AFILT2
AFILT1

14
14

34
33

12

C197
X_10p

41
40
39

10,12 AC_SYNC

VRDA
VRAD

SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#

LINE_ROUT
LINE_LOUT

10,12,15 AC_SDIN0

NC
NC

36
35

5
6
7
8
9
10
11

33

LOUTR
LOUTL

LINL
LINR

R390

DVDD1
XTL_IN
XTL_OUT
DVSS1

MIC1
MIC2

10,12,15 AC_SDOUT
10,12 AC_BCLK

VDD3 1
2
3
4

CDL
CDGND
CDR

VCC3

VIDEOL
VIDEOR

FB22
XTALIN
XTALOUT

22p

0.1u

U22

AVDD2
MONO

X_COPPER

NC
NC
TEST6
TEST5
TEST4
TEST1
AVSS2

CP6

0.1u

48
47
46
45
44
43
42

C205

AUXL
AUXR

J700
X_D1x3-BK

C192

CB204
22p

1
2
3

X_120

CB202

1u
2

X_0.1u
MONO_PHONE
AUXLX

14,21

AUXRX

C184

LIN_IN_R

LIN_IN_R

21

LIN_IN_L

LIN_IN_L

21

1u
CDLX

C185
1u

CDGNDX

LINE_R

LINE_R

J3-3
19
18
17
16
28

C126
1000p

14,21

AUDIO CODE REGULATORS

LINE_L

LINE_L

GAME+PHONE-D15-BK

CDRX
C127
1000p
J3-2
MIC_PWR

220p

VREF_OUT
MIC_PWR

MIC_IN

C181 0
X_0.01u

14

MIC_IN

MIC_IN

GAME+PHONE-D15-BK
+5VR

R271 1

-12VR
FB27

2 X_4.7K

R342
1

R751 1

+5VR

-12V

27
26
25
24
29

2 4.7K
C125
1000p

X_600
CP7

CB195
0.1u
X_COPPER

C186
1
2

R253
X_2.2K
C707
1000p

AUXL

4
3
2
1

+12VR

+12V
600
FB31

AUX_IN1

14

R420
10K

R430
10K

R355
CDRX

C187 1

2 1u-0805

CDR1

2 0

CDR

2 0

CDGND

2 0

CDL

4
3
2
1

R356
CDGNDX C188 1

2 1u-0805

CDGND1

CDLX

2 1u-0805

CDL1

CB206
0.1u

AUX IN
2

CDR

MONO_PHONE

C219 1

2 1u-0805

MONO_OUT

C218 1

2 1u-0805

CD_IN1
CD-D1x4-BK-SBTJ

1
2
3
4

AUX-D1x4-YL

U24
YLT1087S-SOT89-0.8A
2
VIN
VOUT

C232
1u

R412

1u

MDM_IN1
MON-D1x4-GN

R402
300

CD IN

MODEM IN

C212

100

SOT223

R359

Title
R357

R354

10K

X_10K

10K

Rev

M i c ro-Star

R358
2

C189 1

+5VR

AUXR

2 1u-0805

2 1u-0805

C221 1

ADJ

C220 1

AUXLX

AUXRX

AUXRX

14

AUDIO CODE CD / AUX / MODEM IN HEADERS

12

C191

24M-16pf-HC49S-D

+5VR
1

R441
R397

SPDIFO

4.7K
2

+5VR

SPDIFO

XTALIN

10M

21
21

+5VR
R750

14

R401

MS-6507

0B

Document Number

AC97 CODEC AD1885

Last Revision Date:
CDL

14

Wednesday, August 29, 2001

Sheet

13

of

36

-12VR
C210 1

SPEAKER OUT CIRCUIT

X_1u-0805

R414
1

SPEAKER OUT JACK

2 X_0

33

SPEAKER_R

X_47K
C217
1
2

+12VR

SROUT_R
SROUT_L

SROUT_R
SROUT_L

X_33p

21
21

SPDIFO

-12VR

LINE_NEXT_R 1
FSPKR
FSPKL
LINE_NEXT_L 1

10u

FB15 300_0805
2
2
FB14
300_0805

13

J3-4
23
22
21
20
30

C130

C229
4
+

R403
LINE_LOUT

C717

LOUTL
X_1u-0805

R424

C131
1000p

1000p

GAME+PHONE-D15-BK
C129
1000p

X_0
SPEAKER_L

33

13

U25B
X_TI-TL072CDR-SOIC8
7
R398

1000p

10u
5

C128

C230

C226
1000p

R413
1

X_47K

LOUTR
X_1u-0805

R428

C716

LINE_ROUT

AUXRX

13

13

C M I 8 7 3 8 SPDIF AUTO DETECT

U25A
X_TI-TL072CDR-SOIC8
1
R439

X_47K

C227
1000p

C234
1
2

R435
1

X_1u-0805
X_47K
C231
1
2

+12VR

FOR MSI INTERNAL HEADER

X_33p

SPEAKER_R
SPEAKER_L

1 R706
2
1 R707 0 2
0

LINE_NEXT_R
LINE_NEXT_L

CD PANEL PLAY WITHOUT PC POWER_ON

Q53

Q51

X_2N7002-S-SOT23
X_2N7002-S-SOT23
13

CDR

R400

JAUDIO1
SPEAKER_R

1
+5VR

R734 1

2 X_2.2K

X_1K

3
5

VCC5

7
R405

VCC5_SB

A5VSB

R431
X_4.7K

X_1K_0805

13

Q54
X_2N7002-S-SOT23

MIC_IN
MIC_IN
SPEAKER_R

13
15

SPEAKER_L

11

17
R418

13

CDL

SPEAKER_L

13,21

LINE_R

LINE_R

19

MIC

AUD_GND

MIC_BIAS

AUD_VCC

AUD_FPOUT_R

AUD_RET_R

INTEL

HP_ON

CUT

AUD_FPOUT_L

AUD_RET_L

MIC

GNDMIC

FLINE OUTR
FLINE OUTL

LINE NEXT R

MSI

LINE NEXT L

CUT

GNDFLO
LINE-IN-R

LINE-IN-L

2
4

+5VR

8
10
12
14

LINE_NEXT_R

16

LINE_NEXT_L

18
LINE_L

20

LINE_L

13,21

X_1K
Q52

D2x10-BK

Q50

X_2N7002-S-SOT23
X_2N7002-S-SOT23
CP4
POLY SWITCH
1.1A-MF-MSMD110-S
FS3
VCC5

RN13

X_COPPER

JYS_AX0
JYS_AX1
JYS_AX2
JYS_AX3

GAME/MIDI CONNECTOR

L3
X_0_0805
CB105
0.1u

11
11

JYS_PB0
JYS_AX0

JYS_PB0
JYS_AX0

R156

2.2K

11
11

JYS_AX1
JYS_PB1

JYS_AX1
JYS_PB1

R154

2.2K

CB99
0.1u

CB95
39p
1
2
3
4
5
6
7
8

CB113
0.1u
9
10
11
12
13
14
15

7
5
3
1

CN14
JYS_AX3
JYS_AX2
JYS_AX1
JYS_AX0

8
6
4
2

1M

5/21 update
R141
R196
R139

2.2K
2.2K
2.2K

R155

2.2K

JYS_PB3
JYS_AX2
MID_OUT
JYS_AX3
JYS_PB2
MID_IN

11
11
11
11
11
11

8
6
4
2

0.01u

RN14
2.2K
JYS_PB3
JYS_AX2
MID_OUT
JYS_AX3
JYS_PB2
MID_IN

7
5
3
1

CN15

VCC5

JYS_PB1
JYS_PB2
JYS_PB3
JYS_PB0

1
3
5
7

2
4
6
8

MID_IN
MID_OUT

R159
R205

22K
22K

JYS_PB1
JYS_PB2
JYS_PB3
JYS_PB0

7
5
3
1

8
6
4
2
0.01u

L6
J3-1
GAME+PHONE-D15-BK
0_0805

Title

Rev

M i c ro-Star
C136
100p

C103
100p

MS-6507

0B

Document Number

Audio Amp TL072 & GAME

Last Revision Date:

Monday, August 06, 2001

Sheet

14

of

36

5/16 update

FWH INIT Signal Voltage Translation Block

For PB function.
VCC3

Firware Hub (FWH)

VCCP

VCC3

F_GPI3
F_GPI2
SD_DET
PD_DET
R421
4.7K

FINIT#

1
J7
X_D1x2 2
10,11 LAD0/FWH0
10,11 LAD1/FWH1
10,11 LAD2/FWH2

VPP
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND
PLCC32-SMT

VCC
CLK
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
FWH3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

R363
R364

FWH_PCLK

8.2K
8.2K

5,9

1
2
3

Q40
NPN-3904LT1-S-SOT23
R573

HINIT#

4.7K

Q41
NPN-3904LT1-S-SOT23

F_GPI3
F_GPI2

FWH RESISTORS
LAD3/FWH3

FWH DECOUPLING CAPACITORS

10,11
VCC3
CB190
0.1u

VCC5_SB
VCC5

X_3.3K

12

R738
R735
X_10

VID_GD

11

X_3.3K

CLK

R736
PWRBTN#

PWRBTN#

+12V

10,11

VCC3
C714
X_0.1u

R708
X_3.3K

IN
PG
EN
5
VCC_VID
GND OUT
X_TPPM0125-SOT23-5-150mA
C715
X_1u-0805

R50
220_0805

VCC3_SB

Q706
X_NPN-3904LT1-S-SOT23
R748

14
VCC

CLK

PR

R715
VCCP

U700A
Q

GND

CL

THERM_OFF

X_8.2K

VCC3

2
C22
X_102P

AC_SDIN1
AC_SDIN0

R51
1.05K_0603
3

Q12
2N7002-S-SOT23

R339
10K

10,12
10,12,13

R338
10K

R53
1K

R269

U4A
YLM358S-SOIC8

Q700
X_2N7002-S-SOT23

VCC_VID
THERM_OFF

X_SN74HCT74-SOIC14
1

X_1K

R716
1.5K

VCC_VID

6,23

JP3

1.2V/0.1A

CB13
10u-1206

R710
X_NPN-3904LT1-S-SOT23

+12V

AUDIO DOWN

OPEN

Q701
Q702

AC_SDOUT

VCC3

R711

VR1
CSK-2-SOT23-150mA
3
2

X_1K
R712

+12V
10,12,13 AC_SDOUT

R709

X_10K

X_3.3K

VCC5_SB

X_1K

X_SN74HCT74-SOIC14

10

X_0

1
3
2

CL

U702

U700B

14

R737

13

VCC3

VCC5_SB

SHORT

Auto mode
Disabled onboard audio codec

X_62
X_NPN-3904LT1-S-SOT23

X_1K
VCC3_SB

R48
1K
VID_GD

CB4
0.1u
D1

R49
2K

X_NPN-3904LT1-S-SOT23
6

R33
+

THERMTRIP#

THERMTRIP# 5

23

Q5
2N7002-S-SOT23

Title

4.99K
R624

R37
1K

VID_GD

X_1N4148-S-LL34

Q703

62

CB203
0.1u

THERM_OFF
VCC3

R714

CB201
0.1u

VCC_VID / VID_GOOD

R713

CB191
0.1u

10K
10K

PR

Unlocked

R434
R436

VCC

Locked

10K
10K

LFRAME#/FWH4 10,11

PD_DET
SD_DET

OPEN

R415
R416

FINIT#

J7 BIOS Update
SHORT

X_10K
X_10K

X_D1x3-BK

GND

SD_DET
PD_DET
VCC3
GP23

10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

R571
R572
J500

4
4

R361
1K

R577
330

U23
4,7,11,25 PCIRST#1

R362
8.2K

5/21 update

VCC3

VCC3

VCC3

U4B
YLM358S-SOIC8

C11
1u

X_4.7K

M i c ro-Star

Rev

MS-6507

0B

Document Number

FWH & VCCVID

Last Revision Date:

Wednesday, August 29, 2001

Sheet

15

of

36

5/22 update
V_DIMM

V_DIMM

59
52
113

DDRCS#2
DDRCS#3

157
158
71
163
97
107
119
129
149
159
169
177
140

DDRWEA#
DDRCASA#
DDRRASA#
DDRCKE2
DDRCKE3
8,26
8,26
8,26
8,26
8,26
8,26

21
111
16
17
137
138
76
75

DCLK4
DCLK#4
DCLK3
DCLK#3
DCLK5
DCLK#5

63
65
154

MDQS#0
MDQS#1
MDQS#2
MDQS#3
MDQS#4
MDQS#5
MDQS#6
MDQS#7
MDQS#8

5
14
25
36
56
67
78
86
47

SMBDATA
SMBCLK

91
92
181
182
183

V_DIMM

DIMMREF
VCC3

9
10
101
102
173
167

CS0
CS1
NC/CS2
NC/CS3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VDDID
VDDSPD
NC
NC
NC
NC
NC
NC/FETEN

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

V_DIMM

WP

2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179

DDRMD0
DDRMD1
DDRMD2
DDRMD3
DDRMD4
DDRMD5
DDRMD6
DDRMD7
DDRMD8
DDRMD9
DDRMD10
DDRMD11
DDRMD12
DDRMD13
DDRMD14
DDRMD15
DDRMD16
DDRMD17
DDRMD18
DDRMD19
DDRMD20
DDRMD21
DDRMD22
DDRMD23
DDRMD24
DDRMD25
DDRMD26
DDRMD27
DDRMD28
DDRMD29
DDRMD30
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD35
DDRMD36
DDRMD37
DDRMD38
DDRMD39
DDRMD40
DDRMD41
DDRMD42
DDRMD43
DDRMD44
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD49
DDRMD50
DDRMD51
DDRMD52
DDRMD53
DDRMD54
DDRMD55
DDRMD56
DDRMD57
DDRMD58
DDRMD59
DDRMD60
DDRMD61
DDRMD62
DDRMD63

44
45
49
51
134
135
142
144

MECCRS0
MECCRS1
MECCRS2
MECCRS3
MECCRS4
MECCRS5
MECCRS6
MECCRS7

90

WP R503

8,26,27
8,26,27

DDRBS0
DDRBS1

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12

48
43
41
130
37
32
125
29
122
27
141
118
115
103

DDRBS0
DDRBS1

59
52
113

DDRCS#0
DDRCS#1

157
158
71
163
97
107
119
129
149
159
169
177
140

8,26
8,26
8,26
8,26
8,26
8,26

DDRWEA#
DDRCASA#
DDRRASA#

63
65
154

DDRCKE0
DDRCKE1

21
111
16
17
137
138
76
75

DCLK1
DCLK#1
DCLK0
DCLK#0
DCLK2
DCLK#2
MDQS#0
MDQS#1
MDQS#2
MDQS#3
MDQS#4
MDQS#5
MDQS#6
MDQS#7
MDQS#8

4,10,11,12 SMBDATA
4,10,11,12 SMBCLK

SMBDATA
SMBCLK

5
14
25
36
56
67
78
86
47
91
92
181
182
183

DIMMREF
VCC3
PWRGD_DDR
19 PWRGD_DDR

4.7K

V_DIMM

1
82
184
9
10
101
102
173
167

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

DIMM1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

DDRMD[0..63] 26,27

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

7
38
46
70
85
108
120
148
168

BA0
BA1
BA2

3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176

PWRGD_DDR

1
82
184

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

1000u

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

BA0
BA1
BA2
CS0
CS1
NC/CS2
NC/CS3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0/DNU
CK0/DNU
CK1
CK1
CK2/DNU
CK2/DNU
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VDDID
VDDSPD
NC
NC
NC
NC
NC
NC/FETEN

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

DDRBS0
DDRBS1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

CT501

3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176

48
43
41
130
37
32
125
29
122
27
141
118
115
103

1000u

DIMM2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

CT500

7
38
46
70
85
108
120
148
168

V_DIMM

WP

2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179

DDRMD0
DDRMD1
DDRMD2
DDRMD3
DDRMD4
DDRMD5
DDRMD6
DDRMD7
DDRMD8
DDRMD9
DDRMD10
DDRMD11
DDRMD12
DDRMD13
DDRMD14
DDRMD15
DDRMD16
DDRMD17
DDRMD18
DDRMD19
DDRMD20
DDRMD21
DDRMD22
DDRMD23
DDRMD24
DDRMD25
DDRMD26
DDRMD27
DDRMD28
DDRMD29
DDRMD30
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD35
DDRMD36
DDRMD37
DDRMD38
DDRMD39
DDRMD40
DDRMD41
DDRMD42
DDRMD43
DDRMD44
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD49
DDRMD50
DDRMD51
DDRMD52
DDRMD53
DDRMD54
DDRMD55
DDRMD56
DDRMD57
DDRMD58
DDRMD59
DDRMD60
DDRMD61
DDRMD62
DDRMD63

44
45
49
51
134
135
142
144

MECCRS0
MECCRS1
MECCRS2
MECCRS3
MECCRS4
MECCRS5
MECCRS6
MECCRS7

90

WP

DIMM-D184-BK

DIMM-D184-BK

Address = A2
Address = A0

R501
A

49.9
DIMMREF
R502

C501

C502

49.9

0.1u

0.1u

DIMMREF

DDRRASA#
DDRCASA#
DDRWEA#
DDRMAA[0..12]
MD[63..0]
MDQS#[0..8]

DDRRASA#
DDRCASA#
DDRWEA#
DDRMAA[0..12]
MD[63..0]

26,27
26,27
26,27
8,26,27
8,26

MDQS#[0..8]

26,27

MECCRS0
MECCRS1
MECCRS2
MECCRS3
MECCRS4
MECCRS5
MECCRS6
MECCRS7

Title

Rev

M i c ro-Star

MS-6507

0B

Document Number
MECCRS[0..7]
p l ace near DIMM1

DDRCS#[0..4]
DDRCKE[0..3]
4

DIMM 1 & 2

MECCRS[0..7] 26,27

DDRCS#[0..4] 8,26,27
DDRCKE[0..3] 8,27

Last Revision Date:

Sheet

Wednesday, August 29, 2001

3

16

of

36

AGP SIGNAL REFERENCE CIRCUIT

C116 X_470p

AGP UNIVERSAL 2X/4X SLOT(AGP VER:2.0 COMPLY)

D

VCC_AGP
D

VCC5 = 60mils trace / 15 mils space

R183
X_82

R201
1K

AGPREF: 10uA
AGPREF

R182
X_82

AGP1
VCC5
VCC3
9,18
4
8
8
8
8

ST0
ST2
RBF#

SBA0

8
8
C

INTB#
AGPCLK
GREQ#

8
8

SBA2
SB_STB

GREQ#

RBF#

SB_STB

SBA4
SBA6
VCC3_SB

8
8

GAD31
GAD29

8
8

GAD27
GAD25

8
8

GAD_STB1
GAD23

8
8

GAD21
GAD19

8
8

GAD17
GC_BE#2

GIRDY#

GDEVSEL#

GAD_STB1
VCC_AGP

GIRDY#

GDEVSEL#
GPERR#

GSERR#
8

GC_BE#1

8
8

GAD14
GAD12

8
8

GAD10
GAD8

8
8

GAD_STB0
GAD7

8
8

GAD5
GAD3

8
8

GAD1
AGPREF

GAD_STB0

AGPREF

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66

-OVRCNT
5V
5V
USB+
GND
-INTB
CLK
-REQ
3.3V
ST0
ST2
-RBF
GND
RESERVED
SBA0
3.3V
SBA2
SB_STB
GND
SBA4
SBA6
RSVD/KEY
GND/KEY
AUX3V/KEY
3.3V/KEY
AD31
AD29
3.3V
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/-BE2
VDDQ
-IRDY
AUX3V/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-DEVSEL
VDDQ
-PERR
GND
-SERR
C/-BE1
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG
AGP-D124-BN-B

VREF_GC:form
the chipset
to the
graphics
controller

12V
-TYPEDET
RESERVED
USBGND
-INTA
-RST
-GNT
3.3V
ST1
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

R181
1K

C111
1u

C115
C114

X_0.1u
X_1u

VREF_GC

CB122
0.1u

+12V
C110 X_470p

NEAR AGP SLOT

GGNT#
VCC3

INTA#
PCIRST#2
GGNT#

9,18
4,18
8

ST1

PIPE#

PIPE#

WBF#

WBF#
SBA1

8
8

SB_STB#

SBA3
SB_STB#

8
8

SBA5
SBA7

8
8

GAD_STB#1

GIRDY#
GFRAME#
GTRDY#
GDEVSEL#
6.8K
GSTOP#
GPERR#
GPAR
GSERR#
GREQ#
GGNT#

GAD30
GAD28

8
8

GAD26
GAD24

8
8

GAD_STB#1
GC_BE#3

8
8

GAD22
GAD20

8
8

GAD18
GAD16

8
8

GFRAME#

GTRDY#
GSTOP#
PME#

8
8
9,18,25

GPAR
GAD15

8
8

GAD13
GAD11

8
8

GAD9
GC_BE#0

8
8

GAD_STB#0
GAD6

8
8

GAD4
GAD2

8
8

GAD0

ST1
ST2

VCC_AGP

GFRAME#

GTRDY#
GSTOP#
GPAR

GAD_STB#0

VREF_GC

5/23 update
HI: SDRAM
LO:DDR

8
6
4
2

AGP TERMINATION RESISTORS

X_6.8K
RN15
7
5
3
1

VCC_AGP

PIPE#
RBF#
WBF#

R180
R179
R185

6.8K
6.8K
6.8K

VCC_AGP

GAD_STB0
GAD_STB1
SB_STB

R213
R192
R204

6.8K
6.8K
6.8K

VCC_AGP

GAD_STB#1
GAD_STB#0
SB_STB#

R195
R212
R200

6.8K
6.8K
6.8K

RN16
8
6
4
2
R199
R198
R184
R194

ST0

7
5
3
1
6.8K
6.8K
X_6.8K
X_6.8K

R193

LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.

2K

Place these resistors between PCI and AGP slot

AGP SLOT DECOUPLING CAPACITORS

VCC_AGP
+

VCC_AGP
CT30
1000u
CB139
0.1u
CB131
0.01u
CB135
0.1u

+12V
CB130
100p
CB125
0.1u
CB136
0.1u
CB127
0.1u
CB138
1u

VCC3_SB
CB132
0.1u

VCC5
CB137
0.1u

VCC3
CT39
1000u
CB207
0.1u
CB196
100p

VREF_GC:form
the graphics
controller to
the chipset

AGP Slot Imax

CT31
1000u
CB128
0.1u
CB123
0.1u
CB124
0.1u
CB129
0.1u
CB1
100p

CT33
1000u

VCC_AGP 8.0A
VCC3 6.0A
VCC12 1.0A
VCC5 2.0A

Title

INTA#
INTB#

Rev

M i c ro-Star

MS-6507

0B

Document Number

AGP Slot
Last Revision Date:

Monday, September 03, 2001

8

Sheet

17
1

of

36

PCI SLOT 1 (PCI VER: 2.2 COMPLY)

-12V

-12V

VCC5
D

9,17
9

INTB#
INTD#
REQ#3
REQ#5
VCC3
SIRQ

4
9

PCICLK0
PREQ#0

9,25
9,25

AD31
AD29

9,25
9,25

AD27
AD25

9,25
9,25

C_BE#3
AD23

9,25
9,25

AD21
AD19

9,25
9,25

AD17
C_BE#2

9,25

IRDY#

9,25

DEVSEL#

9
9,25

PLOCK#
PERR#

9,25

SERR#

9,25
9,25

C_BE#1
AD14

9,25
9,25

AD12
AD10

9,25
9,25
9,25
9,25

AD5
AD3

9,25

AD1
ACK#64

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

AD8
AD7

TRST#
+12V
TMS
TDI
+5V
INTA#
INTC#
+5V
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
PCI-D120-WH-SN

C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+5V(I/O)
REQ64#
+5V
+5V

PTRST#
PTCK
PTMS
PTDI
VCC5

VCC5
INTA#
INTC#

9,17
9

INTC#
INTA#

GNT#3
PREQ#3
PREQ#5

R399
R347

GNT#5
VCC3
VCC3_SB
9,11
SERIRQ
PCIRST#2
4,17
PGNT#0

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

R237

REQ#3
REQ#5
SIRQ

PCICLK1

PREQ#1
AD31
AD29
VCC3
AD27
AD25

PME#
AD30

9,17,25
9,25

AD28
AD26

9,25
9,25

AD24
R267

0
0

100

9,25
AD16

C_BE#3
AD23

AD22
AD20

9,25
9,25

AD21
AD19

AD18
AD16

9,25
9,25

AD17
C_BE#2

FRAME#

9,25

TRDY#

9,25

STOP#

9,25

SM_LNK0
SM_LNK1

10
10

IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#

PAR
AD15

9,25
9,25

C_BE#1
AD14

AD13
AD11

9,25
9,25

AD12
AD10

AD9

9,25

C_BE#0

9,25

AD6
AD4

9,25
9,25

AD5
AD3

AD2
AD0
REQ#64

9,25
9,25

AD1

AD8
AD7

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

ACK#64

IDSEL = AD16
MASTER = PREQ0
INTA#

VCC5

2
4
6
8

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

TRST#
+12V
TMS
TDI
+5V
INTA#
INTC#
+5V
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
PCI-D120-WH-SN

9
9
9,25

PREQ#3
PREQ#5
PREQ#4

1 5
2
3
4
6
7
8
9 10
2.7K

VCC5

2
4
6
8

STOP#
PLOCK#
PERR#
SERR#

GNT#5
VCC3

VCC5

10

REQ#3
REQ#5
VCC3

VCC3_SB

SIRQ

PCIRST#2
4
PGNT#1

PCICLK2

9
9

PME#
AD30

PREQ#2
AD31
AD29

AD28
AD26
AD24
R346

AD27
AD25
100

AD17

C_BE#3
AD23

AD22
AD20

AD21
AD19

AD18
AD16

AD17
C_BE#2

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PLOCK#
PERR#

SM_LNK0
SM_LNK1

SERR#
PAR
AD15

C_BE#1
AD14

AD13
AD11

AD12
AD10

AD9
C_BE#0

AD8
AD7

AD6
AD4

AD5
AD3

AD2
AD0

AD1

REQ#64

ACK#64

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
PCI-D120-WH-SN

TRST#
+12V
TMS
TDI
+5V
INTA#
INTC#
+5V
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+5V(I/O)
REQ64#
+5V
+5V

PTMS
PTDI
VCC5 INTC#
INTA#

GNT#3
GNT#5
VCC3
VCC3_SB
PCIRST#2
PGNT#2

PME#
AD30
AD28
AD26
AD24
R373

100 AD18

AD22
AD20
AD18
AD16
FRAME#
C

TRDY#
STOP#
SM_LNK0
SM_LNK1
PAR
AD15
AD13
AD11
AD9

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

C_BE#0
AD6
AD4
AD2
AD0
REQ#64

PGNT#3

PGNT#3

PGNT#5

PGNT#5

2
4
6
8

VCC3

REQ#64
ACK#64

R343
R344

4.7K
4.7K

PTMS
PTDI

R265
R266

4.7K
4.7K

PTCK
PTRST#

R264
R352

4.7K
4.7K

VCC5

10,25
10
10
10

INTF#
INTE#
INTG#
INTH#

INTF#
INTE#
INTG#
INTH#

1
3
5
7

VCC5
+

2
4
6
8

VCC3

-12V

VCC3
CT37
1000u
CB188
0.1u
CB162
0.1u
CB187
100p
CB173
100p

CT38
1000u
CB198
0.1u
CB197
0.1u
CB174
0.1u
CB175
100p
CB176
100p

+12V

CB189

VCC3_SB

CB172
0.1u

0.1u

C182
0.1u

Title

Rev

M i c ro-Star

MS-6507

0B

Document Number

PCI Slot 1 & 2 & 3

Last Revision Date:

Wednesday, August 29, 2001

8

PTRST#

IDSEL = AD18
MASTER = PREQ2
INTC#

RN23
8.2K
5

INTD#
INTB#

R292
0
PGNT#3
R268
0
PGNT#5

GNT#3

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

PCI SLOT DECOUPLING CAPACITORS

1
3
5
7

RN22
1
2
3
4
6
7
8
9

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

PTCK
PTMS
PTDI
VCC5
INTB#
INTD#

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

RN18
8.2K
INTA#
INTD#
INTC#
INTB#

PREQ#0
PREQ#2
PREQ#1
PREQ#3
PREQ#5
PREQ#4

C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+5V(I/O)
REQ64#
+5V
+5V

PTRST#

IDSEL = AD17
MASTER = PREQ1
INTB#

FRAME#
IRDY#
TRDY#
DEVSEL#

RN21
2.7K
1
3
5
7

+12V
PCI3

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

PCI PULL-UP / DOWN RESISTORS

RN20
2.7K
1
3
5
7

-12V

PCI2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

PCI SLOT 3 (PCI VER: 2.2 COMPLY)

+12V

PCI1
PTCK

PCI SLOT 2 (PCI VER: 2.2 COMPLY)

+12V
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

Sheet

18
1

of

36

5/22 update for EMI use, close ATX connector

YPC20

4.7K
13

PSON#

14

R74

VCC5_SB

14
12
7

15

4.7K

16
17

U21F
7407-SOIC14

18

-5V

19
20
+

VCC5
CB53
0.1u

CT12

3.3V
-12V

3.3V

GND GND
PSON

5V

GND GND
GND

5V

GND GND
-5V
5V

POK
5VSB

5V
12V
POWER

CB26
33p

47u

47u

3.3V

1
2

VCC3
CT16

CB70
X_33p

CB67
1u-0805

-5V

5/11 update

CB15
0.1u

CB23
33p

C556
0.1u

VCC5

13
VCC3

CB59
0.1u

11

VCC5_SB

39p

10

14
10 U21E
7 7407-SOIC14

R369

U20B
U20C
74LCX14MX-SOIC14 74LCX14MX-SOIC14
3
4
5
6
(VCC3_SB)

33

CB28
0.1u

D3

CT6

R383

22

PWR_GD

10

C207
0.1u

+12V
CB30
X_33p

PWRGD_DDR 16

R368
4.7K
(VCC5_STR)

C38
X_1000p

X_22

VCC5_SB

CB10

R504

12

U20F
74LCX14MX-SOIC14

R350

VCC3_SB
11

13

CT15
X_10u

VCC5_SB
D

CB62
X_33p

-12V
CB68
CB64
33p
0.1u

CB66
0.1u

5/21 update

12

11

VCC3

ATX CONNECTOR

CB16
39p

VCC3

CLK_RST#
R348

X_4.7K

R389

X_4.7K

Q45
X_NPN-3904LT1-S-SOT23

10u

VCC5

VCC5_SB

U20D
74LCX14MX-SOIC14

FP_RST#

1N5817-S-DO-241AC
VCC3

Brookdale FRONT PANEL-M

4
4
C

PD_LED
SD_LED

D17
D18

1N4148-S-LL34
1N4148-S-LL34

C180

470p

INTEL FRONT PANNEL

PIN HEADER.

10

EXTSMI#

EXTSMI#

F_P2

VCC5

IDE_LED

HDD+

IDE_LED

F_P1
R433
330

For EMI.

HDD+

3
4

PLED2

SUS_LED

PWRSW+

PWRSW-

GNDK KEYLOCK

NC

NC

HDD+

HDD-

GNDL

SPEAKER

SLED2

BUZ+

PLED1

BUZ-

PWSW+ VCCSPK
PWSW-

NC

RESET

GNDR
R432 D2x9-3:3.17.4-BK
1K

10

KBLOCK#

11

FP_RST# 7

11
12

IDE_LED

13
14
15
16
17

R341
0

SPK

RESISTOR
SHORT
FOR PB

SPK2
CB192
0.1u

HDD+

PLED1

HDD-

PLED2

GNDR PWSW+
RESET PWSW-

CUT
RSVD
D2x5-1:1-BK

SUS_LED

PLED2

PWRSW+

PWRSW-

1
3

FP_RST#
5

18

NA

1
2
JGS1
D1x2

C701
0.1u

V_DIMM

10

V_DIMM
R394
330
R395
330

IR2
VCC5

VCC5

C700
0.1u

1
2

CUT

+5V

GND

IRTX

IRRX

2
4

PLED2

1
2
3
JGL1
D1x3-BK

6
11

R393

SUS_LED

1K

Q46
NPN-3904LT1-S-SOT23

D2x3-1:2-BK
IRTX
IRRX
VCC5

VCC5_STR

R426
X_4.7K

R425
X_330
X_0

SUS_LED

R422
11

PWR_LED

R423
X_4.7K
Q49
X_NPN-3904LT1-S-SOT23

PWRSW+

VCC5
11
10

R328
R335

ALARM
SPKR

220
220

R332

POWER BUTTON

SPEAKER

D16

R353

2.2K

C178
Q37
NPN-3904LT1-S-SOT23

VCC5_SB

22

1N4148-S-LL34

U20E
74LCX14MX-SOIC14
11
10

SPK2
R319

10K

0.1u
SPK

Title
PWRBTIN#

C183
BZ1
BUZZER-SAT1205-85dB-D

Rev

M i c ro-Star

11

MS-6507

0B

Document Number

Front Panel & Connector

1u
Last Revision Date:

Sheet

Wednesday, August 29, 2001

5

19

of

36

BACK PANEL USB CONNECTOR FOR USB PORT 0,1

FB9
FB10

120-1
120-1

FB7
FB8

120-1
120-1

27

SVCC0
SBD0SBD0+
GNDA
SVCC0
SBD1SBD1+
GNDA

5
6
7
8
1
2
3
4

UP
DOWN

D2

1N4148-S-LL34

R23

4.7K

R35

R57

CPU_FAN
R30
10K

Q10
SI2303DS-S-SOT23
R705

R56

4.7K

CN702
X_22p

1K
CFAN

R59

R54

CPU_CTRL

510

Q6
+
2N7002-S-SOT23

3
2
1

C_FAN1
D1x3-WH-SN

C28
47u

11

NEAR CHIPSET LESS THAN 1 INCH

1
3
5
7

2
4
6
8

11

11

2.2K

RJ45+USB+LEDx2-D20-BK-F02
RN30
15K

27K

VCC5

21
22
23
24
25
26
27
28

USBP1USBP1+

7
5
3
1

1
3
5
7

10
10

8
6
4
2

2
4
6
8

USBP0+
USBP0-

+12V

CPU FAN
LAN_USB1A

RN27
10
10

CPUFAN

NEAR USB CONNECTOR

SYSTEM FAN

FRONT PANEL USB CONNECTOR FOR USB PORT 2,3

+12V

RN26

1N4148-S-LL34

R312
120-1
120-1

FB26
FB25

120-1
120-1

R313

4.7K

R298

27K

SYS_FAN
R278
10K

SBD2SBD2+

RN29
15K

SBD3SBD3+

R704

R299

4.7K

11

SYS_CTRL

R262

510

SFAN
Q34
2N7002-S-SOT23

Q35
SI2303DS-S-SOT23

1K

R258

3
2
1

S_FAN1
D1x3-WH-SN

C155
47u

2
4
6
8

1
3
5
7

CN701
X_22p

NEAR USB
CONNECTOR

NEAR CHIPSET LESS THAN 1 INCH

11

2.2K

27

FB23
FB24

11

USBP2+
USBP2-

1
3
5
7

1
3
5
7

10
10

2
4
6
8

USBP3+
USBP3-

2
4
6
8

10,12
10,12

D15
VCC5

SYSFAN

USB1
SVCC1
SBD2SBD2+

1
3
5
7
9

2
4
6
8
10

SBD3+
SBD3SVCC1

D2x5-BK

POWER CIRCUIT FOR USB PORT 0,1

2

INTEL USB FRONT PANNEL PIN

HEADER
2

X_COPPER
CP3
FS2
1.1A-S

USB3
FB6

X_120

SVCC0
SBD3SBD3+

VCC5_STR
C2
470p
10
OC#0

R55
470K

C15
1u

CT2
1000u

R36
47K

R330
560K

C25
0.1u

1
3
5
7
9

2
4
6
8
10

SVCC1
SBD2SBD2+
OC#1

D2x5-1:1-BK

NEAR USB CONNECTOR

POWER CIRCUIT FOR USB PORT 2, 3

X_COPPER
CP5
1

FS4
1.1A-S
FB21

C214
470p
10,12

X_120

SVCC1
+

VCC5_STR

R380
470K

C228
1u

CT43
1000u

Title

C196
0.1u

R381
560K

Rev

M i c ro-Star

OC#1
R427
47K

MS-6507

0B

Document Number

USB & FAN Connectors

Last Revision Date:

NEAR USB CONNECTOR

E

Sheet

Wednesday, August 29, 2001

D

20

of

36

-5VR
C709

U16

13

13

LIN_IN_R

LIN_IN_L

LIN_IN_R
1 R294

2
47K

LIN_IN_L
1 R320

1 R291
0

INR
SROR

2
1

1 R310
0

INL
SROL

5
3

47K
6
11
10
9

X_1u
X
Y

Y0
Y1

Z0
Z1

VDD

14

LINE_L

15

LINE_R

LINE_L

X0
X1

LINE_R

13,14

LINE_L

13,14

3
C710
13

16

SROUT_R

R732

SROUT_R

+5VR

2
X_1u

INH
A
B
C

R753
VSS
VEE

8
7

-5VR

INL

R726

LINE_L

C713

INR

R725

LINE_R

+5VR

R730
X_47K

-5VR
X_0

R215

VCC3_SB

SROR

X_33

X_47p

R754

LO=MIC,HI=4CHANNEL

R728

X_0

6CH_CTRL

6CH_CTRL

X_0

X_33K

X_FC-CD4053BCM-SOIC16

10

R755

U701A
X_TI-TL072CDR-SOIC8

12
13

2
5
C711
X_4.7K

13

SROUT_L

R731

SROUT_L

U701B
X_TI-TL072CDR-SOIC8
R729

SROL

X_33

X_33K
8

X_1u

LINE_R

R727

R756

X_0

X_47K

C708

C712
X_1u
+5VR

X_47p

-12V

R382
X_2.7K
-5VR

DLED
R379
X_2.2K

8
6
4
2

VCC5

8
6
4
2

VCC5

RN9
330

RN7

7
5
3
1

7
5
3
1

330

D8

8
6
4
2

DLED1
DLED2
DLED3
DLED4

RN10
10K

7
5
3
1

11
11
11
11

LED2

LED6

LED8

LED4

GN_RD-D-5V-CR-A

Q25
NPN-3904LT1-S-SOT23

Q24
NPN-3904LT1-S-SOT23

Q23
NPN-3904LT1-S-SOT23

Q22
NPN-3904LT1-S-SOT23

LEDT1
Title

Micro-Star
LEDT2
LEDT3
LEDT4

Rev

MS-6507

0B

Document Number

D-LED & 4 CHANNEL CONTROL

Last Revision Date:

Thursday, August 09,2001

Sheet

21

of

36

VCC5_SB
C26
0.1u

C C

4
3

Power
VCC3_SB
VCC5_STR
VCC_DIMM

S0
Main
Main
Main

S3
Standby
Standby
Standby

S5
Standby
0V
0V

1.8V STANDBY POWER TRANSLATOR

(40mils trace / 20 mils space)

N CHANNEL
DIMMCTR

5VSB

2
D

12V

Q1

VCC3

C7
4.7u-0805
U3

14

VCC5_SB

+12V

POWER TRANSLATOR

VCC3_SB

3V3DLSB

DRV2

E
VSEN2

15

Q8
NPN-KSH3055-TO252

V_DIMM

16

VR3
LT1084S-SOT89-0.8A
2
VIN
VOUT
R252
432

ADJ

VCC5_SB

3V3DL

C144
100p

C147
0.1u

CT35
47u

VCC5_SB
0
0
NOTE3
0
0
0
0
0
0
0

+12V
NOTE4
0
0
0
0

-12V

0
0
0
0

0
0
0
0
0
0
0
0
0
0
0
0
0

1
C159
X_0.1u

R259
200

C137
0.1u

NPN-NZT651-S-SOT223
VCC3_SB

VCC1_8SB

FAULT/SEL

Q4

10,11
10

R20

4.7K

1K

SLP_S3#
SLP_S5#

R28

VCC5_SB

R29

X_0

5VDLSB
6
7
5
2
13

S3
S5
EN5VDL
EN3VDL
SS

DLA

NDS352AP-S-SOT23

5VCTR G

10

P CHANNEL
VCC5_STR

POWER CONSUMPTION

12
Q14
S-TO252-55V

C17
0.1u

5VDL

11

R25

4.7K

GND

R378

Q2

CPU
PMCH
ICH2
CY28324
AD1885
FWH -SST
W83627HF
HIP6301
HIP6602A
HIP6601A
SC1547
DIMM
AGP
PCI
USB
USB HUB
FAN
TTL
AMPLIFIER
OTHER

INTS-HIP6501A-SOIC16

S-TO252-55V

DLA
VCC5

VCC3

AGP 4X 1.5V POWER TRANSLATOR

VCC5
VCC3
+12V

4
2

U9A
1

S-TO252-55V

LM324M

R208
1K

C73
X_1000p

NOTE3 --- ICH2

Power
1.8V
1.8V_LAN
VCC1_8SB
VCC3
VCC3+562ET
VCC3_SB

1K

U9B

Q30

S0
300mA
36mA
45mA
410mA
230mA
25mA

0
0
0

0
0

6.0A

2.0A
0
0
0
0
0

0
0
0

NOTE2
?
0

1.0A

0
0
0
0
0

0
0
0
0

0
0

S1
100mA
28mA
30mA
5mA
210mA
0.6mA

S3/S4/S5
N/A
N/A
7mA
N/A
N/A
N/A

REGULATORS OUTPUT DECOUPLING CAPACITORS

1.8V/3.3V SEQUENCE CIRCUIT

215

VCC1_8

R173
1K

+12V

C617
10u-1206
VCC3

VCC3

C78
0.1u

C616
10u-1206
R123

U9C

Q21
PNP-3906LT1-S-SOT23
Ic=200mA
Vebo=5V
Vceo=40V

200

Q31
R132
200

S-TO252-55V

8
LM324M

R134
470

VCC5_SB
CT32
1000u
CB155
100p
CB87
10p

VCC3

Q26
NPN-3904LT1-S-SOT23

VCC5_STR
CT4
1000u
CB77
0.1u
CB36
1u

VCC3_SB
CT7
1000u
CB18
0.1u
CB2
0.1u
CB19
0.1u

CT41
1000u
CB163
0.1u
CB7
1u
CB6
0.1u
CB5
0.1u

CT29
1000u
Title

CB159
0.1u

VCC1_8

Rev

M i c ro-Star

VCC5

VCC1_8

R209

V_DIMM
CT20
1000u
CB8
0.1u
CB33
1u

VCC_AGP
CB91
0.1u
CB63
1u

11

0
0

0
0
0
0
0

LM324M

VCC_AGP

10

0
0
0
0
0

VCC5
0
0
0
0

VCC3_SB =
VCC1_8SB =
VCC5_SB = VCC3_SB + VCC1_8SB

SUD40N03-S-TO252

R174

VCC3
0
0
NOTE3
0
0

11

8.0A

VCC3_DIMM
0
2.0A
0
0
0
0
0
0
0
0
0
NOTE2
0
0
0
0
0
0
0
0

NOTE2 --- DIMM

S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3
S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB
VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB

+12V

0
0
0
0
0
0
0
0
0
0
0

VCC1_8
0
0.2A
NOTE3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

NOTE1 --- MCH

VCC_AGP = VCC1_5 (1.5A) + VCC_AGP (0.37A)

R207

VCC_AGP
0
NOTE1
0
0
0
0
0
0
0
0
0
0

Q29

R106
1K
1

11

VR2
LCSK-1,SOT23-3L-100mA
3
2

R107
100

VCCP
69.0A
2.4A
0
0
0
0
0

MS-6507

0B

Document Number

Voltage Regulator

100
Last Revision Date:
R210 220
8

Wednesday, August 29, 2001

6

Sheet

22
1

of

36

CHOK4

+12V

1.1u

CB88
33p

C84
33p

CT19
1500u

CT13
1500u

CT24
X_1500u

CT27
1500u

C83
2.2u-0805

C40
1u-0805

C85
2.2u-0805

CB92
0.1u

R93

U8A
VCC

10_0805
CB71
1u-0805
3

R135
0

U_G1
BOOT1
PHASE1

12
11

R102

Q20
IPB15N03L-S-TO263

0_0805 G

C63
0.1u

13

GND

VCC5

14

CHOK3

C62
X_1000p

U11

VCC5
5

VCCPS-

R126
R117

PWM2
ISEN2

FS/DIS
COMP

PWM3
ISEN3
PWM4
ISEN4

C89
5600p

X_0

R125
X_15K

R116

3K

14
13

R114

3K

11
12

R112

3K

FB
VSEN
INTS-HIP6301-SOIC20

18
17

U8B

VCC

HIP12V

PVCC

CB72
1u-0805
6

10

R115
R121
1.37K X_0

U_G2
BOOT2
PHASE2

9
10

R73
C66
0.1u

PGND

CHOK2

C51
X_1000p
R84

7
PWM2
L_G2
MOSDVR-HIP6602A-SO14

CT14
2200u

CT17
2200u

CT8
2200u

VCCP

1
1

1
1

1
1

1
0

0
1

1.100
1.125

0
0

1
1

1
1

1
0

0
1

1.500
1.525

1
1

1
1

1
0

0
1

0
1

1.150
1.175

0
0

1
1

1
0

0
1

0
1

1.550
1.575

1.200

1.600

1
1

1
1

0
0

0
0

1
0

1.225
1.250

0
0

1
1

0
0

0
0

1
0

1.625
1.650

1
1

0
0

1
1

1
1

1
0

1.275
1.300

0
0

0
0

1
1

1
1

1
0

1.675
1.700

1.325

1.725

1
1

0
0

1
0

0
1

0
1

1.350
1.375

0
0

0
0

1
0

0
1

0
1

1.750
1.775

1
1

0
0

0
0

1
0

0
1

1.400
1.425

0
0

0
0

0
0

1
0

0
1

1.800
1.825

1.450

1.475

0
1

+12V

C39
1u-0805

R3
10_0805
U1
6
7

VCC
PVCC

CB9
1u-0805

U_G
BOOT
PHASE

4
3

R68

1
2
8

C16
0.1u

CHOK1

C19
X_1000p

GND

5
PWM
L_G
MOSDVR-INTS-HIP6601A-SOIC8

Q15
IPB15N03L-S-TO263

0_0805 G

1.1u
+

VID4 VID3 VID2 VID1 VID0 VDC(V)

R52

Q13
FDB6670AL-S-TO263

0_0805 G

CT5
2200u

CT25
2200u

CT26
2200u

1.850

ATX12V POWER CONNECTOR

OFF

PWM GOOD

H I P 6 3 0 1 V DON'T NEED PULL HIGH

H I P 6 3 01 NEED PULL HIGH

VID PULL-UP RESISTORS

Q17
FDB6670AL-S-TO263

0_0805 G

VID4 VID3 VID2 VID1 VID0 VDC(V)

1.1u

R110

Q16
IPB15N03L-S-TO263

0_0805 G

VCCPS+

CT1
1500u

X_0

CT23
1500u

C61
1u-0805

C82
X_5600p
R113

CT18
1500u

PGOOD

R131
15K

200K

15
16

CT3
1500u

Q19
FDB6670AL-S-TO263

0_0805 G

6
C91
X_15p

C92
1u-0805

R111

4
PWM1
L_G1
MOSDVR-HIP6602A-SO14

154K

8
R137

PWM1
ISEN1

VCC

DIS

GND

20

19

VCC

10

X_10K R127
X_0
C86 X_100p

VID4
VID3
VID2
VID1
VID0

R124
VCC3
VRM_GD

1
2
3
4
5

VID4
VID3
VID2
VID1
VID0

VID[0..4]

VCCP

5,11

1.1u

HIP12V

+12V

+12V

JPW1
3

VCC5_SB

12V

GND

12V
D2x2

GND

DIS
4
R740
X_0

VCC3_SB

6,15

VCC_VID

R739

X_0

Q707
R717
X_0
NPN-3904LT1-S-SOT23

+12V

VCC3

Q704
PNP-3906LT1-S-SOT23
R741
330-1206

15

R742
X_0

VID_GD

C96
0.01u

Q27
2N7002-S-SOT23

C94
33p
A

Title

M i c ro-Star
VID0
VID1
VID2
VID3
VID4
5

1
3
5
7
R136

2
4
6
8
1K

Rev

MS-6507

0B

Document Number
D700
RLZ3.3B-S-LL34

RN8
1K

VRM 9.2
Last Revision Date:
Sheet

Monday, September 03, 2001

4

23

of

36

5/22 update

SERIAL PORT 1

MODEM RING BLOCK

LAN WAKEUP BLOCK

VCC5
V+ D4

1N4148-S-LL34

+12V

U6
C45

0.1u

DCDA
DSRA
RXDA
CTSA
RIA

11
11
11

20
2
3
4
7
9
16
15
13
11

DTRA#
RTSA#
SOUTA

VCC
RIN1
RIN2
RIN3
RIN4
RIN5

V+
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5

DIN1
DOUT1
DIN2
DOUT2
DIN3
DOUT3
GND
VTI-GD75232-SSOP20
C50

1
19
18
17
14
12

C47

0.1u
DCDA#
DSRA#
SINA
CTSA#
RIA#

5
6
8
10

11
11
11
11
11

DCDA
DSRA
RXDA
DTRA

2
4
6
8

1
3
5
7

CN3
220p

RTSA
CTSA
TXDA
RIA

2
4
6
8

1
3
5
7

CN4
220p

VCC3_SB
RING#

VCC5_SB
5
4
3
2
1

CN7B
D5

1N4148-S-LL34

DCDA
RXDA
TXDA
DTRA

-12V

0.1u

26
27
28
29
30

31
32
33
34

R419
10K
LAN_WAKE

JWOL1

DTRA
RTSA
TXDA
V-

10

DSRA
RTSA
CTSA
RIA

R409

330K

R392

10K

Q47
PNP-3906LT1-S-SOT23
Ic=200mA
Vebo=5V
Vceo=40V

VCC5_SB
1
2
R442
4.7K
3
D1x3-WH-HSNO
R429
10K
LAN WAKEUP
HEADER

C216
0.1u

JMDM1
D1x5-BK

10

Q55
NPN-3904LT1-S-SOT23

LPT-D25-BR-I

SERIAL PORT 2

PS2 KEYBOARD & MOUSE CONNECTOR

0.1u

U10
C75

0.1u
DCDB
DSRB
RXDB
CTSB
RIB

11
11
11

20
2
3
4
7
9
16
15
13
11

DTRB#
RTSB#
SOUTB

VCC
RIN1
RIN2
RIN3
RIN4
RIN5

V+
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5

DIN1
DOUT1
DIN2
DOUT2
DIN3
DOUT3
GND
VTI-GD75232-SSOP20
C80

1
19
18
17
14
12

V+
DCDB#
DSRB#
SINB
CTSB#
RIB#

2
4
6
8

1
3
5
7

RTSB
CTSB
TXDB
RIB

2
4
6
8

1
3
5
7

DTRB
RTSB
TXDB

5
6
8
10

0.1u

11
11
11
11
11

DCDB
DSRB
RXDB
DTRB

CN11
220p

V-

35
36
37
38
39

VCC_MS

X_COPPER
CP1
R21
47K

RN1
4.7K

CN12
220p

CN7C
DCDB
RXDB
TXDB
DTRB

VCC_MS
7
5
3
1

C74

R22
47K

8
6
4
2

VCC5

40
41
42
43

DSRB
RTSB
CTSB
RIB

KBMS1

11

MSDATA

FB3

120-1

MS_DT

11

MSCLK

FB4

120-1

MS_CK

11

KBDATA

FB2

120-1

KB_DT

11

KBCLK

FB5

120-1

KB_CK

7
8
11
12

C1
33p
GNDA

MS

1
2
5
6
1
3
5
7

PSPWR

VCC5

11
11
11

LP_PE
LP_BUSY
LP_ACK#

D6

LP_D6
LP_D5
LP_D4
LP_D3
LP_PE
LP_BUSY
LP_ACK#
LP_D7

11

LP_ERR#

11
11

LP_AFD#
LP_STB#

11
11

LP_SLIN#
LP_INIT#

LP_ERR#
LP_D0
LP_AFD#
LP_STB#
LP_D2
LP_D1
LP_SLIN#
LP_INIT#

LP_SLCT

LP_SLCT

11

1N4148-S-LL34
1
2
3
4
6
7
8
9
1
2
3
4
6
7
8
9
R75

1 5
2
3
4
6
7
8
9 10
1 5
2
3
4
6
7
8
9 10

5
RN3
2.2K

1
3
5
7

2
4
6
8

CN8
220p

LP_STB#
LP_AFD#
LP_D0
LP_ERR#

1
3
5
7

2
4
6
8

CN9
220p

LP_D3
LP_D4
LP_D5
LP_D6

1
3
5
7

2
4
6
8

CN6
220p

LP_D7
LP_ACK#
LP_BUSY
LP_PE

1
3
5
7

2
4
6
8

CN5
220p

RN4
2.2K
10

2.2K

LP_SLCT

FLOPPY CONNECTOR

C55

FS1
1.1A-S
POLY SWITCH

KB

VCC_MS

MINIDINx2-D12-ML
C3
0.1u

CN7A
LP_STB#
LP_D0
LP_D1
LP_D2
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7
LP_ACK#
LP_BUSY
LP_PE
LP_SLCT

10
5

C4
0.1u

2
4
6
8

PARALLAL PORT

LP_INIT#
LP_SLIN#
LP_D1
LP_D2

C5
0.1u

CN700
X_22p

LP_D[0..7]

VCC5_STR

X_600

LPT-D25-BR-I

11

FB1
10

33p

1
2
3
4
5
6
7
8
9
10
11
12
13

14
15
16
17
18
19
20
21
22
23
24
25

LP_AFD#
LP_ERR#
LP_INIT#
LP_SLIN#

LPT-D25-BR-I

FDD1
1
3
7
9
11
13
15
17
19
21
23
25
27
29
31
33

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

INDEX#

TRACK0#
WP#
RDATA#
DSKCHG#

DRVDEN0

11

DRVDEN1
INDEX#
MOT_A#
DRV_B#
DRV_A#
MOT_B#
DIR#
STEP#
WT_DT#
WT_EN#
TRACK0#
WP#
RDATA#
HEAD#
DSKCHG#

11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

Title

Rev

M i c ro-Star

MS-6507

0B

Document Number

IO Connector
Last Revision Date:

D2x17-1:31-BK
8

Wednesday, August 29, 2001

6

Sheet

24
1

of

36

REALTEK 8100(L) LAN

Y1
VDD33
C119
27p

C120
25M-18pf-HC49S-D

RXINRXIN+
TXDTXD+

R171
R177

VCC3

1K
15K

VDD33

27p

VDD33

VCTRL

D10
PME#
VCTRL

PME#

9,17,18

X_1N4148-S-LL34
X_NPN-3904LT1-S-SOT23

(ISOLATEB)

C122
X_1u

C132
X_0.1u

C118
X_0.1u

C134
X_4.7u-0805

C123

C124

C117

C121

4.7u-0805

0.1u

0.1u

1u

2
VDD33
FB16
300_0805

1N4148-S-LL34-75V

X_10u

X_0.1u
GND

AD31
AD30
GND
AD29
VDD33
AD28
AD27
AD26
AD25
AD24
VDD25
VDD33

AD22

9,18

C_BE#3

C_BE#3

AD23

PME#
GND
VCTRL

GND

AUX
EECS
EESK
EEDI
EEDO
AD0
AD1
GND
AD2
AD3
VDD25
VDD
AD4
AD5
AD6
VDD25
VDD
AD7
CBE0B
GND

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

R285
100

INTAB
RSTB
CLK
GNTB
REQB
AD31
AD30
GND
AD29
VDD
AD28
AD27
AD26
AD25
AD24
VDD25
VDD
CBE3B
IDSEL
AD23

DC6

0.1u

0.1u

GND

GND

U14

LED0
LED1
NC
LED2
AVDD25
AVDD
ISOLATEB
GND
TXD+
TXDAVDD
AVDD25
RXIN+
RXINGND
RTSET
RTT2
RTT3
GND
X1
X2
AVDD
AVDD25
PMEB
GND
VCTRL
NC
NC
NC
VDD25

LANRST

PCICLK3
PGNT#4
PREQ#4

81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100

DC3

0.1u

VDD25

AD22
GND
AD21
AD20
AD19
VDD
VDD25
AD18
AD17
AD16
CBE2B
FRAMEB
IRDYB
TRDYB
DEVSELB
GND
STOPB
PERRB
SERRB
PAR
CBE1B
VDD
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8

4
9
9,18

INTF#

DC11

0.1u

VDD25

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51

ACTLED

GND

ISOB
GND

SPDLED

10,18

DC9

0.1u

C135

VDD25

X_1N4148-S-LL34

D11

DC8

0.1u
VDD25
EC1

R170
1.78K
D9

DC4

VDD25
1

FB17 1
X_300_0805

VDD25

Q33

R206 5.6K
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31

AUX
LEECS
EESK
EEDI
EEDO
AD0
AD1
GND
AD2
AD3
VDD25
VDD33
AD4
AD5
AD6
VDD25
VDD33
AD7
C_BE#0
GND

DC7

DC10

DC2

DC5

DC1

X_0.1u

X_0.1u

X_0.1u

X_0.1u

X_0.1u

VDD33
VCC3_SB 1
2
3
4

U15
C S VCC
SK
NC
DI
NC
DO GND

8
7
6
5

BC1
GND

GND
0.1u

ATL-128x8-0.5us-SOIC8

DE-COUPLE CAPS OF RTL8100 MUST BE

GND
PLACED AS CLOSE TO CHIP AS POSSIBLE.

The 9346 EEPROM should be

functional when powered by
3.3V

C_BE#0

9,18

D13

1N5817-S-DO-241AC

D12

1N5817-S-DO-241AC
1
FB19
300_0805

VCC3
VCC3_SB

REK-RTL8100

VDD33
2

C138

C139

0.1u

0.1u

EC2
VDD33
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8

GND

AD22
GND
AD21
AD20
AD19
VDD33
VDD25
AD18
AD17
AD16

10u
GND

AD[31..0]
2

9,18
9,18
9,18
9,18
9,18

C_BE#2
FRAME#
IRDY#
TRDY#
DEVSEL#

C_BE#2
FRAME#
IRDY#
TRDY#
DEVSEL#

GND

9,18
2

C_BE#1
PAR
SERR#
PERR#
STOP#

C_BE#1
PAR
SERR#
PERR#
STOP#

9,18
9,18
9,18
9,18
9,18

4,7,11,15
C18

PCIRST#1

1
2
3

LANRST

X_0.1u

JLAN1
D1x3-BK

C46
VDD33
LAN_USB1B
0.1u

VDD33

U5
2
1
3

TXD+
TXDRXIN+
RXIN-

6
8
7
C113

TDC
TD+
TD-

CMT
TX+
TX-

RD+
RDRDC

RX+
RXRXC

15
16
14

TX+
TX-

11
9
10

RX+
RX-

RX+
TXTX+

R203

VDD33

X_10p
C43
0.1u

X_10p
49.9

49.9

49.9

TS6121C
L05-0100020-B09

C109

NC
NC
RDN
NC
NC
RDP
TDN
TDP
GREEN+
GREEN-

JLAN1/2

LAN SELECT

1-2

ENABLED

2-3

DISABLED
1

CN2
X_10p

RN2

C37
C29

75

C44
0.1u
GND
7
5
3
1

X_10p

SPDLED

AMBER+
AMBER-

RJ45+USB+LEDx2-D20-BK-F02

FB11
1

8
6
4
2

R69
49.9

R71
300

17
18
9
13
10
14
11
15
12
16
19
20

10:100
7
5
3
1

R202
X_10p

8
6
4
2

R70

ACTLED

RX-

C112
C41

R60
300

X_0.1u

X_0.1u
30
2

Title
GND

Rev

Micro-Star

MS-6507

0B

LANGND
C42

Document Number

Realtek RTL8100 LAN

0.1u
Last Revision Date:

Wednesday, August 29, 2001

A

Sheet
E

25

of

36

R505
16,27

DDRWEA#

DDRWEA#

16,27

DDRCASA#

16,27

DDRRASA#

DDRMD0
DDRMD4
DDRMD5
DDRMD1
DDRMD6
DDRMD2
DDRMD7
DDRMD3
DDRMD8
DDRMD12
DDRMD9
DDRMD13
DDRMD14
DDRMD15
DDRMD10
DDRMD11
DDRMD20
DDRMD16
DDRMD17
DDRMD21
DDRMD18
DDRMD22
DDRMD19
DDRMD23
DDRMD24
DDRMD28
DDRMD25
DDRMD29
DDRMD26
DDRMD30
DDRMD27
DDRMD31
DDRMD32
DDRMD36
DDRMD37
DDRMD33
DDRMD34
DDRMD38
DDRMD39
DDRMD35
DDRMD44
DDRMD40
DDRMD45
DDRMD41
DDRMD42
DDRMD46
DDRMD43
DDRMD47
DDRMD54
DDRMD50
DDRMD55
DDRMD51
DDRMD48
DDRMD49
DDRMD52
DDRMD53
DDRMD62
DDRMD58
DDRMD63
DDRMD59
DDRMD60
DDRMD61
DDRMD56
DDRMD57

WEA#

CASA#

RASA#

R506
DDRCASA#
R507
DDRRASA#

RN541 1
3
5
7
RN500 1
3
5
7
RN501 1
3
5
7
RN502 1
3
5
7
RN503 1
3
5
7
RN504 1
3
5
7
RN505 1
3
5
7
RN506 1
3
5
7
RN507 1
3
5
7
RN508 1
3
5
7
RN509 1
3
5
7
RN510 1
3
5
7
RN511 1
3
5
7
RN512 1
3
5
7
RN513 1
3
5
7
RN514 1
3
5
7

2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8

33

33

33

33

33

33

33

33

33

33

33

33

33

33

33

33

WEA#

CASA#

RASA#

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3

MD0
MD4
MD5
MD1
MD6
MD2
MD7
MD3
MD8
MD12
MD9
MD13
MD14
MD15
MD10
MD11
MD20
MD16
MD17
MD21
MD18
MD22
MD19
MD23
MD24
MD28
MD25
MD29
MD26
MD30
MD27
MD31
MD32
MD36
MD37
MD33
MD34
MD38
MD39
MD35
MD44
MD40
MD45
MD41
MD42
MD46
MD43
MD47
MD54
MD50
MD55
MD51
MD48
MD49
MD52
MD53
MD62
MD58
MD63
MD59
MD60
MD61
MD56
MD57

DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7

DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11

R508
R509
R510
R511

DDRMAA0
DDRMAA1
X_0 DDRMAA2
X_0 DDRMAA3
X_0
X_0
D

R512
R513
R514
R515

DDRMAA4
DDRMAA5
X_0 DDRMAA6
X_0 DDRMAA7
X_0
X_0

R516
R517
R518
R519

MECCRS2
MECCRS6
MECCRS3
MECCRS7
MECCRS4
MECCRS5
MECCRS0
MECCRS1

DDRMAA8
DDRMAA9
X_0 DDRMAA10
X_0 DDRMAA11
X_0
X_0
DDRMAA12

R520
DDRMAA12

RN516 1
3
5
7
RN517 1
3
5
7

2
4
6
8
2
4
6
8

CB[0..7]

MECCRS[0..7]

MECCRS[0..7]

CB[0..7]

16,27

DDRMAA[0..12]
DDRMAA[0..12]

DDRMAA[0..12]

DDRCS#0 RN515 1
DDRCS#2
3
DDRCS#3
5
DDRCS#1
7

2
4
6
8

8,16,27

X_0
DDRCS#0
DDRCS#2
DDRCS#3
DDRCS#1

R523
R524
R525
R526
R527
R528
R529

MDQS#0
MDQS#1
MDQS#2
MDQS#3
MDQS#4
MDQS#5
MDQS#6
MDQS#7

R530

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

33
33
33
33
33
33
33
33

SDQS[0..8]

SDQS[0..8]

R531
MDQS#8
DDRCS#[0..3]
33
MDQS#[0..8]
DDRCS#[0..3]

DDRCS#[0..3]

8,16,27

DDRBS0

DDRBS0

DDRBS0

C504

R522
DDRBS1

DDRBS1

16,27

CLOSE TO DIMM

R521
8,16,27

MDQS#[0..8]

8,16,27

C510
DCLK0

X_0 DDRBS1

DCLK0

DCLK#0

8,16

X_10p
C505

X_0

DCLK1

DCLK1

DCLK#1

8,16

X_10p
C506
DCLK2

DCLK2

DCLK#2

8,16

DCLK3

8,16

DCLK4

8,16

C516

C522

0.1u

0.1u

C517

8,16

DCLK#3

8,16

DCLK#4

DCLK#4

8,16

DCLK#5

8,16

X_10p
C515
DCLK5

16,27

DCLK#2

X_10p
C514

X_10p
C509

V_DIMM

8,16

DCLK#3

X_10p
C508

V_DIMM

DCLK#1

X_10p
C513
DCLK3

8,16

X_10p
C512

X_10p
C507

MD[0..63]

DCLK#0

X_10p
C511

DCLK4

DDRMD[0..63]

33

CB2
CB6
CB3
CB7
CB4
CB5
CB0
CB1

X_0

MD[0..63]

DDRMD[0..63]

33

DCLK5

DCLK#5

8,16

X_10p

X_10p

C523
0.1u

0.1u

C518

C524

0.1u

0.1u

C519

C525

0.1u

0.1u

C520

C526

0.1u

0.1u

C521

C527

0.1u

0.1u

Title

Micro-Star

Rev

MS-6507

0B

Document Number

DDR_DAMPING
Last Revision Date:

Tuesday, July 24,2001

5

Sheet
1

26

of

36

DDRMAA12

R532

56

DDRMD3
DDRMD7
DDRMD2
DDRMD6
DDRMD1
DDRMD5
DDRMD4
DDRMD0
DDRMD13
DDRMD9
DDRMD12
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD20
DDRMD21
DDRMD17
DDRMD16
DDRMD19
DDRMD22
DDRMD18
DDRMD23
DDRMD29
DDRMD25
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD33
DDRMD37
DDRMD36
DDRMD32
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD55
DDRMD50
DDRMD54
DDRMD57
DDRMD56
DDRMD61
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62

RN518

RN519

RN520

RN521

RN522

RN523

RN524

RN525

RN526

RN527

RN528

RN529

RN530

RN531

RN532

RN533

1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7

2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8

DDRMAA0
DDRMAA10
DDRMAA1
DDRMAA2

47

R533
R534
R535
R536

MDQS#8 R547

16,26 MDQS#8

DDR_VTT
56
56
56
56

16,26
16,26
16,26
16,26

MDQS#3
MDQS#2
MDQS#1
MDQS#0

MDQS#3
MDQS#2
MDQS#1
MDQS#0

47

R548
R549
R550
R551

47
47
47
47
D

47

47

DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6

R537
R538
R539
R540

56
56
56
56

DDRMAA8
DDRMAA7
DDRMAA11
DDRMAA9

R541
R542
R543
R544

56
56
56
56

16,26
16,26
8,16,26
8,16,26

MDQS#7
MDQS#6
DDRCS#1
DDRCS#0

MDQS#7
MDQS#6
DDRCS#1
DDRCS#0

R552
R553
R554
R555

47
47
47
47

DDR_VTT

47

47

DDR_VTT

47
DDRMAA[0..12]

DDRMAA[0..12]

8,16,26

47

RN536
MECCRS7
MECCRS3
MECCRS6
MECCRS2

47

1
3
5
7

2
4
6
8

47
47

R545
8,16,26
8,16,26

47

DDRBS0
DDRBS1

DDR_VTT

RN537

DDRBS0

MECCRS1
MECCRS0
MECCRS5
MECCRS4

R546
DDRBS1

56

1
3
5
7

DDR_VTT

2
4
6
8

56
47
47

MECCRS[0..7]

47

MECCRS[0..7]

16,26

RN534
16,26
8,16,26
8,16,26
16,26

47

MDQS#5
DDRCS#2
DDRCS#3
MDQS#4

MDQS#5
DDRCS#2
DDRCS#3
MDQS#4

1
3
5
7

DDR_VTT

2
4
6
8
47

47

47

47

RN535
DDRCKE3
DDRCKE0
DDRCKE2
DDRCKE1

1
3
5
7

DDR_VTT

2
4
6
8
47

DDRMD[0..63]

DDRMD[0..63]

DDRCKE[0..3]

16,26

DDRCKE[0..3]

8,16

R556
16,26 DDRWEA#
16,26 DDRCASA#
16,26 DDRRASA#

DDRWEA#

Title
56

R557
DDRCASA#

Micro-Star

DDR_VTT

MS-6507

0B

56
R558

DDRRASA#

Rev

Document Number
56

DDR_TERMINATION
Last Revision Date:
Sheet

T u esday, July 24, 2001

5

27

of

36

DDR_VTT

V_DIMM
C532

VCC5_STR

10u-1206
C533
V_DIMM
0.1u
C534

C528
0.1u
R563

10K

C531
10u
0.1u
C536

U500A

2
R564

Q500

0.1u
C537

CEU603AL-S-TO252

10K

LMV358

0.1u
C535

0.1u
C538
DDR_VTT

R565

0.1u
C539

VCC5_STR
X_4.7

R560

C529
1000u

C530
1000u

8
6

LMV358
+

Q501

0.1u
C541

CEU603AL-S-TO252
S

0.1u
C540

U500B

10K

0.1u
C542

R561
10K

10u-1206
C543
R562
0.1u
C544

200

0.1u
C545

0.1u
C546

0.1u
C547

0.1u
C548

0.1u
C549

0.1u
C550

0.1u
C551

0.1u
C552

10u-1206
C553

0.1u
C554

10u-1206
C555

0.1u
A

Title

Micro-Star

Rev

MS-6507

0B

Document Number

DDR_T_POWER
Last Revision Date:

Wednesday, August 29,2001

5

Sheet
1

28

of

36

Jumper Setting & Connector Setting

D

Jumper
J1
J2
J3
J4
J5
J6
J7
1-2
2-3
REMOVED

Description
INTERUDER HEADER
CHASISS INTRUSION HEADER
AUDIO REAR PHONE JACK (LINE_IN, LINE_OUT, MIC_IN)
AUDIO AUX HEADER
AUDIO FRONT PANEL HEADPHONE JACK HEADER
AUDIO INTERNAL SPEAKER HEADER (ATAPI)
BIOS function
Normal
(Default)
Configuration Mode
Recovery

JBAT1
1-2
2-3

CLEAR CMOS
NORMAL
CLEAR CMOS

IR1
CD_IN1
MDM_IN1
JP1
1-2
2-3

IR HEADER
CDROM HEADER (ATAPI)
TELEPHONY HEADER (ATAPI)
CNR RISER CODEC SELECT HEADER
AUTO MODE
(Default)
PRIMARY AUDIO CODEC ONBOARD

Connector
U3
IDE1
IDE2
DIM1
DIM2
AGP1
PCI1
PCI2
PCI3
COM1
COM2
LPT
FDD1
JMDM1
JWOL1
KBMS1
C_FAN1
S_FAN
USB1
USB2
POWER
JSMB1
F_P1
Pin1
Pin2
Pin3
Pin4
Pin5,8,12,13
Pin6
Pin7
Pin9
P_FAN1
JPW1

(Default)

Description
INTEL mPGA478-B CPU
Primary
Secondary
SDRAM DIMM1
SDRAM DIMM2
AGP Slot
PCI Slot1
PCI Slot2
PCI Slot3
Serial Port
Serial Port
Parallel Port
Floopy
MODEM RING HEADER
LAN WAKEUP HEADER
PS/2 Keyboard and PS/2 mouse
CPU FAN HEADER
System FAN HEADER
USB REAR CONNECTOR
USB INTERNAL HEADER
ATX Power
SMBUS HEADER
Front Panel
Power of Hard LED
Power LED
Hard LED
Suspend LED
GND
Power Button
Reset Button
VCC
ATX FAN HEADER
ATX12V Power

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

JUMPER SETTING
Last Revision Date:
Sheet

Monday, July 23, 2001

5

29

of

36

Power Delivery Map

A T X 1 2V POWER Supply
D

3.3V

5V

5VSB
1A

12V

VRM9.2

Processor Core
Processor Vtt

Power
Translator
ACPI IC

1.5V VREG

MCH Core 1.5V

MCH Vtt
MCH AGP

OP

1.8V VREG

M C H H U B Interface 1.8V
M C H Memory DDR 2.5V

2.5V DDR
FET
D D R memory 2.5V
2.5V VREG

ICH2 Core 1.8V

ICH2 I/O 3.3V
I C H 2 Resume 1.8V
1.8V VREG

I C H 2 Resume I/O 1.8V

5V TO 3.3V
RESISTOR

ICH2 RTC 3.3V

ICH2 5V

FWH 3.3V
B

L P C Super I/O 3.3V

C L OCK GEN 3.3V

H A R D WARE AUDIO 3.3V

P C I LAN 3.3V/2.5V

5 V D u a l For USB and K/B

1.25V
DDR_T_POWER

DDR memory

Termination

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Power Delivery Map

Last Revision Date:

Monday, July 23, 2001

8

Sheet

30
1

of

36

Pentium 4 Processor /Northwood mPGA 478

Source Synchronous Signal Group and the Associated Strobes

Signals
REQ[4:0],A[16:3]#

Associated Strobe
ADSTB0#

ADSTB0#

A[31:17]#

ADSTB1#

ADSTB1#

D[15:0]#,DBI0#
D[31:16]#,DBI1#

DSTBP0#,DSTBN0#
DSTBP1#,DSTBN1#

D[47:32]#,DBI2#
D[63:48]#,DBI3#

DSTBP2#,DSTBN2#
DSTBP3#,DSTBN3#

Signals

Length

Data
Address

2.0" to 10.0"
2.0" to 10.0"

+/- 100 mil

+/- 200 mil

Strobe

2.0" to 10.0"

+/- 25 mil

Clock

2.0" to 10.0"

Don't need

should be +- 25mils
D

Inaccuracy

* Delta=(CPU_pkglen.net-CPUpkglen.strobe)+(CS_pkglen.net-CS_pkglen.strobe)
Trace : 7 mil width 13mil space

Miscellaneous Signals
C

USB
HL_STB/HL_STB#
HL[10..0]

Taces 5mils
HL[0:10]

20mils

* USB Trace width : 9 mils

20mils

HL_STB
15mils

HL[0:10]

15mils
HL_STB#

20mils

* USB Trace Spacing : 25 mils

* D i fferential USB Signlas Trace
Spacing : 18 mils
* USB Power Trace must be 40mils width

Others

HL[0:10]
20mils

HL[0:10]
* Max Length : 8"
* STB and STB# Length must beequal

Others
* Max Length : 8"
* Length must be matched within +/- 0."
of the Strobe Signals

AGP
SIGNALS
1X Timing group

Maximum
Length

Width Space

Dismatch
Length

Relative to

2X/4X Timing group

SET#1
GAD[15..0]
GC_BE#[1..0]
GAD_STB0
GAD_STB0#

AGPCLK
PIPE#
RBF#
WBF#
ST[2..0]
GFRAME#
GIRDY#
GTRDY#
GSTOP#
GDEVSEL#
GREQ#
GGNT#
GPAR

SET#2
GAD[31..16]
GC_BE#[3..2]
GAD_STB1
GAD_STB1#
SET#3
SBA[7..0]
SB_STB
SB_STB#

1X Timing group

7.5"

5 mil

5 mil

2X/4X Timing group

SET#1

7.25"

5 mil

20 mil

+/- 0.125"

GAD_STB0
GAD_STB0#

2X/4X Timing group

SET#2

7.25"

5 mil

20 mil

+/- 0.125"

GAD_STB1
GAD_STB1#

2X/4X Timing group

SET#3

7.25"

5 mil

20 mil

+/- 0.125"

SB_STB
SB_STB#

2X/4X Timing group

SET#1

6"

5 mil

15 mil

+/- 0.25"

GAD_STB0
GAD_STB0#

2X/4X Timing group

SET#2

6"

5 mil

15 mil

+/- 0.25"

GAD_STB1
GAD_STB1#

2X/4X Timing group

SET#3

6"

5 mil

15 mil

+/- 0.25"

SB_STB
SB_STB#

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

Layout Guide
Last Revision Date:
Sheet

Monday, July 23, 2001

5

31

of

36

CPUCLK
MCHCLK

0.5" MAX

L1

CPUCLK#
MCHCLK#

L1

RS
RS

0"~ 0.2"

2"~ 9"

L2

L4

DEVICE
CPU

L4

MCH
ITP

L2
0"~ 0.2"

L3

L1+L2
X
X
X

*
*
*
*

Line Width : 7.0 mil

Differential pair spacing : 7.0mil
Spacing to other traces : 28 mil
BCLK0/BCLK1 LENGTH MATCH +/- 10 mil

L3

RT

RT

GND
MCH_66
ICH_66

0"~ 0.5 "

L1

AGP_66

4"~ 8.5"

RS

L2

ICH_PCLK

L1+L2

MCH
ICH

X
X +/- 100 mils

AGP

0"~ 0.5 "

4"~ 8.5"

RS

L1

ISAPCLK

L2

PCICLK[4..0]

0"~ 0.5 "

ICH_14

L1

OSC

ICH_48

0"~ 0.5 "

SIO_48

L1

4"~ 8.5"

RS

L2

3"~12"

RS

L2

* Line Width : 5.0 mil

* Spacing to other traces : 20 mil

X- 4"

DEVICE

FWH_PCLK
SIO_PCLK

DEVICE

L1+L2

ICH
FWH

X
X

SIO

PCI

X-2.5"

DEVICE
ICH

L1+L2
Y

ISA BRIDGE

DEVICE

* Line Width : 5.0 mil

* Spacing to other traces : 10 mil

L1+L2

ICH
SIO

* Line Width : 5.0 mil

* Spacing to other traces : 20 mil
* L1/L2 TRACE SAME AS MCH_66 TRACE LENGTH

* Line Width : 5.0 mil

* Spacing to other traces : 20 mil

CK 408

2.5" TO 9"- A

0.5" TO 6.5"

RN

* Line Width : 7.0 mil

* Differential signls space : 14mils
* Differential signls length mismatch +/- 7mil

CNR

A
LAN_PCLK
RST

RXD[2..0]

ICH2

TXD[2..0]

Title

M i c ro-Star

AS SHORT AS POSSIBLE

Rev

MS-6507

0B

Document Number

CK-408 and LAN Design Guide

Last Revision Date:
Sheet

Monday, July 23, 2001

5

32

of

36

SCK[0..2]
SCK#[0..2]

Trace Width : 5 mils

A: 40 mils max

Differential pair spacing : 7 mils.

Isolation spacing : 20 mils

B+D: 2" ~ 6.5"

C+E: 2" ~ 7.0"

SCK[3..5]
SCK#[3..5]

SDQS[0..8]

A: 2" ~ 5"
B: 0.5" MAX

(A + B + D)

SDQS[0..8] (A + B) + (1" ~ 2")

SCK[3..5]
(A + C + E)
SCK#[3..5]

SDQS[0..8] (A + B + C) + (1" ~ 2")

Rs

RTT
GND

Trace spacing : 12 mils

SCB[0..7]

SCK#[0..2]
R

Length: SCK[0..2] = SCK#[0..2]

Length: SCK[3..5] = SCK#[3..5]

Trace Width : 5 mils

SDQ[0..63]

SCK[0..2]

C
A

DDR_VTT = 1.5V

Rs = 33 ohm +- 5%

Rtt = 47 ohm +- 5%

SDQ[0..7]

SDQS0

SDQ[8..15]

SDQS1

SDQ[16..23]
SDQ[24..31]

SDQS2
SDQS3

SDQ[32..39]
SDQ[40..47]

SDQS4
SDQS5

SDQ[48..55]

SDQS6

SDQ[56..63]
SCB[0..7]

SDQS7
SDQS8

Matching requirement is +- 25 mils to strobe

C: 0.3" ~ 0.5"
D: 0.1" ~ 0.8"
Rs

Trace Width : 5 mils

SMA[0..12]

RTT

DDR_VTT = 1.5V

Trace spacing : 12 mils

SBS[0..1]
SRAS#

A: 40 mils max

SCAS#

B: 2" ~ 3.5"

SWE#

C: 0.5" max
D: 0.3" ~ 0.5"

SCK[0..2]
SCK#[0..2]

Rs = 0 ohm +- 5%

SCK[3..5]
Rtt = 56 ohm +- 5%

SCK#[3..5]

(A + B + D)

(A + C + E)

SMA[0..12]
SBS[0..1]
SMA[0..12]
SBS[0..1]

(A + B + C) + (1" ~ 4")

(A + B + C + D) + (1" ~ 4")

E: 0.1" ~ 0.8"
Rs

Trace Width : 5 mils

SCS#[0..1]

RTT

DDR_VTT = 1.5V

Trace spacing : 12 mils

SCKE[0..1]
A

A: 40 mils max
B: 2" ~ 3.5"

SCK[0..2]

Rs = 0 ohm +- 5%

C: 0.5" max
D: 0.4" ~ 1.3"

Rs

Trace Width : 5 mils

SCS#[2..3]
SCKE[2..3]

RTT

(A + B + D)

SCK[3..5]
(A + C + E)
SCK#[3..5]

SCK#[0..2]

Rtt = 47 ohm +- 5%

SCS#[0..1]
SCKE[0..1]
SCS#[2..3]
SCKE[2..3]

(A + B + C) + (1" ~ 4")
(A + B + C) + (1" ~ 4")

DDR_VTT = 1.5V

Trace spacing : 12 mils

A

A: 40 mils max
B: 2" ~ 3.5"

Rs = 0 ohm +- 5%

Rtt = 47 ohm +- 5%

C: 1.0" max
D: 0.1" ~ 0.8"

RCVENIN#

RCVENOUT#

A: 40 mils max

DIMM1

DIMM2
A

B: exactly 1"

A
Title

M i c ro-Star
MCH

Rev

MS-6507

0B

Document Number

DDR DIMM DG
Last Revision Date:
Sheet

Monday, July 23, 2001

5

33

of

36

PCB OTHER COMPONENT

SIMULATION TRACE

U3_X1

X_PIN1*2

X_PIN1*2

SDR

AGP

J2
VCC5

BS1
3

BS4

J1

BS2
3

BS6

BS3

BS5

U4_X1

BS1_X1

BS2_X1

BS3_X1

BS4_X1

BS6_X1

BS7_X1

BS8_X1

BS9_X1

BS1_X1

BS2_X1

BS3_X1

BS4_X1

BS6_X1

BS7_X1

BS8_X1

BS9_X1

FM1

FM2

FM3

FM4

FM5

FM6

FM7

FM8

X_FM

X_FM

X_FM

X_FM

X_FM

X_FM

X_FM

X_FM

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

MANUAL
Last Revision Date:
Sheet

Tuesday, July 24, 2001

5

34

of

36

BIOS
D

U23[1]
JBAT1 Clear CMOS
1-2
Normal *
2-3
Clear CMOS

BAT SOCKET

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

J7 BIOS Update

JBAT1(1-2)

BAT1[A]
BAT-CR2032-3V-210mAh

Locked

OPEN

Unlocked

JC-D2-GN

SHORT

J7(1)
X_JC-D2-GN

F R O N T PANNEL BUZZER

JP2

On board codec

JLAN1

F_P114-15

1-2

ENABLED

1-2

ENABLED

2-3

DISABLED

2-3

DISABLED

X_JC-D2-GN

VPP
VCC
RST#
CLK
FGPI3
FGPI4
FGPI2
IC(VIL)
FGPI1
GNDA
FGPI0
VCCA
WP#
GND
TBL#
VCC
ID3
INIT#
ID2
FWH4
ID1
RFU
ID0
RFU
FWH0
RFU
FWH1
RFU
FWH2
RFU
GND
FWH3
SST-256K*8-33MHz-PLCC32

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

LAN SELECT

JP2(1-2)

JLAN1(1-2)

JC-D2-GN

JC-D2-GN

MS6507 PCB

COM

Hooker

Heat sink

CN7(A)

U12_X

U12_X1

U12_X2

U12_X3

CN7(B)

U12_X4

PCB

D1x3-1:2-BK

COM-D9-GN
D1x3-1:2-BK

D1x3-1:2-BK

COM-D9-GN

D1x3-1:2-BK

Title

M i c ro-Star

Rev

MS-6507

0B

Document Number

PACKING BOM
Last Revision Date:
Sheet

Wednesday, August 29, 2001

5

35

of

36

HISTORY

From 0A to 0B
1.Remove H/W Audio.

2.Add CNR Slot.

3.Reduce 1cm in width.

4.Add thermtrip circuit.
5.Fix no cpu can not shutdown issue.
6.Change super I/O to 627F compatible.
7.Fix power sequency issue.
8.Fix Glitch on DDR signal.
9.Modified Vcore power plane placement.
10.Add Intel front pannel pin header.
C

Title

Micro-Star

Rev

MS-6507

0B

Document Number

HISTORY
Last Revision Date:

Monday, July 23, 2001

5

Sheet

36
1

of

36