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Printed in Korea P/NO : MFL67647401 (1212-REV00)

CHASSIS : LA32B
MODEL : 32LN5300 32LN5300-UB
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
LED TV
SERVICE MANUAL
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CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 9
TROUBLE SHOOTING ............................................................................ 16
BLOCK DIAGRAM .................................................................................. 22
EXPLODED VIEW .................................................................................. 24
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
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LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
SAFETY PRECAUTIONS
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LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create confict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board mod-
ule or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo-
sion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specifed otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a fammable mixture.
Unless specifed otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fxtures specifed in this
service manual.
CAUTION: Do not connect the test fxture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged eas-
ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some feld-effect transistors
and semiconductor chip components. The following techniques
should be used to help reduce the incidence of component dam-
age caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter-
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo-
sure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classifed as anti-static can generate
electrical charges suffcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges suffcient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electri-
cally shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replace-
ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted foor can generate static electricity suf-
fcient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 F to 600 F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 F to 600 F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 F to 600 F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder fows onto and around both the compo-
nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
- 5 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent fat against the cir-
cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as pos-
sible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec-
tions).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con-
nected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
- 6 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied LED TV with LA32Bchassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 C 5 C(77 9 F) , CST : 40 C5 C
2) Relative Humidity: 65 % 10 %
3) Power Voltage
Market Input voltage Frequency Remark
USA 110~240V 50/60Hz Standard Voltage of each
product is marked by
models
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM
5) The receiver must be operated for about 20 minutes prior to
the adjustment
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification

4. General Specification
No Item Specifcation Result Remark
1. Receiving System 1) ATSC / NTSC-M / 64 QAM / 256 QAM
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4. Market NORTH AMERICA
5. Screen Size 32/39/42/47/50/55inch Wide
(1920 1080)
55LN5400-UA
50LN5400-UA
47LN5400-UA
42LN5400-UA
42LN5300-UB
39LN5300-UB
32LN5300-UB
55LN5200-UA
47LN5200-UA
42LN5200-UA
32/37inch Wide (1366 768) 37LN530B-UA
32LN530B-UA
32LN520B-UA
6. Aspect Ratio 16:9
7. Tuning System FS
- 7 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No Item Specifcation Result Remark
8. Module POLA LC550DUK-SEE1 LGD 55LN5400-UA
Direct LC500DUE-SFR1 LGD 50LN5400-UA
Direct LC470DUE-SFR1 LGD 47LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5300-UB
POLA TBD AUO 42LN5300-UB
POLA HC420DUN-SLFP1 LGD 42LN5300-UB
POLA HC390DUN-VCFP1 CMI 39LN5300-UB
POLA TBD AUO 39LN5300-UB
POLA HC320DXN-VSFP1 CSOT 32LN5300-UB
Direct LC320DUE-SFR1 LGD 32LN5300-UB
Direct LC370DXE-SFR1 LGD 37LN530B-UA
Direct LC320DXE-SFR1 LGD 32LN530B-UA
POLA HC320DXN-SLFP1 LGD 32LN530B-UA
Direct i-D LGD 55LN5200-UA
Direct i-D LGD 47LN5200-UA
Direct i-D LGD 42LN5200-UA
Direct i-D LGD 32LN520B-UA
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
- 8 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Supported video resolutions
5.1. Component input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. HDMI Input (DTV)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
DTV
1. 720*480 31.47 60.00 27.027 SDTV 480P
2. 720*480 31.47 59.94 27.00 SDTV 480P
3. 1280*720 45.00 60.00 74.25 HDTV 720P
4. 1280*720 44.96 59.94 74.176 HDTV 720P
5. 1920*1080 33.75 60.00 74.25 HDTV 1080I
6. 1920*1080 33.72 59.94 74.176 HDTV 1080I
7. 1920*1080 67.50 60.00 148.50 HDTV 1080P
8. 1920*1080 67.432 59.94 148.352 HDTV 1080P
9. 1920*1080 27.00 24.00 74.25 HDTV 1080P
10. 1920*1080 26.97 23.976 74.176 HDTV 1080P
11. 1920*1080 33.75 30.00 74.25 HDTV 1080P
12. 1920*1080 33.71 29.97 74.176 HDTV 1080P
- 9 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application
This spec. sheet applies to LA32B Chassis applied LED TV all
models manufactured in TV factory
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 5 C of temperature and 6510% of relative humidity if
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 C
In case of keeping module is in the circumstance of 0C, it
should be placed in the circumstance of above 15C for 2
hours
In case of keeping module is in the circumstance of below
-20C, it should be placed in the circumstance of above
15C for 3 hours.
Caution
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area

3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment : ADC adjustment is OTP (Auto ADC)
(2) EDID download : HDMI
Above adjustment items can be also performed in Final
Assembly if needed.
Both Board-level and Final assembly adjustment items can
be check using In-Start Menu (1.Adjust Check).
3.2. Final assembly adjustment
(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)
(5) GND and HI-POT test
3.3. Appendix
(1) Shipment conditions
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information
4. MAIN PCBA Adjustments
* Download
(1) Execute ISP program Mstar ISP Utility and then click
Config tab.
(2) Set as below, and then click Auto Detect and check OK
message
If display Error, Check connect computer, jig, and set.
(3) Click Connect tab. If display Cant , Check connect
computer, jig, and set.
(4) Click Read tab, and then load download file(XXXX.bin) by
clicking Read
(5) Click Auto tab and set as below.
(6) Click Run.
(7) After downloading, check OK message.

(1)
(2) OK
(3)
Please Check the Speed :
To use speed between from 200KHz to 400KHz
(4)
filexxx.bin
(5)
(6)
(7) .OK
- 10 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.1. ADC Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate RGB
deviation.
ADC adjustment is OTP (Auto ADC)
4.2. EDID Download
4.2.1. Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of Plug and Play.
4.2.2. Equipment
(1) Since EDID data is embedded, EDID download JIG, HDMI
cable is not need.
(2) Adjust by using remote controller
4.2.3. Download method (using DFT)
PC(for communication through RS-232C), UART baud rate:
115200 bps
Command : aa 00 00 (Start Factory mode)
Command : ae 00 10 (Download All EDID)
Command : aa 00 90 (End of Factory mode)
4.2.4. Download method (using Service Remocon)
(1) Press Adj. key on the Adj. R/C.
(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
Caution : When EDID Download, must remove HDMI
Cable.
(6) EDID Write confirmation
4.2.5. EDID DATA
4.2.5.1. North America (PCM)
4.2.5.1.1. FHD Model
HDMI 1-FHD-8BIT (C/S : E808)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
HDMI 2-FHD-8BIT (C/S : E8F8)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8
EDID D/L (PCM)
HDMI1 : OK
HDMI2 : OK
- 11 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.2.5.1.2. HD Model
HDMI 1-HD (C/S : 7008)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
HDMI 2-HD (C/S : 70F8)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8
4.2.5.2. AC3 EDID Data
4.2.5.2.1. FHD Model
HDMI 1-FHD-8BIT (C/S : E896)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
HDMI 2-FHD-8BIT (C/S : E886)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
- 12 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.2.5.2.2. HD Model
HDMI 1-HD (C/S : 7096)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
HDMI 2-HD (C/S : 7086)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
4.3. Tool Option Input
- Input Model Tool Option according to BOM
5. Final Assembly Adjustment
5.1. White Balance Adjustment
5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panels W/B deviation
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 255 C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
dont power off
5.1.1.2. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80~ 100)
(3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
5.1.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14)
(2) Adj. Computer(During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) Video Signal Generator MSPG-925F 720p/204-Gray
(Model:217, Pattern:49)
Only when internal pattern is not available
Color Analyzer Matrix should be calibrated using
CS-1000
- 13 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5.1.3. Equipment connection
5.1.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj
RS-232C COMMAND
Explanation
CMD DATA ID
Wb 00 00 Begin White Balance adj.
Wb 00 ff End White Balance adj.
(internal pattern disappears )
(2) Adjustment Map
Adj. item
Command
(lower case ASCII)
Data Range
(Hex.)
Default
(Decimal)
CMD1 CMD2 MIN MAX
Cool R Gain j g 00 C0 172
G Gain j h 00 C0 172
B Gain j i 00 C0 192
R Cut 128
G Cut 128
B Cut 128
Medium R Gain j a 00 C0 192
G Gain j b 00 C0 192
B Gain j c 00 C0 192
R Cut 128
G Cut 128
B Cut 128
Warm R Gain j d 00 C0 192
G Gain j e 00 C0 192
B Gain j f 00 C0 172
R Cut 128
G Cut 128
B Cut 128
5.1.5. Adjustment method
5.1.5.1. Auto WB calibration
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment.
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium,
Warm)
(6) Remove probe and RS-232C cable.
W/B Adj. must begin as start command wb 00 00 , and
finish as end command wb 00 ff, and Adj. offset if need.
5.1.5.2. Manual adj. method
(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
(3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White-
Balance then press the cursor to the right (KEY).
(When KEY() is pressed 204 Gray(80IRE) internal
pattern will be displayed)
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
CASE
First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
i) Decrease the R, G.
(2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
(3) x >target , y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
How to adjust
(1) Fix G gain at least 172
Adjust R, B Gain (In Case of Mostly Blue Gain Saturation)
(2) When R or B Gain > 255, Release Fixed G Gain and
Readjust
CASE Medium / Warm
First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
i) Decrease the R, G.
(2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
(3) x > target , y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
Color Analyzer
Computer
Pattern Generator

Signal Source
Probe
RS-232C
RS-232C
RS-232C
If TV internal pattern is used, not needed
- 14 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5.1.6. Reference
(White Balance Adj. coordinate and color
temperature)
Luminance: 204 Gray, 80IRE
Normal line
model: (normal line)LN5xxx, LA6xxx, LA7xxx, LA8xxx
H/R Time(Min)
Cool Medium Warm
x y x x y x
269 273 285 293 313 329
1 0-2 281 290 297 310 322 342
2 3-5 280 288 296 308 321 340
3 6-9 279 287 295 307 320 339
4 10-19 277 284 293 304 318 336
5 20-35 275 280 291 300 316 332
6 36-49 273 277 289 297 314 329
7 50-79 271 275 287 295 312 327
8 80-119 270 274 286 294 311 326
9 Over 120 269 273 285 293 310 325
Aging chamber line
(Aging chamber) Model : LN5xxx, LA6xxx, LA7xxx, LA8xxx
St andar d col or coor di nat e and t emper at ur e usi ng
CA-210(CH-14) by aging time
H/R Time(Min)
Cool Medium Warm
x y x x y x
269 273 285 293 313 329
1 0-5 280 288 296 308 321 340
2 6-10 276 283 292 303 317 335
3 11-20 273 278 289 298 314 330
4 21-30 270 275 286 295 311 327
5 31-40 267 272 283 292 308 324
6 41-50 266 270 282 290 307 322
7 51-80 265 269 281 289 306 321
8 81-119 264 267 280 287 305 319
9 Over 120 263 266 279 286 304 318
5.2. Option selection per country
5.2.1. Overview
(1) Tool option selection is only done for models in Non-USA
North America due to rating
(2) Applied model: LA32B Chassis applied to CANADA and
MEXICO
5.2.2. Country Group selection
(1) Press ADJ key on the Adj. R/C, and then select Country
Group Menu
(2) Depending on destination, select US, then on the lower
Country option, select US, CA, MX.
Selection is done using +, - KEY
(3) Using DFT(Auto)
PC (for communication through RS-232C) -> UART Baud
rate : 115200 bps
Command : ah 00 00 DATA(Area Number(hexadecimal))
ITEM DATA(Area Number) AREA
AREA OPTION1 0 USA
1 CANADA
2 MEXICO
5.2.3. Tool Option inspection
Press Adj. key on the Adj. R/C, then select Tool option
Model Module
Tool
option1
Tool
option2
Tool
option3
Tool
option4
32LN5300-UB LGD 545 41478 37004 12031
47LN5400-UA LGD 1569 33286 37004 46847
55LN5400-UA LGD(POLA) 2065 33286 37004 40703
50LN5400-UA LGD 1825 33286 37004 48895
42LN5400-UA LGD 1313 33286 37004 36607
42LN5300-UB LGD 1313 41478 37004 03839
42LN5300-UB AUO 9505 41478 37004 03839
42LN5300-UB LGD(POLA) 1297 41478 37004 03839
39LN5300-UB CMI(POLA) 5137 41478 37004 03839
39LN5300-UB AUO(POLA) 9233 41478 37004 03839
32LN5300-UB CSOT(POLA) 4625 41478 37004 03839
32LN530B-UB LGD 545 45574 37004 03839
32LN530B-UB LGD(POLA) 545 45574 37004 03839
Tool option can be reconstructed by Software
5.3. Ship-out mode check (In-stop)
- After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode
- 15 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
6. GND and HI-POT Test
6.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition
6.2. GND & HI-POT auto-check
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically
6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
7. AUDIO output check
7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio practical
max Output, L/R
(Distortion=10%
max Output)
9.0
8.5
10.9
9.3
12.0
9.8
W
Vrms
(1) Measurement
condition
- EQ/AVL/Clear
Voice: Off
(2) Speaker
(8 Impedance)
* USB S/W Download (option, Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting
(3) Show the message "Copying files from memory"
(4) Updating is staring.
(5) After updating is complete, The TV will restart automatically.
(6) If TV turns on, check your updated version and Tool option.
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In this case, you have to
channel recover. If all channel data is cleared, you didn't
have a DTV/ATV test on production line.
After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push OK button.
(3) Punch in the number. (Each model has their number.)
- 16 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
TROUBLE SHOOTING
1. Power-up boot check
Check stand-by Voltage.
P401 3, 5pin : +3.5V_ST
Check 18pin Power connector
Main B/D 3.5V Line
Short Check
Check X201 clock
24 MHz
Replace X201
Check P401 PWR_ON.
1pin : 3.3V
Replace Mstar(IC101) or Main board
Check Multi Voltage
P401 9, 10pin : 24V
/ 13, 14, 15pin:12V
Replace Power Board
Check DRV ON Control
P403 2 pin : High
Check Power Board
Check IC402/3/7 Output Voltage
IC402 : 2.5V
IC403 : 1.15V
IC407 : 1.5V
Q403 : 3.3V
Replace IC402, IC403, IC407, Q403
Re-download software.
Check stand-by Voltage
L404, L408 : +3.5V
Replace L404, L408
Check LVDS Power Voltage
Q409 : 12V
Replace Q409
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board
Change Module
ok
ok
ok
ok
ok
ok
ok
ok
ok No
No
ok
Replace Power board.
ok
No
No
No
No
No
No
No
No
- 17 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. Digital/Analog TV Video
Check RF Cable & Signal
Check Tuner 3.3V Power
L3703
Replace L3703
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
Check IF_P/N Signal
TU3700 10/11 Pin
Replace IC3703
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
ok
ok
ok
ok
No
No
No
No
Bad Tuner. Replace Tuner.
3. AV Video
Check input signal format.
Is it supported?
Check AV Cable for damage
for damage or open conductor
Check JK1702, CVBS Signal Line
R1722
ok
ok
ok
No
Replace Jack
ok
Check CVBS_DET Signal Replace R1713
No
Check Mstar LVDS Output
No
- 18 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4. Component Video
Check input signal format.
Is it supported?
Check Component Cable
for damage or open conductor.
Check JK1702
Y/PB/PR signal Line
ok
ok
ok
No
Replace Jack
Check COMP_DET Signal Replace R1712 or R1713
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
ok
No
5. HDMI Video
Check input signal format.
Is it supported?
Check HDMI Cable conductors
for damage or open conductor.
Check EDID
R832, R833, R834, R835 I2C Signal
Check JK801, JK803
ok
ok
ok
No
No
Replace the defective IC or re-download EDID data
ok
Replace Jack
Check HDMI Signal
Check other set
If no problem, check signal line
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
ok
No
Replace Main Board
No
Check HDMI_DET (HPD)
No
Replace R803, R801, R826, R807, R817, Q801, R819, R818, R830
- 19 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
6. MHL Video
Check input signal format.
Is it supported?
Check MHL Cable conductors
for damage or open conductor.
Check MHL Signal (R214, R215)
Check JK803
ok
ok
ok
No
No
Replace the defective IC or re-download EDID data
ok
Replace Jack
Check MHL Signal
Check other set
If no problem, check signal line
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
ok
No
Replace Main Board
No
Check CD_Sense, Cbus, Vbus
No
Replace R810, R802, R831, R830, IC802, D800
- 20 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. All Source Audio
Check the TV Speaker Menu
(Menu -> Audio -> TV Speaker)
On
ok
ok
Check Output Signal P3401
1, 2, 3, 4 pin.
Replace Audio AMP IC(IC3401)
ok
No
Check Connector & P3401
Replace connector
if found to be damaged.
ok
No
Check speaker resistance
and connector damage.
Replace speaker.
ok
No
Off
Toggle the Menu
Check AMP IC(IC3401) Power
24V, 3.3V
No
Replace Amp IC(IC501)
Check Mstar I2S Output
IC3401 37,38,39 Pin
No
Check signal line. Or replace Mstar(IC101)
Check Mstar AUDIO_MASTER_CLK
R148
No
Replace Mstar(IC101) or Main Board.
ok
Check AMP I2C Line
R3406, R3407
No
Check signal line. Or replace Mstar(IC101)
8. Digital/Analog TV Audio
Check RF Cable & Signal
Follow procedure
7. All source audio
trouble shooting guide.
ok
Check Tuner 3.3V Power
L3703
Replace L3703
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
Check IF_P/N Signal
TU3700 10/11 Pin
Replace IC3703
ok
ok
ok
No
No
No
Bad Tuner. Replace Tuner.
- 21 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9. AV Audio
Check AV Cable for damage
for damage or open conductor
Check JK1702 Signal Line
R1714,R1715
ok
ok
No
Replace Jack
Follow procedure
7. All source audio
trouble shooting guide.
10. Component Audio
Check Component Cable
for damage or open conductor.
Check JK1702 Signal Line
R1714,R1715
ok
ok
No
Replace Jack
Follow procedure
7. All source audio
trouble shooting guide.
- 22 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
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S
i
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e
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D
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H
D
M
I
M
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L
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V
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,

L
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R
C
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R
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L
I
R

&

L
E
D

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E
Y
1
I
R
L
E
D
_
R
I
2
C
R
S
-
2
3
2
C
F
P
C
(
3
0
P
/
H
D
)
M
A
X
3
2
3
2
R
S
2
3
2
C
C
L
K

6
6
7
M
H
z
I
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n
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l

M
i
c
o
m
(
P
M
)
I
2
C
D
D
R
3

1
2
8
M
B
(
1
G
b
)

H
y
n
i
c
H
5
T
Q
1
G
6
3
D
F
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4
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5
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T
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b
i
t
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a
l
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I
M
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I
2
1
5
8
_
A
T
S
C
_
1
I
N
P
U
T
)
A
_
I
F
A
M
P
S
T
A
3
8
0
B
W
E
(
C
L
K

8
0
0
M
H
z
)
- 23 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
M
1
E
E
P
R
O
M
A
m
p
T
u
n
e
r
C
H

2
I
2
C
_
S
C
L
I
2
C
_
S
D
A
2
2
3
.
3
V
2
.
2
k

1
k

T
U

_
S
C
L
T
U

_
S
D
A
C
H

5
C
H

6
T
U

_
S
C
L
T
U

_
S
D
A
1
.
8
k
3
3
2
2
3
.
3
V
3
.
3
V
0
x
A
0
0
x
2
0
0
x
C
0
0
1
8
p
- 24 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A
2
A
9
A
1
0
S
e
t

+

S
t
a
n
d
S
t
a
n
d

B
a
s
e
+
S
t
a
n
d

B
o
d
y
L
V
1
3
0
0
2
0
0
5
0
0
1
2
2
1
2
3
5
3
0
5
4
0
5
1
0
1
2
0
9
0
0
1
2
0
9
1
0
5
2
1
4
0
0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SC1_SOG_IN CI_TS_DATA[0]
PCM_D[6]
PCM_5V_CTL
/PCM_CE
SC1_FB
CI_TS_CLK
PCM_A[10]
PCM_A[9]
HP_LOUT
CI_TS_DATA[2]
CI_TS_SYNC
PCM_A[13]
SC1_ID PCM_D[1]
HP_DET
SCART1_MUTE
PCM_D[5]
/PCM_WE
SC1_CVBS_IN
/PCM_IRQA
PCM_D[3]
PCM_D[0]
/PCM_CD
CI_TS_DATA[5]
PCM_D[2]
PCM_A[14]
CI_TS_DATA[4]
SCART1_Lout
/PCM_REG
HP_ROUT
/PCM_IOWR CI_TS_DATA[1]
PCM_RST
PCM_A[12]
CI_TS_VAL
CI_TS_DATA[3]
/PCM_WAIT
SCART1_Rout
CI_TS_DATA[6]
PCM_D[4]
PCM_A[8]
DTV/MNT_VOUT
PCM_D[7]
CI_DET
/PCM_OE
SIDE_HP_MUTE
CI_TS_DATA[7]
S2_RESET
/PCM_IORD PCM_A[11]
SC1_B+/COMP1_Pb+
SC1_G+/COMP1_Y+
SC1_R+/COMP1_Pr+
SC1/COMP1_L_IN
SC1/COMP1_DET
SC1/COMP1_R_IN
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
2012.07.02
TP_NON_EN
3
NC4_S7LRM
TP for Headphone
TP for S2
TP for CI slot
TP for NON-EU models(except EU and China)
TP for SCART
TP for FE_TS_DATA
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
T
H
E
R
M
A
L
THERMAL
T
H
E
R
M
A
L
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2
2012/09/19
4
NC4_S7LRM
R403
1.5K
1%
PD_+24V
Q407
MMBT3904(NXP)
E
B
C
R491
0
C448
3300pF
50V
IC407
AP7173-SPG-13 HF(DIODES)
3
VCC
2
PG
4
EN
1
IN
5
GND
6
SS
7
FB
8
OUT
9
[EP]
+12V
C422
0.1uF
16V
OPT
R441
75K
1/16W
1%
R426
10K
+3.5V_ST
C424
330pF
50V
IC403
TPS54319TRE
1 VIN_1
3 GND_1
7
C
O
M
P
9 SS/TR
10 PH_1
11 PH_2
12 PH_3
1
3
B
O
O
T
1
4
P
W
R
G
D
1
5
E
N
1
6
V
I
N
_
3
5
A
G
N
D
8
R
T
/
C
L
K
6
V
S
E
N
S
E
4 GND_2
2 VIN_2
17
E
P
[
G
N
D
]
Q403
AO3435
FET_2.5V_AOS
G
D S
+3.3V_Normal
PANEL_VCC
Q409
AO3407A
G
D S
R402
300
RESET_IC_SOC_RESET
L413
CIC21J501NE
PWM_DIM
Q401
MMBT3904(NXP)
E
B
C
R419
1K
C406 0.1uF
16V
R457
4.3K
1/16W
1%
R412 3.9K
PWM_DIM_PULL_DOWN
R417
4.7K
OPT
+1.5V_DDR
R432
330K 1/16W 5%
R462
10K
L404
CIC21J501NE
R430
10K
P401
SMAW200-H18S1
14 12V
9 24V
4 PDIM#1
18 GND
13 12V
8 GND
3 3.5V
17 GND
12 GND
7 GND
2 DRV ON
16 N.C
11 GND
6 PDIM#2
1 PWR ON
15 12V
10 24V
5 3.5V
19
.
+24V
C440
0.1uF
16V
Q400
MMBT3904(NXP)
E
B
C
C417-*1
10uF 10V
CAP_10uF_X7R
R489
10K
+3.5V_ST
R439
33K
R453
27K
1%
R445
2.2K
IC409
NCP803SN293
PD_+24V_PWR_DET_ON_SEMI
1
GND
3 VCC 2 RESET
C412
0.1uF
16V
PD_+24V
C447
0.33uF
16V
R443
10K
+12V
INV_CTL
L408
CIC21J501NE
R448
2.7K
1%
PD_+12V
+3.5V_ST
R461
10K
OPT
R440
5.6K
+3.5V_ST
R421
10K
R488
100K
Q405
MMBT3904(NXP)
E
B
C
L412
CIS21J121
120
C403-*1
10uF 10V
CAP_10uF_X7R
R428
10K
C411
0.1uF
16V
C426
100pF
50V
OPT
R410
100K
C441
0.1uF
16V
C413
0.047uF
25V
L403
BLM18PG121SN1D
C444
0.1uF
16V
+3.3V_Normal
+3.3V_Normal
Q403-*1
DMP2130L
FET_2.5V_DIODE
G
D S
IC408
NCP803SN293
PWR_DET_ON_SEMI
1
GND
3 VCC 2 RESET
R450
0
5%
PD_+3.5V
R447
1.2K
1%
PD_+12V
560pF
C467
50V
L402
MLB-201209-0120P-N2
R414
10K
+12V
+5V_Normal
POWER_ON/OFF_1
C418 0.1uF
50V
+1.10V_VDDC
POWER_DET
RL_ON
C420
22uF
16V
IC408-*1
APX803D29
PWR_DET_ON_DIODES
1
GND
3 VCC 2 RESET
+3.3V_Normal
+12V
R480
100
PD_+24V
R454
11K 1%
R456
4.7K
1/16W
1%
+24V
+3.5V_ST
L407
MLB-201209-0120P-N2
+3.5V_ST
+3.3V_Normal
USB1_CTL
R438
22K
R433
10K
R436
15K
+3.5V_ST
C425
0.1uF
16V
R408 100
PWM2_2CH_POWER
PANEL_CTL
001:AL22
+5V_USB
R434
10K
R409
2K
R416
10K
R415
100
+3.5V_ST
POWER_DET_RESET
USB1_OCD
R463
10K
RESET_IC_SOC_RESET
+3.3V_Normal
L401
CIC21J501NE
L420
BLM18PG121SN1D
R482
8.2K
1%
PD_+24V
+5V_Normal
C404 0.1uF
16V
C438
0.1uF
25V
OPT
+2.5V_Normal
C474
0.1uF
R404
100K
PD_+24V
R405
5.6K
C419
4.7uF 10V
C488
3300pF
R442
30K
1/16W
1%
R406
4.7K
C405
10uF
16V
+3.5V_ST
C410
3300pF
50V
C439
100pF
50V
R401
10K
IC409-*1
APX803D29
PD_+24V_PWR_DET_DIODES
1
GND
3 VCC 2 RESET
R407
5.6K
R411
33K
OPT
Q402
MMBT3906(NXP)
1
2
3
C421
22uF
16V
OPT
R452
33K
1%
C476
0.1uF
16V
PWM1
L406
3.6uH
L415
3.6uH
C403
10uF
10V
CAP_10uF_X5R
85C
C417
10uF
10V
CAP_10uF_X5R
85C
R402-*1
100
+3.5V_SOC_RESET
IC401
TPS65281RGV
3
R
O
S
C
2
C
O
M
P
4
R
L
I
M
1
S
S
5
EN_SW
6
FAULT
7
AGND
8
SW_OUT
9
S
W
_
I
N
1
0
F
B
1
1
L
X
1
2
B
S
T
1
3
PGND
1
4
VIN
1
5
V7V
1
6
EN
1
7
[EP]
IC402
TJ1118S-2.5
1
GND
2 OUT 3 IN
C437
22uF
10V
C430
10uF
10V
10uF
C461
10V C423
2.2uF
10V
C453
22uF
10V
C456
22uF
10V
C443
10uF
16V
C472
22uF
10V
D404
5V
OPT
D402
5V
OPT
D403
5V
OPT
D401 5V OPT
D405
5V
R413
16K
PANEL_POWER
+2.5V_Normal
S7LR core 1.15V volt
3A
CHANGE TO
16V/X5R
R1
+3.5V_ST --> 3.375V --> 3.46V
CHANGE TO
10UF/10V/X5R
+3.3V_Normal
CHANGE TO
10UF/10V/X5R
Vout=0.8*(1+R1/R2)=1.5319
+5V_Normal
&
+5V_USB
+1.5V_DDR
R2
Vout=0.827*(1+R1/R2)
R2
Power_DET
R1
R1
+24V --> 3.78V --> 3.92V (3.79V)
Vout=0.8*(1+R1/R2)
R2
FROM LIPS & POWER B/D +12V --> 3.58V --> 3.82V (3.68V)
1.5A
L13 POWER BLOCK (POWER DETECT 2)
*For 55LN54 Power ON Noise
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL
2012/07/18
6
NC4_S7LRM
C607
0.1uF
16V
OPT
R601
100
+3.5V_ST
L600
BLM18PG121SN1D
KEY2
R602
10K
1%
IR
R600
100
C604
100pF
50V
+3.5V_ST
C603
1000pF
50V
R603
10K
1%
C602
0.1uF
16V
KEY1
+3.5V_ST
R607
3.3K
LED_R/BUZZ
P600
12507WR-08L
1
2
3
4
5
6
7
8
9
R610
1.8K
L601
BLM18PG121SN1D
CONTROL_FILTER
L602
BLM18PG121SN1D
CONTROL_FILTER C608
0.1uF
16V
CONTROL_FILTER
C609
0.1uF
16V
CONTROL_FILTER
R611
0
CONTROL_NO_FILTER
R612
0
CONTROL_NO_FILTER
IR/LED and Control
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
U
S
B

D
O
W
N

S
T
R
E
A
M
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
12/06/20
USB
7
NC4_S7LRM
JK700
3
A
U
0
4
S
-
3
0
5
-
Z
C
-
(
L
G
)
1
2
3
4
5
D700
RCLAMP0502BA
OPT
SIDE_USB1_DM
SIDE_USB1_DP
+5V_USB
C700
22uF
10V
USB (SIDE)
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2012/11/07
HDMI_R1_S1 8
NC4_S7LRM
D2+_HDMI2
DDC_SCL_2
CEC_REMOTE_S7
CK-_HDMI4
JK801
E
A
G
5
9
0
2
3
3
0
2
14
13
5
D1_GND
20
SHIELD
12
11
2
D2_GND
19
18
10
CK+
4
D1+
1
D2+
17
9
D0-
8
D0_GND
3
D2-
16
7
D0+
6
D1-
15
DDC_SDA_2
5V_HDMI_4
+3.3V_Normal
/VBUS_EN
D0+_HDMI4
CK+_HDMI2
HDMI_CEC
+3.5V_ST
R823
2.7K
R807
10K
R806
10K
R805 0
HDMI1_ARC
5V_HDMI_2
D825
MMBD6100
A
2
C
A
1
D0-_HDMI2
DDC_SDA_4
+5V_Normal
R
8
1
8
3
.
3
K
D2-_HDMI2
+5V_Normal
HPD4
HPD2
D1-_HDMI4
D2+_HDMI4
+3.3V_Normal
D0+_HDMI2
R819
1.8K
R817
10K
D800
30V
MBR230LSFT1G
DDC_SCL_4
CK-_HDMI2
5V_DET_HDMI_2
R826
1K
CK+_HDMI4
C809
10uF
10V
D
8
1
2
O
P
T
5
.
6
V
+3.5V_ST
D824
MMBD6100
A
2
C
A
1
D0-_HDMI4
HDMI_ARC
D1-_HDMI2
DDC_SDA_2
R812
10K
OPT
R808
100K
OPT
5V_HDMI_4
MHL_CD_SENSE
D1+_HDMI2
DDC_SCL_2
D822
MMBD6100
A
2
C
A
1
D1+_HDMI4
5V_HDMI_4
R
8
0
1
3
.
3
K
D2-_HDMI4
HDMI_CEC
R
8
1
1
1
0
K
O
P
T
D811
OPT
R822
2.7K
Q802
OPT
E
B
C
HDMI_CEC
AVDD5V_MHL IC802
BD82020FVJ
3
IN_2
2
IN_1
4
EN
1
GND
5
OC
6
OUT_1
7
OUT_2
8
OUT_3
5V_DET_HDMI_4
C802
0.1uF
+5V_Normal
DDC_SDA_4
R820
100
Q801
MMBT3904(NXP)
E
B
C
R803
1.8K
Q803
OPT
E
B
C
5V_HDMI_2
D801
ESD_HDMI1_VARISTOR
DDC_SCL_4
/MHL_OCP_DET
C801
0.047uF
25V
R804
0
JK803
E
A
G
6
2
6
1
1
2
0
4
14
NC
13
CE_REMOTE
5
D1_GND
20
BODY_SHIELD
GND
12
CK-
11
CK_GND
2
D2_GND
19
HP_DET
18
5V
10
CK+
4
D1+
1
D2+
17
GND
9
D0-
8
D0_GND
3
D2-
16
DDC_DATA
7
D0+
6
D1-
15
DDC_CLK
R815
10K
Q804
E
B
C
Q806 E
B
C
Q805
E
B
C
R813
10K
R816
10K
MHL_OCP_EN
R802
0
R824
2.7K
R825
2.7K
R810
0
R831
300K
VA801
ESD_HDMI1_VARISTOR
VA802
ESD_HDMI
R832 100
R833 100
VA803
ESD_HDMI
VA804
ESD_HDMI
VA805
ESD_HDMI
VA806
ESD_HDMI
R830 100
VA808
ESD_HDMI
VA807
ESD_HDMI
R834 100
R835 100
D827-*1
IP4283CZ10-TBA
ESD_HDMI_NXP
3
GND_1
2
TMDS_CH1+
4
TMDS_CH2-
1
TMDS_CH1-
5
TMDS_CH2+
6
NC_1
7
NC_2
8
GND_2
9
NC_3
10
NC_4
D826-*1
IP4283CZ10-TBA
ESD_HDMI_NXP
3
GND_1
2
TMDS_CH1+
4
TMDS_CH2-
1
TMDS_CH1-
5
TMDS_CH2+
6
NC_1
7
NC_2
8
GND_2
9
NC_3
10
NC_4
D829-*1
IP4283CZ10-TBA
ESD_HDMI_NXP
3
GND_1
2
TMDS_CH1+
4
TMDS_CH2-
1
TMDS_CH1-
5
TMDS_CH2+
6
NC_1
7
NC_2
8
GND_2
9
NC_3
10
NC_4
D828-*1
IP4283CZ10-TBA
ESD_HDMI_NXP
3
GND_1
2
TMDS_CH1+
4
TMDS_CH2-
1
TMDS_CH1-
5
TMDS_CH2+
6
NC_1
7
NC_2
8
GND_2
9
NC_3
10
NC_4
R814
2.7K
R821
10K
R827
20K
D826
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
D827
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
D828
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
D829
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
VA801-*1
1uF
10V
ESD_HDMI1_CAP
D801-*1
1uF
10V
ESD_HDMI1_CAP
R809
10
SIDE_HDMI (MHL)
CEC
HDMI_1
MHL OCP
HDMI (REAR 1 / SIDE 1 MHL)
(Active Low)
(Active High)
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
F
i
b
e
r

O
p
t
i
c
F
i
b
e
r

O
p
t
i
c
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPDIF
12/06/12
10
NC4_S7LRM
+3.3V_Normal
SPDIF_OUT
JK1001
2F01TC1-CLM97-4F
SPDIF-JACK-FOXCONN
3 VIN
2 VCC
1 GND
4
S
H
I
E
L
D C1002
100pF
50V
C1001
0.1uF
16V
JK1001-*1
JST1223-001
SPDIF-JACK-SOLTEAM
1
GND
2
VCC
3
VINPUT
4
F
I
X
_
P
O
L
E
SPDIF OPTIC JACK
5.15 Mstar Circuit Application
SPDIF
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_NON_EU
2012/09/19
11
NC4_S7LRM
R1100
3.3K
OPT
RXB0-
RXA0+
RXA0-
C1101
0.1uF
16V
HD
RXA2-
C1100
0.1uF
16V
FHD
RXA3-
RXBCK-
RXA1-
P1101
FF10001-30
HD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RXA1-
RXB4-
RXA2+
+3.3V_Normal
RXB1+
RXBCK+
PANEL_VCC
RXB3+
RXA0+
RXA3-
RXB4+
RXA4-
RXA4+
RXA1+
RXA2+
+3.3V_Normal
RXB2-
R1101
10K
OPT
RXA1+
RXA2-
RXB1-
R1103
3.3K
OPT
RXACK+
RXA3+
RXA0-
PANEL_VCC
RXA3+
RXACK-
RXB2+
R1104
10K
OPT
RXB3-
RXB0+
P1100
FI-RE51S-HF-J-R1500
FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
RXACK+
RXACK-
L1101
CIS21J121
120
HD
L1100
CIS21J121
120
FHD
R1111 0
NON_AUO/CMI_39inch
R1112 0
NON_AUO39inch
R1113 0
NON_AUO39inch
RXB1-
RXB0-
RXA4+
RXA1-
Pol-change
RXB4+
RXACK+
RXBCK-
RXA0+
RXA2+
LVDS (NON EU)
RXA2+
RXBCK-
RXB4-
RXA3+
RXA1+
RXB2+
RXB3-
RXA3-
RXBCK-
RXACK-
RXA2+
RXA1-
RXB1-
RXB3-
RXA3+
RXA2-
RXA0+
RXA4+
Shift
RXBCK+
RXB2-
RXA4+
[51Pin LVDS Connector]
(For FHD 60Hz)
RXACK+
RXA3-
RXACK-
RXB3+
RXA3+
RXA1-
RXB0-
RXA0-
RXACK+
RXB3+
LVDS_SEL
RXA4-
RXB3+
RXA4+
RXA2-
RXA2+
RXA1+
RXB2-
Pol-change
RXB4+
RXB1-
RXA4-
RXACK+
RXB3-
RXB0+
RXB3+
RXBCK+
RXB4-
RXA0+
RXA2+
RXB0+
RXB1+
RXA3-
RXA2-
RXBCK+
RXB4-
RXA0+
RXA4+
RXA2+
RXB3-
RXA0-
RXB0-
RXA4-
RXACK-
RXB0-
RXA4+
RXB2+
RXA1-
RXB2+
RXACK-
RXA3-
RXA1+
RXA3-
RXA1+
RXB3+
RXB3-
RXA3-
RXB1-
RXB4+
FOR FHD REVERSE(10bit)
RXB0+
RXB3-
RXA3+
RXA0+
RXA2- RXACK-
RXB1-
RXA3+
RXB2- RXBCK-
RXBCK+
RXA1+
RXA0-
RXA3+
RXA0-
RXB2+
RXB0-
RXA0-
RXB2-
RXACK-
MIRROR
RXB4-
RXA0-
RXB2+
RXA4+
RXB4-
RXA1+
RXB3+
RXB0+
RXB1+
RXA1-
RXA0-
RXA4-
RXB2-
Change in S7LR
RXA4-
RXB2+
MIRROR
RXB1-
RXA3+
RXA1-
RXACK+
RXB3+
RXB0+
RXB4-
RXACK+
RXB1+
RXACK-
RXA4-
RXA1-
RXA2-
RXA0+
RXB0-
RXB1+
RXB4+
RXB2+
RXBCK-
RXB0-
FOR FHD REVERSE(8bit)
RXBCK-
RXBCK+
RXB4+
RXB0+
RXB2-
RXA1+
RXBCK-
RXA2-
RXB1+
RXB1+
RXB1-
RXA4-
RXB4+
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
Change in S7LR
RXB1+
RXB3-
RXA2+
RXA3-
RXA2-
RXB2-
LVDS_SEL
RXBCK+
RXB4-
RXB0+
RXA0+
RXB4+
RXBCK+
RXACK+
EU pin assign is different from NON EU.
Because of position of HD wafer.
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.8V_TU
R3760 0
HALF_NIM/IF_NON_FILTER
C3743
20pF
50V
OPT
R3741-*1
1K
TU_IIC_NON_ATSC_1K
T
U
_
G
N
D
_
A
R3704 100
R3740-*1
1K
TU_IIC_NON_ATSC_1K
R3735 33
+3.3V_TU
LNA2_CTL
C3742
20pF
50V
OPT
TUNER_RESET
L3703
CIS21J121
IF_P_MSTAR
R3758
82
OPT
R3736 33
T
U
_
G
N
D
_
A
DEMOD_SCL
IF_AGC_MAIN
TU3700
TDSS-G201D
TUNER_OPT
5
+B1[3.3V]
11
DIF[N]
2
RESET
10
DIF[P]
4
SDA
1
NC_1
9
IF_AGC
8
NC_3
3
SCL
7
+B2[1.8V]
6
NC_2
12
SHIELD
A1
A1
B1
B1
TU_SDA
+3.3V_TU
C3727
0.1uF
16V
R3733
100K
C3707
100pF
50V
FE_TS_VAL_ERR
C3716
0.1uF
16V
+1.8V_TU C3708
0.1uF
16V
LNA_CTRL_2
C3738
0.1uF
16V
+3.3V_TU
R3732
100
IC3703
AP1117E18G-13
2
OUT
3 IN 1 ADJ/GND
R3705 0
OPT
R3784
0
OPT
FE_TS_DATA[0]
TU_SCL
C3737
100pF
50V
+3.3V_TU
C3740
0.1uF
16V
TU_CVBS
TU_SIF
R3761 0
HALF_NIM/IF_NON_FILTER
BR_RESET_DEMOD
R3740
1.8K
TU_IIC_ATSC_1.8K
T
U
_
G
N
D
_
A
FE_TS_CLK
RF_SWITCH_CTL
C3702
0.1uF 16V
OPT
FE_TS_SYNC IF_AGC_SEL
C3710
0.1uF
16V
LNA_CTRL_1
C3713
18pF
50V
C3701
0.1uF
16V
DEMOD_SDA
C3717
0.1uF
16V
+3.3V_TU
C3711
18pF
50V
R3741
1.8K
TU_IIC_ATSC_1.8K
C3725
0.1uF
16V
IF_N_MSTAR
+3.3V_Normal
C3723
22uF
6.3V
C3715
22uF
6.3V
R3766
1
C3741-*1
10uF 10V
CAP_X7R_MP
C3741
10uF
10V
CAP_10uF_X5R
85C
R3761-*1
10
HALF_NIM/IF_FILTER
R3760-*1
10
HALF_NIM/IF_FILTER
R
3
7
1
4
0 N
O
N
_
A
S
I
A
R
3
7
1
5
0
N
O
N
_
A
S
I
A
TU3702
TDSH-G501D(B)
TUNER_ISOLATOR_DVB_1INPUT_H
5
+B1[3.3V]
11
DIF[N]
2
RESET
10
DIF[P]
4
SDA
1
NC
9
IF_AGC
8
CVBS
3
SCL
7
+B2[1.8V]
6
SIF
A1
A1
B1
B1
A2
A
2
B2
B
2
TU3700-*1
TDSS-H501F(B)
TUNER_ATSC
5
+B1[3.3V]
11
DIF[N]
2
RESET
10
DIF[P]
4
SDA
1
NC_1
9
IF_AGC
8
NC_3
3
SCL
7
+B2[1.8]
6
NC_2
12
SHIELD
A1
A1
B1
X
2012.06.21
should be guarded by ground
TUNER MULTI-OPTION
NC4_S7LRM
GLOBAL tuner block except EU and China
Pull-up cant be applied
because of MODEL_OPT_2
close to TUNER
close to TUNER
FE_BOOSTER_CTL
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
close to the tuner pin, add,09029
Close to the tuner
TUNER_NON_EU
Size change,0929
14
FE_AGC_SPEED_CTL
GND seperation for ASIS tuner
CHANGE TO
10UF 10V X5R
CHANGE TO
6.3V 2012 X5R
CHANGE TO
6.3V 2012 X5R
HPF
LPF
Frequence
1
0
0
54MHz~350MHz
TW_FE_LNA FILTER_SETTING
CTRL_1 CTRL_2
0
350Hz~450MHz
450Hz~870MHz
Filter_Type
1
0 Through
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
COMP2_Pr+
AV2_CVBS_DET
R1714
10K
R1721
12K
R1715
10K
R1719
12K
AV2
R1713
1K
R1707
75
R1704
470K
R1700
470K
AV2
D1706
5.6V
OPT
R1712
1K
COMP2_Pb+
+3.3V_Normal
COMP2_DET
R1701
470K
AV2
R1705
75
R1709
10K
COMP2_R_IN
R1703
470K
D1709
5.6V
OPT
AV2_R_IN
D1702
5.6V
OPT
D1701
5.6V
AV2_LR_ZENER
C1701
1000pF
50V
OPT
R1716
10K
AV2
R1710
10K
C1704
1000pF
50V
OPT
R1706
75
COMP2_L_IN
R1711 1K
AV2
+3.3V_Normal
+3.3V_Normal
D1704
5.6V
COMP_LR_ZENER
R1702
75
AV2
D1700
5.6V
AV2_LR_ZENER
R1718
12K
AV2
R1708
10K
AV2
AV2_CVBS_IN
C1703
47pF
50V
AV2
COMP2_Y+/AV_CVBS_IN
C1702
1000pF
50V
OPT
R1720
12K
AV2_L_IN
R1717
10K
AV2
D1705
5.6V
COMP_LR_ZENER
AV_CVBS_DET
C1705
1000pF
50V
OPT
R1722
0
DTV/MNT_VOUT
R1723
75
CVBS_TEST
+3.3V_Normal
C1706
0.1uF
CVBS_TEST
C
1
7
0
7
0
.
1
u
F
C
V
B
S
_
T
E
S
T
4
.
7
u
F
C
1
7
0
8
CVBS_TEST
JK1701
PPJ248-01
COMP_AV1/2
6D
[GN]C-SPRING
7D
[GN]E-LUG
4D
[GN]CONTACT
5E
[BL]C-SPRING
8F
[RD1]E-LUG-S
6F
[RD1]C-SPRING
4F
[RD1]CONTACT
5G
[WH1]C-SPRING
4H
[RD2]CONTACT
6H
[RD2]C-SPRING
7H
[RD2]E-LUG
7A
[YL]E-LUG
6A
[YL]C-SPRING
4A
[YL]CONTACT
5B
[WH2]C-SPRING
4C
[RD3]CONTACT
6C
[RD3]C-SPRING
7C
[RD3]E-LUG
D1711
COMP_Y_ZENER_ROHM
D1703
COMP_Pr_ZENER_ROHM
D1712
COMP_Y_ZENER_ROHM
D1714
AV2_CVBS_ZENER_ROHM
D1713
AV2_CVBS_ZENER_ROHM
D1710
COMP_Pb_ZENER_ROHM
D1708
COMP_Pb_ZENER_ROHM
D1707
COMP_Pr_ZENER_ROHM
D1714-*1
AV2_CVBS_ZENER_KEC
D1713-*1
AV2_CVBS_ZENER_KEC
D1710-*1
COMP_Pb_ZENER_KEC
D1708-*1
COMP_Pb_ZENER_KEC
D1707-*1
COMP_Pr_ZENER_KEC
D1703-*1
COMP_Pr_ZENER_KEC
D1712-*1
COMP_Y_ZENER_KEC
D1711-*1
COMP_Y_ZENER_KEC
JK1702
PPJ245-01
COMP_AV1
6A
[GN]C-SPRING
7A
[GN]E-LUG
4A
[GN]CONTACT
5B
[BL]C-SPRING
8C
[RD1]E-LUG-S
6C
[RD1]C-SPRING
4C
[RD1]CONTACT
5D
[WH]C-SPRING
4E
[RD2]CONTACT
6E
[RD2]C-SPRING
7E
[RD2]E-LUG
IC1700
MM1756DURE
CVBS_TEST
3
BIAS
2
GND
4
OUT
1
IN
6
VCC
5
PS
2012.08.14 NC4_S7LRM
REAR_NON_EU_L
COMPONENT
&
AV1
17
AV2
COMPONENT1 & AV(COMMON), AV2
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LAN
2012/06/21
21
NC4_S7LRM
EPHY_RN
EPHY_TN
EPHY_TP
JK2100
XRJV-01V-0-D12-080
E
T
H
E
R
N
E
T
_
X
M
U
L
T
I
P
L
E
1
2
3
4
5
6
7
8
9
9
+2.5V_Normal
EPHY_RP
C2104
0.01uF
50V
ETHERNET
L2101
BLM18PG121SN1D
ETHERNET
R2101
49.9 ETHERNET
R2102
49.9 ETHERNET
C2101
0.1uF
ETHERNET
R2104
49.9 ETHERNET
C2102
0.1uF
ETHERNET
R2103
49.9 ETHERNET
JK2100-*1
RJ45VT-01SN002
E
T
H
E
R
N
E
T
_
X
M
L
_
E
M
I1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
ETHERNET
* H/W option : ETHERNET
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
T H E R M A L
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2012/08/29
AMP_STA380BWEF 34
NC4_S7LRM
SPK_L+
+3.5V_ST
AMP_MUTE
AMP_SCL
C3420
0.22uF
50V
R3403
10K
SPK_R-
C3415
1uF
50V
+3.3V_Normal
R3410
43
R3408
43
L3401
CIS21J121
R3402
10K
C3412
1uF
50V
C3424
1000pF
50V
R3401
10K
SPK_L+
P3401
WAFER-ANGLE
1
2
3
4
C3425
1000pF
50V
C3408
0.1uF
16V
C3427
1000pF
50V
C3419
0.22uF
50V
SPK_L-
SPK_L-
+3.3V_Normal
AUD_MASTER_CLK
C3423
0.22uF
50V
C3426
1000pF
50V
C3411
0.1uF
50V
C3416
0.1uF
50V
C3413
330pF
50V
C3422
0.22uF
50V
SPK_R+
Q3401
MMBT3904(NXP)
E
B
C
AUD_LRCH
C3414
330pF
50V
R3409
43
AUD_SCK
AMP_RESET
SPK_R+
R3411
43
C3407
0.1uF
16V
POWER_DET
+24V
C3421
0.22uF
50V
C3401
1000pF
50V
C3409
0.1uF
16V
AMP_SDA
C3418
0.22uF
50V
R3405
0
OPT
SPK_R-
C3404
2.2uF
10V
C3403
0.1uF
16V
AUD_LRCK
R3406 0
R3407 0
IC3401
STA380BWF
1 VCC_REG
2 VSS_REG
3 OUT2B
4 GND2
5 VCC2
6 OUT2A
7 OUT1B
8 VCC1
9 GND1
10 OUT1A
11 VDD_REG
12 GND_REG
1
3
N
C
_
1
1
4
N
C
_
2
1
5
N
C
_
3
1
6
N
C
_
4
1
7
N
C
_
5
1
8
N
C
_
6
1
9
N
C
_
7
2
0
N
C
_
8
2
1
N
C
_
9
2
2
N
C
_
1
0
2
3
N
C
_
1
1
2
4
N
C
_
1
2
25
NC_13
26
NC_14
27
NC_15
28
VDDDIG1
29
GNDDIG1
30
FFX3A
31
FFX3B
32
EAPD/FFX4A
33
TWARNEXT/FFX4B
34
VREGFILT
35
AGNDPLL
36
MCLK
3
7
B
I
C
K
I
3
8
L
R
C
K
I
3
9
S
D
I
4
0
R
E
S
E
T
4
1
P
W
D
N
4
2
I
N
T
L
I
N
E
4
3
S
D
A
4
4
S
C
L
4
5
S
A
4
6
T
E
S
T
M
O
D
E
4
7
G
N
D
D
I
G
2
4
8
V
D
D
D
I
G
2
49
[
E
P
]
L3404
10uH
L3402
10uH
L3405
10uH
L3403
10uH
C3417
10uF
35V
3216
R3404
100
AUDIO AMP(STA380BWEF)
SPEAKER_R
SPEAKER_L
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2012/06/20
MSTAR DEBUG_4PIN 39
NC4_S7LRM
RGB_DDC_SCL
RGB_DDC_SDA
P3900
12505WS-04A00
MSTAR_DEBUG_4P
1
2
3
4
5
J
P
_
G
N
D
2
J
P
_
G
N
D
3
J
P
_
G
N
D
4
J
P
_
G
N
D
1
MSTART DEBUG_4PIN
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_4P_OS
2012/06/20
40
NC4_S7LRM
PM_RXD
+3.5V_ST
R4001
100
R4000
100
P4000
12507WS-04L
RS232C_DEBUG_4P
1
VCC
2
PM_RXD
3
GND
4
RM_TXD
5
GND
PM_TXD
RS-232C
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2012/09/19
MAIN1_NON_EU 51
NC4_S7LRM
FE_TS_DATA[0]
PCM_A[8]
PCM_A[6]
PCM_A[5]
PCM_A[7]
FE_TS_DATA[1]
CI_TS_DATA[0]
PCM_A[11]
PCM_A[12]
PCM_A[9]
PCM_D[1]
PCM_A[3]
PCM_A[0]
CI_TS_DATA[3]
PCM_A[1]
PCM_D[0]
CI_TS_DATA[6]
PCM_A[14]
PCM_A[10]
PCM_D[7]
FE_TS_DATA[7]
PCM_A[7]
FE_TS_DATA[3]
PCM_A[6]
PCM_D[3]
PCM_A[4]
FE_TS_DATA[5]
PCM_A[4]
CI_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[6]
PCM_D[4]
FE_TS_DATA[0]
PCM_A[0]
FE_TS_DATA[4]
PCM_A[3]
PCM_A[13]
PCM_A[2]
CI_TS_DATA[5]
CI_TS_DATA[2]
CI_TS_DATA[7]
PCM_D[2]
PCM_A[2]
PCM_A[1]
PCM_A[5]
PCM_D[5]
PCM_D[6]
CI_TS_DATA[4]
MODEL_OPT_5
R
1
2
1
1
K
N
O
N
_
O
S
R
1
2
4
1
K
AR103
22
OS
R
1
1
6
1
K
CI_TS_VAL
R157 100
AMP_SDA
RXB3+
RXA4-
BR_RESET_DEMOD
PWM2
RXB2+
PCM_A[0-7]
RXA1-
R
1
1
5
1
K
O
P
T
R
1
2
3
1
K
O
P
T
RXACK-
PWM1
MODEL_OPT_3
HP_DET
R107
1K
OS
/PCM_WAIT
LNA_CTRL_1
FE_TS_VAL_ERR
+3.3V_Normal
PWM0
AR104
22
OS
R177
10K
HD_LVDS_NON_EU
R151 33
MODEL_OPT_2
I2C_SDA
FE_TS_DATA[0-7]
R174
10K
S/W_TW
IC102-*4
K9F1G08U0D-SCB0
NAND_FLASH_1G_SS
EAN61857001
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VCC_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
PCM_D[0-7]
/PCM_REG
AMP_RESET
PANEL_CTL
RXA0-
R109
3.9K
OS
C112
100pF
50V
OPT
TUNER_RESET
/F_RB
PM_MODEL_OPT_0
/PF_OE
R
1
5
3
1
K
LED_R/BUZZ
RXACK+
/PCM_OE
IC104-*1
R1EX24256BSAS0A
NVRAM_RENESAS
EAN62389501
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
I2C_SCL
+3.3V_Normal
R144
2.2K
RXB4-
PF_ALE
C105
0.1uF
LED_R/BUZZ
C106
8pF
OPT
PCM_RST
/PF_CE1
R146 33
PM_TXD
R111 22
PM_MODEL_OPT_0
R140
1K
RGB_DDC_SCL
/PCM_IOWR
CI_TS_SYNC
SPI_SDO
R176
10K
HD_LVDS_EU
R
1
6
5
1
K
O
S
AUD_MASTER_CLK_0
PM_RXD
+3.5V_ST
+3.5V_ST
CI_TS_CLK
/FLASH_WP
RXA3-
RXA2+
I2C_SDA
RXB1-
PCM_A[0-14]
MODEL_OPT_0
MODEL_OPT_4
RXA0+
I2C_SCL
RXA2-
R147 33
FE_TS_DATA[0]
RXB4+
SPI_SDI
PCM_5V_CTL
MODEL_OPT_6
USB1_OCD
R102
3.3K
OS
R145
2.2K
R137 22
/PF_OE
LNA_CTRL_2
RXB1+
PF_ALE
R141
1K
C104
8pF
OPT
KEY1
RL_ON
R
1
5
2
1
K
O
P
T
FE_TS_CLK
RXB0+
R156 10K
OPT
SIDE_HP_MUTE
RXBCK-
PWM0
R136 22
/PCM_IRQA
RXA3+
AV_CVBS_DET
PM_MODEL_OPT_1
/F_RB
KEY2
5V_DET_HDMI_2
R148
56
R105
1K
OPT
/PCM_CD
AMP_SCL
R112 22
AR101
22
OS
POWER_ON/OFF_1
I2C_SDA
R108
1K
OPT
R
1
1
7
1
K
O
P
T
PWM_DIM
PM_TXD
FE_TS_SYNC
/PCM_IORD
+3.3V_Normal
POWER_DET
/PCM_CE
MODEL_OPT_1
INV_CTL
R175
10K
S/W_EU/AJ
/PCM_WE
/PF_WP
R
1
1
8
1
K
/SPI_CS
/PF_WP
RXB2-
AR102
22
OS
SPI_SCK
PM_RXD
AMP_MUTE
PWM1
+3.3V_Normal
I2C_SCL
RXBCK+
PWM0 /PF_WE
5V_DET_HDMI_4
RXB3-
AV2_CVBS_DET
C101
0.1uF
OS
+3.3V_Normal
MODEL_OPT_7
C111
2.2uF
OPT
/PF_CE0
R180
4.7K
RXA4+
R106
1K
OS
+3.3V_Normal
RXB0-
/PF_CE0
SC1/COMP1_DET
AUD_SCK
USB1_CTL
RGB_DDC_SDA
AUD_MASTER_CLK
/PF_WE
CI_TS_DATA[0-7]
PWM2
/PF_CE1
RXA1+
C103
0.1uF
OS
SCART1_MUTE
IC104-*3
AT24C512C-SSHD-T
EAN43349004
NON_OS_512k_ATMEL
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
IC104-*2
M24512-RMN6TP
EAN43349003
NON_OS_512k_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
C102-*1
10uF 10V
CAP_10uF_X7R_OS
IC102
H27U1G8F2CTR-BC
EAN35669103
NAND_FLASH_1G_HYNIX
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VCC_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC102-*1
H27U2G8F2CTR
EAN60708702
NAND_FLASH_2G_HYNIX
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VCC_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC104
M24256-BRMN6TP
NVRAM_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
IC102-*3
TC58NVG1S3ETA00
EAN60991001
NAND_FLASH_2G_TOSHIBA
26
NC_17
27
NC_18
28
NC_19
29
I/O1
30
I/O2
31
I/O3
32
I/O4
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VCC_2
38
NC_23
39
NC_24
40
NC_25
41
I/O5
42
I/O6
43
I/O7
44
I/O8
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC101
MSD804KKX
S7LR-M_NON_MS10
PCMDATA[0]/GPIO129
W21
PCMDATA[1]/GPIO130
AA18
PCMDATA[2]/GPIO131
AB22
PCMDATA[3]/GPIO123
AE20
PCMDATA[4]/GPIO122
AA15
PCMDATA[5]/GPIO121
AE21
PCMDATA[6]/GPIO120
AB21
PCMDATA[7]/GPIO119
Y15
PCMADR[0]/GPIO128
W20
PCMADR[1]/GPIO127
V20
PCMADR[2]/GPIO125
W22
PCMADR[3]/GPIO124
AB18
PCMADR[4]/GPIO102
AA20
PCMADR[5]/GPIO104
AA21
PCMADR[6]/GPIO105
Y19
PCMADR[7]/GPIO106
AB17
PCMADR[8]/GPIO111
Y16
PCMADR[9]/GPIO113
AB19
PCMADR[10]/GPIO117
AB20
PCMADR[11]/GPIO115
AA16
PCMADR[12]/GPIO107
AA19
PCMADR[13]/GPIO110
AC21
PCMADR[14]/GPIO109
AA17
PCMREG_N/GPIO126
Y20
PCMOE_N/GPIO116
AB15
PCMWE_N/GPIO195
AA22
PCMIORD_N/GPIO114
AD22
PCMIOWR_N/GPIO112
AD20
PCMCE_N/GPIO118
AD21
PCMIRQA_N/GPIO108
AC20
PCMCD_N/GPIO133
Y18
PCMWAIT_N/GPIO103
Y21
PCM_RESET/GPIO132
Y22
PCM2_CE_N/GPIO134
U21
PCM2_IRQA_N/GPIO135
V21
PCM2_CD_N/GPIO138
R20
PCM2_WAIT_N/GPIO136
T20
PCM2_RESET/GPIO137
U22
UART1_TX/GPIO46
D4
UART1_RX/GPIO47
E4
UART2_TX/GPIO68
N25
UART2_RX/GPIO67
N24
UART3_TX/GPIO50
B8
UART3_RX/GPIO51
A8
I2C_SCKM2/DDCR_CK/GPIO75
P23
I2C_SDAM2/DDCR_DA/GPIO74
P24
DDCA_DA/UART0_TX
D2
DDCA_CK/UART0_RX
D1
PWM0/GPIO69
P21
PWM1/GPIO70
N23
PWM2/GPIO71
P22
PWM3/GPIO72
R21
PWM4/GPIO73
P20
PWM_PM/GPIO197
F6
SAR0/GPIO34
H6
SAR1/GPIO35
G5
SAR2/GPIO36
G4
SAR3/GPIO37
J5
SAR4/GPIO38
J4
VSYNC_LIKE/GPIO146
R23
SPI1_CK/GPIO199
R24
SPI1_DI/GPIO200
R25
SPI2_CK/GPIO201
T21
SPI2_DI/GPIO202
T22
NF_CE1Z/GPIO141
AE18
NF_WPZ/GPIO196
AC17
NF_CEZ/GPIO140
AD18
NF_CLE/GPIO139
AC18
NF_REZ/GPIO142
AC19
NF_WEZ/GPIO143
AD17
NF_ALE/GPIO144
AE17
NF_RBZ/GPIO145
AD19
GPIO_PM[0]/GPIO6
H5
PM_UART_TX/GPIO_PM[1]/GPIO7
K6
GPIO_PM[2]/GPIO8
K5
GPIO_PM[3]/GPIO9
J6
GPIO_PM[4]/GPIO10
K4
PM_UART_RX/GPIO_PM[5]/GPIO11
L6
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
C2
GPIO_PM[7]/GPIO13
L5
GPIO_PM[8]/GPIO14
M6
GPIO_PM[9]/GPIO15
M5
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
C1
GPIO_PM[11]/GPIO17
M4
PM_SPI_SCK/GPIO1
A2
PM_SPI_CZ0/GPIO_PM[12]/GPIO0
D3
PM_SPI_SDI/GPIO2
B2
PM_SPI_SDO/GPIO3
B1
TS0CLK/GPIO90
Y14
TS0VALID/GPIO88
AA10
TS0SYNC/GPIO89
Y12
TS0DATA_[0]/GPIO80
Y13
TS0DATA_[1]/GPIO81
Y11
TS0DATA_[2]/GPIO82
AA12
TS0DATA_[3]/GPIO83
AB12
TS0DATA_[4]/GPIO84
AA14
TS0DATA_[5]/GPIO85
AB14
TS0DATA_[6]/GPIO86
AA13
TS0DATA_[7]/GPIO87
AB11
TS1CLK/GPIO101
AC15
TS1VALID/GPI99
AD15
TS1SYNC/GPIO100
AC16
TS1DATA_[0]/GPIO91
AD16
TS1DATA_[1]/GPIO92
AE15
TS1DATA_[2]/GPIO93
AE14
TS1DATA_[3]/GPIO94
AC13
TS1DATA_[4]/GPIO95
AC14
TS1DATA_[5]/GPIO96
AD12
TS1DATA_[6]/GPIO97
AD13
TS1DATA_[7]/GPIO98
AD14
IC101
MSD804KKX
S7LR-M_NON_MS10
GPIO39
C7
GPIO40
E6
GPIO41
F5
GPIO42
B6
GPIO43
E5
GPIO44
D5
GPIO45
B7
GPIO48
E7
GPIO49
F7
GPIO52
AB5
GPIO53
AB3
GPIO54
A9
GPIO55
F4
I2C_SCKM0/GPIO56
AB1
I2C_SDAM0/GPIO57
N6
GPIO76
AB2
GPIO77
AC2
LVA0P
AB25
LVA0N
AB23
LVA1P
AC25
LVA1N
AB24
LVA2P
AD25
LVA2N
AC24
LVA3P
AE23
LVA3N
AC23
LVA4P
AC22
LVA4N
AD23
LVB0P
V23
LVB0N
U24
LVB1P
V25
LVB1N
V24
LVB2P
W25
LVB2N
W23
LVB3P
AA23
LVB3N
Y24
LVB4P
AA25
LVB4N
AA24
LVACLKP
AE24
LVACLKN
AD24
LVBCLKP
Y23
LVBCLKN
W24
GPIO194
T25
GPIO191
U23
GPIO192
T24
GPIO193
T23
C102 10uF
CAP_10uF_X5R_OS
10V 85C
/MHL_OCP_DET
IC102-*2
TC58NVG0S3ETA0BBBH
EAN61508001
NAND_FLASH_1G_TOSHIBA
26
NC_17
27
NC_18
28
NC_19
29
I/O1
30
I/O2
31
I/O3
32
I/O4
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VCC_2
38
NC_23
39
NC_24
40
NC_25
41
I/O5
42
I/O6
43
I/O7
44
I/O8
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
MHL_OCP_EN
IC101-*1
LGE2121-MS (M1_L13_MS10)
S7LR-M_MS10
GPIO39
C7
GPIO40
E6
GPIO41
F5
GPIO42
B6
GPIO43
E5
GPIO44
D5
GPIO45
B7
GPIO48
E7
GPIO49
F7
GPIO52
AB5
GPIO53
AB3
GPIO54
A9
GPIO55
F4
I2C_SCKM0/GPIO56
AB1
I2C_SDAM0/GPIO57
N6
GPIO76
AB2
GPIO77
AC2
LVA0P
AB25
LVA0N
AB23
LVA1P
AC25
LVA1N
AB24
LVA2P
AD25
LVA2N
AC24
LVA3P
AE23
LVA3N
AC23
LVA4P
AC22
LVA4N
AD23
LVB0P
V23
LVB0N
U24
LVB1P
V25
LVB1N
V24
LVB2P
W25
LVB2N
W23
LVB3P
AA23
LVB3N
Y24
LVB4P
AA25
LVB4N
AA24
LVACLKP
AE24
LVACLKN
AD24
LVBCLKP
Y23
LVBCLKN
W24
GPIO194
T25
GPIO191
U23
GPIO192
T24
GPIO193
T23
NAND_EN NAND_EN
FRC_RESET
S2_RESET
FRC_RESET
MODEL_OPT_8
for SYSTEM EEPROM
(IC104)
for SERIAL FLASH
A0h
PM MODEL OPTION
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH) 1b0
Boot from SPI_CS0N(INT_FLASH) 1b1
NAND FLASH MEMORY
SYM.D
EEPROM
CHANGE TO
10UF 10V X5R
Internal demod out
<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
I2C
B51_no_EJ : 4b0000 Boot from 8051 with SPI flash
SB51_WOS : 4b0001 Secure B51 without scramble
SB51_WS : 4b0010 Secure B51 with scramble
MIPS_SPE_NO_EJ : 4b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4b1001 Secure MIPS without scramble
MIPS_WS : 4b1010 Scerur MIPS with SCRAMBLE
SYM.A
from CI SLOT
DIMMING
PM_MODEL_OPT_0
HIGH : HD_NON_EU
LOW : HD_EU
HD_LVDS_pattern is different.
Between EU and NON_EU
S7LR-M Multi Package
PM_MODEL_OPT_1
HIGH : S/W_NON_EU
LOW : S/W_EU/AJ
S/W is different.
Between TW
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R230 100 OPT
C258 0.1uF
HALF_NIM/EU_NON_T2
C219 0.047uF
D0-_HDMI4
COMP2_Y+/AV_CVBS_IN
L211
BLM18PG121SN1D
C257 0.1uF
HALF_NIM/EU_NON_T2
+3.5V_ST
R
2
0
6
1
K
M
1
2
0
+3.3V_Normal
R204 100 OPT
MODEL_OPT_4
AUD_LRCK
AV2_R_IN
/VBUS_EN
AVDD5V_MHL
+3.3V_Normal
D1-_HDMI4
SCART1_Rout
C
2
5
5
0
.
1
u
F
DDC_SCL_4
R
2
0
9
1
K
N
O
N
_
D
V
B
_
T
2
C251 0.1uF
R296 100
SPDIF_OPTIC
DDC_SCL_2
MODEL_OPT_0
R237 33
C225 0.047uF
AVDD_AU33
R
2
1
2
1
K
P
H
M
_
O
F
F
TP209
D0+_HDMI2
C240
0.1uF
L228
BLM18PG121SN1D
+3.5V_ST
AV2_L_IN
C218 0.047uF
+3.3V_Normal
RF_SWITCH_CTL
AVDD_AU33
C220 0.047uF
CK+_HDMI4
D0-_HDMI2
R244 33
C
2
6
6
0
.
1
u
F
CK+_HDMI2
C279
0.1uF
R240 68
CK-_HDMI4
C287
OPT
MODEL_OPT_2
AVDD2P5
EPHY_RP
C230 0.047uF
AV2
C203
1000pF
OPT
50V
C268
4.7uF
10V
HEAD_PHONE
C263
10uF
SOC_RESET
D0+_HDMI4
EPHY_TN
L205 HEAD_PHONE 5.6uH
R
2
9
4
1
K
M
I
U
1
-
N
O
_
D
D
R
D1+_HDMI2
C250 0.1uF
C
2
4
8
0
.
1
u
F
AUD_MASTER_CLK_0
R249 33
AV2
R225 100 OPT
IF_N_MSTAR
C253
1uF
C223 0.047uF
EPHY_RN
IF_P_MSTAR
C274
0.1uF
MODEL_OPT_5
+1.10V_VDDC
L203 HEAD_PHONE 5.6uH
AMP_SCL
HDMI_ARC
D1+_HDMI4
COMP2_Pr+
AVDD2P5
AV2_CVBS_IN
C256
0.1uF
COMP2_Pb+
R216 47
HPD2
R
2
2
4
1
K
N
O
N
_
D
V
B
_
S
EPHY_TP
+1.5V_DDR
HP_LOUT
C282
0.1uF
HALF_NIM/EU_NON_T2
R
2
2
6
1
K
H
D
C
2
0
9
0
.
1
u
F
C231 1uF
HDMI1_ARC
MODEL_OPT_1
SOC_RESET
COMP2_R_IN
R205
100
SWICH
L229
BLM18PG121SN1D
C285
0.047uF
25V
HALF_NIM/EU_NON_T2
L208
BLM18PG121SN1D
IF_AGC_SEL
R252 68
C249
4.7uF
R220
10K
HALF_NIM/EU_NON_T2
C227 0.047uF
R
2
1
1
1
K
P
H
M
_
O
N
AVDD_MIU
R288 100
HALF_NIM/EU_NON_T2
IF_AGC_MAIN
AVDD2P5_MOD
MODEL_OPT_6
AUD_SCK
C201
0.1uF
R
2
9
1
1
K
M
I
U
1
-
1
2
8
M
MIUVDDC
C272
4.7uF
10V
HEAD_PHONE
CK-_HDMI2
C239 2.2uF AV2
+3.3V_Normal
C241
0.1uF
L209
BLM18PG121SN1D
TU_SCL
C221 0.047uF
HPD4
DDC_SDA_4
AVDD_NODIE
L202
BLM18SG121TN1D
SCART1_Lout
R
2
9
0
1
K
D
U
A
L
S
T
R
E
A
M
R
2
2
2
1
K
D
V
B
_
S
R
2
8
7
1
M
R
2
2
7
1
K
F
H
D
C273
0.1uF
MODEL_OPT_3
L227
BLM18PG121SN1D
HALF_NIM/EU_NON_T2
D2+_HDMI4
IR
C
2
8
3
0
.
1
u
F
R
2
0
8
1
K
D
V
B
_
T
2
C
2
5
9
0
.
1
u
F
SIDE_USB1_DP
R246 33
SPDIF_OUT
TU_CVBS
L206
BLM18PG121SN1D
TU_SDA
R228 100 OPT
FB_CORE
COMP2_L_IN
CI_DET
R210 0
HDMI1_ARC
VDD33
C264
1000pF
OPT 50V
D2+_HDMI2
AUD_LRCH
SIDE_USB1_DM
VDD33
AVDD2P5_MOD
R200
62K
+1.10V_VDDC
D2-_HDMI2
VDD33
R266
470
RESET_IC_SOC_RESET
MIUVDDC
C238 2.2uF AV2
C
2
3
5
0
.
1
u
F
R239 33
R242 68
C242 2.2uF
+1.10V_VDDC
+2.5V_Normal
LNA2_CTL
AVDD_NODIE
+1.10V_VDDC
TU_SIF
COMP2_Y+/AV_CVBS_IN
L204
BLM18PG121SN1D
D1-_HDMI2
C
2
0
7
0
.
1
u
F
R
2
0
7
1
K
N
O
N
_
M
1
2
0
R
2
9
3
1
K
N
O
N
_
D
U
A
L
S
T
R
E
A
M
C224 1000pF
DTV/MNT_VOUT
AMP_SDA
R241 33
D2-_HDMI4
AVDD_MIU
C233 0.047uF
PM_MODEL_OPT_1
SW200
JTP-1127WEM
SWICH
1
24
3
R202 100 BOOSTER_OPT
R238 68
C
2
4
5
0
.
1
u
F
R201 100 OPT
C291
0.1uF
16V
R218 47
C222 0.047uF
R
2
2
1
1
K
M
I
U
0
-
2
5
6
M
CEC_REMOTE_S7
X201
24MHz
FB_CORE
C252
0.1uF
C243 2.2uF
MODEL_OPT_7 R229 100 OPT
COMP2_DET
R219
0
HALF_NIM/EU_NON_T2
R289 100
HALF_NIM/EU_NON_T2 R
2
2
3
1
K
M
I
U
0
-
1
2
8
M
POWER_DET_RESET
HP_ROUT
C286
0.1uF
+2.5V_Normal
DDC_SDA_2
SC1/COMP1_L_IN
SC1/COMP1_R_IN
SC1_FB
SC1_SOG_IN
SC1_B+/COMP1_Pb+
SC1_G+/COMP1_Y+
SC1_ID
SC1_R+/COMP1_Pr+
SC1_CVBS_IN
DEMOD_SCL
DEMOD_SDA
C284-*1
10uF 10V
CAP_10uF_X7R
C204-*1
10uF 10V
CAP_10uF_X7R
C269-*1
10uF 10V
CAP_10uF_X7R
MHL_CD_SENSE
C261 27pF
XTAL_LOAD_27pF
C262 27pF
XTAL_LOAD_27pF
IC101
MSD804KKX
S7LR-M_NON_MS10
RXACKP
J2
RXACKN
J3
RXA0P
K3
RXA0N
J1
RXA1P
K2
RXA1N
K1
RXA2P
L2
RXA2N
L3
DDCDA_DA/GPIO27
T5
DDCDA_CK/GPIO26
T4
HOTPLUGA/GPIO22
V5
HOTPLUGD/GPIO25
R5
RXCCKP
AE9
RXCCKN
AC9
RXC0P
AC10
RXC0N
AD9
RXC1P
AC11
RXC1N
AD10
RXC2P
AE11
RXC2N
AD11
DDCDC_DA/GPIO31
AE8
DDCDC_CK/GPIO30
AD8
HOTPLUGC/GPIO24
AC8
RXBCKP
F2
RXBCKN
F3
RXB0P
G3
RXB0N
F1
RXB1P
G2
RXB1N
G1
RXB2P
H2
RXB2N
H3
DDCDB_DA/GPIO29
R6
DDCDB_CK/GPIO28
U6
HOTPLUGB/GPIO23
P5
CEC/GPIO5
R4
HSYNC0
P2
VSYNC0
R3
RIN0P
N2
RIN0M
P3
GIN0P
N3
GIN0M
N1
BIN0P
M3
BIN0M
M2
SOGIN0
M1
HSYNC1
V2
VSYNC1
V3
RIN1P
U3
RIN1M
U2
GIN1P
T1
GIN1M
T2
BIN1P
R2
BIN1M
R1
SOGIN1
T3
HSYNC2
AA2
RIN2P
Y2
RIN2M
AA3
GIN2P
W2
GIN2M
Y3
BIN2P
V1
BIN2M
W3
SOGIN2
W1
CVBS0
AA8
CVBS1
Y4
CVBS2
W4
CVBS3
AA5
NC_5
Y5
NC_7
AA4
NC_6
Y6
CVBSOUT1
AA1
VCOM
AB4
NC_8
AC4
NC_9
AD3
IP
AC3
IM
AE3
SIFP
AD4
SIFM
AC5
IF_AGC
AD2
RF_AGC
AE2
I2C_SCKM1/GPIO78
AE6
I2C_SDAM1/GPIO79
AD6
XIN
AD1
XOUT
AC1
SPDIF_IN/GPIO150
D7
SPDIF_OUT/GPIO151
D6
USB0_DM
E3
USB0_DP
E2
USB1_DM
AC12
USB1_DP
AE12
I2S_IN_BCK/GPIO148
C8
I2S_IN_SD/GPIO149
D8
I2S_IN_WS/GPIO147
D9
I2S_OUT_BCK/GPIO154
B10
I2S_OUT_MCK/GPIO152
C9
I2S_OUT_SD/GPIO155
B9
I2S_OUT_WS/GPIO153
C10
AUL0
AB9
AUR0
AA11
AUL1
Y9
AUR1
AA9
AUL2
AA7
AUR2
AB8
AUL3
Y8
AUR3
Y10
AUL4
AC7
AUR4
AD7
GPIO_PM[13]/GPIO19
W6
AUOUTL2
V6
AVDD5V_MHL
V4
GPIO_PM[14]/GPIO20
Y7
AUOUTR2
W5
GPIO_PM[15]/GPIO21
U5
AUVRM
AD5
AUVAG
AE5
AUVRP
AC6
EARPHONE_OUTL
AA6
EARPHONE_OUTR
AB6
RP/GPIO63
C6
TP/GPIO60
C5
RN/GPIO66
A6
LED1/GPIO59
C4
TN/GPIO62
B5
GPIO61
C3
GPIO64
A3
GPIO65
B3
LED0/GPIO58
B4
IRIN/GPIO4
N4
ARC0
T6
HWRESET
N5
IC101
MSD804KKX
S7LR-M_NON_MS10
AVDDLV_USB
K12
VDDC_1
G9
VDDC_2
H9
VDDC_3
K10
VDDC_4
K11
VDDC_5
L10
VDDC_6
M12
VDDC_7
M13
VDDC_8
N12
VDDC_9
P14
VDDC_10
P15
VDDC_11
R10
VDDC_12
R14
VDDC_13
R15
VDDC_14
T10
NC_2
P10
FB_CORE
P19
AVDDL_MOD
R16
NC_1
L11
DVDD_DDR
M14
AVDD2P5_ADC_1
W9
AVDD2P5_ADC_2
W10
AVDD2P5_ADC_3
W11
AVDD2P5_ADC_4
W12
AVDD25_LAN
Y17
AVDD_MOD_1
V18
AVDD_MOD_2
U19
NC_3
W14
NC_4
W15
AVDD_NODIE
U7
AVDD_DVI_USB_1
L7
AVDD_DVI_USB_2
M7
AVDD3P3_MPLL
P7
AVDD_DMPLL
R7
DVDD_NODIE
M19
AVDD_AU33
V7
AVDD_EAR33
W7
VDDP_1
R19
VDDP_2
T19
AVDD_LPLL_1
W18
AVDD_LPLL_2
W19
VDDP_NAND
V19
AVDD_DDR0_D_1
J17
AVDD_DDR0_D_2
K15
AVDD_DDR0_D_3
K16
AVDD_DDR0_C
L15
AVDD_DDR1_D_1
K17
AVDD_DDR1_D_2
L17
AVDD_DDR1_D_3
M17
AVDD_DDR1_C
L16
GND_EFUSE
E9
GND_1
A23
GND_2
B17
GND_3
C23
GND_4
A5
GND_5
C11
GND_6
C19
GND_7
C22
GND_8
D14
GND_9
D18
GND_10
D19
GND_11
E17
GND_12
E18
GND_13
E19
GND_14
E22
GND_15
F8
GND_16
F17
GND_17
F18
GND_18
F19
GND_19
G8
GND_20
H8
GND_21
N22
GND_22
N21
GND_23
N20
GND_24
M22
GND_25
M21
GND_26
M20
GND_27
F10
GND_28
V15
GND_29
W16
GND_30
V8
GND_31
T18
GND_32
G10
GND_33
G11
GND_34
G12
GND_35
G13
GND_36
G14
GND_37
G17
GND_38
G18
GND_39
G19
GND_40
G24
GND_41
H11
GND_42
H12
GND_43
H13
GND_44
H14
GND_45
H15
GND_46
H16
GND_47
H17
GND_48
H18
GND_49
H19
GND_50
J9
GND_51
J10
GND_52
J11
GND_53
J12
GND_54
J13
GND_55
J14
GND_56
J15
GND_57
J16
GND_58
J18
GND_59
J19
GND_60
J25
GND_61
K9
GND_62
K13
GND_63
K14
GND_64
H10
GND_65
K18
GND_66
K19
GND_67
K22
GND_68
L8
GND_69
L9
GND_70
J8
GND_71
L12
GND_72
L13
GND_73
L18
GND_74
L19
GND_75
M8
GND_76
K8
GND_77
M10
GND_78
M11
GND_79
L14
GND_80
M15
GND_81
M16
GND_82
M18
GND_83
M25
GND_84
N10
GND_85
N11
GND_86
N13
GND_87
N14
GND_88
N15
GND_89
N16
GND_90
N17
GND_91
N19
GND_92
K7
GND_93
P8
GND_94
P9
GND_95
M9
GND_96
P11
GND_97
P13
GND_98
P16
GND_99
P17
GND_100
P18
GND_101
P12
GND_102
R8
GND_103
R9
GND_104
R11
GND_105
R12
GND_106
R13
GND_107
R17
GND_108
T8
GND_109
T9
GND_110
N7
GND_111
T11
GND_112
T12
GND_113
T13
GND_114
T14
GND_115
T15
GND_116
T16
GND_117
T17
GND_118
U8
GND_119
U9
GND_120
U10
GND_121
U11
GND_122
U12
GND_123
U13
GND_124
U14
GND_125
U15
GND_126
U16
GND_127
U17
GND_128
R18
GND_129
V9
GND_130
V10
GND_131
V11
GND_132
V12
GND_133
V14
GND_134
V17
GND_135
T7
GND_136
E8
1
0
u
F
1
0
V
C
2
0
4
C
A
P
_
1
0
u
F
_
X
5
R
8
5
C
1
0
u
F
1
0
V
C
2
8
4
C
A
P
_
1
0
u
F
_
X
5
R
8
5
C
10uF
10V
C
2
6
9 CAP_10uF_X5R
85C
R217
0
AVDD_DMPLL
AVDD_DMPLL
C205
0.1uF
L207
BLM18PG121SN1D
R203 0 RF_SW_OPT
C288
33pF
HALF_NIM/IF_FILTER
C289
33pF
HALF_NIM/IF_FILTER
C202
4.7uF
10V
RESET_IC_SOC_RESET
C200
4.7uF
10V
+3.5V_SOC_RESET
C
2
5
4
1
u
F
C260
1uF
C
2
7
7
1
u
F
C
2
8
0
1
u
F
1
0
u
F
1
0
V
C
2
2
8
1
0
u
F
1
0
V
C
2
7
5
10uF
10V
C296
1
0
u
F
1
0
V
C
2
7
8
URSA_SCL
URSA_SDA
POWER_ON/OFF_2
POWER_ON/OFF_2
URSA_SCL
URSA_SDA
R214 2.2
R215 2.2
MODEL_OPT_8
R
2
9
8
1
K
S
/
W
_
A
J
R
2
9
7
1
K
O
P
T
R213 100 OPT
+2.5V_Normal
C261-*1 30pF
XTAL_LOAD_30pF
C262-*1 30pF
XTAL_LOAD_30pF
NC4_S7LRM
52
2012.09.19
MAIN2_NON_EU
U23 MODEL OPTION
MODEL_OPT_3
MODEL OPTION
MIU0-128M
0
TUNER_I2C
Normal Power 3.3V
I2S_I/F
HIGH
DTV_IF
PHM_OFF
DDR3 1.5V
M120
MODEL_OPT_5
0
Close to MSTAR
NON_M120
SOC_RESET
MIU0-256M
0
ANALOG SIF
Close to MSTAR
PIN NAME
Close to MSTAR
Ginga
AVDD_DDR1:55mA
AB3
Memory OPTION
MODEL_OPT_6
CVBS In/OUT
U23
H/P OUT
AVSS_PGA
NON_DVB_T2
CHANGE TO X5R AUDIO IN
PIN NO.
1
MIU1-128M
FHD
MIU1-NO_DDR
Memory
VDDC 1.05V
DVB_T2
MODEL_OPT_4
128M
HD
Close to MSTAR
COMP2
STby 3.5V
MODEL_OPT_6
T25
1 256M
MODEL_OPT_4
AVDD25_PGA
1
SIDE USB
B8
A8
Note
MODEL_OPT_6
CHANGE TO
10UF 10V X5R
CHANGE TO
10UF 10V X5R
128M+128M
VDDC : 2026mA
AVDD25_PGA:13mA
NON_DVB_S
CHANGE TO
10UF 10V X5R
DVB_S T24
AB2
LOW
PHM_ON
B8
MODEL_OPT_1
MODEL_OPT_7
SYM.E
H
D
M
I
AVDD_DDR0:55mA
MODEL_OPT_0
1
MODEL_OPT_4
256M+128M
AVDD2P5:172mA
* Dual Stream is only Korea 3D spec
MODEL_OPT_2
Normal 2.5V
PIN NO.
AUDIO OUT
PIN NO.
SYM.C
F4
0
DUALSTREAM NON_DUALSTREAM
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
RS232C_PHONE
2012/06/21
53
NC4_S7LRM
R5302
100
RS232_PHONE
R5301
100
RS232_PHONE
D5301
ADUC 20S 02 010L
20V
OPT
C5309
1000pF
50V
OPT
HP_LOUT
IC5301
MAX3232CDR
EAN41348201
RS232_PHONE
3
C1-
2
V+
4
C2+
1
C1+
6
V-
5
C2-
7
DOUT2
8
RIN2
9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
D5302
20V
ADUC 20S 02 010L
OPT
R5308
1K
HEAD_PHONE
R5307
1K
HEAD_PHONE
HP_DET
C5302
0.1uF
RS232_PHONE
C5310
1000pF
50V
OPT
PM_RXD
HP_ROUT
C5304
0.1uF
RS232_PHONE
+3.3V_Normal
R5305
1K
HEAD_PHONE
JK5301
KJA-PH-1-0177
RS232_PHONE
3 M3_DETECT
4 M4
5 M5_GND
1 M1
6 M6
C5306
0.1uF
RS232_PHONE
C5307
10uF
16V
HEAD_PHONE
C5305
0.1uF
RS232_PHONE
C5303
0.1uF
RS232_PHONE
+3.5V_ST
C5308
10uF
16V
HEAD_PHONE
R5306
10K HEAD_PHONE
JK5301-*1
KJA-PH-0-0177
HEAD_PHONE
3 DETECT
4 L
5 GND
1 R
PM_TXD
R5309
0
HEAD_PHONE
RS-232C
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M1_DDR (1DDR)
2012/06/21
54
NC4_S7LRM
A-MDMU
A-MWEB
A-MA7
A-MDQL5
A-MBA2
A-MCASB
A-MA8
A-MDQSU
A-MA12
A-MDQL7
A-MA14
A-MDQL2
R
1
2
3
6
5
61
%
A-MDQL0
A-MODT
A-MCASB
A-MA2
A-MDQU7
A-MA1
A-MDQL0
A-MDQL2
A-MA3
C
1
2
0
1
0
.
1
u
F
A-MDQL3
AVDD_DDR0
A-MDQU0
A-MA14
A-MDQL1
C
1
2
0
21
0
0
0
p
F
A-MDQSLB
A-MA4
A-MRESETB
A-MDQL4
A-MDML
AVDD_DDR0
R
1
2
0
1
1
K
1
%
A-MVREFDQ
A-MRESETB
A-MCKB
A-MDQU7
A-MODT
A-MA5
A-MDQU4
A-MCKE
A-MDQL3
A-MDMU
A-MA13
A-MVREFCA
R
1
2
0
2
1
K
1
%
A-MBA2
A-MDQL4
A-MDQU2
A-MBA1
A-MDQSLB
R
1
2
0
5
1
K
1
%
A-MDQU2
R1203
240
1%
A-MDQSU
R1231
10K
A-MBA0
A-MDQU1
A-MDQU5
A-MA5
A-MRASB
A-MDQU1
A-MDQSL
A-MDQSUB
A-MA9 A-MA9
R
1
2
3
5
5
61
%
A-MDQSL
A-MDQU3
C
1
2
0
41
0
0
0
p
F
A-MCKE
A-MVREFDQ
A-MDML
A-MA10 A-MA10
A-MDQU0
A-MA4
A-MA13
A-MBA1
A-MBA0
A-MDQU3
A-MA11
A-MDQL6
A-MCK
A-MDQU6
A-MA2
A-MA12
A-MDQSUB
AVDD_DDR0
C
1
2
0
3
0
.
1
u
F
A-MWEB
A-MA8
A-MRASB
A-MVREFCA
A-MDQL5
A-MA0
A-MDQU4
A-MDQU5
A-MDQL7
A-MDQU6
A-MA6
A-MA0
AVDD_DDR0
A-MDQL6
A-MA3
A-MCKB
A-MA7
A-MDQL1
A-MA11
A-MA1
A-MA6
A-MCK
R
1
2
0
4
1
K
1
%
AVDD_DDR0 +1.5V_DDR
L1202
CIC21J501NE
C
1
2
0
6
0
.
1
u
F
C1209
0.01uF
50V
C
1
2
3
9
0
.
1
u
F
C1213 0.1uF
C1208 0.1uF
C1211 0.1uF
C1214 0.1uF
C1212 0.1uF
C1210 0.1uF
C1215 0.1uF
C1207 0.1uF
H5TQ2G63DFR-PBC
IC1201
DDR_1600_2G_HYNIX
EAN61829203
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
K4B2G1646E-BCK0
IC1201-*1
DDR_1600_2G_SS
EAN61848802
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
NT5CB128M16FP-DI
IC1201-*2
DDR_1600_2G_NANYA
EAN61859702
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_6 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_5 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
H5TQ1G63EFR-PBC
IC1201-*3
DDR_1600_1G_HYNIX
EAN61829003
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
NC_7 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
K4B1G1646G-BCK0
IC1201-*4
DDR_1600_1G_SS
EAN61836301
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_6 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
IC101
MSD804KKX
S7LR-M_NON_MS10
A_DDR3_A[0]
A11
A_DDR3_A[1]
C14
A_DDR3_A[2]
B11
A_DDR3_A[3]
F12
A_DDR3_A[4]
C15
A_DDR3_A[5]
E12
A_DDR3_A[6]
A14
A_DDR3_A[7]
D11
A_DDR3_A[8]
B14
A_DDR3_A[9]
D12
A_DDR3_A[10]
C16
A_DDR3_A[11]
C13
A_DDR3_A[12]
A15
A_DDR3_A[13]
E11
A_DDR3_A[14]
B13
A_DDR3_BA[0]
F13
A_DDR3_BA[1]
B15
A_DDR3_BA[2]
E13
A_DDR3_MCLK
C17
A_DDR3_MCLKZ
A17
A_DDR3_MCLKE
B16
A_DDR3_ODT
E14
A_DDR3_RASZ
B12
A_DDR3_CASZ
A12
A_DDR3_WEZ
C12
A_DDR3_RESET
F11
A_DDR3_DQSL
B19
A_DDR3_DQSLB
C18
A_DDR3_DQSU
B18
A_DDR3_DQSUB
A18
A_DDR3_DQML
E15
A_DDR3_DQMU
A21
A_DDR3_DQL[0]
D17
A_DDR3_DQL[1]
G15
A_DDR3_DQL[2]
B21
A_DDR3_DQL[3]
F15
A_DDR3_DQL[4]
B22
A_DDR3_DQL[5]
F14
A_DDR3_DQL[6]
A22
A_DDR3_DQL[7]
D15
A_DDR3_DQU[0]
G16
A_DDR3_DQU[1]
B20
A_DDR3_DQU[2]
F16
A_DDR3_DQU[3]
C21
A_DDR3_DQU[4]
E16
A_DDR3_DQU[5]
A20
A_DDR3_DQU[6]
D16
A_DDR3_DQU[7]
C20
B_DDR3_A[0]
B23
B_DDR3_A[1]
D25
B_DDR3_A[2]
F22
B_DDR3_A[3]
G22
B_DDR3_A[4]
E24
B_DDR3_A[5]
F21
B_DDR3_A[6]
E23
B_DDR3_A[7]
D22
B_DDR3_A[8]
D24
B_DDR3_A[9]
D21
B_DDR3_A[10]
C24
B_DDR3_A[11]
C25
B_DDR3_A[12]
F23
B_DDR3_A[13]
E21
B_DDR3_A[14]
D23
B_DDR3_BA[0]
G20
B_DDR3_BA[1]
F24
B_DDR3_BA[2]
F20
B_DDR3_MCLK
G25
B_DDR3_MCLKZ
G23
B_DDR3_MCLKE
F25
B_DDR3_ODT
D20
B_DDR3_RASZ
B25
B_DDR3_CASZ
B24
B_DDR3_WEZ
A24
B_DDR3_RESET
E20
B_DDR3_DQSL
K24
B_DDR3_DQSLB
K25
B_DDR3_DQSU
J21
B_DDR3_DQSUB
J20
B_DDR3_DQML
H24
B_DDR3_DQMU
L20
B_DDR3_DQL[0]
L23
B_DDR3_DQL[1]
J24
B_DDR3_DQL[2]
L24
B_DDR3_DQL[3]
J23
B_DDR3_DQL[4]
M24
B_DDR3_DQL[5]
H23
B_DDR3_DQL[6]
M23
B_DDR3_DQL[7]
K23
B_DDR3_DQU[0]
G21
B_DDR3_DQU[1]
L22
B_DDR3_DQU[2]
H22
B_DDR3_DQU[3]
K20
B_DDR3_DQU[4]
H20
B_DDR3_DQU[5]
L21
B_DDR3_DQU[6]
H21
B_DDR3_DQU[7]
K21
NT5CB64M16DP-DH
IC1201-*5
DDR_1600_1G_NANYA
EAN61859501
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12 N7
NC_6 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA M8
VREFDQ H1
ZQ L8
VDD_1 B2
VDD_2 D9
VDD_3 G7
VDD_4 K2
VDD_5 K8
VDD_6 N1
VDD_7 N9
VDD_8 R1
VDD_9 R9
VDDQ_1 A1
VDDQ_2 A8
VDDQ_3 C1
VDDQ_4 C9
VDDQ_5 D2
VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
VDDQ_9 H9
NC_1 J1
NC_2 J9
NC_3 L1
NC_4 L9
NC_7 T7
VSS_1 A9
VSS_2 B3
VSS_3 E1
VSS_4 G8
VSS_5 J2
VSS_6 J8
VSS_7 M1
VSS_8 M9
VSS_9 P1
VSS_10 P9
VSS_11 T1
VSS_12 T9
VSSQ_1 B1
VSSQ_2 B9
VSSQ_3 D1
VSSQ_4 D8
VSSQ_5 E2
VSSQ_6 E8
VSSQ_7 F9
VSSQ_8 G1
VSSQ_9 G9
C1205 10uF 10V
C1227 10uF 10V
C
1
2
5
1
1
0
u
F
1
0
V
C
1
2
1
7
1
u
F
C
1
2
1
8
1
u
F
C
1
2
1
9
1
u
F
C
1
2
3
8
1
u
F
C
1
2
4
1
1
u
F
CLose to Saturn7M IC
CLose to DDR3
SYMBOL.B
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+3.5V_ST
/FLASH_WP
C5501
0.1uF
IC1300-*2
W25Q80BVSSIG
SFLASH_OS_WINBOND
3
%WP[IO2]
2
DO[IO1]
4
GND
1
CS
5
DI[IO0]
6
CLK
7
HOLD[IO3]
8
VCC
R5504
33
SPI_SCK
R5503
4.7K
OPT
SPI_SDO
SPI_SDI
R5501
10K
OPT
+3.5V_ST
/SPI_CS
R5502
0
+3.5V_ST
IC1300-*3
MX25L8006EM2I-12G
SFLASH_OS_MACRONIX
3
WP#
2
SO/SIO1
4
GND
1
CS#
5
SI/SIO0
6
SCLK
7
HOLD#
8
VCC
IC1300-*1
MX25L6406EM2I-12G
SFLASH_NON_OS_MX
3
WP
2
SO/SIO1
4
GND
1
CS
5
SI/SIO0
6
SCLK
7
HOLD
8
VCC
IC1300
W25Q64FVSSIG
SFLASH_NON_OS_WINBOND
3
WP[IO2]
2
DO[IO1]
4
GND
1
CS
5
DI[IO0]
6
CLK
7
%HOLD[IO3]
8
VCC
S_FLASH_NON_OS
2012.06.21
55
NC4_S7LRM
Serial Flash for SPI boot_NON_OS
Copyright 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only

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