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Dynamic V - Sub T - SRAM - A Leakage Tolerant Cache Memory For Low Voltage Microprocessors
Dynamic V - Sub T - SRAM - A Leakage Tolerant Cache Memory For Low Voltage Microprocessors
Downloaded on October 26, 2008 at 00:16 from IEEE Xplore. Restrictions apply.
Authorized licensed use limited to: University of Central Florida. Downloaded on October 26, 2008 at 00:16 from IEEE Xplore. Restrictions apply.
Authorized licensed use limited to: University of Central Florida. Downloaded on October 26, 2008 at 00:16 from IEEE Xplore. Restrictions apply.
Authorized licensed use limited to: University of Central Florida. Downloaded on October 26, 2008 at 00:16 from IEEE Xplore. Restrictions apply.