ELEC343 Basic VHDL Design Practical 4

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ELEC343 Digital Systems Design
Basic VHDL Design Practical 4
Part I. A Comparator
The code given in the lecture for a comparator is using concurrent statements,
which does not contain the clock and reset signal. You will design this
comparator by using sequential statements so that the two signals can be added
into the design.
Set A and B to 4 bits each. Set the outputs A_GT_B, A_EQ_B and A_LT_B
to active low signals. For example, A_GT_B = 0 when A > B, otherwise
A_GT_B = 1.
Use one of the four pushbuttons at the bottom left corner on FPGA board for
the reset signal. Choose any 3 LEDs and any 2 sets of 4 switches for your
outputs and inputs A and B. Associate your clock with the onboard clock at
pin T9.
Write the test bench.
Show your board with a correct comparing function to your tutor.
ELEC343 Basic VHDL Design Practical 4
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Part II. A Hamming Code Generator
Design a 7-bit Hamming Code generator using even parity. You need an input
of 4 data bits and an output of 7 bits including both data bits and parity bits.
Complete the following table with your outputs for the listed inputs and use
them to test your circuit.
Input (Data Bits) Output (Hamming Code)
1 0 0 1 1 0 0 1 1 0 0
1 0 1 0
0 1 1 1
0 0 0 0
1 1 1 1
Show your board with correct tests to your tutor.
Part III. A Hamming Code Checker
Design a 7-bit Hamming Code checker using even parity. You need an input
of 7 bits and an output of 4 bits 1 bit for error.
You can use the tests in Part II above. Show your board with correct tests of
error bits to your tutor.
Input Output Error
1 0 0 1 1 0 1
0 1 1 0 1 0 0
0 1 0 1 1 0 1
0 1 1 0 1 1 0
1 1 0 1 1 0 1