Mi PR Ne Ba

Networking Based Patient Monitoring System
INTRODUCTION
Electronics & Telecommunication Department Page 1
1.1 INTRODUCTION:-
Patient monitor or "multiparameter monitor" or also referred to as "physiological monitor" is a
clinical use electronic machine designed to display and minimally interpret a person!s "ital
signs# Some monitors can warn of pending fatal cardiac conditions $efore "isi$le signs are
noticea$le to clinical staff #The parameters %or measurements& usually consist of Pulse '(imetry
%measurement of the saturated percentage of '(ygen in the $lood referred to as SP')& E*+
%electro,*ardiograph of the P,-.S,T wa"e of the heart w/wo pacemaker& Blood pressure %either
in"asi"ely through an inserted $lood Pressure,to,transducer assem$ly or non,in"asi"ely with an
0nflata$le $lood pressure cuff& and temperature %usually Skin temperature through an adhesi"e
pad# There are more parameters such as cardiac output *') measurement %referred to as ET*')
or end,tidal car$ondio(ide& respiration %through E*+ channel or "ia ET*') when it is called
12.. or 1irway .espiratory .ate& anaesthetic gas measurement etc.
Patient monitors can $e $roadly categori3ed as standalone or multiparameter# Standalone
monitors continue to $e used in de"eloping countries like 0ndia mainly due to cost restraints and
also $ecause they are easy to manufacture and maintain#0n de"eloped part of the world
multiparameter monitors ha"e supplanted them in some cases $ecause of statutory re4uirements
%for e(ample the us 5D1& and also $ecause if a clinician re4uires to monitor one channel then
other channels are also needed to complement the data and get a complete picture of the patient!s
"ital situation#
E(ample6
7E*+8SP')8respiration99SP')8N0BP99E*+8SP')8resporecg8SP')8resp8N0BP8temp8pre
ssure with or without ET*')9#
*ompanies are working to integrate the physiological data from the isolated patient monitoring
networks into the Emerging hospital digital charting systems using hl:# This Newer method of
charting patient data reduces the likelihood of human documentation error and will e"entually
reduce o"erall paper consumption#
ABSTRACT
1.2 ABSTRACT:-
Networking $ased patient monitoring system is used to monitor the different parameters of
patients remotely and simultaneously# 0n this system the doctor can monitor different parameters
of many patients $y sitting in his room# Parameters of each patient are recorded with the help of
a microcontroller#
0n our system we are going to use .S;<= $ased networking system# 0t uses one master and three
sla"e system which are connected to each other using .S;<= protocol# Master unit consists of a
microcontroller serial communication ca$le to P* .S;<= communication module# The Sla"e
unit consists of a microcontroller sensors and .S;<= communication ca$le# The sla"e unit reads
the analog "alues from sensors and stores them into memory# 2hen master sends a command for
data then that particular sla"e has to send these "alues to the master# The master then sends these
"alues to P*# The serial communication of the master with the computer is achie"ed $y means of
.S)>) protocol#1 "isual $asic program is used to display these "alues on screen# This program
also stores these "alues on hard disk for future analysis#
This pro?ect pro"ides real,time update of the patient@s health to the doctor# 0t reduces the fre4uent
"isits of the doctors to the patient in person#This pro?ect helps in conser"ing paper and thus
sa"ing "ery important trees# 0n our pro?ect the num$er of patients can $e increased depending
upon the num$er of dri"ers allowed $y .S;<= protocol#
Thus the pro?ect pro"ides the facility of "irtual super"ision for the doctors# This kind of
monitoring system can $e applied to the pri"ate rooms semi,pri"ate rooms as well as general
wards#
1.3 COMPARISON WITH CURRENT SCENARIO:-

5ig A#A

5ig A#)
Sonography instrument
The pictures 5ig A#A and 5igA#) show the current $edside monitors a"aila$le in the hospitals#
These $edside monitors are local the room in which they are installed# Bere the doctor or the
central nurse who is incharge of the ward has to "isit e"ery patient to check his/her health status
and "erify the parameter "alues#
The current scenario can $e represented in a more simplified manner with the help of following
sketch#

5ig A#>
1s shown in the sketch "arious sensors are connected to the patient@s $ody# The parameter "alues
o$tained from the sensors are shown on the $edside monitors# But these monitors are local to the
room only and hence arises a need for remote monitoring#
1.4 NEED OF MONITORING:-
0n unsta$le physiological regulatory systems for e(ample in the case of a drug o"erdose or
anaesthesia#
0n a life threatening condition for e(ample where there are indications of a heart attack#
CONCEPTUAL DIAGRAM
1.5 CONCEPTUAL DIAGRAM:-
5ig A#;
The pre"ious sketch can $e replaced $y the conceptual diagram shown a$o"e# Bere instead of
displaying the parameter "alues on the $edside monitors they are gi"en to the remote master
who takes the responsi$ility of displaying the "alues on the doctor@s computer#
1lso the networking $etween master and sla"e is shown# 5or con"inience only one sla"e is
shown#
SPECIFICATIONS
1.6 SPECIFICATIONS OF THE PROJECT:-

POWER SUPPLY SPECIFICATIONS:
)>CD 1* mains
.egulated power supply using "oltage regulator EM:<C=
Diodes for $ridge rectifier AN;CC:
SLAE SPECIFICATIONS:
Microcontroller AF5<::1
SENSORS6
Temperature Sensor 6 EM>=
Bottle Ee"el Sensor6 T(, $right EED .(,
Beart rate sensor6
MASTER SPECIFICATIONS:
Microcontroller AF5<::1
.S)>) protocol for serial communication with P*
M1G )>) used to con"ert .S)>) "oltage le"els to TTE and "ice,"ersa
NETWOR!ING SPECIFICATIONS:
.S;<= networking protocol
0* :=A:F used to con"ert .S;<= "oltage le"els to TTE and "ice,"ersa
Termination resistances of A)Cohm and <:Cohm

SOFTWARE SPECIFICATION:
Disual Basic F
BLOC! DIAGRAM
1." BLOC! DIAGRAM:-

5ig A#=
The figure represents $lock diagram of the pro?ect# 0t clearly indicates the data ac4uisition and
the networking part#
BLOC! DIAGRAM
DESCRIPTION
1.# BLOC! DIAGRAM DESCRIPTION:-
1.#.1 MICROCONTROLLER:-

5ig A#F
The microcontroller used is P0*AF5<::1#
F$%&'($):-
Bigh performance .0S* processor#
Hses Bar"ard architecture#
.egister files/data memory can $e accesed directly or indirectly#
0t has $uilt in power, on, reset#
0t has $uilt in AC $it 1D*#
0t can control upto AC interrupt sources#
*ontains $uilt in serial peripheral interface#
0t has two ports to dri"e output#
0t has $rown out reset#
1.#.2 RS4#5 PROTOCOL:-
.S,;<= is a telecommunications standard for $inary serial communications $etween de"ices# 0t is
the protocol or specifications that need to $e followed to allow de"ices that implement this
standard to speak to each other#This protocol is an updated "ersion of the original serial protocol
known as .S)>)# 2hile the original .S,)>) standard allowed for the connection of two de"ices
through a serial link .S,;<= allows for serial connections $etween more than ) de"ices on a
networked system#
Default all the senders on the RS4#5 $us are in tri,state with high impedance# 0n higher le"el
protocols one of the nodes is defined as a master who sends 4ueries or commands o"er the
RS4#5 $us#1ll other nodes recei"e these data# Depending on the information in the sent data
3ero or more nodes on the line respond to the master# There are other implementations of RS4#5
networks where e"ery node can start a data session on its own# This is compara$le with the way
ethernet networks function#
2ith such an implementation of a RS4#5 network it is necessary that there is error detection
implemented in the higher le"el protocol to detect the data corruption and resend the information
at a later time#There is no need for the senders to e(plicitly turn the RS4#5 dri"er on or off#
RS4#5 dri"ers automatically return to their high impedance tri,state within a few microseconds
after the data has $een sent# Therefore it is not needed to ha"e delays $etween the data packets on
the RS4#5 $us#
RS4#5 is used as the electrical layer for many well known interface standards including
Profi$us and Mod$us# Therefore RS4#5 will $e in use for many years in the future#
The graph below shows potentials of the '+' and '' pins of an EIA-485 line during transmission of
one byte !"#$% of data using anasyn&hronous start-stop method'
5ig A#:
COMPARISON OF ARIOUS PROTOCOL STANDARDS:-
DESIGN AND INTERFACING
1.* DESIGN CONSIDERATIONS AND INTERFACING DETAILS:-
1.*.1 POWER SUPPLY:-
The $asic step in the designing of any system is to design the power supply re4uired for that
system#The steps in"ol"ed in the designing power supply are
i# Determine the total current that the system sinks from the supply#
ii# Determine the "oltage rating re4uired for the different components#
5ig A#<
%+ T(%,)-.(/$( S$0$1&2.,:-
Minimum input re4uired for EM:<C= 0* is gi"en $y the e4uation $elow#
Din IDreg 8 drop out "oltage across EM:<C= 0*
I =D 8 )D
I :D
The drop across diodes in the $ridge rectifier is A#;D
Minimum secondary "oltage re4uired is I A#; 8 : I <#;D
Bence unregulated power supply design is for JD#
Dr %ripple "oltage& I ACK of output "oltage I C#JD
5re4uency I =CB3
Time Period IA/=C I )Cms
b) D2.3$ D$)24, :-
P0D I Dm
Dm I JD
Bence we select diode AN;CC:
P0D I ACCD 0f I A1
R$%).,) -.( 15..)2,4 6(234$ ($1&2-2$(:-
The TH5 is increased to C#<A) as compared to the full wa"e rectifier#
The P0D across each diode is Dm and not )Dm as in case of two diode rectifier#
'utput of $ridge rectifier is not pure D*# 0t contains some 1* ripples in it# To remo"e these
ripples we ha"e used a capacitor as a filter which smoothens the output "oltage# 2e choose
capacitor as a filter as it is cost effecti"e readily a"aila$le and porta$le#Selection of
capacitance depends on the current rating of the supply and selection of "oltage rating for
capacitor on the secondary "oltage of the transformer#
c) R$4'0%&.( S$0$1&2.,:-
P0*AF5<::1 re4uires a supply of 8=D# The sensors also re4uire the same "oltage supply#The
sink current of the system is not more than )CCm1#
Bence we select regulator 0* EM:<C=#
0nput "oltage range6 L <D to >=D
Drop out "oltage6 L )D
'utput rating6 L =D
1.*.2 SERIAL COMMUNICATION:-
DB-* 1.,,$1&.( -$/%0$

5ig A#J
DB-* 1.,,$1&.( /%0$

5ig )#C
RS232 P(.&.1.0:-
The .S,)>) interface is the Electronic 0ndustries 1ssociation %E01& standard for the interchange
of serial $inary data $etween two de"ices# 0t was initially de"eloped $y the E01 to standardi3e
the connection of computers with telephone line modems#The standard allows as many as )C
signals to $e defined $ut gi"es complete freedom to the user#
Three wires are sufficient6 send data recei"e data and signal ground# The remaining lines can $e
hardwired on or off permanently# The signal transmission is $ipolar re4uiring two "oltages from
= to )= "olts of opposite polarity#
C.//',21%&2., S&%,3%(3):-
The industry custom is to use an asynchronous word consisting of6 a start $it se"en or eight data
$its an optional parity $it and one or two stop $its# The $aud rate at which the word sent is
de"ice,dependent# The $aud rate is usually A=C times an integer power of ) ranging from C to :
%A=C >CC FCC### AJ)CC&# Below A=C $aud many system,uni4ue rates are used# The standard .S,
)>),* connector has )= pins )A pins which are used in the complete standard# Many of the
modem signals are not needed when a computer terminal is connected directly to a computer#
Specifying compliance to .S,)>) only esta$lishes that the signal le"els in two de"ices will $e
compati$le and that if $oth de"ices use the suggested connector they may $e a$le to $e
connected# *ompliance to .S,)>) does not imply that the de"ices will $e a$le to communicate
or e"en acknowledge each other!s presence#
E0$1&(21%0 C5%(%1&$(2)&21):,
The .S,)>),* specifies the signaling rate $etween the DTE and D*E and a digital signal is
used on all interchange circuits# The .S,)>) standard specifies that logic "A" is to $e sent as a
"oltage in the range ,A= to ,= D and that logic "C" is to sent as a "oltage in the range 8= to 8A= D#
The standard specifies that "oltages of at least > D in amplitude will always $e recogni3ed
correctly at the recei"er according to their polarity so that apprecia$le attenuation along the line
can $e tolerated# The transfer rate is rated M )C k$ps and a distance of N A=m# +reater distance
and data rates are possi$le with good design $ut it is reasona$le to assume that these limits apply
in practice as well as in theory#The load impedance of the terminator side of the interface must $e
$etween >CCC and :CCC ohms and not more than )=CCp5#
W.(72,4:-
Data is transmitted and recei"ed on pins ) & > respecti"ely Data Set .eady %DS.& is an
indication for the data set that it is 'N#Similarly DT. indicates to the data set that the DTE is
'N# Data *arrier Detect %D*D& indicates that a good carrier is $eing recei"ed from the remote
modem#Pins ; %.ST,.e4uest to send from transmitting computer& and = %*TS, *lear to send
from the data set& are used for handshaking purposes# 0n most aynchronous situations the .TS
and *TS are continuously 'N throughout the communication session#The DTE transmits when it
sees *TS up# 2hen the station has finished it@s transmission it drops .TS and modem drops
*TS and carrier together#
T8921%0 W%:$-.(/:-
5ig )#A
W%:$-.(/ E;90%,%&2.,:-
The $it $y $it serial transmission is as shown a$o"e#The transmission starts with a 7)&%(&9 $it
followed $y < data $its %ESB to MSB& and ending with a 7)&.99 $it#
MA<232:-
*ommunication $etween P* and microcontroller is done using 0* M1G)>)# 0t is a TTE to
.S)>) le"el con"erter# 0t con"erts 8=D signal to 8/,JD signal# The serial signals pro"ided on
these pins $y the microcontroller are TTE signal le"els and must $e $oosted and in"erted through
a suita$le con"erter to comply with .S)>) standard#1 standard serial interfacing for a P*
M1G)>) re4uires negati"e logic i#e# logic@A@ is ,>D to ,)=D#
C.,,$1&2., D2%4(%/:-

5ig )#)
P2, D$)1(29&2.,:-
2. 11 =P2,16+:-
Power supply pin for the de"ice 8=D#
22. > =P2, 2+:-
Positi"e supply for T01/E01,)>),E dri"ers#
222. - =P2, 6+:-
Negati"e supply for T01/E01,)>),E dri"ers#
2:. C1>? C1-? C2>? C2- =P2,) 1? 3? 4? 5 +:-
E(ternal capacitor connection pins#
:. T1I? T2I =P2,) 11? 1@+:-
Dri"er input pins are TTE/*M'S compati$le#0nputs of unused dri"ers may $e left open an
internal acti"e pull,up resistor %=CCk2 min typically =M2& pulls input B0+B#'utput will
$e low for open inputs#
:2. T1O? T2O =P2,) 14? "+:-
Dri"er output pins conform to T01/E01,)>),E le"els#
:22. R1I? R2I =P2,) 13? #+:-
.ecei"er input pins accept T01/E01,)>),E input "oltages % 8 )=D&# .ecei"ers feature a
noise filter and guaranteed hysteresis of ACCmD#Hnused recei"er input pins may $e left
open#0nternal input resistor ;#:k2 pulls input low pro"iding a failsafe high output#
:222. R1O? R2O =P2,) 12? *+:-
.ecei"er output pins are TTE/*M'S compati$le#.ecei"er output high "oltage is specified
for $oth *M'S and TTE load conditions#
2;. GND =P2, 15+:-
+round pin#
F$%&'($):-
Single 8=D power supply#
Eow power 0cc >#C m1 ma(imum#
.ecei"er noise filter#
Package efficiency6 , ) dri"ers and ) recei"ers#
1"aila$le in plastic D0P narrow and wide S'0* package#
1.*.3 LCD INTERFACING:-
1 typical E*D %Ei4uid *rystal Display& is as shown $elow

5ig )#>
0n recent years E*D is finding widespread use replacing EED# This is due to the following
reasons#
Declining prices of E*D#
1$ility to display num$ers characters and graphics# This is in contrast to EEDs which are
limited to num$ers and few characters#
Ease of programming for character and graphics#
LCD 1.,,$1&2., 32%4(%/:-

5ig )#;
Darious terminals for E*D and the connections re4uired are as shown in 5ig )#;# The trim pot for
intensity "ariation of E*D is shown# 2ith the help of this trim pot we can "ary the $rightness
and intensity of E*D#
0n our pro?ect we are using the E*D for de$ugging purpose# The E*Ds can $e connected to
either of the sla"es and the readings of the sensors and those $eing displayed on screen can $e
"erified# Main ad"antage of using E*D is that the application $ecomes "ery user friendly and it
ser"es as a "ery good de$ugging tool#
LCD P2, D$)1(29&2.,:-
Pin Sym$ol 0/' Description
A Dss ,, +round
) Dcc ,, 8=D Power Supply
> Dee ,, Power supply to
control contrast
; .S
%.egister Select&
0 .SIC to select
command register
.SIA to select data
register
= ./2
%.ead/2rite&
0 ./2IC for write
./2IA for read
F E 0 Ena$le
: DBC 0/' Data pin
< DBA 0/' Data pin
J DB) 0/' Data pin
AC DB> 0/' Data pin
AA DB; 0/' Data pin
A) DB= 0/' Data pin
A> DBF 0/' Data pin
A; DB: 0/' Data pin
D@-D":-
The < $it data pins DC to D: are used to send information to the E*D or read the content of the
E*D internal registers# To display letters and num$ers we send 1S*00 codes for the letters 1,O
and num$ers C,J to these pins while making .SIA#
There are also instruction command codes that can $e sent to clear the display or force the cursor
to the home position or $link the cursor#
5ollowing ta$le lists the instruction command codes#

*'DE %BEG& *ommand to E*D instruction register
A *lear display screen
) .eturn home
; Decrement cursor
F 0ncrement cursor
= Shift display left
: Shift display right
< Display off cursor off
1 Display off cursor on
* Display on cursor off
E Display on cursor on
5 Display on cursor $linking
AC Shift cursor position to left
A; Shift cursor position to right
A< Shift entire display to left
A* Shift entire display to right
<C 5orce cursor to the $eginning of first line
*C 5orce cursor to the $eginning of second line
>< Two lines and =(: matri(
By using the ta$le programming is done and the generated code is sent to the E*D# Note that we
must put along delay $etween issuing data or command to the E*D# Bowe"er a much $etter way
is to monitor the $usy flag $efore issuing a command or data to the E*D#
5ollowing fig shows interfacing with the microcontroller#

<
5ig )#=
1.*.4 SN"51"6B:-
The SNF=A:FB and SN"51"6B differential $us transcei"ers are integrated circuits designed for
$idirectional data communication on multipoint $us transmission lines#They are designed for
$alanced transmission lines and meet 1NS0 Standards T01/E01,;)),B and T01/E01,;<=,1#
They also meet 0TH recommendations D#AA and G#):#
The SNF=A:FB and SN"51"6B com$ine a >,state differential line dri"er and a differential input
line recei"er $oth of which operate from a single =,D power supply# The dri"er and recei"er
ha"e acti"e,high and acti"e,low ena$les respecti"ely that can $e connected together e(ternally
to function as a direction control# The dri"er differential outputs and the recei"er differential
inputs are connected internally to form differential input/output %0/'& $us ports that are designed
to offer minimum loading to the $us when the dri"er is disa$led or D** I C#
The dri"er is designed for up to FC m1 of sink or source current# The dri"er features positi"e and
negati"e current limiting and thermal shutdown for protection from line,fault conditions#
Thermal shutdown is designed to occur at a ?unction temperature of appro(imately A=C
o
*# The
recei"er features a minimum input impedance of A) k an input sensiti"ity of )CC mD#
F$%&'($):-
Bidirectional Transcei"ers
Meet or E(ceed the .e4uirements of 1NS0 Standards T01/E01,;)),B and T01/E01,;<=,1
and 0TH .ecommendations D#AA and G#):
Designed for Multipoint Transmission on Eong Bus Eines in Noisy En"ironments
>,State Dri"er and .ecei"er 'utputs
0ndi"idual Dri"er and .ecei"er Ena$les
2ide Positi"e and Negati"e 0nput/'utput Bus Doltage .anges
Dri"er 'utput *apa$ility # # # PFC m1 Ma(

33

40
PIC16F87
7

29

D0
Vcc
D7 LCD
Vee

Vss RS
1k
Pot
Thermal Shutdown Protection
Dri"er Positi"e and Negati"e *urrent Eimiting
.ecei"er 0nput 0mpedance # # # A) k Min
.ecei"er 0nput Sensiti"ity # # # P)CC mD
.ecei"er 0nput Bysteresis # # # =C mD Typ
'perate 5rom Single =,D Supply
C.,,$1&2., D2%4(%/:-
5ig )#F
Differential wires are connected to the input terminals 1 and B of the 0*# The 0* can $e
interfaced with P0* microcontroller as shown a$o"e# This figure shows only single configuration
of SN:=A:FB $ut it can $e used in multipoint configuration which can $e clearly represented
with the help of following diagram#
5ig )#:

The figure shows that the networking employed $y .S;<= protocol and SN:=A:FB transrecei"er
can support upto >) transrecei"ers#
Te(as 0nstruments SN:=A:FB transcei"er that interfaces $etween .S,;<= and TTE logic
le"els#The chip has a two,wire .S,;<= interface a TTE dri"er input and recei"er output and
TTE ena$le inputs for the dri"er and recei"er# Similar chips include Einear Technology@s
ET*;<= Ma(im@s M1G;<= and National Semiconductor@s DS>FJ=#
1.*.5 RS4#5:-
2hen a network needs to transfer small $locks of information o"er long distances .S,;<= is
often the interface of choice#The network nodes can $e P*s microcontrollers or any de"ices
capa$le of asynchronous serial communications#*ompared to Ethernet and other network
interfaces .S,;<=@s hardware and protocol re4uirements are simpler and cheaper# The .S,;<=
standard is fle(i$le enough to pro"ide a choice of dri"ers recei"ers and other components
depending on the ca$le length data rate num$er of nodes and the need to conser"e
power#Se"eral "endors offer .S,;<= transcei"ers with "arious com$inations of features# 1lso
there are options for methods of terminating and $iasing the line and controlling the dri"er,
ena$le inputs#
The interface popularly known as .S,;<= is an electrical specification for multipoint systems
that use $alanced lines# .S,;<= is similar to .S,;)) $ut .S,;)) allows ?ust one dri"er with
multiple recei"ers whereas .S,;<= supports multiple dri"ers and recei"ers#The specification
document %T01/E01,;<=,1& defines the electrical characteristics of the line and its dri"ers and
recei"ers# There are $rief suggestions relating to terminations and wiring $ut there@s no
discussion of connector pinouts or software protocols %as there is for .S,)>)&# 1n .S,;<=
network can ha"e up to >) unit loads with one unit load e4ui"alent to an input impedance of
A)k# By using high,impedance recei"ers you can ha"e as many as )=F nodes#
1n .S,;<= link can e(tend as far as ;CCC@ and can transfer data at up to AC M$ps $ut not $oth at
the same time# 1t JC k$ps the ma(imum ca$le length is ;CCC@ at A M$ps it drops to ;CC@ and at
AC M$ps it drops to =C@#5or more nodes or long distances you can use repeaters that regenerate
the signals and $egin a new .S,;<= line#
1lthough the .S,;<= standard says nothing a$out protocols most .S,;<= links use the familiar
asynchronous protocols supported $y the H1.Ts in P*s and other computers# 1 transmitted
word consists of a start $it followed $y data $its an optional parity $it and a stop $it#Two ways
to add .S,;<= to a P* are on an e(pansion card and $y attaching an .S,;<= con"erter to an
e(isting port# *on"erters for .S,)>) are widely a"aila$le and 0nside 'ut Networks has
de"eloped a HSBLtoL.S,;<= con"erter also a"aila$le from B&B Electronics#'n
microcontrollers you can connect an .S,;<= transcei"er to any asynchronous serial port#
Many network circuits also re4uire a port $it to control each transcei"er@s dri"er,ena$le input#
Ports designed for .S,)>) communications can use the .TS output# 0f that@s not a"aila$le any
spare output $it will do#Most serial,communications tools including Disual Basic@s MS*omm
support .S,;<= communications with .TS controlled in software# The *'MM,D.D serialport
dri"ers from 2*S* ha"e automatic .TS control $uilt,in#
The main reason why .S,;<= links can e(tend so far is their use of $alancedor differential
signals# Two wires %usually a twisted pair& carry the signal "oltage and its in"erse#The recei"er
detects the difference $etween the two# Because most noise that couples into the wires is
common to $oth wires it cancels out# 0n contrast interfaces like .S,)>) use un$alanced or
single,ended signals#The recei"er detects the "oltage difference $etween a signal "oltage and a
common ground# The ground wire tends to $e noisy $ecause it carries the return currents for all
of the signals in the interface along with whate"er other noise has entered the wire from other
sources# 1nd noise on the ground wire can cause the recei"er to misread transmitted logic le"els#
The datasheets for interface chips la$el the nonin"erted .S,;<= line as line 1 and the in"erted
line as line B# 1n .S,;<= recei"er must see a "oltage difference of ?ust )CC mD $etween 1 and
B# 0f 1 is at least )CC mD greater than B the recei"er@s output is logic high# 0f B is at least )CC
mD greater than 1 the output is a logic low# 5or differences less than )CC mD the output is
undefined# 1t the dri"er the "oltage difference must $e at least A#= D so the interface tolerates a
fair amount of non,commonmode noise and attenuation# Dendors for .S,;<= transcei"ers include
L2,$%( T$15,.0.48? M%;2/? N%&2.,%0 S$/21.,3'1&.(? and T$;%) I,)&('/$,&)# These
companies are also e(cellent sources for application notes containing circuit e(amples and
e(planations of the theory $ehind them# .S,;<= is designed to $e wired in a daisy,chain or $us
topology# 1ny stu$s that connect a node to the line should $e as short as possi$le# Most links use
twisted pairs $ecause of their a$ility to cancel magnetically and electromagnetically coupled
noise#
A3:%,&%4$ ')2,4 &A2)&$3 9%2( 1%60$:-


5ig )#<
0n the picture a$o"e noise is generated $y magnetic fields from the en"ironment# The picture
shows the magnetic field lines and the noise current in the .S;<= data lines that is the result
of that magnetic field#
0n the straight ca$le all noise current is flowing in the same direction practically generating
a looping current ?ust like in an ordinary transformer#
2hen the ca$le is twisted we see that in some parts of the signal lines the direction of the
noise current is the opposite from the current in other parts of the ca$le# Because of this the
resulting noise current is many factors lower than with an ordinary straight ca$le#
Shielding which is a common method to pre"ent noise in .S)>) lines tries to keep hostile
magnetic fields away from the signal lines#
Twisted pairs in .S;<= communication howe"er add immunity which is a much $etter way
to fight noise# The magnetic fields are allowed to pass $ut do no harm# 0f high noise
immunity is needed often a com$ination of twisting and shielding is used as for e(ample in
STP shielded twisted pair and 5TP foiled twisted pair networking ca$les#
Differential signals and twisting allows .S;<= to communicate o"er much longer
communication distances than achie"a$le with .S)>)# 2ith .S;<= communication distances
of A)CC m are possi$le#
RS4#5 N$&A.(7 T.9.0.48:-
5ig )#J
The .S;<= network topology is as shown a$o"e# Darious transrecei"ers are connected in a
multidrop fashion as shown#
The general network topology of RS4#5 is shown# N nodes are connected in a multipoint
RS4#5 network#
5or higher speeds and longer lines the termination resistances are necessary on $oth ends of
the line to eliminate reflections# Hse ACC Q resistors on $oth ends#
The RS4#5 network must $e designed as one line with multiple drops not as a star# 1lthough
total ca$le length may$e shorter in a star configuration ade4uate termination is not possi$le
anymore and signal 4uality may degrade significantly#

5ig >#C
The circuit has two A)C,2 terminating resistors connected in parallel at or ?ust $eyond the final
node at each end of the link# 'ne end of the link also has two =FC,2 $iasing resistors#The
terminations reduce "oltage reflections that can cause the recei"er to misread logic le"els#The
recei"er sees reflected "oltages as output switches and the line settles from its initial current to
its final current# The termination eliminates reflections $y making the initial and final currents
e4ual# The initial current is a function of the line@s characteristic impedance which is the input
impedance of an infinite open line# The "alue "aries with the wires@ diameters the spacing
$etween them and the insulation type# 5or digital signals %which consist mainly of fre4uencies
greater than ACC kB3& the characteristic impedance is mostly resisti"eR the inducti"e and
capaciti"e components are small#1 typical "alue for );,12+ twisted pair is A)C 2# The final
current is a function of the line terminationR the recei"er@s input impedance and the line@s series
impedance# 0n a typical .S,;<= line without a termination the initial current is greater than the
final current $ecause the characteristic impedance is less than the recei"er@s com$ined input
impedance# 'n a line without a termination the first reflection occurs when the initial current
reaches the recei"er# The recei"er@s input can a$sor$ only a fraction of the current# The rest
reflects $ack to the dri"er# 1s the current re"erses direction its magnetic field collapses and
induces a "oltage on the line# 1s a result the recei"er initially sees a greater "oltage than
what was transmitted#2hen the reflected "oltage reaches the dri"er which has a lower
impedance than the line the dri"er a$sor$s some of the reflection and $ounces the rest $ack to
the recei"er# This reflection is of opposite polarity to the first reflection and causes the recei"er
to see a reduced "oltage# The reflections $ounce $ack and forth like this for a few rounds $efore
they die out and the line settles to its final current# 0f the line terminates with a resistor e4ual to
the line@s characteristic impedance there are no reflections# 2hen the initial current reaches the
termi, nation it sees e(actly what it was e(pectingSa load e4ual to the line@s characteristic
impedance# The entire transmitted "oltage drops across the load# 0n a network with two parallel
terminations the dri"ers dri"e two lines with each ending at a termination#The $iasing resistors
hold the line in a known state when no dri"ers are ena$led# Most .S,;<= transcei"ers ha"e
internal $iasing circuits $ut adding a termination defeats their a$ility to $ias the line# 1 typical
internal circuit is a ACC,k2 pullup from line 1 to D8 and a ACC,k2 pulldown from line
B to ground#
2ith no termination and when no dri"ers are ena$led the $iasing resistors hold line 1 more
positi"e than line B# 2hen you add two A)C,2 terminations the difference $etween 1 and B
shrinks to a few milli"olts much less than the re4uired )CC mD# The solution is to add smaller
resistors in parallel with the internal $iasing so that a greater proportion of the series "oltage
drops across the termination#The si3e of the $iasing resistors is a tradeoff# 5or a greater "oltage
difference and higher noise immunity on an idle line use smaller "alues# 5or lower power
consumption and a greater differential "oltage on a dri"en line use larger "alues#
2hen the recei"er is disa$led the recei"er@s output is high impedance# 0f the output doesn@t
connect to a input with an internal pullup adding a pullup here ensures that the node doesn@t
see false start $its when its recei"er is disa$led# To comply with the specification all of the nodes
must share a common ground connection# This ground may $e isolated from earth ground#
The ground wire pro"ides a path for the current those results from small im$alances in the
$alanced line# 0f the 1 and B outputs $alance e(actly with e4ual opposite currents the two
currents in the ground wire cancel each other out and the wire carries no current at all# 0n real
life components don@t $alance perfectlyR one dri"er will $e a little stronger and one recei"er
will ha"e a slightly larger input impedance# 2ithout a common ground the circuit may work $ut
the energy from the im$alance has to go somewhere and may dissipate as electromagnetic
radiation#
The .S,;<= specification recommends connecting a ACC,2 resistor of at least C#= 2 in series
$etween each node@s signal ground and the network@s ground wire as 5igure >#C shows# This
way if the ground potentials of two nodes "ary the resistors limit the current in the ground wire#
CIRCUIT DIAGRAM
C2(1'2& D2%4(%/ .- M%)&$(:-
C2(1'2& D2%4(%/ .- S0%:$:-
A(&A.(7BPCB L%8.'& .- M%)&$(:-

A(&A.(7BPCB L%8.'& .- S0%:$:-

W.(72,4:-
S0%:$ )23$ L
Each sla"e consists of a microcontroller $ased system which is connected to the master side with
the help of .S;<= link# Microcontroller AF5<::1 is used# 1fter power on microcontroller first
initialises "arious port pins as input or output# 5or this it uses &(2) registers# Each port has a tris
register# This register is of one $yte length# 0f the pin is to $e used as input the corresponding $it
must $e set to 7A9 and if the pin is to $e used as output it must $e set to 7C9# 1ll tris registers are
in $ankA# Now microcontroller initialises E*D then serial port for JFCC $aud rate then 1D*
registers# 1t present microcontroller programs port T1@ as all analog inputs# Port TB@ as output
port T*@ and TD@ as com$ination of input and output# Ne(t microcontroller displays welcome
message on E*D#Then it reads the temperature sensor "alue which is connected to analog
channel A of port T1@# Then it stores this "alue in ram# Then it con"erts this "alue in B*D and
then con"erts this "alue in 1S*00 and displays on E*D# The heart rate sensor is connected to
timer/counter C# Micrcontroller counts the num$er of pulses in one second and stores it in ram
and displays on E*D# Then microcontroller reads the $lood le"el and saline le"els stores it in
ram and displays on E*D# Now the microcrcontroller sends this data through .S;<= link to the
master# 0t then issues a special he( code to the ne(t sla"e in the ring# Hpon recei"ing the code
from the pre"ious sla"e the successor sla"e reads the data from the sensors and sends this data to
the master similarly as the preceding sla"e# 0t then issues a special he( code to the ne(t sla"e to
indicate that now it is his turn to send the data to the master# Thus all the sla"es form a loop and
continue sending data to the master# 1ll sla"es continue this procedure#
M%)&$( )23$L
The microcontroller masterside after power on intialises port pins for input or output using tris
register similar to sla"e microcontrollers# Then it intialises serial communication for JFCC $aud
rate# 0t goes into the recei"ing mode and it recei"es full data from sla"eA now it sends the
recei"ed data to P* using .S )>) le"el con"erter#
O, S1($$, D2)90%8:-
Disual $asic software is used to display data recei"ed from serial port# This software displays the
data from all patients on the Screen# Then master microcontroller repeats this procedure for all
other sla"es#

FLOWCHART

Start
I!t!a"!se
#aster$ s"a%e
a& PC
S"a%e o'1 (!""
acce)t !)*t
+ro# t,e sesors
a& se& !t to
#aster'

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Networking Based Patient Monitoring System

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