Hng dn s dng AVR Simulator

CNG C GI LP CHO VI IU KHIN AVR

AVR Simulator l mt phn mm gi lp cho kin trc AVR v cc thit b.
N cho php gi lp CPU, bao gm tt c cc tp lnh, cc ngt, v hu ht cc
module vo ra trn chip. Module gi lp s cung cp cho chng ta nhng thng tin v
nhng c tnh ca chng trnh ny.
AVR simulator l 1 tin ch trongAVR Studio vi chc nng l mt chng
trnh g ri. iu ny cho php ngi dng s dng nhng lnh debug thng thng
nh RUN, RESET, BREAK, chy tng bc, thit t nhng im dng (breakpoint)
v xem nhng bin. Tng quan v xut nhp, b nh v thanh ghi trong vic s dng
nhng chc nng mt cch y ca gi lp AVR.
Lu rng, cc ca s trng thi cc thanh ghi vo/ra, b nh v cc thanh ghi
khng c cp nht trong khi gi lp ang chy. Ngay c khi ni dung ca nhng ca
s ny c sa i trong chc nng thc thi.
NHNG TY CHN GI LP.
Hp thoi ty chn gi lp c th dng c trong khi chc nng debug c
kch hot. Hp thoi ny s xut hin khi bn chon menu Debug v chn AVR
Simulator Options.
Hp thoi ty chn gi lp c hai , Device selection v Stimuli and logging.
LA CHN CNG C
Trong bng Device selection (xem hinh bn di), nhng chc nng la chn
sau c th c chn:

Device:
Khi mt cng c c gi lp th nhng thng tin v cng c c ch ra trong mt
ca s v nhng quyn m chng ta c th chn . Vic la chn nhng cng c khc c th l
nhng nguyn nhn dn n vic gi lp AVR cu hnh li nhng cng c mi v sau np
li project.

Frequency:
Cho bit tc ca cng c c gi lp. S thit lp ny khng nh hng
n s gi lp, n ch c dng cho vic tnh ton gi tr kt thc trong vic xem xt
gi tr.
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Hng dn s dng AVR Simulator

Boot loader:
Nu chng ta chn chc nng Enable boot reset, th khi chng ta reset th cng
c ny s khi ng t a ch boot reset. a ch boot reset c quyt nh bi
khung danh sch boot reset, n cha tt c gi tr a ch boot reset m ta c th chn.
Nhng a ch ny cn c quyt nh bi a ch bt u ca vector ngt khi bit
vector ngt c chn. Ton b cc cng c ny khng c cung cp bi boot
loader.
Enable external Memory:
Nu chng ta chn chc nng Enable external Memory, SRAM ngoI s c
gi lp v cho php ng dng ny c chy.
Nu cng c c chn khng c xc nhn SRAM ngoI, th la chn ny khng
c cho php.
GI LP V GHI LI GI TR
Trong Stimuli and logging, vic gi v ghi li gi tr trn cc cng ca cng
c c th c xc nh c th.
Gi lp cc port:
Cng xut nhp c th a vo t tp tin gi lp bng vic ch r trong danh
sch cc cng v la chn nt gi lp. Sau vo tn tp tin ny trong trng FILE,
hoc la chn nt BROWSE. Cui cng, l chn nt ADD ENTRY. Mt tp tin gi
lp sau s c hin th trn ACTION LIST. c th loi b file gi lp, ta la
chn danh sch v chn nt DELETE ENTRY.
Gi tr gi lp s xut hin trong thanh ghi PIN trong mt chu k sau khi s chu
k c ch r trong tp tin gi lp.

Ghi li gi tr cc port
Cc gi tr ca cc cng xut nhp c th c truy nhp n mt tp tin bng
vic ch r cng trong danh sch PORT v chn nt LOGGING. Sau vo tn tp tin
ny trong trng FILE, hoc la chn nt BROWSE. Cui cng, l chn nt ADD
ENTRY. Mt tp tin kch thch sau s c hin th trn ACTION LIST. c th
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Hng dn s dng AVR Simulator

di chuyn (remove) file kch thch, ta la chn danh sch v chn nt DELETE
ENTRY.
Bng vic la chn TO SCREEN, cc gi tr ca cng s c truy xut n
ca s AVR Studio Messages thm vo mt tp tin.
Mi khi gi tr ca thanh ghi PORT thay i, th mt gi tr mi s c truy
xut. Gi tr ny c th thit lp bng chng trnh, hoc s thay i ca ngi dng
trong danh sch tng quan xut nhp, ca s theo di (watch window) hoc ca s b
nh (memory window).

NG DNG CA TP TIN GI LP V GHI LI GI TR

Tp tin gi lp ch r nhng gi tr p dng cho danh sch cc chn ca cng
xut nhp ti thi im no . Tp tin ghi li gi tr m t s chuyn i cc thanh ghi
PORT ca port xut nhp.
Cc tp tin gi lp v ghi li gi tr s dng cho nhng nh dng ging nhau.
Mt gi lp hoc ghi li gi tr bao gm nhiu dng hai chm tch ri nhau ca nhng
cp s hoc gi tr tun hon. V d: Tp tin gi lp sau y l nguyn nhn gy ra gi
tr 00, AB, AC thit lp chu k 0, 9, v 14.
000000000:00
000000009:AB
000000014:AC
999999999:FF
S chu k ny l gi tr thp phn, trong khi gi tr ca n l s thp lc phn.
S chu k c th l t 1 cho n 9. V gi tr phi nm trong khong t 00 n FF.
Dng cui phi l: 999999999:FF.
NHNG MODULE GI LP
Phn ny bao gm mt miu t ngn gn v nhng module xut nhp khc nhau
c trong cc IC AVR v cc trng thi m chng th hin trong b gi lp AVR.
Cc cng xut/nhp
Cc cng xut nhp c gi lp trn nhng cng c thc. N bao gm 1,5
xung ng h khng gii hn thi gian tr hon trong phn cng logic cng tiu chun
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Hng dn s dng AVR Simulator

ca cc b phn thc ca AVR. Khi mt module xut nhp iu khin mt chn (pin),
th gi tr c c t danh sch cc chn ny l nhng gi tr tng qut t module
xut nhp.
Nhng ngt ngoi v chuyn di chn ngt
Tt c nhng ngt ni v chuyn i trn cc chn u c cung cp b gi
lp.
B nh thi v b dm
nh thi v b m u c gi lp mt cch chnh xc. Nhng b dao ng
so snh ng ra khng c cung cp.
UART v USART
Tho lun v phn ny u c cung cp trong phn Know Issues trn tt c
cc cng c
Giao din ngoi vi ni tip (SPI)
SPI u c h tr.
Giao din ni tip tng qut (USI)
USI khng c h tr.
Giao din ni tip hai dy (Two-wire serial interface- TWI)
TWI khng c h tr.
B so snh tng t (AC)
B so snh tng t ny cng khng c h tr.
B chuyn i tng t sang s (ADC)
Khng c ng vo tng t. Tuy nhin, da trn nhng bit chn la thit b tnh
ton trn ADC, th c ADIF s c t ln 1(set) sau mt s chnh xc ca vng lp.
Ngt kt thc ADC cng c gi lp mt cch chnh xc.
Thanh ghi d liu ADC (ADCH/ADCL) c th c thit lp (set) bng tay v
d trong tng quan xut nhp.
B iu khin LCD
B iu khin LCD c cung cp hon ton trong tt c cc phn ca LCD
Controller.
Watchdog
Watchdog ch c cung cp thng tin trong mt s phn, c th tm thy chi
tit trong Known Issues.
Hn ch ca chng trnh
Danh sch nhng hn ch c sp xp thnh hai phn chuyn bit, phn u tin
miu t v nhng vn gi lp chung, trong khi phn th hai miu t v nhng vn ring
ca tng cng c chip.

Nhng module khng c h tr

Gi lp TWI, USI, ngoi vi tng t cha c cung cp. Tt c cc tp lnh,
cc ngt v nhng ngoi vi khc u c cung cp.
Thanh Ghi hnh vi (Register behaviour)
Mt s module gi lp khng gi lp thanh ghi m v ghi ln cp thanh ghi
lnh nh l TCNT1H/TCNT1L mt cch hon ton chnh xc. Gi tr ca thanh ghi
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Hng dn s dng AVR Simulator

cha bytes cao ngay tc khc c t ln 1 khi ghi. Mt s bit ca thanh ghi nn
c xa bng cch thit t chng (ghi vo 1), cc bit ny s c xa nu sau
chng c ghi t 1 xung 0.
SRAM ngoi.
s dng SRAM ngoi trong b gi lp, th project phi c m tr li sau
khi thit t cc tu chn trong hp thoi Device selection.
Chng trnh t ng c trong khi ghi
Chng trnh ny c th thc hin bt c ni no trong b nh Flash v cho
php c tr trong khi ghi.
Ch ng (Sleep modes)
B gi lp ch cung cp chc nng ng m khng lm g c.
Watchdog
Watchdog khng c cung cp trong tt c cc cng c (device). C th
tm thy tho lun v phn ny trong Device. Khi qu trnh reset watchdog xy
ra, th lun lun chng trnh s khng dng ti im nh du (breakpoint)
no trn vector reset.
B nh thi Watchdog chim khong 1Mhz tc xung ng h, v s
iu ha thi gian ny (timing) s khng ng nhng thit lp xung clock
khc.
Cc cng xut nhp (I/O Ports)
Cc thanh ghi cht (PIN registers) c th c ghi ln, v gi tr s c lu
li trong thanh ghi cht. Cc cng c t nht 8 bit hon ton khng c che
(mask). Tt c 8 bit ny c th c dng trong b gi lp.
B nh thi v b dm
Thanh ghi nh thi v m 16 bit trn tt c cc chip khng h tr vi PWM,
b t trc v so snh ng ra. Cc thanh ghi so snh ng ra khng c m mt
cch hon ton chnh xc.
UART V USART
Thanh ghi UDR ca UART v USART ch c th chnh sa (hay thay i ) t
cc ng dng. Nhng tp tin kch thch qua ng vo hoc bng vic chnh sa hin th
gi tr xut nhp v.vth khng c cho php.
Ca s xut nhp ni khng c thi hnh, c tnh ny c th dng trong AVR
Studio 3.x.x.
Khi ghi ln UCSRC, gi tr s c sao chp n UBRRH v c t nht l 7 bit
cng s c t ln 1 trong cng cng tin trnh ghi. iu ny khng ng cho cc
cng c (sevice) c nhng v tr ring trn cc thanh ghi. Cch gii quyt khc l ghi
ln UBRRH trc sau l ti UCSRC.
Giao din ngoi vi ni tip (SPI)
Chc nng tc tng ln gp i (SPI2X) khng c cung cp .
Thanh ghi tit kim nng lng (power reduction register-PRR)
Tt c cc cng c (thit b) u c thanh ghi ny, nhng module shutdown
ngoi vi c iu khin bi PRR th khng c gi lp; Cc ngoi vi s tip tc hot
ng mt cch bnh thng.
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