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050 RF Design
050 RF Design
Rick Hartley
L-3 Avionics Systems
richard.hartley@L-3com.com
1
) When
11
14
15
16
Lcritical =
c
1
1
f
eff 16
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22
25
120
4.0h 14.0 + 8.0 / r 4.0h
ln 1.0 +
11.0
w'
w'
2.0 2.0 r + 1.0
2
2
w'
2 .0
4e
w 1 .0
ln
=
2
t
1/
2
(t / h ) +
w / t + 1 .1
Er
with Eeff)
26
60
eff
8h w
ln +
w 4h
if
w
<1
h
otherwise
Z0 =
120
eff
1
w
w
h
27
w
+ 1 r 1
1
w
<1
= r
+
+ 0.041 if
h
2
2
12h
h
1 + w
otherwise
eff
+1 1
1
r
r
=
+
2
2
12h
1
+
28
eff
eff e ( 2.0 b / h ) + r [1.0 e ( 2.0b / h ) ]
30
120
4 . 0 (b t ) 8 . 0 (b t )
8.0(b t )
ln 1.0 +
+
Z0 =
+ 6.27
w' w'
2.0 r
w'
where:
b = 2 .0 h + t
w
w' = w +
t
t
w 1.0
=
ln
t
2
m
.25
1
+
2.0(b t ) / t + 1 w / t + 1.1
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)
)
34
)
)
)
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36
30.0
eff ,t
eff ,t = eff
eff = 1.0 +
kt =
Coplanar Waveguide
K (kt ')
K (kt )
eff 1.0
(b a ) / 2.0 K (k ) + 1.0
0 .7 t
K ' (k )
r 1.0 K (k ')K (k1)
2.0
at
bt
k t ' = 1 .0 k t
K (k )K (k1')
a
k=
b
k ' = 1 .0 k 2
a
sinh t
4.0h
k1 =
b
sinh t
4.0h
k1' = 1.0 k12
at = a +
1.25t
4.0a
1.0 + ln
bt = b
1.25t
4.0a
1.0 + ln
t 37
r = 4.2 - Zo = 76 ( eff
r = 2.5 - Zo = 94 ( eff
r = 4.2 - Zo = 94 ( eff
r = 2.5 - Zo = 115 (
38
39
eff
120
1 .0
(
)
K
k
K (k1)
2.0 eff
+
K (k ') K (k1')
K (k ') K (k1)
1.0 + r
K (k ) K (k1')
=
K (k ') K (k1)
1.0 +
K (k ) K (k1')
k = a/b
k ' = 1 .0 k 2
k1' = 1.0 k12
a
tanh
4.0h
k1 =
b
tanh
4.0h
40
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45
Dont use Equations or Calcs for Dig Layout that Dont Comp for Coplanar Effects.
47
r x 0 x (A/h)
r - DK of PCB Material
0 - Permittivity of Space
50
Interdigital Capacitor-
51
Interdigital Capacitor
C2 =
r + 1. 0
w
t
A1 = 0.3349057 0.15287116
X
t
A2 = 0.50133101 0.22820444
X
52
Multilayer Capacitor -
C=
where:
A = area of planes in square inches
n = number of conductor layers
d = plate spacing
53
54
Spiral Inductors -
55
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) The
)
)
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65
)
)
66
67
68
69
Directional Coupler -
Input
Strongest
Coupled Pulse
Output
Weakest
Coupled Pulse
70
74
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76
) Dont
*Minimizes Inductance.
*Helps Contain Stray Electric & Magnetic Fields.
)
79
81
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84
85
Ground: All Designs, 2 Layer or Multilayer *Unused Areas of Every Layer to be Poured with
Ground Copper.
*Ground Copper and All Ground Planes through
Board to be Connected with Vias Every 1/20th
Wavelength Apart (Where Possible).
*Vias Closer than 1/20th are Better.
*Very Critical Circuits - Vias Closer than 1/ 20th
Help Reduce Noise.
*Direct Connect Vias. NO Thermal Vias.
86
Ground:
*Copper Pours Too Small to have Vias Must be
Removed (Can Act as Antenna).
*Arrange Poured Ground Around Signals to
Completely Surround Signals -
Ground:
*By Maintaining Isolation Between Circuits, Do
Not Split Ground Plane.
*Attach Ground to Case Continuously.
*One Exception is Ground for Cable Shields.
88
= 50x68
= 3400
= 58.3
89
90
91
http://home3.netcarrier.com/~chan/EM/PROGRAMS/STUBMATCH/
92
Trace Corners -
93
94
T-Junctions:
Ideal is the Wilkinson Splitter-
T-Junctions (Acceptable):
96
Impedance of Vias-
REFERENCE
Wang, Taoyun, et al., Quasi-static Analysis of a Microstrip Via Through a Hole in
a Ground Plane, IEEE Transactions on Microstrip Theory and Techniques, Vol.
MTT-36, No. 6, June 1988, pp. 1007-1013.
97
98
99
100
101
102
103
106
109
Layer 1
Layer 2
Layer 3
Layer 4
Layer 5
Layer 6
Layer 7
Layer 8
110
Length
AREAeff
AREAeff = 2(w + t ) SD
SD =
2.6
f
SD =
66
f
SD - Skin Depth in mm
f - Frequency in Hertz
113
Atten(dB ) =
2 R 3dB
Zo LOADED
115
117
- Signal Attenuation -
118
Use a Metal Can, Grounded Shield when *Circuits are so Close Together that Noise Coupling
Naturally Occurs.
*EMI is Extreme and Cannot be Contained.
*Circuit is So Sensitive that Normal, Ambient EMI
Levels affect Performance.
120
123
Typical
MultiLayer
Microwave PC
Board.
124
125