Tp lnh S7-200

GIO TRNH TP LNH

PLC SIEMENS S7-200
ThS. Nguyn B Hi
i hc Nng - Trng i hc Bch khoa
hoinb@ud.edu.vn

Gio trnh y bao gm 3 phn:

1. Gio trnh l thuyt
2. Gio trnh tp lnh
3. Gio trnh bi tp

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Tp lnh S7-200

MC LC
1.

Lnh logic vi bit............................................................................................................. 4

1.1 Contact ............................................................................................................................................... 4

1.1.1
Cng tc ..................................................................................................................................... 4
1.1.2
Cng tc tc khc ...................................................................................................................... 4
1.1.3
Lnh o bit, lnh sn ............................................................................................................. 4
1.2 Coil...................................................................................................................................................... 6
1.2.1
Lnh ra ....................................................................................................................................... 6
1.2.2
Lnh ra tc khc......................................................................................................................... 6
1.2.3
Lnh Set, Reset.......................................................................................................................... 6
1.2.4
Lnh Set, Reset Immediat.......................................................................................................... 6
1.2.5
Lnh khng lm g c ................................................................................................................. 7

2.

Lnh so snh ................................................................................................................... 8

3.

Lnh chuyn i .............................................................................................................. 9

4.

Lnh nh thi ............................................................................................................... 11

5.

Lnh b m .................................................................................................................. 13

6.

Lnh dch chuyn nh ............................................................................................... 15

7.

Lnh vi Bng ............................................................................................................... 16

7.1
7.2
7.3

8.
8.1
8.2
8.3

Lnh thm vo bng ....................................................................................................................... 16

Lnh Memory Fill............................................................................................................................. 17
Lnh tm kim trong bng .............................................................................................................. 17

Lnh ton s hc........................................................................................................... 19

Cng, Tr, Nhn, Chia s nguyn, s thc.................................................................................. 19
Lnh tng gim mt n v ............................................................................................................ 21
Cc lnh hm s hc ...................................................................................................................... 22

9.

Lnh vng lp PID ......................................................................................................... 22

10.

Lnh php ton logic .................................................................................................... 29

10.1
10.2

11.
11.1
11.2
11.3
11.4

12.
12.1
12.2
12.3
12.4
12.5

Lnh o byte, word, doubleword ............................................................................................ 29

Lnh AND, OR, XOR ................................................................................................................... 29

Lnh dch v quay ......................................................................................................... 30

Dch tri hay phi ........................................................................................................................ 30
Quay tri hay phi....................................................................................................................... 31
Lnh dch thanh ghi cc bit (Shift Register Bit): ..................................................................... 32
Lnh SWAP.................................................................................................................................. 33

Cc lnh iu khin chng trnh................................................................................ 33

END c iu kin ........................................................................................................................ 33
STOP ............................................................................................................................................ 33
Lnh Watchdog Reset ................................................................................................................ 34
Lnh nhy .................................................................................................................................... 34
Lnh SCR..................................................................................................................................... 35

13.

Lnh chng trnh con ................................................................................................. 36

14.

Lnh ngt ....................................................................................................................... 38

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Mt s qui nh khi tra cu lnh v s dng lnh:

- Trn cng l phn tn lnh hoc nhm lnh.
- Tip theo l c php lnh, ln lt trong LAD, FBD v STL.
- Di cng l nhng loi CPU S7-200 cho php s dng lnh, lu y ch bao gm 03 loi CPU
mi: 221, 222 v 224.
- Bn cnh l phn m t hot ng ca lnh.
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Cc trng hp li l cc trng hp gy li khin u ra ENO = 0, bnh thng khi lnh c thc hin th
ENO = 1.
- Cc bit c bit trong vng SM c gi tr thay i ty theo kt qu thc hin lnh.
- Bng cc ton hng ch ra cc thng s hp l ca lnh
- Sau y l nhng k hiu khi g lnh trong STEP 7:
o Trong LAD: ---> ngha l c th ni tip lnh khc (nhng khng bt buc).
o Trong LAD: --->> ngha l bt buc phi ni tip lnh khc.
o Tn bin nm trong ngoc kp (v d var) l bin ton cc.
o Tn bin c k hiu # ng trc l bin cc b.
o K hiu ? hay ???? ngha l yu cu ton hng.
o K hiu << hoc >> yu cu hoc ton hng hoc ni lnh khc.
o K hiu >I cho bit l u ra ENO.
o K t % trc tn bin ngha l bin trc tip trong IEC.
o Trong FBD, du trn nh u vo nh du o (nh trong in t); mt gch dc ngn
(|) u vo nh du gi tr tc khc (u vo trc tip).

1. Lnh logic vi bit

1.1

Contact
1.1.1 Cng tc
Cng tc thng m (Normally Open, vit tt l NO) v cng tc thng
ng (Normally Closed, vit tt l NC). i vi PLC, mi cng tc i din
cho trng thi mt bit trong b nh d liu hay vng nh ca cc u vo,
ra. Cng tc thng m s ng (ON - ngha l cho dng in i qua) khi
bit bng 1 cn cng tc thng ng s ng (ON) khi bit bng 0.
Trong LAD, cc lnh ny c biu din bng chnh cc cng tc thng
m v thng ng. Trong FBD, cc cng tc thng m c biu din
nh cc u vo hoc ra ca cc khi chc nng AND hoc OR. Cng tc
thng ng c thm du o (vng trn nh) u vo tng ng.
Trong STL, cc cng tc thng m c s dng trong cc lnh LOAD,
AND hoc OR. Lnh LOAD ghi gi tr bit c nh a ch bi ton hng
ca lnh vo nh ngn xp, nhng gi tr c trong ngn xp b y xung
mt bc (gi tr di cng s mt). Cc lnh AND v OR thc hin php
ton logic AND hay OR gia gi tr c tr n bi ton hng vi nh
ngn xp, kt qu c ghi vo nh ngn xp, nhng gi tr c trong ngn
xp b y xung mt bc. Hon ton tng t i vi cc cng tc thng
ng, c s dng trong cc lnh LOAD NOT, AND NOT v OR NOT
(gi tr c tr n bi ton hng s b o).

1.1.2 Cng tc tc khc

Trong STL, cc cng tc thng m tc khc c s dng trong cc lnh
LOAD IMMEDIATE (ghi gi tr u vo vt l vo nh ngn xp, nhng
gi tr c trong ngn xp b y xung mt bc (gi tr di cng s mt)),
AND IMMEDIATE hoc OR IMMEDIATE (thc hin php ton l gic And hay Or gia gi tr u vo
vt l vi nh ngn xp, kt qu c ghi vo nh ngn xp, nhng gi tr c trong ngn xp b y xung
mt bc). Hon ton tng t i vi cc cng tc thng ng tc khc, c s dng trong cc lnh
LOAD NOT IMMEDIATE, AND NOT IMMEDIATE v OR NOT IMMEDIATE (gi tr u vo vt l b
o).
1.1.3 Lnh o bit, lnh sn
Lnh o thay i dng nng lng (Power Flow). Nu dng nng lng gp lnh ny, n s b chn li.
Ngc li nu pha trc lnh ny khng c dng nng lng, n s tr thnh ngun cung cp dng nng
lng. Trong LAD, lnh ny c biu din nh mt cng tc. Trong FBD, lnh o khng c biu tng
ring. N c tch hp nh l u vo o ca nhng khi chc nng khc (vi vng trn nh u vo
ca cc khi chc nng ). Trong STL, lnh o o gi tr ca nh ngn xp: 0 thnh 1 v 1 thnh 0.
Lnh ny khng c ton hng.
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Lnh sn: u thuc nhm lnh cc cng tc, ghi nhn trng thi cc bit d liu (0 hay 1), quen thuc vi
khi nim mc. Cc lnh v sn ghi nhn khng phi mc n thun m l s bin i mc. Lnh sn
dng (Positive Transition) cho dng nng lng i qua trong khong thi gian bng thi gian mt vng
qut khi u vo ca n c s thay i mc t 0 ln 1. Lnh sn m (Negative Transition) cho dng
nng lng i qua trong khong thi gian bng thi gian mt vng qut khi u vo ca n c s thay i
mc t 1 xung 0.
Trong LAD, cc lnh ny c biu din cng nh cc cng tc. Trong FBD, cc lnh ny c biu din
bng cc khi chc nng P v N. Trong STL, lnh Edge Up, nu pht hin c s thay i mc ca nh
ngn xp t 0 ln 1, s t vo nh ngn xp gi tr 1. Trong trng hp ngc li, n t vo gi tr 0.
Tng t, lnh Edge Down, nu pht hin c s thay i mc ca nh ngn xp t 1 xung 0, s t vo
nh ngn xp gi tr 1. Trong trng hp ngc li, n cng t vo gi tr 0.

Ch : Theo cu trc hot ng ca PLC, s thay i mc tt nhin ch c pht hin gia cc

vng qut lin tip. Do mi lnh sn ny cn mt bit nh nh trng thi u vo ca n
vng qut k trc. V c tnh ny m tng s lnh sn c s dng trong mt chng trnh
b hn ch (do dung lng b nh dnh cho chng c hn).
V d cho cc lnh NOT, P, N:

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Tp lnh S7-200

1.2

Coil
1.2.1 Lnh ra
Gi tr bit c nh a ch bi ton hng ca lnh ra phn nh trng thi ca
dng nng lng (Power Flow) u vo lnh ny. Trong LAD v FBD, lnh
ra t gi tr bit c tr n bi ton hng ca n bng gi tr dng nng
lng u vo ca lnh. Trong STL, lnh ra sao chp gi tr nh ngn xp
ra gi tr bit c tr n bi ton hng ca lnh.
1.2.2 Lnh ra tc khc
Gi tr u ra ri rc (digital) vt l c nh a ch bi ton hng ca lnh
ra trc tip phn nh trng thi ca dng nng lng (Power Flow) u vo
lnh ny. Trong LAD v FBD, lnh ra trc tip t ng thi gi tr u ra vt
l c tr n bi ton hng ca n v bit nh ca u ra ny bng gi tr
dng nng lng u vo ca lnh. iu khc vi lnh ra thng thng
ch lnh ra thng thng ch ghi gi tr vo bit nh ca u ra. Trong STL,
lnh ra trc tip sao chp gi tr nh ngn xp ra ng thi gi tr u ra vt
l c tr n bi ton hng ca lnh v bit nh ca u ra ny.

1.2.3 Lnh Set, Reset

Cc lnh SET v RESET t mt s cc bit lin tip trong b nh d liu
thnh 1 (Set) hay 0 (Reset). S lng cc bit c nh bi ton hng [N] v
bt u t bit c nh a ch bi ton hng [bit].
S lng cc bit c
th Set hoc Reset nm trong khong t 1 n 255. Trong trng hp s dng
lnh Reset vi cc bit nm trong nhng vng T hay C, cc b nh thi hay
b m tng ng s b reset. Ngha l bit trng thi ca chng c a v 0 v s ang m cng b xa
(s c gi tr 0).
Nhng li c th c gy nn bi cc lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Li 0091: ton hng vt qu gii hn cho php.

1.2.4 Lnh Set, Reset Immediat

Cc lnh SET IMMEDIATE v RESET IMMEDIATE t mt s cc u ra ri rc (digital) vt l lin tip
thnh 1 (Set) hay 0 (Reset). S lng cc u ra c nh bi ton hng [N] v bt u t u ra c nh
a ch bi ton hng [bit]. S lng cc u ra vt l c th Set hoc Reset nm trong khong t 1 n 12.
K t I trong nhng lnh ny (Immediate) ni ln tnh tc thi. Cc lnh ny ghi gi tr mi ra cc u ra
vt l ng thi ghi c vo cc gi tr nh ca chng. iu khc vi nhng lnh Set v Reset thng
thng ch ghi gi tr mi vo vng nh ca cc u ra.
Nhng li c th c gy nn bi cc lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Li 0091: ton hng vt qu gii hn cho php.

V d:

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Tp lnh S7-200

1.2.5 Lnh khng lm g c

Lnh khng lm g (No Operation) khng tc ng n chng trnh. Mc d n
cng c mt ton hng [N] dng Byte, l mt hng s trong khong t 1 n 255.

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Tp lnh S7-200

2. Lnh so snh

So snh Byte: Lnh so snh Byte dng so snh 02 gi tr dng byte

c nh a ch bi hai ton hng u vo ca lnh: [IN1] v [IN2].
C tt c 06 php so snh c th c thc hin: [IN1] = [IN2], [IN1]
>= [IN2], [IN1] <= [IN2], [IN1] > [IN2], [IN1] < [IN2], [IN1] <>
[IN2]. Cc byte c em so snh l nhng gi tr khng du. Trong
LAD, lnh ny c dng mt cng tc v cng tc ng (ON) khi iu kin em so snh c gi tr ng.
Trong FBD, u ra s c gi tr 1 nu iu kin em so snh l ng. Trong STL, lnh c thc hin s ghi
gi tr 1 vo nh ngn xp (vi nhng lnh Load) hoc thc hin php ton l gic AND hay OR (ty theo
lnh c th) gi tr 1 vi nh ngn xp nu iu kin so snh ng.
So snh s nguyn (Integer): Lnh so snh s nguyn dng so snh 02 gi tr dng Integer c nh
a ch bi hai ton hng u vo ca lnh: [IN1] v [IN2]. C tt c 06 php so snh c th c thc
hin: [IN1] = [IN2], [IN1] >= [IN2], [IN1] <= [IN2], [IN1] > [IN2], [IN1] < [IN2], [IN1] <> [IN2].
Cc s nguyn c em so snh l nhng gi tr c du: 16#7FFF > 16#8000.
So snh t kp (Double Word): Lnh so snh t kp dng so snh 02 gi tr dng Double Word c
nh a ch bi hai ton hng u vo ca lnh: [IN1] v [IN2]. C tt c 06 php so snh c th c
thc hin: [IN1] = [IN2], [IN1] >= [IN2], [IN1] <= [IN2], [IN1] > [IN2], [IN1] < [IN2], [IN1] <> [IN2].
Cc gi tr t kp c em so snh l nhng gi tr c du: 16#7FFFFFFF > 16#80000000.
So snh s thc (Real): Lnh so snh s thc dng so snh 02 gi tr dng Real c nh a ch bi
hai ton hng u vo ca lnh: [IN1] v [IN2]. C tt c 06 php so snh c th c thc hin: [IN1] =
[IN2], [IN1] >= [IN2], [IN1] <= [IN2], [IN1] > [IN2], [IN1] < [IN2], [IN1] <> [IN2]. Cc s thc c
em so snh l nhng gi tr c du theo kiu du phy ng.
V d s dng lnh so snh:

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3. Lnh chuyn i

V d Round v Truncate:

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Tp lnh S7-200

V d SEG (Segment):

Ngoi ra cn c cc lnh chuyn i sang m ASCII.

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4. Lnh nh thi
SIMATIC S7-200 c 03 loi b nh thi:
- B ng tr (On - Delay Timer) TON
- B ng tr c nh (Retentive On - Delay Timer) TONR
- B ngt tr (Off - Delay Timer) TOF
Cc b ng tr v ng tr c nh bt u m thi gian khi c u
vo EN (Enable) mc 1 (ON). Lc gi tr m c ln hn hoc
bng gi tr t trc ti u vo PT (Preset Time) th bit trng thi s
c t bng 1 (ON). iu khc nhau gia hai loi b ng tr ny
l: b ng tr bnh thng s b reset (c gi tr ang m ln bit
trng thi u b xa v 0) khi u vo EN bng 0; trong khi b nh thi c nh lu li gi tr ca n khi
u vo EN bng 0 v tip tc m nu u vo EN li bng 1. Nh vy ta c th dng loi c nh cng
thi gian nhng lc u vo EN bng 1. Loi b nh thi ny c th reset (xa gi tr ang m v 0) bng
lnh R (Reset). C hai loi b ng tr vn tip tc m thi gian ngay c sau khi t n gi tr t trc
PT v ch dng m khi t gi tr ti a 32767 (16#7FFF).
B ngt tr dng a gi tr u ra (bit trng thi) v 0 (OFF) tr mt khong thi gian sau khi u vo
(EN) i v 0. Khi u vo EN c t bng 1 (ON) th bit trng thi ca b ngt tr cng bng 1 ngay lc
ng thi gi tr m ca n b xa v 0. Khi u vo EN v 0, b nh thi bt u m v m cho n
khi t gi tr t trc PT. Lc bit trng thi ca b ngt tr s v 0 ng thi n cng ngng m. Nu
u vo EN ch bng 0 trong khong thi gian ngn hn thi gian c t ri quay li bng 1 th bit trng
thi ca b nh thi vn gi nguyn bng 1. B ngt tr ch bt u m khi c sn thay i t 1 thnh 0
u vo EN.
Nu b ngt tr trong vng mt SCR (Sequence Control Relay) v vng SCR khng c kch hot th
gi tr m ca n c xa v 0, bit trng thi cng bng 0 (OFF) v b nh thi khng m. Khi nim
vng SCR s c nh ngha phn sau ca ti liu ny.

Thi gian tr c tnh nh l tch ca gi tr ang m vi phn gii ca ca b nh thi.

Nhng b nh thi c nh c a ch c qui nh ring. Nhng b nh thi cn li (khng nh) c th

c khai bo nh l b ng tr hoc ngt tr, nhng khng th l c hai. V d khng th c TON 33 v
TOF 33 ng thi.
Bng sau tm tt nhng c im hot ng ca ba loi b nh thi nu trn:

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Tp lnh S7-200

Lnh Reset (R) c th c s dng reset bt k b nh thi no. Cc b nh thi c nh (loi TONR)
ch c th reset bng lnh ny. Cc b nh thi sau khi reset c bit trng thi cng nh gi tr m u
c xa v 0. Cc b ngt tr (TOF) ch bt u m khi c s thay i t 1 xung 0 u vo IN.
Cc b nh thi c phn gii khc nhau c cch hot ng cng khc nhau. Chng ta xem xt k
hn v vn ny:
B nh thi vi phn gii 1 ms:
B nh thi loi ny m s khong thi gian 1 ms tri qua k t khi n c kch hot. B nh thi vi
phn gii 1 ms c kch hot bng lnh khai bo ca n nhng sau n c cp nht (bit trng thi
cng nh gi tr m) mi giy mt ln mt cch c lp khng ph thuc vo vng qut chng trnh. Ni
mt cch khc, mt b nh thi loi ny c th c cp nht nhiu ln trong mt vng qut nu nh thi
gian vng qut ln hn 1 ms. Bi v mt b nh thi vi phn gii 1 ms c th c kch hot bt k
mt thi im no trong vng 1 ms nn ta nn t gi tr t trc ln hn 1 n v so vi gi tr yu cu
cn m. V d m khong thi gian 56 ms, ta thng t gi tr t trc bng 57.
B nh thi vi phn gii 10 ms:
B nh thi loi ny m s khong thi gian 10 ms tri qua k t khi n c kch hot. B nh thi vi
phn gii 10 ms c kch hot bng lnh khai bo ca n v sau n c cp nht (bit trng thi
cng nh gi tr m) mi vng qut mt ln ngay u mi vng qut bng cch cng vo gi tr ang
m ca n s khong thi gian 10 ms tri qua k t u vng qut trc. Ni mt cch khc, gi tr ang
m ca b nh thi loi ny gi nguyn khng i trong sut thi gian mt vng qut. Bi v mt b nh
thi vi phn gii 10 ms c th c kch hot bt k mt thi im no trong vng 10 ms nn ta nn
t gi tr t trc ln hn 1 n v so vi gi tr yu cu cn m. V d m khong thi gian 140 ms,
ta thng t gi tr t trc bng 15.
B nh thi vi phn gii 100 ms: B nh thi loi ny tnh s khong thi gian 100 ms tri qua k t
khi n c cp nht ln cui. Lnh khai bo b nh thi vi phn gii 100 ms cp nht bit trng thi
cng nh gi tr m ca n bng cch cng vo gi tr ang m ca n s khong thi gian 100 ms tri
qua k t vng qut trc. Nh vy, gi tr ang m ca b nh thi loi ny ch c cp nht khi c
lnh khai bo n thc hin. V th nu b nh thi vi phn gii 100 ms c kch hot nhng lnh
khai bo n khng c thc hin trong mi vng qut th n c th khng c cp nht kp thi v m
thiu thi gian. Ngc li nu lnh khai bo b nh thi c thc hin nhiu ln trong mt vng qut th
n c th m d thi gian do mt s khong thi gian 100 ms c cng nhiu ln. Tm li nn s dng
b nh thi loi ny vi lnh khai bo thc hin chnh xc mi vng qut mt ln. Bi v mt b nh thi
vi phn gii 100 ms c th c khi ng bt k mt thi im no trong vng 100 ms nn ta nn
t gi tr t trc ln hn 1 n v so vi gi tr yu cu cn m. V d m khong thi gian 2100
ms, ta thng t gi tr t trc bng 22.
hiu thm v c ch cp nht ca cc b nh thi vi nhng phn gii khc nhau, chng ta xem
xt v d sau, to b nh thi 3 giy vi ln lt ba b nh thi khc nhau (xem chng trnh km
theo):
u tin b nh thi vi phn gii 1 ms c s dng (T32, gi tr t trc 300). Q0.0 s c gi tr
bng 1 (ON) trong thi gian mt vng qut khi v ch khi no thi im cp nht ca b nh thi m gi
tr m vt qua gi tr t trc ri vo ng gia lc thc hin hai lnh ny. Ngha l sau khi lnh
trc c thc hin nhng phi trc khi thc hin lnh sau.
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Nu s dng b nh thi vi phn gii 10 ms (T33, gi tr t trc 30), Q0.0 khng bao gi c gi
tr 1 (lun lun OFF).
Trng hp cui cng s dng b nh thi vi phn gii 100 ms (T37, gi tr t trc bng 3). Q0.0
lun lun c gi tr bng 1 (ON) trong ng thi gian mt vng qut.
m bo chc chn Q0.0 s c gi tr 1 (ON) trong thi gian mt vng qut, ta phi dng cng tc
thng ng Q0.0 kch hot cc b nh thi thay v dng cng tc thng ng vi bit trng thi ca
n.

5. Lnh b m
Ba loi b m: b m ln (Count Up), b m xung (Count Down)
v loi b m c th va m ln va m xung (Count Up / Down).
B m ln m cho n gi tr ti a ca n (32767) mi khi c sn
ln u vo m ln (CU). Khi gi tr m (Cxxx) ln hn hoc bng
gi tr t trc (PV) th bit trng thi (Cxxx) s c gi tr 1 (ON). B
m c th b xa (reset) bi mc 1 u vo reset (R), lc c gi tr
m ln bit trng thi s b xa v 0.
B m xung m t gi tr t trc (PV) mi khi c sn ln u
vo m xung (CD). Khi gi tr m (Cxxx) bng 0, bit trng thi
(Cxxx) s bng 1 ng thi b m ngng m. Mc cao u vo LD
xa bit trng thi v 0 v ti gi tr t trc PV vo gi tr m.
B m va m ln va m xung m ln khi c sn ln u vo
m ln (CU) v m xung khi c sn ln u vo m xung
(CD). Khi gi tr m (Cxxx) ln hn hoc bng gi tr t trc (PV)
th bit trng thi (Cxxx) s c gi tr 1 (ON). B m c th b xa
(reset) bi mc 1 u vo reset (R), lc c gi tr m ln bit trng
thi s b xa v 0.
S hiu cc b m: C0 n C255. Trong CPU 221, 222 v 224 mi b m c xc nh loi ty theo
lnh khai bo nhng khng th khai bo cc b m loi khc nhau vi cng mt a ch (trong vng C).
Trong STL, u vo reset (R) ca b m tin l bit nh ca ngn xp v u vo m ca n (CU) l bit
th hai ca ngn xp. Trong STL, u vo ti (LD) ca b m li l bit nh ca ngn xp v u vo m
ca n (CD) l bit th hai ca ngn xp. Trong STL, u vo reset (R) ca b m va m tin va m
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li l bit nh ca ngn xp, u vo m li ca n (CD) l bit th hai ca ngn xp v u vo m tin

ca n (CU) l bit th ba ca ngn xp.

Cc b m cn c th b reset bi lnh Reset. B m va tin va li khi m n gi tr ti a (32767)

m tip tc m ln thi s m s nhy sang gi tr ti thiu (-32768) v tip tc m bnh thng. Tng
t, nu n m li khi gi tr nh nht (-32768) th s m s nhy thnh gi tr ln nht (32767).
V d s dng b m:

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Tp lnh S7-200

Cc b m tc cao xem gio trnh l thuyt.

6. Lnh dch chuyn nh

Cc lnh dch chuyn mt Byte, mt t n (Word), mt t kp
(Double Word) hay mt s thc (Real):
Lnh dch chuyn mt Byte, Move Byte, sao chp ni dung nh kch
thc mt byte c nh a ch u vo IN ln nh kch thc mt
byte c nh a ch u ra OUT. Ni dung byte nh a ch [IN]
khng thay i. Tng t cho cc cu lnh vi W, DW.
Lnh dch chuyn mt S thc, Move Real, sao chp s thc kch thc
32 bit c nh a ch u vo IN ln s thc kch thc 32 bit c
nh a ch u ra OUT. S thc a ch [IN] khng thay i.
Nhng li c th c gy nn bi cc lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.

Cc lnh dch chuyn mt Byte, mt t n (Word) tc khc: c hoc

ghi.

Lnh dch chuyn mt khi cc byte, Block Move Byte: sao chp ni
dung mt s cc nh lin tip (xc nh bi ton hng u vo N),
mi kch thc mt byte vi byte u tin c nh a ch u vo
IN ln khi cc nh lin tip kch thc mi nh mt byte v byte
u tin c nh a ch u ra OUT. S lng cc byte c th sao
chp nm trong khong t 1 n 255.
Lnh dch chuyn mt khi cc t n, Block Move Word, sao chp ni
Trang 15

Tp lnh S7-200

dung mt s cc nh lin tip (xc nh bi ton hng u vo N), mi kch thc mt word vi word
u tin c nh a ch u vo IN ln khi cc nh lin tip kch thc mi nh mt word v
word u tin c nh a ch u ra OUT. S lng cc word c th sao chp nm trong khong t 1
n 255.
Lnh dch chuyn mt khi cc t kp, Block Move Double Word, sao chp ni dung mt s cc nh lin
tip (xc nh bi ton hng u vo N), mi kch thc mt t kp vi t kp u tin c nh a
ch u vo IN ln khi cc nh lin tip kch thc mi nh mt t kp v t kp u tin c nh
a ch u ra OUT. S lng cc t kp c th sao chp nm trong khong t 1 n 255.

Nhng li c th c gy nn bi cc lnh ny (ENO = 0):

+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Li 0091: ton hng vt qu gii hn cho php.

7. Lnh vi Bng
7.1

Lnh thm vo bng

Trang 16

Tp lnh S7-200

7.2

Lnh Memory Fill

Lnh ny in y mt khong nh bao gm mt s cc t n lin tip

(c xc nh bi u vo N) vi t n (Word) u tin c nh a
ch bi u ra OUT bng t n c nh a ch u vo IN. Kch
thc khong nh c th nm trong khong t 1 n 255 t n.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Li 0091: ton hng vt qu gii hn cho php.

V d:

7.3

Lnh tm kim trong bng

Trang 17

Tp lnh S7-200

Trang 18

Tp lnh S7-200

8. Lnh ton s hc
8.1

Cng, Tr, Nhn, Chia s nguyn, s thc

Cc lnh ny cng (Add) hay tr (Subtract) hai s nguyn c nh a

ch cc u vo IN1 v IN2, kt qu lu vo s nguyn c nh a
ch bi u ra OUT.
[IN1] + [IN2] = [OUT]
[IN1] - [IN2] = [OUT]
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Bit c bit SM1.1 = 1: li trn (Overflow).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.
+ SM1.2 (Negative): bng 1 nu kt qu l s m.

Cc lnh ny cng (Add) hay tr (Subtract) hai s nguyn 32 bit c nh a ch cc u vo IN1 v

IN2, kt qu lu vo s nguyn 32 bit c nh a ch bi u ra OUT.
[IN1] + [IN2] = [OUT]
[IN1] - [IN2] = [OUT]
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
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Tp lnh S7-200

+ Li 0006: a ch gin tip.

+ Bit c bit SM1.1 = 1: li trn (Overflow).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.
+ SM1.2 (Negative): bng 1 nu kt qu l s m.

Cc lnh nhn (Multiply) hay chia (Divide) hai s nguyn 16 bit c nh a ch cc u vo IN1 v
IN2, kt qu lu vo s nguyn c nh a ch bi u ra OUT. Trong php chia, s d b b qua. Bit
bo trn s thnh 1 nu kt qu ln hn mt s nguyn 16 bit. Nhng lnh ny khng c trong cc CPU
212, 214.
[IN1] * [IN2] = [OUT]
[IN1] / [IN2] = [OUT]
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Bit c bit SM1.1 = 1: li trn (Overflow).
+ Bit c bit SM1.3 = 1: li chia cho 0 (Divide-by-zero).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.
+ SM1.2 (Negative): bng 1 nu kt qu l s m.
+ SM1.3 (Divide-by-zero): bng 1 nu s chia bng 0.
Trong trng hp bit SM1.1 (Overflow) bng 1, kt qu s khng c ghi v cc bit c bit khc lin quan
n cc php ton (Zero, Negative, ...) u c xa v 0.
Trong trng hp bit SM1.3 (Divide-by-zero) bng 1, cc bit c bit khc lin quan n cc php ton
(Zero, Negative, ...) u c gi nguyn khng thay i v cc ton hng u vo cng khng i.
Trong cc trng hp cn li, cc bit c bit ni trn s c gi tr phn nh trng thi ca kt qu theo tnh
nng ca chng

Cc lnh nhn (Multiply) hay chia (Divide) hai s nguyn 32 bit c nh a ch cc u vo IN1 v
IN2, kt qu lu vo s nguyn 32 bit c nh a ch bi u ra OUT. Trong php chia, s d b b qua.
Bit bo trn s thnh 1 nu kt qu ln hn mt s nguyn 32 bit. Nhng lnh ny khng c trong cc CPU
212, 214.
[IN1] * [IN2] = [OUT]
[IN1] / [IN2] = [OUT]
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Bit c bit SM1.1 = 1: li trn (Overflow).
+ Bit c bit SM1.3 = 1: li chia cho 0 (Divide-by-zero).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.
+ SM1.2 (Negative): bng 1 nu kt qu l s m.
+ SM1.3 (Divide-by-zero): bng 1 nu s chia bng 0.
Trong trng hp bit SM1.1 (Overflow) bng 1, kt qu s khng c ghi v cc bit c bit khc lin quan
n cc php ton (Zero, Negative, ...) u c xa v 0.
Trong trng hp bit SM1.3 (Divide-by-zero) bng 1, cc bit c bit khc lin quan n cc php ton
(Zero, Negative, ...) u c gi nguyn khng thay i v cc ton hng u vo cng khng i.

Cc lnh Nhn, Chia hai s nguyn (Integer) v ghi kt qu vo s nguyn di (Double Integer): Cc
lnh ny nhn (Multiply) hay chia (Divide) hai s nguyn 16 bit c nh a ch cc u vo IN1 v
IN2, kt qu lu vo s nguyn 32 bit c nh a ch bi u ra OUT. Trong php chia, kt qu bao gm
s d 16 bit cao v thng s 16 bit thp.
[IN1] * [IN2] = [OUT]
[IN1] / [IN2] = [OUT]
Trong STL, lnh MUL ch s dng 16 bit thp ca t kp [OUT] lm s nhn. Tng t lnh DIV cng ch
s dng 16 bit thp ca t kp [OUT] lm s b chia.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
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Tp lnh S7-200

+ Bit c bit SM1.1 = 1: li trn (Overflow).

+ Bit c bit SM1.3 = 1: li chia cho 0 (Divide-by-zero).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.
+ SM1.2 (Negative): bng 1 nu kt qu l s m.
+ SM1.3 (Divide-by-zero): bng 1 nu s chia bng 0.
Trong trng hp bit SM1.3 (Divide-by-zero) bng 1, cc bit c bit khc lin quan n cc php ton
(Zero, Negative, ...) u c gi nguyn khng thay i v cc ton hng u vo cng khng i.

Cc s thc c biu din bng 32 bit di dng du phy ng theo chun ANSI / IEEE 754 - 1985.
Cc v d:

8.2

Lnh tng gim mt n v

Trang 21

Tp lnh S7-200

Thm vo hay bt i mt n v t mt Byte c nh a ch u vo

IN, kt qu lu vo Byte c nh a ch bi u ra OUT. Cc s trong
Byte ton hng c xem l cc s khng du.
[IN] + 1 = [OUT]
[IN] - 1 = [OUT]
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Bit c bit SM1.1 = 1: li trn (Overflow).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.

Tng t i vi W, DW.

8.3

Cc lnh hm s hc

9. Lnh vng lp PID

Lnh ny tnh ton vng lp PID (PID Loop) theo cc u vo v nhng thng s t bng c nh a ch
bi TBL.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Bit c bit SM1.1 = 1: li trn (Overflow).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.1 (Overflow): bng 1 nu kt qu b trn.

Lnh PID Loop (Proportional, Integral, Derivative Loop) c s dng tnh ton vng lp PID. Lnh
ny ch c thc hin nu nh nh ca ngn xp (Top Of Stack) bng 1 trong STL, hay c Power Flow
trong LAD. Lnh ny c hai ton hng: [TBL] l a ch byte u tin ca mt bng d liu cn [LOOP] l
mt s nm trong khong t 0 n 7. iu ny cng c ngha l ch c ti a 8 lnh PID Loop c th c
Trang 22

Tp lnh S7-200

s dng trong mt chng trnh. Nu c hai lnh PID Loop vi cng mt s [LOOP] th d chng c s
dng hai bng khc nhau i na cng vn nh hng n nhau v c th gy nhng hu qu khng lng
trc c.
Bng d liu ca lnh PID Loop bao gm 09 tham s dng iu khin hot ng ca vng lp: gi tr tc
thi v gi tr k trc (current and previous value) ca bin iu khin (process variable), gi tr yu cu
(setpoint), gi tr x l (output - u ra ca PID), h s khuch i (gain), thi gian ly mu (sample time),
h s tch phn (integral time - reset), h s vi phn (derivative time - rate) v integral sum (bias).
thc hin lnh ny mt tn sut ly mu xc nh, n phi hoc l c t trong mt ngt thi gian
hoc l c thc hin trong chng trnh chnh qua kim sot bi mt b nh thi. ng thi, thi gian
ly mu tng ng phi c a vo bng d liu ca lnh.
Trong STEP 7 Micro / Win 32, chng ta c th s dng PID Wizard to thut ton vi PID cho mt
mch iu khin kn bng cch chn Tools Instruction Wizard -> PID t Menu chnh.
trng thi n nh, mt b iu khin PID s iu chnh sao cho sai s gia gi tr yu cu (setpoint SP)
v gi tr iu khin (process variable PV) bng 0. Nguyn l ca mt b iu khin PID nh vy th hin
trong phng trnh sau:
t

M (t )

Kc * e + Ki *

edt + Mi + Kd *

de
dt

output = proportional +
integral
+ differential
trong :
M(t): u ra ca PID (i lng x l) nh mt hm theo thi gian
Kc: hng s khuch i
e: sai s.
e = SP - PV
Mi: gi tr ban u ca PID
Nhm mc ch p dng b iu khin PID trn my vi tnh hay PLC ni ring v trong k thut s
ni chung, chng ta phi tin hnh ri rc ha phng trnh nu trn. C th l ly mu v lng t ha
cc bin. Phng trnh c vit li nh sau:

Mn

Kc * en + Ki *

i =1

ei + Mi + Kd * (en - en - 1 )

output = proportional +
integral
+
differential
trong :
Mn: u ra ca PID (i lng x l) thi im ly mu n
Kc: hng s khuch i
en: sai s thi im ly mu n. en = SPn - PVn
en-1: sai s thi im ly mu ngay trc (n-1).
en-1 = SPn-1 - PVn-1
Ki: hng s khuch i ca thnh phn tch phn
Mi: gi tr ban u ca PID
Kd: hng s khuch i ca thnh phn vi phn
T phng trnh ny ta nhn thy rng, nu nh thnh phn t l (proportional) ch l hm ca sai s
thi im ly mu th thnh phn vi phn (differential) l hm s ca sai s thi im ly mu ln thi
im ly mu k trc cn thnh phn tch phn (integral) li l hm ca tt c cc sai s t thi im ly
mu u tin cho n thi im ly mu hin ti. Trong k thut s, lu li tt c cc sai s l iu khng
th thc hin c, cng nh tht s khng cn thit.
V gi tr x l lun c tnh ton mi thi im ly mu, k t thi im u tin, nn ch cn
lu li gi tr k trc ca sai s v thnh phn tch phn. Phng trnh c n gin thnh:

Mn

Kc * en + Ki * en + MX + Kd * (en - en - 1 )

output = proportional +
integral
+
differential
trong :
Mn: u ra ca PID (i lng x l) thi im ly mu n
Kc: hng s khuch i
en: sai s thi im ly mu n. en = SPn - PVn
en-1: sai s thi im ly mu ngay trc (n-1).
en-1 = SPn-1 - PVn-1
Ki: hng s khuch i ca thnh phn tch phn
Trang 23

Tp lnh S7-200

MX: gi tr thnh phn tch phn thi im ly mu k trc (n-1)

Kd: hng s khuch i ca thnh phn vi phn
Mt cch vit khc ca phng trnh:
Mn =
MPn
+ MIn + MDn
output = proportional + integral + differential
trong :
Mn: u ra ca PID (i lng x l) thi im ly mu n
MPn: thnh phn t l ca u ra PID thi im ly mu n
MIn: thnh phn tch phn ca u ra PID thi im ly mu n
MDn: thnh phn vi phn ca u ra PID thi im ly mu n
Ta ln lt xt n tng thnh phn mt ca i lng x l:
Thnh phn t l (proportional) MP l tch ca hng s khuch i Kc vi sai s e. Trong Kc c trng
cho nhy ca u ra PID (Kc cng ln, b iu khin PID cng nhy) cn e l sai s gia i lng yu
cu (setpoint SP) v i lng thc t (process variable PV). Phng trnh biu din:
MPn = Kc * (SPn - PVn)
trong :
MPn: thnh phn t l ca u ra PID thi im ly mu n
Kc: hng s khuch i
SPn: i lng yu cu ti thi im ly mu n
PVn: i lng thc t ti thi im ly mu n
Thnh phn tch phn (integral) MI t l vi tng cc sai s qua thi gian, th hin bng phng
trnh:
MIn = KC * Ts / Ti * (SPn - PVn ) + MX
trong :
MIn: thnh phn tch phn ca u ra PID thi im ly mu n
Kc: hng s khuch i
Ts: thi gian ly mu
Ti: h s tch phn
SPn: i lng yu cu ti thi im ly mu n
PVn: i lng thc t ti thi im ly mu n
MX: gi tr ca thnh phn tch phn thi im ly mu k trc (n-1), cn c gi l integral
sum hay bias.
Sau khi tnh ton gi tr MIn, bias MX c thay th bi chnh gi tr MIn vi kh nng c th b
iu chnh hoc ct (chn gii hn), iu ny s c ni r phn sau. Gi tr ban u ca bias MX, Mi
thng c ly l gi tr ca u ra b PID ngay trc thi im thc hin lnh PID ln u tin. Cc hng
s khc nh hng n thnh phn ny l: Kc - hng s khuch i, Ts - thi gian ly mu v Ti - h s tch
phn l c trng cho nh hng ca thnh phn ny ln ton b i lng x l.
Thnh phn vi phn (differential) MD t l vi thay i ca sai s, th hin qua phng trnh:
MDn = KC * Td / Ts * ((SPn - PVn ) - (SPn - 1 - PVn - 1 ))
Vi c tnh c qun tnh ca mi h vt cht, chng ta c th gi thit rng i lng thc t PV khng bao
gi c s thay i mt cch gin on. Tuy nhin i lng yu cu th c th tng gim gy khc (do c
tnh trn l thuyt). V bn cht ton hc, thnh phn vi phn l php ly o hm nn nhng s thay i
gin on c th gy nn cc gi tr v cng ln u ra. trnh hin tng ny, trong phng trnh trn
ta gi thit SPn = SPn - 1 v c th vit:
MDn = KC * Td / Ts * (PVn - 1 - PVn)
trong :
MDn: thnh phn vi phn ca u ra PID thi im ly mu n
Kc: hng s khuch i
Ts: thi gian ly mu
Td: h s vi phn
SPn: i lng yu cu ti thi im ly mu n
SPn-1: i lng yu cu ti thi im ly mu n-1
PVn: i lng thc t ti thi im ly mu n
PVn-1: i lng thc t ti thi im ly mu n-1
Trang 24

Tp lnh S7-200

Nh vy trn thc t khng cn nh sai s thi im ly mu k trc m ch cn nh i lng

thc t. Trong ln tnh ton u tin PVn-1 c ly bng PVn.
Ty theo ng dng thc t, c th b bt thnh phn trong b iu khin PID ch khng nht thit
phi bao gm c ba thnh phn, chng hn c th to b iu khin t l (P) hay b iu khin ch cha
cc thnh phn t l v tch phn (PI). S la chn ny da trn cch t cc tham s.
Nu mun b thnh phn tch phn (b I), ta chn h s tch phn bng v cng (Ti = (). Trong
trng hp ny, thnh phn tch phn vn khng nht thit bng khng m c th bng mt gi tr khng
i thng qua gi tr bias MX ban u.
Nu mun b thnh phn vi phn (b D), ta chn h s vi phn bng khng (Td = 0.0).
Nu mun b thnh phn t l (b P), ta chn h s khuch i bng khng (Kc = 0.0). Trong trng hp
ny, v cc hng s ca cc thnh phn tch phn v vi phn c tnh theo Kc nn i vi nhng thnh phn
y, Kc c hiu l bng 1.0.
Mt b iu khin PID c hai u vo: i lng yu cu v i lng thc t. y l nhng i
lng tht trong ng dng nh nhit , p sut, tc , ... a vo tnh ton trong mt b iu khin,
chng phi c o, chuyn i v gi tr thch hp v chun ha (nu cn). Cc bc ny u cn thit cho
mt b iu khin PID, b ny i hi cc gi tr u vo l nhng gi tr s thc (du phy ng) nm
trong khong t 0.0 n 1.0.
Thng thng, nhng gi tr o c c a vo PLC qua cc u vo tng t (qui v in p
trong khong 0 - 10VDC hoc dng in 0 - 20mADC) thnh nhng gi tr s nguyn 16 bit c du. Trc
ht nhng gi tr ny phi c i thnh cc s thc 32 bit (du phy ng), chng hn theo thut ton sau:
XORD AC0, AC0
//Clear the accumulator.
MOVW AIW0, AC0
//Save the analog value in the accumulator.
LDW>= AC0, 0
//If the analog value is positive,
JMP 0
//then convert to a real number.
NOT
//Else,
ORD 16#FFFF0000, AC0
//sign extend the value in AC0.
LBL 0
DTR AC0, AC0
//Convert the 32-bit integer to a real number.
Bc tip theo l chun ha v khong [0.0 - 1.0] theo phng trnh:
NNorm = (NRaw / Span) + Offset
trong :
NNorm l gi tr chun ha, i din cho mt i lng tht
NRaw l gi tr thc cha chun ha, i din cho mt i lng tht
Span l hiu ca gi tr ln nht c th c tr i gi tr nh nht c th c ca gi tr cha chun
ha. Trong S7-200 thng l 32000 - 0 = 32000 i vi cc i lng khng i du (unipolar) v khi
Offset = 0.0, hay 32000 - (-32000) = 64000 i vi cc i lng c th va c gi tr dng va c gi tr
m (bipolar) v khi Offset = 0.5.
on lnh sau y minh ha cho thut ton ny trong trng hp i lng c du (bipolar):
/R 64000.0, AC0
//Normalize the value in the accumulator
+R 0.5, AC0
//Offset the value to the range from 0.0 to 1.0
MOVR AC0, VD100 //Store the normalized value in the loop TABLE
Mt cch l gic chng ta thy rng cn phi c qu trnh ngc li vi qu trnh trn i vi gi tr
u ra ca b iu khin PID. Ngha l bin i v a v thang gi tr thch hp cho u ra t gi tr u
ra chun ha trong khong 0.0 n 1.0. Phng trnh thut ton:
RScale = (MNorm - Offset) * Span
trong :
RScale l gi tr thch hp cho u ra, i din cho mt i lng tht
MNorm l gi tr u ra chun ha, i din cho mt i lng tht
Span l hiu ca gi tr ln nht c th c tr i gi tr nh nht c th c ca gi tr cha chun
ha. Trong S7-200 thng l 32000 - 0 = 32000 i vi cc i lng khng i du (unipolar) v khi
Offset = 0.0, hay 32000 - (-32000) = 64000 i vi cc i lng c th va c gi tr dng va c gi tr
m (bipolar) v khi Offset = 0.5.
on lnh minh ha cho thut ton:
MOVR VD108, AC0 //Move the loop output to the accumulator.
-R 0.5, AC0
//Include this statement only if the value is
Trang 25

Tp lnh S7-200

//bipolar.
*R 64000.0, AC0
//Scale the value in the accumulator.
ROUND AC0 AC0
//Convert the real number to a 32-bit integer.
MOVW AC0, AQW0 //Write the 16-bit integer value to the analog
//output.
Chng ta thng ni v vng lp iu khin thun khi h s khuch i dng (Kc > 0) hay vng
lp iu khin o (nghch) khi h s khuch i m (Kc < 0). Trong trng hp khng c thnh phn P
(Kc = 0), ta xt du ca cc h s Ti v Td.
Cc gi tr yu cu v gi tr thc t (bin iu khin) l nhng u vo ca b iu khin PID, do
cc trng tng ng vi chng trong bng d liu ca PID s khng b thay i bi lnh ny.
Ngc li trng tng ng vi u ra c cp nht bi PID. N s b ct (chn) nu vt ra
ngoi khong cho php [0.0 - 1.0].
Nu c s dng thnh phn tch phn (I), bias cng c cp nht v li c dng lm u vo
cho ln ly mu k tip. Tuy nhin n c th c iu chnh trong trng hp u ra b chn (v vt ra
ngoi khong [0.0 - 1.0]) theo phng trnh sau:
MX = 1.0 - (MPn + MDn )
khi u ra ln hn 1.0, hay
MX = - (MPn + MDn )
khi u ra nh hn 0.0, trong :
MX l gi tr bias c iu chnh
MPn l gi tr thnh phn t l (P) ca u ra thi im ly mu n
MDn l gi tr thnh phn vi phn (D) ca u ra thi im ly mu n
Mn l gi tr ca u ra thi im ly mu n
Bng s iu chnh ny, gi tr u ra s c a v khong hp l. Gi tr bias cng b chn trong
khong [0.0 - 1.0] v ghi vo bng d liu cho ln ly mu tip theo s dng.
Gi tr bias trong bng d liu c th thay i c ngay trc khi thc hin lnh PID nhng phi
ch y l mt s thc nm trong khong [0.0 - 1.0].
Gi tr i lng thc t ca ln ly mu trc c lu li trong bng d liu tnh ton thnh
phn vi phn, khng bao gi c thay i gi tr ny.
Mt b iu khin PID c th hot ng mt trong hai ch : Auto hoc Manual. Thc ra khng c ch
hot ng no c xy dng sn cho PID trong S7-200. S tnh ton ch c thc hin khi c dng
nng lng (powerflow) n u EN (enable) ca b PID. PID c xem nh hot ng ch Auto khi
n thc hin tnh ton mt cch tun hon lin tc. Trong trng hp ngc li, PID c xem nh hot
ng ch Manual. Vn chng ta cn xt n l s chuyn i m bo tnh lin tc t ch
Manual sang ch Auto. iu i hi u ra c tnh trong ch Manual phi c ghi vo u vo
thi im chuyn i sang ch Auto. Tng t nh cch hot ng ca b m, CPU s dng mt bit
nh xc nh thi im chuyn i: khi dng nng lng thay i t 0 ln 1. Lc CPU s thc hin
mt lot thao tc cn thit:
t gi tr yu cu bng gi tr thc t: SPn = PVn
t gi tr k trc ca gi tr thc t: PVn-1 = PVn
t Bias bng gi tr u ra: MX = Mn
Bit nh ca mt b PID c gi tr mc nh l 1 (ON), c t khi CPU khi ng hay chuyn t ch
STOP sang ch RUN. iu cng c ngha l khi b PID c thc hin ln u tin, CPU khng
nhn bit s chuyn i trng thi ca dng nng lng t 0 ln 1 v do khng thc hin cc thao tc
nu trn.
Lnh PID l mt lnh n gin nhng rt mnh trong vic tnh ton thut ton PID. Nu cn mt s tnh
nng khc, v d nh bo ng hay nhng thay i c bit, c th s dng cc lnh khc can thip.
Khi chng trnh s dng c bin dch, li bin dch c th xut hin nu a ch bng tham s [TBL]
hoc ton hng [LOOP] ca b PID vt ra ngoi phm vi cho php (out of range).
Mt s phm vi cho php khng c kim tra, v vy ngi lp trnh phi ch . Chng hn nh nhng gi
tr yu cu v thc t phi l cc s thc nm trong khong t 0.0 n 1.0, cng nh cc gi tr thc t k
trc hay Bias, nu c s dng, khng c vt ra ngoi khong [0.0 - 1.0].
Nu li xut hin trong qu trnh tnh ton thut ton PID, bit c bit SM1.1 (overflow) s bng 1 v qu
trnh tnh ton b dng li. Trong nhng trng hp nh vy, u ra ca b PID c th cha c hon
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Tp lnh S7-200

thnh, v vy ngi lp trnh phi ch kim tra bit c bit ny s dng u ra mt cch hp l cng
nh iu chnh cc du vo nu cn thit.
nh dng bng cc tham s ca mt b PID bao gm 36 bytes nh sau:

Mt v d dng b iu khin PID:

Mt b nc c dng gi mt p lc ct nc c nh. Nc chy ra khi b vi tc thay i
khng xc nh. t mc ch ngi ta s dng mt bm nc c lu lng iu chnh c mt cch
lin tc bm nc vo b.
Gi tr yu cu trong v d ny l phi gi mc nc trong b 75%. Gi tr thc t chnh l mc nc o
c, thay i t 0% (khi b cn) n 100% (khi b y). Gi tr x l (u ra b iu khin PID) l vn tc
bm, iu chnh c t 0% n 100% lu lng danh nh.
Gi tr yu cu, khng thay i, s c ghi trc tip vo bng cc tham s ca b PID. Gi tr thc t l gi
tr khng i du (ch dng - unipolar) v l gi tr tng t c vo t b o mc. Gi tr u ra PID cng
l gi tr tng t, unipolar, dng diu khin tc bm. C hai gi tr tng t ny, i vi S7-200,
nm trong khong t 0 n 32000.
Ta s dng b iu khin PI (ch bao gm thnh phn t l v tch phn, khng cha thnh phn vi phn).
Cc hng s iu khin c tnh ton da trn nhng thng s k thut ca h iu khin v c th iu
chnh trong qu trnh khai thc thc t. y ta khng i su vo vn ny.
Kc = 0.25
Ts = 0.1 s
Ti = 30 min
Bm c iu khin bng tay cho n khi mc nc trong b t 75% th chuyn sang ch t ng v
m van cho nc chy ra khi b. u vo I0.0 c s dng i ch : I0.0 = 0 l Manual; I0.0 = 1 l
Auto. Khi trong ch Manual, tc bm c xc nh bi s thc trong khong [0.0 - 1.0] ghi
VD10
Chng trnh:

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10. Lnh php ton logic

10.1 Lnh o byte, word, doubleword

10.2 Lnh AND, OR, XOR

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AND bytes, OR bytes, EXCLUSIVE OR bytes: Lnh AND Bytes thc

hin php ton l gic AND gia cc bit tng ng ca cc byte u vo
c nh a ch bi cc u vo IN1 v IN2, kt qu lu vo byte c
nh a ch bi u ra OUT. Lnh OR Bytes thc hin php ton l gic
OR gia cc bit tng ng ca cc byte u vo c nh a ch bi
cc u vo IN1 v IN2, kt qu lu vo byte c nh a ch bi u
ra OUT. Lnh EXCLUSIVE OR Bytes thc hin php ton l gic XOR
gia cc bit tng ng ca cc byte u vo c nh a ch bi cc
u vo IN1 v IN2, kt qu lu vo byte c nh a ch bi u ra
OUT.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.

Tng t cho cc cu lnh AND words, OR words, EXCLUSIVE OR words. AND double words, OR double
words, EXCLUSIVE OR double words.

V d cc lnh l gic:

11. Lnh dch v quay

11.1 Dch tri hay phi
Nhng lnh ghi dch (shift) ni dung mt byte c nh a ch bi
u vo IN i [N] ln (nh bi ton hng N), mi ln mt bit sang phi
(Shift Right Byte) hoc sang tri (Shift Left Byte), kt qu lu vo byte
c nh a ch bi u ra OUT. Php ghi dch (shift) in gi tr 0
(OFF) vo cc bit b dch i. Nh vy nu s ln dch [N] ln hn 8,
thc t ch cn dch ti a 8 ln v sau kt qu chc chn bng 0.
Nu s ln dch [N] ln hn 0, bit cui cng trong byte b dch ra ngoi
s c ghi vo bit c bit SM1.1 (overflow). Bit c bit SM1.0
(zero) s c gi tr 1 (ON) nu kt qu cui cng sau php dch bng 0.
Cc lnh ghi dch mt byte u xem cc byte l nhng s khng du (unsigned).
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Nhng li c th c gy nn bi lnh ny (ENO = 0):

+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng bit cui cng b dch ra ngoi.

11.2 Quay tri hay phi

Nhng lnh quay (rotate) ni dung mt byte c nh a ch bi u vo IN i [N] ln (nh bi ton
hng N), mi ln mt bit sang phi (Rotate Right Byte) hoc sang tri (Rotate Left Byte), kt qu lu vo
byte c nh a ch bi u ra OUT. Php quay (rotate) in gi tr bit cui cng (b quay ra ngoi) vo
bit u tin. Nh vy nu s ln quay [N] ln hn 8, thc t ch cn quay mt s ln bng s d trong php
chia [N] cho 8 v sau qu trnh s c lp li. Do s ln quay thc t ch nm trong khong t 0 n
7. Nu s ln quay bng 0 (hay s ln quay chia ht cho 8), php quay khng c thc hin. Trong trng
hp php quay c thc hin, bit cui cng trong byte b quay ra ngoi s c ghi vo bit c bit SM1.1
(overflow). Bit c bit SM1.0 (zero) s c gi tr 1 (ON) nu kt qu cui cng sau php quay bng 0.
Cc lnh ghi quay mt byte u xem cc byte l nhng s khng du (unsigned).
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.0 (Zero): bng 1 nu kt qu bng 0.
+ SM1.1 (Overflow): bng bit cui cng b quay ra ngoi.

V d s dng cc php dch v quay:

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11.3 Lnh dch thanh ghi cc bit (Shift Register Bit):

Lnh ny dch (shift) ni dung mt khi cc bit lin tip i mt bit, vi
bit u tin b dch i c thay th bng gi tr bit c tr n bi ton
hng DATA v bit cui cng b dch ra ngoi s c ghi vo bit c bit
SM1.1. Khi cc bit lin tip ny c xc nh vi bit u tin (bit thp
nht) c a ch nh bi ton hng S_BIT v c di bng gi tr tuyt
i ca ton hng [N]. iu c ngha [N] l mt s c du, du ca
[N] xc nh chiu dch chuyn: [N] dng th dch ln cn [N] m th
dch xung.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.
+ Li 0091: ton hng vt qu gii hn cho php.
+ Li 0092: li trng s (count field).
Nhng bit nh c bit c ni dung b nh hng bi lnh ny:
+ SM1.1 (Overflow): bng bit cui cng b quay ra ngoi.

Minh ha lnh ny vi khi cc bit bt u t V33.4 v c di 14 bit:

V d khc:

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11.4 Lnh SWAP

Lnh ny (Swap Bytes) c ton hng l mt t n (Word) c nh a
ch bi u vo IN. Lnh Swap tro i ni dung hai byte nh ca mt t
n: byte cao thnh byte thp v byte thp thnh byte cao. Kt qu c
ghi vo chnh t n l ton hng ca lnh.
Nhng li c th c gy nn bi lnh ny (ENO = 0):
+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0006: a ch gin tip.

V d v lnh dch chuyn v lnh Swap:

12. Cc lnh iu khin chng trnh

12.1 END c iu kin
Lnh END c iu kin dng kt thc chng trnh chnh khi tha
mn iu kin trc n.
Lnh END khng c ton hng, khng c s dng trong cc chng
trnh con hay trong cc chng trnh x l ngt. Phn mm STEP 7
Micro / Win 32 t ng thm lnh END khng iu kin (lnh END
khng c bt c iu kin no trc n) vo cui mi chng trnh
chnh.

12.2 STOP
Lnh STOP dng chng trnh ang c thc hin ngay lp tc bng
cch chuyn CPU t ch hot ng (RUN) sang ch STOP. Nu lnh STOP c thc hin t mt
chng trnh x l ngt th chng trnh x l ngt y s b kt thc ngay ng thi tt c nhng ngt ang
ch c x l (nu c) cng u b hy. Tuy nhin CPU vn x l nt nhng lnh cn li trong vng qut
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ca chng trnh chnh khi b ngt v ch dng chng trnh cui vng qut bng cch chuyn ch t
RUN sang STOP.

12.3 Lnh Watchdog Reset

Lnh ny khi ng li ng h canh h thng (System Watchdog). iu cho php ko di thi gian
thc hin vng qut m khng b li watchdog. Ch cn thn khi s dng lnh ny v khi n nm trong
cc vng lp (khng kt thc vng qut) hay khi n ko di vng qut s nh hng ti h thng, chng hn
nh vic thc thi cc tnh nng:

Truyn thng (tr ch FreePort)

Cp nht cc u vo ra (tr nhng lnh truy xut trc tip)
Cp nht Forcing
Cp nht cc bit c bit, nh SM0, SM5 n SM29
Chn on li Run-Time
Cc b nh thi c phn gii 10 ms v 100ms hot ng sai lch (c bit khi thi gian vng qut vt qu 25s)
Lnh STOP c s dng trong chng trnh con x l ngt

Nu mong mun thi gian vng qut qu 500ms, hoc mong l c th ch ngt qu 300ms th phi dng
lnh WDR.

Vic chuyn cng tc ca CPU sang v tr STOP s dng chng trnh trong vng 1.4 giy.

12.4 Lnh nhy

Lnh nhy (Jump to Label) r nhnh chng trnh n mt on lnh
c nh du bng mt nhn. Khi mt lnh nhy c thc hin, nh
ngn xp lun lun c gi tr 1. Nhn dng nh du v tr cho cc
lnh nhy.
C hai lnh trn c ton hng l mt s nguyn trong khong t 0 n
255 (s nhn). i vi CPU 212 ch c t 0 n 63. Lnh nhy ch
c php r nhnh chng trnh n mt nhn hoc cng trong
chng trnh chnh, hoc cng trong mt chng trnh con hay chng
trnh x l ngt.

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12.5 Lnh SCR

V d:

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Xem thm: iu khin hi t, phn tn, c iu kin, Lnh vng lp For-Next.

13. Lnh chng trnh con

Lnh gi (CALL) mt chng trnh con chuyn quyn iu khin n
cho chng trnh con . S7-200 c th gi mt chng trnh con c
hoc khng c tham s. Trong STEP 7 Micro / Win 32, ta thm chng
trnh con vo chng trnh t Menu chnh Edit > Insert > Subroutine.
Lnh kt thc chng trnh con (Return) c iu kin kt thc vic thc
hin chng trnh con v tr v chng trnh chnh khi tha mn iu
kin trc n.
Mt khi vic thc hin mt chng trnh con kt thc, quyn iu khin
c chuyn v cho lnh k tip lnh gi chng trnh con y.
Ton hng ca lnh gi chng trnh con chnh l nh danh ca chng trnh con, l mt s nguyn trong
khong t 0 n 255.

Nhng li c th c gy nn bi lnh ny (ENO = 0):

+ Bit c bit SM4.3 = 1: li Run - Time.
+ Li 0008: s ln gi chng trnh con vt qu con s cho php.

STEP 7 Micro / Win 32 t ng gn lnh kt thc v tr v t chng trnh con (RET) vo cui mi
chng trnh con c thm vo.
Mt chng trnh con c th c gi t trong mt chng trnh con, hin tng ny gi l Nesting. su
ca Nesting ti a l 08 ln gi. Vic gi n mt chng trnh con t chnh n ( qui - Recursion) khng
b cm nhng ngi lp trnh phi tht s cn trng vi cch dng ny.
Khi gi mt chng trnh con, CPU lu li ton b ngn xp, ghi gi tr 1 vo nh ngn xp v 0 vo cc
gi tr cn li ca ngn xp ri chuyn quyn iu khin cho chng trnh con. Khi vic thc hin mt
chng trnh con hon tt, ngn xp c phc hi li trng thi trc v quyn iu khin c chuyn
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v cho chng trnh gi. Lu nhng thanh ghi a nng (Accumulators) khng c lu hay phc hi
trong cc qu trnh trn.
Vic gi mt chng trnh con vi tham s c thc hin thng qua vic nh ngha cho chng trnh con
mt bng tham s cc b. Mi tham s bao gm tn tham s (ti a 08 k t), kiu bin (vo, ra hay tm
thi) v kiu d liu (Bool, Byte, INT, ...). Mi chng trnh con c th c nhiu nht 16 tham s.
Kiu bin ca tham s xc nh tham s vo cho chng trnh con (IN), va vo va ra (IN_OUT) hay l
tham s ra t chng trnh con (OUT). C th nh sau:
Tham s dng vo (IN) c truyn n cho chng trnh con: Nu tham s l a ch trc tip (v d
VB10), ni dung nh a ch y s c truyn vo cho chng trnh con; Nu tham s l a ch
gin tip (v d *AC1), ni dung nh c tr n s c truyn vo cho chng trnh con; Nu tham
s l hng s (v d 16#9A8B) hay l mt a ch (v d &VB100), hng s hay a ch y s c
truyn vo cho chng trnh con.
Tham s dng vo - ra (IN_OUT): chng trnh con s dng s liu t a ch xc nh bi tham s ny
ng thi xut d liu cng ra a ch y. Hin nhin rng tham s dng ny khng th l mt hng s
(nh 16#1234) hay a ch (nh &VB100).
Tham s dng ra (OUT): chng trnh con xut d liu ra a ch ny. Tham s dng ny khng th l
mt hng s (nh 16#1234) hay a ch (nh &VB100).
Tham s cc b (TEMP): l nhng tham s c chng trnh con s dng ch trong phm vi chng
trnh con ny.
Local variable tabble:

thm vo mt tham s cho mt chng trnh con, trong bng cc tham s u chng trnh con (hnh
pha trn) t con tr vo kiu bin ta mun thm (IN, IN/OUT, OUT hay TEMP), nhn phm phi chut v
chn Insert > Row below thm vo mt tham s mi v tr di con tr vi dng tham s thch hp.
Kiu d liu ca tham s xc nh kch thc cng nh nh dng ca n:
Kiu dng nng lng (Boolean Power Flow): c xem l kiu bit l gic nhng ch c th l dng vo
(IN) v phi c khai bo trc tt c cc kiu khc (nh nhng tham s EN v IN1 trong v d trn).
Kiu bit l gic (Boolean): i din cho mt bit, c th l dng ra (OUT) hoc vo (IN), nh IN3.
Kiu Byte, Word, DWord: tham s ra hoc vo, 1, 2 hay 4 bytes i din cho cc s khng du
Kiu Int, DInt: tham s ra hoc vo, 2 hay 4 bytes i din cho cc s nguyn c du (signed).
Kiu Real: tham s ra hoc vo, i din cho cc s thc du phy ng 4 bytes (theo chun IEEE).
Mt v d gi chng trnh con vi cc tham s c khai bo nh trn:

Trong v d trn, tham s IN4 = &VB100 c cha vo mt t kp (double word unsigned). Nu gn cho
tham s mt gi tr l hng s, 16#1234 chng hn th phi xc nh kiu d liu cho n bng cch vit
DW#16#1234.
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Khi mt chng trnh con c gi, n bao gm mt vng d liu cc b cha cc tham s (c nh a
ch nh ct u tin ca bng cc tham s). Nhng tham s dng vo s c sao chp vo vng d liu cc
b ny trc khi chng trnh con thc hin v nhng tham s dng ra li c sao chp ra t vng y sau
khi vic thc hin chng trnh con hon thnh. Lu chng trnh con khng kim tra kiu d liu nn
ngi lp chng trnh phi ch s dng ng kiu khai bo.
Tt nhin th t cc tham s cng phi ph hp nh khai bo (c bit trong STL): u tin l dng vo
(IN) ri n cc dng vo - ra (IN/OUT) v dng ra (OUT).
V d s dng chng trnh con:

14. Lnh ngt

Xem gio trnh l thuyt.

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