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Low Cost Instrumentation Amplifier AD622: Features Pin Configuration
Low Cost Instrumentation Amplifier AD622: Features Pin Configuration
AD622
Easy to use
Low cost solution
Higher performance than two or three op amp design
Unity gain with no external resistor
Optional gains with one external resistor
(Gain range: 2 to 1000)
Wide power supply range: 2.6 V to 15 V
Available in 8-lead PDIP and 8-lead SOIC_N packages
Low power, 1.5 mA maximum supply current
DC performance
0.15% gain accuracy: G = 1
125 V maximum input offset voltage
1.0 V/C maximum input offset drift
5 nA maximum input bias current
66 dB minimum common-mode rejection ratio: G = 1
Noise
12 nV/Hz @ 1 kHz input voltage noise
0.60 V p-p noise: 0.1 Hz to 10 Hz, G = 10
AC characteristics
800 kHz bandwidth: G = 10
10 s settling time to 0.1% @ G = 1 to 100
1.2 V/s slew rate
APPLICATIONS
PIN CONFIGURATION
RG 1
RG
IN 2
+VS
+IN 3
OUTPUT
VS 4
REF
AD622
00777-001
FEATURES
GENERAL DESCRIPTION
The AD622 is a low cost, moderately accurate instrumentation
amplifier that requires only one external resistor to set any gain
between 2 and 1000. For a gain of 1, no external resistor is
required. The AD622 is a complete difference or subtracter
amplifier system that also provides superior linearity and
common-mode rejection by incorporating precision lasertrimmed resistors.
The AD622 replaces low cost, discrete, two or three op amp
instrumentation amplifier designs and offers good commonmode rejection, superior linearity, temperature stability,
reliability, and board area consumption. The low cost of the
AD622 eliminates the need to design discrete instrumentation
amplifiers to meet stringent cost targets. While providing a
lower cost solution, it also provides performance and space
improvements.
Transducer interface
Low cost thermocouple amplifier
Industrial process controls
Difference amplifier
Low cost data acquisition
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
AD622
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
Specifications..................................................................................... 3
RF Interference ........................................................................... 11
ESD Caution.................................................................................. 5
REVISION HISTORY
8/07Rev. C to Rev. D
Updated Format..................................................................Universal
Added Thermal Resistance Section ............................................... 5
Added Figure 16................................................................................ 9
Added Large Input Voltages at Large Gains Section.................. 11
Replaced RF Interference Section ................................................ 11
Deleted Grounding Section........................................................... 10
Deleted Figure 16............................................................................ 10
Changes to Ground Returns for Input Bias Currents Section.. 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
4/99Rev. B to Rev. C
8/98Rev. A to Rev. B
2/97Rev. 0 to Rev. A
1/96Revision 0: Initial Version
Rev. D | Page 2 of 16
AD622
SPECIFICATIONS
TA = 25C, VS = 15 V, and RL = 2 k typical, unless otherwise noted.
Table 1.
Parameter
GAIN
Gain Range
Gain Error 1
G=1
G = 10
G = 100
G = 1000
Nonlinearity
G = 1 to 1000
G = 1 to 100
Gain vs. Temperature
VOLTAGE OFFSET
Input Offset, VOSI
Average Temperature Coefficient
Output Offset, VOSO
Average Temperature Coefficient
Offset Referred to Input vs. Supply (PSR)
G=1
G = 10
G = 100
G = 1000
INPUT CURRENT
Input Bias Current
Average Temperature Coefficient
Input Offset Current
Average Temperature Coefficient
INPUT
Input Impedance
Differential
Common Mode
Input Voltage Range 2
Over Temperature
Conditions
G = 1 + (50.5 k/RG)
Typ
Max
Unit
1000
VOUT = 10 V
0.05
0.2
0.2
0.2
VOUT = 10 V
RL = 10 k
RL = 2 k
Gain = 1
Gain > 11
Total RTI Error = VOSI + VOSO/G
VS = 5 V to 15 V
VS = 5 V to 15 V
VS = 5 V to 15 V
VS = 5 V to 15 V
VS = 5 V to 15 V
0.15
0.50
0.50
0.50
%
%
%
%
10
50
ppm
ppm
ppm/C
ppm/C
125
1.0
1500
15
V
V/C
V
V/C
10
10
60
600
80
95
110
110
100
120
140
140
2.0
3.0
0.7
2.0
dB
dB
dB
dB
5.0
2.5
10||2
10||2
VS = 2.6 V to 5 V
VS = 5 V to 18 V
Over Temperature
Common-Mode Rejection Ratio
DC to 60 Hz with 1 k Source Imbalance
G=1
G = 10
G = 100
G = 1000
OUTPUT
Output Swing
Min
VS + 1.9
VS + 2.1
VS + 1.9
VS + 2.1
+VS 1.2
+VS 1.3
+VS 1.4
+VS 1.4
nA
pA/C
nA
pA/C
G ||pF
G||pF
V
V
V
V
VCM = 0 V to 10 V
66
86
103
103
RL = 10 k
VS = 2.6 V to 5 V
Over Temperature
VS = 5 V to 18 V
Over Temperature
Short Current Circuit
78
98
118
118
VS + 1.1
VS + 1.4
VS + 1.2
VS + 1.6
+VS 1.2
+VS 1.3
+VS 1.4
+VS 1.5
18
Rev. D | Page 3 of 16
dB
dB
dB
dB
V
V
V
V
mA
AD622
Parameter
DYNAMIC RESPONSE
Small Signal 3 dB Bandwidth
G=1
G = 10
G = 100
G = 1000
Slew Rate
Settling Time to 0.1%
G = 1 to 100
NOISE
Voltage Noise, 1 kHz
Input Voltage Noise, eni
Output Voltage Noise, eno
RTI, 0.1 Hz to 10 Hz
G=1
G = 10
G = 100
Current Noise
0.1 Hz to 10 Hz
REFERENCE INPUT
RIN
IIN
Voltage Range
Gain to Output
POWER SUPPLY
Operating Range 3
Quiescent Current
Over Temperature
TEMPERATURE RANGE
For Specified Performance
Conditions
Min
Typ
Max
Unit
1000
800
120
12
1.2
kHz
kHz
kHz
kHz
V/s
10
12
72
nV/Hz
nV/Hz
4.0
0.6
0.3
100
10
V p-p
V p-p
V p-p
fA/Hz
pA p-p
10 V step
f = 1 kHz
20
50
VIN+, VREF = 0
VS + 1.6
60
+VS 1.6
k
A
V
18
1.3
1.5
V
mA
mA
1 0.0015
2.6
VS = 2.6 V to 18 V
0.9
1.1
40 to +85
Rev. D | Page 4 of 16
AD622
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
Supply Voltage
Internal Power Dissipation1
Input Voltage (Common Mode)
Differential Input Voltage2
Output Short Circuit Duration
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
1
2
Rating
18 V
650 mW
VS
25 V
Indefinite
65C to +125C
40C to +85C
300C
ESD CAUTION
Rev. D | Page 5 of 16
JA
95
155
Unit
C/W
C/W
AD622
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, VS = 15 V, RL = 2 k, unless otherwise noted.
50
1000
SAMPLE SIZE = 191
PERCENTAGE OF UNITS
40
30
20
GAIN = 1
100
GAIN = 10
10
GAIN = 100, 1000
10
0.8
0.4
0.4
0.8
1.2
00777-002
0
1.2
10
100
1k
10k
100k
FREQUENCY (Hz)
00777-005
GAIN = 1000
BW LIMIT
50
1000
SAMPLE SIZE = 383
PERCENTAGE OF UNITS
40
30
20
100
60
80
100
120
10
00777-003
140
100
1000
FREQUENCY (Hz)
2.0
140
120
1.5
100
G = 1000
G = 100
CMR (dB)
G = 10
1.0
80
G=1
60
40
0.5
0
0.1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Rev. D | Page 6 of 16
00777-007
20
00777-004
10
00777-006
10
AD622
30
180
VS = 15V
G = 10
160
120
G = 1000
100
G = 100
80
60
G = 10
40
20
10
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
0
10
100
1k
10k
LOAD RESISTANCE ()
00777-011
G=1
20
0.1
00777-008
140
180
160
15
SETTLING TIME (s)
120
100
G = 1000
80
G = 100
60
10
G=1
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
0
0
10
15
20
00777-012
G = 10
40
20
0.1
TO 0.1%
00777-009
140
1000
1000
10
100
10
0.1
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
1
1
10
100
GAIN
Rev. D | Page 7 of 16
1000
00777-013
00777-010
GAIN (V/V)
100
AD622
10k
0.01%
INPUT
20V p-p
1k
POT
10k
0.1%
VOUT
100k
0.1%
100
90
+VS
1k
0.1%
100
0.1%
G = 1000
2V
5.62k
8
3
Rev. D | Page 8 of 16
6
5
VS
00777-014
10V
511
51.1
0%
AD622
G=1
G = 100 G = 10
10
00777-015
11k
0.1%
AD622
THEORY OF OPERATION
The value of RG also determines the transconductance of the
preamp stage. As RG is reduced for larger gains, the transconductance increases asymptotically to that of the input
transistors. This has the following three important advantages:
20A
VB
I2
20A
A1
A2
10k
C2
C1
10k
A3
R3
400
R1
R2
Q1
Q2
R4
400
RG
GAIN
SENSE
OUTPUT
10k
REF
+IN
GAIN
SENSE
00777-021
IN
10k
VS
RL2
10
AD694
0 TO 20mA
TRANSMITTER
0 TO 20mA
1k
1/2
LT1013
VIN
50
RL2
10
1k
1k
RG
5.62k
AD622
REF
1/2
LT1013
1k
9k*
1k*
1k*
9k*
Rev. D | Page 9 of 16
HOMEBREW IN-AMP, G = 10
00777-016
I1
AD622
The AD622 provides greater accuracy at lower cost. The higher
cost of the homebrew circuit is dominated in this case by the
matched resistor network. One could also realize a homebrew
design using cheaper discrete resistors that are either trimmed
or hand selected to give high common-mode rejection. This
level of common-mode rejection, however, degrades significantly
Error Source
ABSOLUTE ACCURACY at TA = 25C
Total RTI Offset Voltage, V
Input Offset Current, nA
CMR, dB
800 V 2
15 nA 1 k
(0.1% Match 0.5 V)/10 V
Total Absolute Error
400
2.5
25
427.5
1600
15
50
1665
DRIFT TO 85C
Gain Drift, ppm/C
Total RTI Offset Voltage, V/C
Input Offset Current, pA/C
3300
210
0.12
3510.12
3000
1080
9.3
4089.3
RESOLUTION
Gain Nonlinearity, ppm of Full Scale
Typ 0.1 Hz to 10 Hz Voltage Noise, V p-p
10 ppm
0.6 V p-p
20 ppm
0.55 V p-p 2
Total Resolution Error
Grand Total Error
10
0.6
10.6
3948
20
0.778
20.778
5775
Rev. D | Page 10 of 16
AD622
GAIN SELECTION
The AD622 gain is resistor programmed by RG or, more
precisely, by whatever impedance appears between Pin 1 and
Pin 8. The AD622 is designed to offer gains as close as possible
to popular integer values using standard 1% resistors. Table 5
shows required values of RG for various gains. Note that for
G = 1, the RG pins are unconnected (RG = ). For any arbitrary
gain, RG can be calculated by using the formula
50.5 k
G 1
Calculated
Gain
1.988
4.976
9.986
19.91
32.96
39.85
50.50
65.17
99.83
199.0
496.1
989.3
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
may appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass, RC network placed at the input
of the instrumentation amplifier, as shown in Figure 18. In
addition, this RC input network also provides additional input
overload protection (see the Input Protection section).
+VS
0.1F
R
4.02k
CC
1nF
R
4.02k
CD
47nF
CC
1nF
10F
+IN
RG
AD622
REF
IN
0.1F
10F
VS
VOUT
00777-017
RG =
separately. For longer time periods, the input current should not
exceed 6 mA. For input overloads beyond the supplies, clamping
the inputs to the supplies (using a diode such as a BAV199)
reduces the required resistance, yielding lower noise.
REFERENCE TERMINAL
The reference terminal potential defines the zero output voltage
and is especially useful when the load does not share a precise
ground with the rest of the system. The reference terminal provides
a direct means of injecting a precise offset to the output, with an
allowable range of 2 V within the supply voltages. Parasitic
resistance should be kept to a minimum for optimum CMR.
INPUT PROTECTION
FilterFreq DIFF =
FilterFreqCM =
where CD 10CC.
1
2 R(2C D + CC )
1
2 RCC
AD622
+VS
RG
AD622
8
VOUT
6
5
LOAD
REF
VS
TO POWER
SUPPLY
GROUND
00777-018
+IN
Figure 19. Ground Returns for Bias Currents with Transformer Coupled Inputs
+VS
IN
RG
AD622
8
VOUT
6
5
LOAD
REF
VS
TO POWER
SUPPLY
GROUND
00777-019
+IN
Figure 20. Ground Returns for Bias Currents with Thermocouple Inputs
+VS
IN
RG
AD622
8
+IN
100k
100k
VOUT
6
5
LOAD
REF
VS
TO POWER
SUPPLY
GROUND
00777-020
IN
Figure 21. Ground Returns for Bias Currents with AC-Coupled Inputs
Rev. D | Page 12 of 16
AD622
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
070606-A
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45
8
0
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
Rev. D | Page 13 of 16
012407-A
4.00 (0.1574)
3.80 (0.1497)
AD622
ORDERING GUIDE
Model
AD622AN
AD622ANZ 1
AD622AR
AD622AR-REEL
AD622AR-REEL7
AD622ARZ1
AD622ARZ-RL1
AD622ARZ-RL71
1
Temperature Range
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
Package Description
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Rev. D | Page 14 of 16
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
AD622
NOTES
Rev. D | Page 15 of 16
AD622
NOTES
Rev. D | Page 16 of 16