A

RN1
VCC

10k

VCC
1
2
3
4
5
6
7
8
9
10

VCC
U1
D2
1N4148

S1
RESET

Q1
2N3906

EA/VP

19

X1

Y1
22.1184MHz
18

X2

C1 22p

C2

10u
3

R3
2k

31

9
R1
10k

U2
LM7805CT

D1

JACK

1N4007

R2
1k

LED1
GREEN

IN

VCC

GND

1
2

VCC

C4
0.1u

39
38
37
36
35
34
33
32

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15

21
22
23
24
25
26
27
28

P3.7/RD
P3.6/WR
PSEN
ALE/P
P3.1/TXD
P3.0/RXD

17
16
29
30
11
10

C3 22p
C11
0.1uF

J1

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

1
2
3
4
5
6
7
8

P1.0/T2
P1.1/T2X
P1.2
P1.3
P1.4/SS
P1.5/MOSI
P1.6/MISO
P1.7/SCK

For the P89V51RD2

connect pin 40 to 5V
and pin 20 to Ground
3

VCC= 5V

U3
13
8

C5

VCC
22u
C6
0.1uF

P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1

P89V51RD2

For the MAX232

connect pin 16 to 5V
and pin 15 to Ground

RESET

12
13
14
15

C7
0.1uF

C8

22u

C9
22u

R1IN
R2IN

11
10

T1IN
T2IN

1
3
4
5
2
6

C1+
C1C2+
C2V+
V-

R1OUT
R2OUT

12
9

T1OUT
T2OUT

14
7

P1
1
6
2
7
3
8
4
9
5

DB9F

MAX232
C10
22u

VCC
1

Title
P89V51RD2 system by Jesus Calvino-Fraga
Size
A
Date:
A

Document Number
00001
Wednesday, January 17, 2007
D

Rev
1
Sheet

of
E