1. Find Vout and then use a .op(operating point) analysis to verify your hand calculations.

Hand Calculations:

Netlist:
netlist1
Vin n1 0 dc 2
R1 n1 n2 1k
R2 n2 Vout 2k
R3 Vout 0 1k
.op
.end

Spice simulation:

2. Repeat problem 1 if the input changes from 1 to 1V (so the output will change as well). Verify your
hand calculations using a .dc sweep.

Problem 2 (continued)
Netlist (using 0.5v increments for clarity):
netlist1
Vin n1 0 dc 2
R1 n1 n2 1k
R2 n2 Vout 2k
R3 Vout 0 1k
.dc Vin -1 1 0.5
.end
Spice waveform (I(Vin), V(n1, n2, Vout)):

3. For the following circuit calculate Vout. Sketch Vout and Vin on the same plot against time ensuring
that each sinusoid's magnitude and the phase shift between sinusoids is clear. Verify hand calculations
using a .tran LT Spice analysis.

Plot (Note: I utilized some of the information gathered from #4 to calculate delay):

Problem 3 (continued)
Spice Netlist:
SimulationQ3
Vin Vin 0 sin 0 1 159
R1 Vin Vout 1k
C1 Vout 0 1u
.tran 24m
.end
Spice Waveform:

4. Determine the magnitude

using the .ac analysis.

Spice Netlist:
SimulationQ4
Vin Vin 0 AC 1
R1 Vin Vout 1k
C1 Vout 0 1u
.ac dec 1 1 159
.end

and phase

responses of the circuit in problem 3. Verify