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ECE-GATE 2014 Topic Test-EDC

Duration: 90 Minutes

Maximum Marks: 50

Read the following papers instructions carefully:


1. There are a total of 33 questions carrying 50 marks. Questions are of multiple choice type or numerical
answer type. A multiple choice type question will have four choices for the answer with only one correct
choice. For numerical answer type questions, the answer is a number and no choices will be given. A
number as the answer should be entered by writing approximate value.
2. Q.1- Q.13 are of multiple choice type and carries 1 mark each. Q.14- Q.16 are of numerical answer type
and carries 1 mark each. Q.17- Q.24 are of multiple choice type and carries 2 marks each. Q.25- Q.29
are of numerical answer type and carries 2 marks each.Q.30-Q.31 include one pair of common data
questions which are of numerical answer type and carries 2 marks each and Q.32-Q.33 include one pair
of linked answer questions which are multiple choice type and carries 2 marks each. The answer to the
second question of the linked answer questions depends on the answer to the first question of the pair. If
the first question in the linked pair is wrongly answered or is not attempted then the answer to the second
question in the pair will not be evaluated.
3. Questions not attempted will result in zero mark. Wrong answers for multiple choice type questions will
result in NEGATIVE marks. For all 1 mark questions, 1/3 mark will be deducted for each wrong
answer. For all 2 marks questions, 2/3 mark will be deducted for each wrong answer. However, in the
case of the linked answer question pair, there will be negative marks only for wrong answer to the first
question and no negative marks for wrong answer to the second question. There is no negative
marking for questions of numerical answer type.
4. Objective questions must be answered on Objective Response Sheet (ORS) by marking (A, B, C, D)
using HB pencil against the question number on the left hand side of the ORS. For Numeric data
questions answer must be marked in form of numerical value only. Each question has only one correct
answer. In case you wish to change an answer, erase the old answer completely. More than one answer
marked against a question will be treated as a wrong answer.

5. Calculator is allowed. Charts, graph sheets or tables are NOT allowed in examination hall
6. Do the rough works in scribble pad provided/ In case of offline it can be done on paper itself?

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Q.1.

Q.2.

Q.3.

Q.4.

Q.5.

Q.6.

Q.7.

Q.8.

Q.9.

If Cd and CS represent the depletion and diffusion capacitance of a diode respectively then which one
of the following statements are correct.
1.
Cd varies inversely with the depletion width
2.
Cs varies directly with the rate of change of diode current with respect to diode voltage
3.
Effective Junction capacitance is the series combination of Cd and CS
(A) 1 & 2 are correct (B) 2 & 3 are correct (C) 1 & 3 are correct (D) 1, 2 & 3 are correct
Which of the following statement is not correct about GaAs and GaAsP?
(A) GaAs emit light in Infra red region while GaAsP emits light in Visible region
(B) Both GaAs& GaAsP are used as material for LED
(C) GaAs is direct band gap type while GaAsP is indirect band gap type material
(D) Both GaAs and GaAsP are semiconductor material.
The reverse saturation current of a Si-based p-n junction diode increases 32 times due to a rise in
ambient temperature. If the original temperature was 40C. What is the final temperature?
(A) 90 C
(B) 72 C
(C) 45 C
(D) 50 C
Which of the following parameters of a Silicon Schottky diode is higher than that of a corresponding
PN Junction diode?
(A) Forward voltage drop
(B) Reverse Leakage current
(C) Reverse Recovery time
(D) Reverse recovery current
A hole in a semiconductor has
1.
Positive charge equal to the electron charge.
2.
Positive mass equal to the mass of the electron.
3.
An effective mass greater than the effective mass of electron.
4.
Negative mass and positive charge equal to the charge in nucleus.
(A) 1, 2, 3 and 4
(B) 1 and 3 only
(C) 2 and 4 only
(D) 3 and 4 only
When diodes are connected in series to increase voltage rating the Peak Inverse Voltage per junction
(A) Should not exceed half the break down voltage
(B) Should not exceed break down voltage
(C) Should not exceed one third the break down voltage
(D) May be equal or less than break down voltage
Light Dependent register is:
1.
Photo resistive device
2.
Photo voltaic device
3.
Photo emissive device
(A) Only 1
(B) both 1 & 2
(C) both 2 & 3
(D) both 1 & 3
Consider an N-type Silicon semiconductor if the Electric field intensity applied to material is
increased from 2000V/cm to 8000 V/cm then the mobility of free electrons shall multiply by a factor
of:
1
1
1
( A)
( B)
(C )
( D)2
2
4
2
Which of the following statement is not correct?

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Q.10.

Q.11.

Q.12.

Q.13.

Q.14.
Q.15.

(A) In a P+N Junction under reverse bias the magnitude of electric field is always maximum at the
P+N Junction.
(B) In a P+N Junction under reverse bias the magnitude of depletion layer is more towards P+ side
(C) In a P+N Junction under reverse bias the magnitude of depletion layer is more towards N side
(D) P+N Junction diode under reverse bias is not used in Solar cell.
A, diode which is in reverse bias at 3 volt, has a junction capacitance of 20 pF when reverse bias is
increased to 24 volt then junction capacitance becomes 8 pF. The doping profile and contact
potential are:
(A) Linear graded V0 = 1 volt
(B) Linear graded V0 = 2 volt
(C) Step graded V0 = 1 volt
(D) Step graded V0 = 1 volt
A potential difference of 5, volt is applied across a uniform wire of length 50 meter. Calculate drift
velocity of electrons through the wire. If relaxation time is 1014 sec.
(A) 0.176 103 m/s
(B) 0.95 m/s
(C) 1.76 105 m/s
(D) 1.5 106 m/s
As compared to a Full wave rectifier using 2 diodes the four diode bridge rectifier has the dominant
advantage of:
(A) Higher current carrying capacity
(B) Lower Peak Inverse requirement
(C) Lower ripple factor
(D) Higher efficiency
Which of the followings are true about Hall Coefficient RH.
1.
RH value is zero for intrinsic semiconductor
2.
RH value is negative for intrinsic semiconductor
3.
For Extrinsic semiconductor value of RH increase with increase in temperature
4.
For Extrinsic semiconductor value of RH decrease with increase in temperature
(A) 1&2
(B) 2&3
(C) 1&3
(D) 2&4
If Common base DC current gain of a BJT is 0.98 then what is the value of its common collector DC
current gain?
If geometric mean of IDS and IDSS of a N-channel J-FET is unity mA and its pinch-off voltage is -4
volt then what is its trans-conductance gain (gm) in mA/volt is?

Q.16. Assuming VCE set=0.2V and = 50, the minimum base current (IB) required to drive the transistor in
figure to saturation is: (in Micro Amp)
3v
1K

IC

IB

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Q.17. For the transistor shown in figure find the range of VBB for transistor to be in active region??
Given = 100

VBE (cut in) = 0.5 volt VBE (sat) = 0.8 volt

VCE (sat) = 0.2 volt

A. VBB 0.5 volt


B. 0.5 < VBB < 1.76 C.
VBB > 1.76
D. VBB = 1.76
Q.18. An extrinsic semi-conductor sample of cross section A and length L is doped in such a way that
doping concentration varies as ND(x) = N0 exp(-x/L) where N0 is a constant and assume that mobility
() of Majority carriers remains constant.
What is value of resistance (where q is electron charge)
L
L
A.
B.
(exp(1) 1)
(exp(1) 1)
AqN 0
AqN 0
C.

L
(exp(1) 1)
qN 0

D.

L
AqN 0

Q.19. The cut-in voltage of both zener diode Dz and diode D, as shown in figure are 0.7 volt. If break-down
voltage of zener is 3.3 volt and that of Diode D is 50 volt. All other parameters can be assumed to be
same as that of an ideal diode, than value of peak output voltage of are:

A.
B.
C.

3.3 volt in +ve half and 1.4 volt in ve half


4.0 volt in +ve half and 5.0 volt in ve half
3.3 volt in both cycle
D.
4.0 volt in both cycle.

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Q.20. The circuit shown in Figure, best describes as a:


A.
Clamper circuit
B.
Slicer circuit or 2 level clipper
C.
Full wave voltage doubler
D.
Base clipping circuit or bottom clipper

Q.21. In an energy band-diagram of an open circuited P-N, Junction diode, the energy band of N-region
has shifted relative to that of a P-region. (Where V0 is contact potential)
A.
Downward by V0
B.
Downward by qV0
C.
Upward by V0
D.
Upward by qV0
Q.22. In an Intrinsic S.C. The Fermi-level lies 0.3 electron volt, below the conduction band at 300K. If
temperature is increased to 330K. What is new position of Fermi-level.
A.
0.3 eV below conduction band
B.
0.33 eV below conduction band
C.
In the Middle of conduction and Valance band.
D.
Data is insufficient
Q.23. An ideal Ge P- N, Junction diode at 125C has Rev. saturation current of 30 A, and bias voltage
equal to 0.2 volt. If dynamic resistance in forward direction is R1 and that in Reverse direction is R2,
then what is approx ratio of R1 & R2
A.
10-3
B.
10-4
C.
10-5
D.
10-6
Q.24. For the circuit shown in figure diode cut-in voltage is 0.6 volt and voltage drop across a conducting
diode is 0.7 volt. Calculate value of v0 if
D
v1 = v2 = 5 volt
2K
1

v1
v0

D2
2K
v2
18K

A.
4.07 volt
B.
2.035 volt
C.
8.14 volt
D.
3.02 volt
Q.25. An Intrinsic S.C. with energy gap 1ev has a Carrier Concentration N at a temp. of 200 K. If another
intrinsic S.C. has the same value of carrier concentration N at 600K. What is the energy gap value in
eV for the second Semi-conductor?
Q.26. In a uniformly doped Si-junction for zero-bias, if 80% of total space charge region is to be in N
region then what is the value of equilibrium potential in mV at T = 300K. If it is given that majority
carrier in P- region is 1.5 1010/cm3.
Q.27. Electrons in an N-Type Ge have a Mobility of 0.36 m2 V-1 sec-1 at room temperature,
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1
m0, where m0 is the mass of electron.
4
Then calculate the time in pico second between collisions with the lattice??
If effective mass of an electron in the conduction band is

Q.28. Consider a Common-emitter circuit using BJT having I0 = 10-15Amphas collector resistance 6.8 K
and VCC = 10 volt. If IC = 1 mA, then what is the value of output in volt for an input sine wave signal
of 5 mV peak amplitude??
Q.29. A P+ - N Junction has a built in potential of 0.8 volt, if depletion layer width at a R. bias of 1.2 volt
is 2 m. For a Reverse bias of 7.2 volt the width of depletion layer in micro meter will be??
Common data for questions 30&31:
The given Si transistor is biased by fixed-bias circuit, as shown in figure it is given that
VCE =8V and IC = 4 mA

Q.30. If value of is 100, then what is the value of RB in Kilo ohm?


Q.31. If value of is decreased to 40, then what will be the percentage reduction in IC??
Data for linked questions (32 33)
The current I in a forward P+N junction shown in figure is entirely due to diffusion of holes from x = 0 to
x = L. If injected hole concentration distribution in N-region is linear and shown in figure (b) with p(0) =
1012/cm3 and L = 103 cm.
p(0)

p(x)

N
0

x L
0

32.
33.

Calculate current density in diode assuming that diffusion constant of hole is 12 cm2/sec.
(a) 2.8 mA/cm2
(b) 5.6 mA/cm2
(c) 1.9 mA/cm2
(d) 9.5 mA/cm2
Calculate velocity of holes in n-region at x = 0.
(a) 235 cm/sec
(b) 361.5 cm/sec
(c) 503.9 cm/sec
(d) 461.5 cm/sec

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ECE-GATE 2014 Topic Test-EDC solution


1.

(A)

Diffusion capacitance occurs in case of F. bias, Cs


Cs

So here

.I
VT

Depletion capacitance occurs in case of R. bias Cd

where

dQ
dI
.
dV
dV

2Vj 1
1

q Na Nd

Cd d Vj1/2

Total capacitance is sum of diffusion & depletion capacitance.


CTotal = Cdiffusion + Cdepletion
So total capacitance is parallel combination of both diffusion & depletion and not series.
2. (C) GaAS is a direct band gap type S.C, which emits light in IR region.
GaASP is also a direct band gap type S.C. which emits light in Visible region.
For LED S.C. material used must be Direct Band gap type only.
Gama-rays: 0.01nm
X-rays: 0.01nm 10nm
UV-rays : 10nm 380nm
Visible rays: 380nm 700nm
IR: 700 n 1m
Si & Ge also emit small amount of light in IR, region.
ZnS emit light in U.V. region.
T T
3. (A) I0 T2 I0 T1 2 2 1
10

T2 T1 50
T2 50 40 90 C
4. (B)
Silicon schottky diode is a Metal-S.C. Jn diode
In which metal may be Gold or Platinum.
Here Metal is at anode and S.C. is at cathode.
Metal

N-Type

In F. bias Metal is at +ve potential and S.C. is at ve potential.


In R. bias metal is at ve potential and S.C. is at +ve potential.
In F. bias there is no formation of depletion layer and movement of es will occur easily i.e. why it is called
a Hot carrier diode.
In R. bias it is assumed that barrier height is much larger than KT so transportation of es occur over the
barrier by Thermionic emission.
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7


eV
Here equation is J JST exp a 1
KT

*
qbn
JST A T 2 exp

KT
A* is effective Richardson constant.
No depletion layer is formed, so cut in voltage will be very small. Here reverse current is due to thermionic
emission so value of rev. current will have higher value

Where

In Schottky P-N Jn diode cut in voltage: 0.2 1 volt


In Normal P-N Jn diode cut in voltage: 0.15 0.5v
5. (B) Charge on hole is +ve and has magnitude equal to electron charge.
Effective mass of hole is greater than effective mass of electron.
e
*
m*n m*p
m

n p
6. (C) It is decided by practical values.
7. (A) LDR is a photo resistive device.
when sufficient light falls upon a S.C. then

S.C.

New covalent bonds are broken

R
So in case of LDR by falling Light R
Solar cell is an example of photo voltaic device.
LED/LASER diode is an example of photo-emissive device.
8.

E 103 V/cm Const.

(A)

103 V / cm E 104 V / cm E 1/2


E 104 V / cm E 1

This given range of electric field comes in second category.

9.

So

1
E2
4

2
E1
1

1
2

(B)
++
++
P+

N
++

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Electric field is always maxm t Jn of a diode. It may be P-N, Jn or P+N Junction.


If doping is () on one side then depletion layer will be shifted on opposite side.
In P N , doping will be higher on P-side, so magnitude of depletion layer will be more in N-side.
10.
(C)
+
+

+
+
++
++

+
+

Step graded junction

For step graded:


C VR VO

W VR VO

1/2

For linear graded


C VR VO

Linear graded junction

W VR VO

1/3

1/3

For Step-graded:

VR 2 VO
C1

C2
VR1 VO

11.

24 VO
20

8
3 VO

(A)

Vdrift E

VO 1volt

e V
.
m*

e V 1.6 1019
5
.
1014

*
31
m 9 10
50
1.6
Vdrift
103 m / sec
9
12.
(B)
Full wave Rectifier using 2 diode has PIV = 2Vm
Full wave rectifier using 4 diode has PIV = Vm
13.
(D)
Hall Effect is same as for intrinsic or N-Type S.C. RH value is negative for intrinsic S.C.

RH
if T

if T
Vdrift

So

R H in extrinsic S.C. if T

14.

Answer is: 50

For CB, AI

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For CE, A I
For CC, A I 1
0.98 49

So

AI CC 1 1 49 50

15.
16.

Answer is: 0.5


Answer is: 56

IB

Ic

Ic 3 0.2 2.8

mA 56A
50 1 50
17.

B.

For cut-off, VBE (cut-in) = 0.5 volt


For cut-off VBB < 0.5 volt
I
For Saturation, IB > c

VBB 0.8 5 0.2

100
5 100

VBB 0.8 > 0.96 VBB > 1.76


So For Active 0.5 < VBB < 1.76
So

18. B

dR

.dx

1
.dx
nq A

Because n N0 exp( x / L)
R

dR
0

1
. exp( x / L)dx
q AN 0 0

1.L
(exp(1) 1)
Aq N 0

19. B In +ve half Dz will be in break down and Diode D will be ON


SO
v0 = VD + Vz = 0.7 + 3.3 = 4.0 volt
In ve half D will be OFF, SO
10
1 5.0 volt
v0 (Peak) =
2
20. C A voltage doubler consists of 2 diode and 2 capacitors.
21. B

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10

To maintain Fermi level this level always


go down.
22. B

23.C

Just use formula for position of Fermi level .


or use concept that Fermi level position in extrinsic semiconductor shifts towards centre.
rd (F.bias) = 3.36
rd (R.bias) = 0.336 M

4.3 v0 4.3 v0 v0

2
2
18
v
4.3 v0 0
18
v0 4.07 volt

24. A

25.

Answer: 3eV
ni2 A0T 3e( EG / KT )

Acc. To condition T13 .e

EG /KT1

= T23 .e

E1G
KT2

EG = 1ev, T1 = 200 K T2 = 600 K


By calculation, EG1 3ev
Na26. Answer: 36mV
xp0 + xn0 =
P

But xn0 = 0.8


So xp0 = 0.2
But

+
+
+
+

xp0 . Na xn 0 .Nd Na 4 Nd
xp0
But

27.

Nd+

V0

xn0

KT N N
n

2
q
ni

+
d

Answer: 0.5
m
e

since m = 0
m
4

1.6 1019 4
9.11031
9.1 0.36

1012
6.4
0.5 p sec

0.36 =

28.

Answer: 1.36

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IC

VCC VCE
1 mA
RC

10 -VCE = 6.8 VCE = 3.2 volt


v0 VCC VCE 10 3.2
v

0
vi
VT
VT
5mv
v0

So

29.

6.8 5
1.36 volt
25

Answer: 4

VJ V0

1.2 0.8
1/ 2
7.2 0.8

2
1/ 2
2

So value of w2 will be 4
30.
Answer: 580

4
0.04 mA
100
VCC = IBRB + VBE + (IB + IC)Re
32 = 0.04 RB + 0.7 + 4.04 2
IB =

31.

RB = 580 K
Answer: 53

When is changed to ` 40
Then new IC` = 400.047 = 1.88 mA
So IC = 4 1.88 = 2.12
So there will be 53% reduction.
32. C&33.D
Current density J p

qDp ( p0 px )
Lp

1.6 1019 12 1012


103
19.2 104 A/cm2

Jp

Dp / p

KT
q

p 461.54 cm2 /V sec

v p E p 1 461.54 cm/ sec

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