E6420 2f800 - Compal - LA-6592P - r10

A
COMPAL CONFIDENTIAL
MODEL NAME : PAL51/53
PCB NO : LA-6592P (DAA00001V10)
BOM P/N : 43192931L01
GPIO MAP: E3 Master GPIO Map10102010.xlsx
E3 MACALLAN 14" SG
rPGA Sandy Bridge +

FCBGA PCH Cougar Point-M
2011-1-13
REV : 1.0(A00)
@ : Nopop Component
CONN@ : ME controll and stuff by default
MB Type
BOM P/N
TPM EN/ TCM DIS
43192931L01
1@
3@
TPM DIS/ TCM EN
43192931L02
2@
4@
TPM DIS/ TCM DIS
43192931L03
2@
3@
ATG TPM EN/ TCM DIS
43192931L11
1@
3@
ATG TPM DIS/ TCM EN
43192931L12
2@
4@
ATG TPM DIS/ TCM DIS
43192931L13
2@
3@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MB PCB
Part Number
Description
DAA00001V10
PCB 0FE LA-6592P REV0 M/B DIS
Title
Cover Sheet
Size
Rev
1.0
LA-6592P
Date:
Document Number
Thursday, January 13, 2011
Sheet
E
of
75
Block Diagram Compal confidential
Model: PAL51/53
DDRIII-DIMM X2
Memory BUS (DDR3)

LVDS Switch
PI3LVD400ZFEX
LVDS CONN
PAGE 24
iLVDS
PAGE 23
dLVDS
HDMI Repeater
HDMI CONN
PAGE 26
PS121
DPE
PAGE 26
PAGE 40
PAGE 46-51
dVGA
VGA
CRT CONN
PAGE 24
FDI
DMI2
Lane x 8
Lane x 4
INTEL
BT
PAGE 43
Camera
SATA Repeater
MAX4951BE
SATA
USB
Trough eDP Cable
E-SATA
PAGE 39
PAGE 25
SATA5
DOCK LAN
iVGA
Video Switch
MAX14885E
DAI
USB[8,9]
Touch Screen
PAGE 6-11
DPC
DPD
VGA
DOCKING PORT
PAGE 12,13
988 pins
PEG
N12M-NS
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
1066/1333MHz
Sandy Bridge
4MB (Socket 988B)
rPGA CPU
2560
COUGAR POINT-M
USB Port
PAGE 39
BGA
USB Port
PAGE 38
On IO board
iLVDS
2560
2
USB Port
PAGE 14-21
2062
Card reader
SDXC/MMC/MS
PCIE x1
OZ600FJ0LN
PAGE 35
EXPRESS
Card
PCIE5
PCIE2
PAGE 35
PCI Express BUS 100MHz
1/2 Mini Card

Flash
PAGE 37
1/2 Mini Card Full Mini Card

WLAN
WWAN/UWB
PAGE 36
USB10
USB6
PAGE 36
USB4
Smart Card
PAGE 33
CPU XDP Port

PAGE 7
RFID
PAGE 33
PCH XDP Port

PAGE 14
Thermal
PWM FAN
GUARDIAN III
EMC4022
PAGE 22
DOCK LAN
SPI
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
LPC BUS
China TPM1.2
SSX44B
PAGE 36
PAGE 34
PAGE 14
USH TPM1.2
BCM5882
PAGE 28
FP_USB
PAGE 30
HeadPhone &
MIC Jack
DAI
RJ11
BC BUS
on IO board
E-Module
RJ45
on IO board
PAGE 28
USB7
LAN SWITCH
PI3L720 PAGE 32
INT.Speaker
MDC
HDD
PAGE 14
16M 4K sector
PCIE4
SMSC SIO
ECE5028
PAGE 30
W25Q16BVSSIG
PAGE 33,34
Fingerprint
CONN
PAGE 23
HDA Codec
92HD90B2
SATA Repeater
MAX4951BE
W25X64ZE
64M 4K sector
PAGE 33
PAGE 32
SATA
33MHz
USB5
TDA8034HN
Intel Lewisville
82579LM
HD Audio I/F
Option
PCIE1
on IO board
USB Port
PCI Express BUS 100MHz

PCIE3
PAGE 38
To Docking side
Dig.
MIC
PAGE 29
Trough eDP Cable
PAGE 41
SMSC KBC
MEC5055
PAGE 22
WiFi ON/OFF &

Power ON/OFF SW
PAGE 42
PAGE 31
DC/DC Interface
PAGE 44
TP CONN
PAGE 43
LED
KB CONN
PAGE 43

PAGE 45
Title
DIS Block Diagram

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
E
of
75
POWER STATES
Signal
SLP
S3#
SLP
S4#
SLP
S5#
SLP
A#
S0 (Full ON) / M0
HIGH
HIGH
HIGH
HIGH
S3 (Suspend to RAM) / M3
LOW
HIGH
HIGH
S4 (Suspend to DISK) / M3
LOW
LOW
S5 (SOFT OFF) / M3
LOW
S3 (Suspend to RAM) / M-OFF
LOW
State
M
PLANE
SUS
PLANE
RUN
PLANE
ON
ON
ON
ON
HIGH
ON
ON
ON
HIGH
HIGH
ON
ON
LOW
LOW
HIGH
ON
HIGH
HIGH
LOW
ON
ALWAYS
PLANE
USB PORT#
CLOCKS
JUSB2 (Right side 1)
ON
JUSB3 (Right side 2)
OFF
OFF
JESA1 (Right Side ESATA)
OFF
OFF
OFF
JESA1 (Ext Left Side )
ON
OFF
OFF
OFF
WLAN
OFF
ON
OFF
OFF
WWAN
JMINI3(Flash)
USH->BIO
DOCKING
DOCKING
10
Express card
11
Bluetooth
12
Camera
13
LCD Touch
BIO
NA
S4 (Suspend to DISK) / M-OFF
LOW
LOW
HIGH
LOW
ON
OFF
OFF
OFF
OFF
S5 (SOFT OFF) / M-OFF
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
OFF
PCH
PM TABLE
C
power
plane
+15V_ALW
+3.3V_SUS
+5V_RUN
+3.3V_M
+5V_ALW
+1.5V_MEM
+3.3V_RUN
+1.05V_M +1.05V_M
+3.3V_ALW_PCH
+1.8V_RUN
+3.3V_RTC_LDO
+1.5V_RUN
+3.3V_M
(M-OFF)
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
State
DESTINATION
SATA
DESTINATION
SATA 0
HDD
SATA 1
ODD/ E3 Module Bay
SATA 2
NA
SATA 3
NA
ESATA
S0
ON
ON
ON
ON
ON
SATA 4
S3
ON
ON
OFF
ON
OFF
SATA 5
S5 S4/AC
ON
OFF
OFF
ON
OFF
S5 S4/AC don't exist
OFF
OFF
OFF
OFF
OFF
Dock
USH
need to update Power Status and PM Table
PCI EXPRESS
Lane 1
MINI CARD-1 WWAN
Lane 2
MINI CARD-2 WLAN
Lane 3
Express card
Lane 4
E3 Module Bay (USB3)
Connetion
Lane 5
1/2vMINI CARD-3 PCIE
Port C
Dock DP port 2
Lane 6
MMI
Port D
Dock DP port 1
Lane 7
10/100/1G LOM
Port E
MB HDMI Conn
Lane 8
None
DSC DP/HDMI Port
DESTINATION
Title
Index and Config.

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
of
75
EN_INVPWR
FDC654P
Q21
MODC_EN
HDDC_EN
+BL_PWR_SRC
ADAPTER
PGPU_PWR_EN
D
1.05V_VTTPWRGD
+PWR_SRC
ISL95870A
(PU15)
+GPU_CORE
ISL95870AH
(PU13)
+VCC_SA
BATTERY
1.05V_0.8V_PWROK
MAX17411
(PU9)
SI3456BDV
(Q27)
SI3456BDV
(Q30)
+5V_HDD
+5V_MOD
+VCC_GFXCORE
ALWON
CHARGER
+15V_ALW
SN0608098
(PU2)
+5V_ALW
RUN_ON
SI4164DY
(Q50)
+1.5V_MEM
CPU1.5V_S3_GATE
+0.75V_DDR_VTT
NTGS4141N
(Q59)
S13456
(Q54)
SI3456
(Q34)
M_ON
AUX_ON
SI3456
(Q49)
+5V_RUN
RUN_ON
SUS_ON
M_ON
SI3456
(Q38)
PCH_ALW_ON
(PU6)
CPU_VTT_ON
(PU7)
+1.8V_RUN +1.05V_RUN_VTT
RUN_ON
AO4728
(QC3)
SN1003055
NTMS4920
(Q55)
SI3456
(Q58)
B
+1.05V_M
RUN_ON
+VCC_CORE
TPS51311
(PU4)
RUN_ON
0.75V_VR_EN
RT9026GFP
(PU5)
DDR_ON
RT8209BGQW
(PU3)
1.05V_0.8V_PWROK
MAX17411
(PU9)
SN1003055
AUX_EN_WOWL
+3.3V_ALW
+3.3V_WLAN
+3.3V_ALW_PCH
+3.3V_SUS
+3.3V_LAN
+3.3V_RUN
+3.3V_M
Pop option
+1.0V_LAN
Pop option
+3.3V_M
SI4164
(Q63)
+0.8V_VCCSA
+1.5V_CPU_VDDQ
+1.05V_RUN
+1.5V_RUN

Title
Power Rail
Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
of
75
@ 2.2K
SMBUS Address [0x9a]
+3.3V_ALW_PCH
@ 2.2K
H14
MEM_SMBCLK
C9
MEM_SMBDATA
202
2N7002
200
DIMMA
SMBUS Address [A0]
DIMMB
SMBUS Address [A4]
2N7002
2.2K
PCH
D
202
+3.3V_LAN
2.2K
C8
G12
M16
28
LAN_SMBDATA
31
200
53
SML1_SMBCLK
A5
SMBUS Address [C8]
LOM
E14
SML1_SMBDATA
3A
LAN_SMBCLK
2.2K
53
3A
2.2K
B4
DOCK_SMB_CLK
A3
DOCK_SMB_DAT
+3.3V_ALW
SMBUS Address
127
129
DOCKING
2.2K
C
2.2K
1B
1B
XDP2
51
2.2K
1A
SMBUS Address [TBD]
+3.3V_ALW_PCH
B6
1A
XDP1
51
2.2K
SMBUS Address [TBD]
2.2K
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
2.2K
+3.3V_RUN
14
13
G Sensor
SMBUS Address [0x3B]
+3.3V_ALW
30
B5
LCD_SMBCLK
A4
LCD_SMDATA
WWAN
32
SMBUS Address [TBD]
2.2K
KBC
2.2K
1C
1C
A56
B59
PBAT_SMBCLK
PBAT_SMBDAT
+3.3V_ALW
100 ohm
100 ohm
BATTERY
CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
2.2K
2.2K
+3.3V_ALW
USH_SMBCLK
M9
1E
A50
B53
USH_SMBDAT
L9
1E
B
2.2K
2.2K
MEC 5055
2B
A49
CARD_SMBCLK
2B
B52
CARD_SMBDAT
+3.3V_SUS
7
8
Express card
SMBUS Address [TBD]
2.2K
2.2K
CHARGER_SMBCLK
10
A47
CHARGER_SMBDAT
1G
1G
+3.3V_ALW
B50
Charger
SMBUS Address [0x12]
2.2K
2.2K
2D
B7
BAY_SMBDAT
2D
A7
BAY_SMBCLK
+3.3V_ALW
29
30
E3 Module Bay
SMBUS Address [0xd2]
2.2K
2.2K
2A
2A
+3.3V_RUN
B49
GPU_SMBCLK
B48
GPU_SMBDAT

GPU
Title
SMBUS Address [0xXX]
SMBUS TOPOLOGY
Size
Document Number
Rev
1.0
LA-6592P
Date:
5
Sheet
1
of
75
JCPU1I
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
JCPU1A
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
B28
B26
A24
B23
16
16
16
16
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
16
16
16
16
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
G21
E22
F21
D21
16
16
16
16
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
G22
D22
F20
C21
16
16
16
16
16
16
16
16
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
16
16
16
16
16
16
16
16
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
A22
G19
E20
G18
B20
C19
D19
F17
FDI_FSYNC0
FDI_FSYNC1
J18
J17
16 FDI_FSYNC0
16 FDI_FSYNC1
16 FDI_INT
16 FDI_LSYNC0
16 FDI_LSYNC1
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
A21
H19
E19
F18
B21
C20
D18
E17
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI_INT
H20
FDI_LSYNC0
FDI_LSYNC1
J19
H17
DMI
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
(1) EDP_COMPIO use 4mil trace to RC1

(2) EDP_ICOMPO use 12mil to RC1
A18
A17
B16
C15
D15
C17
F16
C16
G15
B
C18
E16
D16
F15
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP
EDP_COMP
J22
J21
H22
PEG_COMP
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
PEG_CRX_GTX_N0
PEG_CRX_GTX_N1
PEG_CRX_GTX_N2
PEG_CRX_GTX_N3
PEG_CRX_GTX_N4
PEG_CRX_GTX_N5
PEG_CRX_GTX_N6
PEG_CRX_GTX_N7
PEG_CRX_GTX_N8
PEG_CRX_GTX_N9
PEG_CRX_GTX_N10
PEG_CRX_GTX_N11
PEG_CRX_GTX_N12
PEG_CRX_GTX_N13
PEG_CRX_GTX_N14
PEG_CRX_GTX_N15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
PEG_CRX_GTX_P0
PEG_CRX_GTX_P1
PEG_CRX_GTX_P2
PEG_CRX_GTX_P3
PEG_CRX_GTX_P4
PEG_CRX_GTX_P5
PEG_CRX_GTX_P6
PEG_CRX_GTX_P7
PEG_CRX_GTX_P8
PEG_CRX_GTX_P9
PEG_CRX_GTX_P10
PEG_CRX_GTX_P11
PEG_CRX_GTX_P12
PEG_CRX_GTX_P13
PEG_CRX_GTX_P14
PEG_CRX_GTX_P15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_N15
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_P15
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
PCI EXPRESS* - GRAPHICS
16
16
16
16
B27
B25
A25
B24
Intel(R) FDI
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_CRX_GTX_N[0..15] 46
PEG_CRX_GTX_P[0..15] 46
Sandy Bridge_rPGA_Rev1p0
PEG Compensation
DP Compensation
+1.05V_RUN_VTT
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_P[0..15] 46
PEG_CTX_GRX_N[0..15] 46
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N0
CC49 2
CC33 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P0
PEG_CTX_GRX_N0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_N1
CC50 2
CC34 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N2
CC51 2
CC35 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P2
PEG_CTX_GRX_N2
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_N3
CC52 2
CC36 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P3
PEG_CTX_GRX_N3
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N4
CC53 2
CC37 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P4
PEG_CTX_GRX_N4
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_N5
CC54 2
CC38 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P5
PEG_CTX_GRX_N5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_N6
CC55 2
CC39 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P6
PEG_CTX_GRX_N6
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_N7
CC56 2
CC40 2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CTX_GRX_P7
PEG_CTX_GRX_N7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_N8
CC57 1
CC41 1
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P8
PEG_CTX_GRX_N8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N9
CC58 1
CC42 1
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P9
PEG_CTX_GRX_N9
PEG_CTX_GRX_C_P10 CC59 1
PEG_CTX_GRX_C_N10 CC43 1
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P10
PEG_CTX_GRX_N10
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P11
PEG_CTX_GRX_N11
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P12
PEG_CTX_GRX_N12
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P13
PEG_CTX_GRX_N13
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P14
PEG_CTX_GRX_N14
2 0.22U_0402_16V7K~D
2 0.22U_0402_16V7K~D
PEG_CTX_GRX_P15
PEG_CTX_GRX_N15
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS
+1.05V_RUN_VTT
PEG_CTX_GRX_P[0..15]
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
RC2
24.9_0402_1%~D
RC1
24.9_0402_1%~D
PEG_COMP
EDP_COMP
eDP_COMPIO and ICOMPO signals should be shorted near

balls and routed with typical impedance <25 mohms
PEG_ICOMPI and RCOMPO signals should be shorted and routed

with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
Title
Sandy Bridge (1/6)

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
of
75
Follow DG Rev0.71 SM_DRAMPWROK topology
+1.5V_CPU_VDDQ
+1.05V_RUN_VTT
+3.3V_ALW_PCH
2
2
D
SYS_PWROK_XDP
RC64
39_0402_5%~D
+1.05V_RUN_VTT
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
9
9
CFG10
CFG11
CFG10
CFG11
XDP_OBS4
XDP_OBS5
The resistor for HOOK2 should beplaced

such that the stub is very small on CFG0 net
H_CPUPWRGD
1
RC51
@ RC6
1
RC71
@ RC9
1
RC1251
RC127
14,16 SIO_PWRBTN#_R
CFG0
+1.05V_RUN_VTT
12,13,14,15,28,36 DDR_XDP_WAN_SMBDAT
12,13,14,15,28,36 DDR_XDP_WAN_SMBCLK
H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
62_0402_5%~D
2 H_THERMTRIP#_R AN32
0_0402_5%~D
CLOCKS
@ RC13 1
@ RC15 1
2 0_0402_5%~D
2 0_0402_5%~D
DPLL_REF_CLK
DPLL_REF_CLK#
A16
A15
CPU_DPLL @ RC16 1
CPU_DPLL# @RC17 1
2 0_0402_5%~D
2 0_0402_5%~D
CLK_CPU_DMI 15
CLK_CPU_DMI# 15
XDP_RST#_R
1
@ RC48
@RC48
PROCHOT#
Max 500mils
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
AK1
A5
A4
SM_RCOMP2 --> 15mil

SM_RCOMP1/0 --> 20mil
THERMTRIP#
1
@ RC25
VCCPWRGOOD_0_R
0_0402_5%~D
AP33
PM_DRAM_PWRGD_CPU
PCH_PLTRST#_R
V8
AR33
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
JTAG & BPM
18 H_CPUPWRGD
PM_SYNC
PWR MANAGEMENT
AM34
TCK
TMS
TRST#
TDI
TDO
AP29
AP27
XDP_PRDY#
XDP_PREQ#
AR26
AR27
AP30
XDP_TCLK
XDP_TMS
XDP_TRST#
AR28
AP26
XDP_TDI_R
XDP_TDO_R
CFG16
CFG17
9
9
CFG0
CFG1
CFG0
CFG1
9
9
CFG2
CFG3
CFG2
CFG3
9
9
CFG8
CFG9
CFG8
CFG9
9
9
CFG4
CFG5
CFG4
CFG5
9
9
CFG6
CFG7
CFG6
CFG7
9
9
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
1
1K_0402_5%~D
1
RH107
1
@ RH106
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
PLTRST_XDP# 17
C
2
0_0402_5%~D
2
0_0402_5%~D
CLK_CPU_ITP 15
CLK_CPU_ITP# 15
9 CLK_XDP_ITP
9 CLK_XDP_ITP#
1
@ RH109
1
@ RH108
2
0_0402_5%~D
2
0_0402_5%~D
1
CC177
0.047U_0402_16V4Z~D
1
@ RC46
1
@RC47
@
RC47
15 DDR_HVREF_RST_PCH
42 DDR_HVREF_RST_GATE
2
0_0402_5%~D
2
0_0402_5%~D
PU/PD for JTAG signals

+3.3V_RUN
XDP_DBRESET#
2
RC19
DBR#
DDR3_DRAMRST# 12
QC2
BSS138W-7-F_SOT323-3~D
DDR_HVREF_RST
2
PRDY#
PREQ#
H_PM_SYNC
RC50
4.99K_0402_1%~D
place RC129 near CPU
16 H_PM_SYNC
CLK_XDP
2
0_0402_5%~D
SM_DRAMRST#
DDR3_DRAMRST#_CPU
R8
CFG16
CFG17
CLK_CPU_DPLL 15
CLK_CPU_DPLL# 15
CLK_XDP#
PECI
2
RC8
CATERR#
Close to JCBU1
1
@ RC129
CPU_DMI
CPU_DMI#
AL32
A28
A27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
SAMTE_BSH-030-01-L-D-A
H_PROCHOT#_R
56_0402_5%~D
BCLK
BCLK#
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
1
RC57
22 H_THERMTRIP#
DDR_XDP_WAN_SMBDAT_R1
DDR_XDP_WAN_SMBCLK_R1
AN33
H_PECI
42,58,60 H_PROCHOT#
AL33
SKTOCC#
DDR3
MISC
H_CATERR#
PROC_SELECT#
MISC
AN34
41 CPU_DETECT#
18
XDP_HOOK2
SYS_PWROK_XDP
Keep R1132, R1133, R1136-R119

for slew rate control.
JCPU1B
C26
C
H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP
XDP_TCLK
THERMAL
1
@ RC126
1
@ RC128
1
RC44
16,41 SYS_PWROK
XDP_OBS6
XDP_OBS7
2
2 1K_0402_5%~D
0_0402_5%~D
2
2 1K_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
+1.05V_RUN_VTT
@JXDP1
@
JXDP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
XDP_PREQ#
XDP_PRDY#
Place near JXDP1
QC1
SSM3K7002FU_SC70-3~D
2
G
11,44 RUN_ON_CPU1.5VS3#
@ RC124
1K_0402_5%~D
2 PM_DRAM_PWRGD_CPU
130_0402_5%~D
1
RC28
74AHC1G09GW_TSSOP5~D
16 PM_DRAM_PWRGD
RUNPWROK_AND
1 1
+3.3V_ALW_PCH
2
200_0402_5%~D
1
RC18
UC2
1 B
41,42 RUNPWROK
RC12
200_0402_5%~D
CC66
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC1561
2
CC65
0.1U_0402_16V4Z~D
+3.3V_ALW_PCH
AL35
XDP_DBRESET#_R
2
@ RC26
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
2
2
2
2
2
2
2
2
@ RC30
@ RC31
@ RC33
@ RC34
@ RC36
@ RC37
@ RC38
@ RC39
1
1
1
1
1
1
1
1
XDP_DBRESET#
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
XDP_DBRESET# 14,16
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
XDP_TDI_R
1
1K_0402_5%~D
+1.05V_RUN_VTT
XDP_TDI
2
0_0402_5%~D
1
@ RC23
XDP_TDO_R
1
@ RC24
XDP_TDO
2
0_0402_5%~D
For ESD concern, please put near CPU
XDP_TMS
RC27 2
1 51_0402_1%~D
XDP_TDI_R
RC29 2
1 51_0402_1%~D
XDP_PREQ# @ RC32 2
1 51_0402_1%~D
XDP_TDO
RC35 2
1 51_0402_1%~D
XDP_TCLK
RC40 2
XDP_TRST#
RC41 2
51_0402_1%~D
51_0402_1%~D
PCH_PLTRST#_BUF
1
2
1
2

@ RC11
0_0402_5%~D
2
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
Avoid stub in the PWRGD path

while placing resistors RC25 & RC130
1
2
2 PCH_PLTRST#_R
43_0402_5%~D
1
1
RC10
5
P
RC45
200_0402_1%~D
NC
RC43
25.5_0402_1%~D
RC42
140_0402_1%~D
1
14,17 PCH_PLTRST#
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
RC130
10K_0402_5%~D
RC4
75_0402_1%~D
2
UC1
CC140
0.1U_0402_16V4Z~D
VCCPWRGOOD_0_R
+1.05V_RUN_VTT
+3.3V_RUN
Buffered reset to CPU
Title
Sandy Bridge (2/6)

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
of
75
JCPU1D
JCPU1C
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
12 DDR_A_BS0
12 DDR_A_BS1
12 DDR_A_BS2
12 DDR_A_CAS#
12 DDR_A_RAS#
12 DDR_A_WE#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AE10
AF10
V6
SA_BS[0]
SA_BS[1]
SA_BS[2]
AE8
AD9
AF9
SA_CAS#
SA_RAS#
SA_WE#
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
AB6
AA6
V9
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
AA5
AB5
V10
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
AB4
AA4
W9
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
AB3
AA3
W10
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
AK3
AL3
AG1
AH1
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
AH3
AG3
AG2
AH2
M_ODT0
M_ODT1
C4
G6
J3
M6
AL6
AM8
AR12
AM15
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
D4
F6
K3
N6
AL5
AM9
AR11
AM14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
13 DDR_B_D[0..63]
M_CLK_DDR0 12
M_CLK_DDR#0 12
DDR_CKE0_DIMMA 12
M_CLK_DDR1 12
M_CLK_DDR#1 12
DDR_CKE1_DIMMA 12
DDR_CS0_DIMMA# 12
DDR_CS1_DIMMA# 12
M_ODT0
M_ODT1
12
12
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
12
12
DDR_A_MA[0..15] 12
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
13 DDR_B_BS0
13 DDR_B_BS1
13 DDR_B_BS2
13 DDR_B_CAS#
13 DDR_B_RAS#
13 DDR_B_WE#
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AA9
AA7
R6
SB_BS[0]
SB_BS[1]
SB_BS[2]
AA10
AB8
AB9
SB_CAS#
SB_RAS#
SB_WE#
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
DDR SYSTEM MEMORY B
12 DDR_A_D[0..63]
DDR SYSTEM MEMORY A
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
AE2
AD2
R9
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
AE1
AD1
R10
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
AB2
AA2
T9
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
AA1
AB1
T10
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
AD3
AE3
AD6
AE6
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
AE4
AD4
AD5
AE5
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D7
F3
K6
N3
AN5
AP9
AK12
AP15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
C7
G3
J6
M3
AN6
AP8
AK11
AP14
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
M_CLK_DDR2 13
M_CLK_DDR#2 13
DDR_CKE2_DIMMB 13
M_CLK_DDR3 13
M_CLK_DDR#3 13
DDR_CKE3_DIMMB 13
DDR_CS2_DIMMB# 13
DDR_CS3_DIMMB# 13
M_ODT2
M_ODT3
13
13
DDR_B_DQS#[0..7]
13
DDR_B_DQS[0..7]
13
DDR_B_MA[0..15] 13
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
Title
Sandy Bridge (3/6)

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
of
75
CFG Straps for Processor
CFG2
JCPU1E
RSVD1
2
49.9_0402_1%~D
1
@RC122
@
RC122
7
7
CFG16
CFG17
+VCC_CORE
RSVD1
RSVD2
RSVD3
RSVD4
@RC120
@
RC120
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
AJ31
AH31
AJ33
AH33
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
AJ26
RSVD5
+DIMM0_1_VREF_CPU B4
+DIMM0_1_CA_CPU D1
RSVD6
RSVD7
RSVD3
2
49.9_0402_1%~D
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
L7
AG7
AE7
AK2
W8
@ T1
@ T2
@ T3
@ T4
@ T5
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
RSVD33
RSVD34
RSVD35
AT26
AM33
AJ27
@ T6
@ T7
@ T8
PAD~D
PAD~D
PAD~D
RSVD37
RSVD38
RSVD39
RSVD40
T8
J16
H16
G16
@ T11
@ T13
@ T15
@ T16
PAD~D
PAD~D
PAD~D
PAD~D
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
AR35
AT34
AT33
AP35
AR34
@ T17
@ T18
@ T19
@ T20
@ T21
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
CFG4
@ RC52
1K_0402_5%~D
follow DG0.9 change to 1Kohm 5%
Display Port Presence Strap
1
@RC96
@
RC96
1
@RC97
@
RC97
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
@ T28
@ T29
@ T30
@ T31
@ T33
@ T35
@ T36
@ T37
@ T38
@ T40
@ T41
@ T42
@ T43
@ T44
@ T45
@ T46
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
@ T47
@ T48
@ T155
PAD~D
PAD~D
PAD~D
J20
B18
A19
@ T52
PAD~D
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
CFG4
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
@ T23
@ T24
@ T25
@ T26
@ T27
B34
A33
A34
B35
C35
1 : Disabled; No Physical Display Port

attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
CFG6
CFG5
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
AJ32
AK32
@ T32 PAD~D
@ T34 PAD~D
AH27
@ T39 PAD~D
1
@RC121
@
RC121
@ T22 PAD~D
@ RC54
1K_0402_5%~D
AN35
AM35
@ RC53
1K_0402_5%~D
RSVD2
2
49.9_0402_1%~D
RSVD4
2
49.9_0402_1%~D
+DIMM0_1_VREF_CPU
2
1K_0402_5%~D
+DIMM0_1_CA_CPU
2
1K_0402_5%~D
RESERVED
@RC123
@
RC123
1:(Default) Normal Operation; Lane #

definition matches socket pin map definition
0:Lane Reversed
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
+VCC_GFXCORE
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
PAD~D
PAD~D
PAD~D
PAD~D
7
7
7
7
7
7
7
7
7
7
7
7
@ T9
@ T10
@ T12
@ T14
@RC51
@
RC51
1K_0402_5%~D
CLK_XDP_ITP 7
CLK_XDP_ITP# 7
PCIE Port Bifurcation Straps

RSVD24
RSVD25
VCCIO_SEL
J15
RSVD56
RSVD57
RSVD58
AT2
AT1
AR1
@ T49 PAD~D
@ T50 PAD~D
@ T51 PAD~D
B1
@ T53 PAD~D
11: (Default) x16 - Device 1 functions 1 and 2 disabled

CFG[6:5]
RSVD27
KEY
10: x8, x8 - Device 1 function 1 enabled ; function 2

disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG7
1
@ RC56
1K_0402_5%~D
PEG DEFER TRAINING
CFG7
1: (Default) PEG Train immediately

following xxRESETB de assertion
0: PEG Wait for BIOS for training
Title
Sandy Bridge (4/6)

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
of
75
JCPU1F
POWER
+1.05V_RUN_VTT
+VCC_CORE
+VCC_CORE
CC120
CC121
CC122
CC123
CC124
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D
2
2
2
2
2
CC125
22U_0805_6.3VAM~D
+VCC_CORE
1
+
1
+ @CC130
470U_D2_2V-M~D
CC129
470U_D2_2V-M~D
2 3
2 3
+
2 3
+ @CC133
470U_D2_2V-M~D
2 3
2 3
1
CC131
470U_D2_2V-M~D
CC132
470U_D2_2V-M~D
2 3
CC134
470U_D2_2V-M~D
+1.05V_RUN_VTT
1
PEG AND DDR
Note: Place the PU resistors close to CPU

R1555 close to CPU 300 - 1500mils
2
RC60
75_0402_1%~D
H_CPU_SVIDALRT#
1
RC61
2
43_0402_5%~D
VIDALERT_N
58
+1.05V_RUN_VTT
CAD Note: Place the PU

resistors close to CPU
R1558 close to CPU 300 - 1500mils
RC63
130_0402_1%~D
VIDALERT#
VIDSCLK
VIDSOUT
AJ29
AJ30
AJ28
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VIDSCLK
58
VIDSOUT
Iccmax current changed for PDDG Rev0.7
58
CPU Power Rail Table

SVID note: VIDALERT# trace
routing need to be routed between
VIDSCLK and VIDSOUT signals
Voltage Rail
Voltage
VCC
0.65-1.3
VCCIO
+VCC_CORE
RC66
100_0402_1%~D
Place RC66, RC70near CPU
VCC_SENSE
VSS_SENSE
AJ35
AJ34
S0 Iccmax
Current (A)
8.5
0.0-1.1
26
VCCPLL
1.8
VDDQ
1.5
VCCSA
VCCSENSE_R
1
VSSSENSE_R @ RC67 1
@ RC68
2
2 0_0402_5%~D
0_0402_5%~D
VTT_SENSE_R
1
VSSIO_SENSE_R @ RC1321
@ RC133
2
2 0_0402_5%~D
0_0402_5%~D
VCCSENSE
VSSSENSE
VCCIO_SENSE
VSSIO_SENSE
B10
A10
VTT_SENSE
VTT_GND
RC70
100_0402_1%~D
57
57
58
58
0.65-0.9
+1.5V_MEM
1.5
12-16
Description
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
A
Title
Sandy Bridge (5/6)

Size
Document Number
Rev
1.0
LA-6592P
Date:
53
1.05
VAXG
J23
CC115
CC116
CC117
CC118
CC119
2
2
2
2
2
VCCIO40
SVID
SENSE LINES
CC86
22U_0805_6.3VAM~D
CC70
22U_0805_6.3VAM~D
CC85
22U_0805_6.3VAM~D
CC110
CC111
CC112
CC113
CC114
2
2
2
2
2
CC109
330U_D2_2VM_R6M~D
1
C
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
CC108
330U_D2_2VM_R6M~D
+VCC_CORE
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
CC107
330U_D2_2VM_R6M~D
CC73
10U_0805_4VAM~D
@ CC93
22U_0805_6.3VAM~D
CC84
22U_0805_6.3VAM~D
1
CC88
10U_0805_4VAM~D
@ CC92
22U_0805_6.3VAM~D
CC77
10U_0805_4VAM~D
CC83
22U_0805_6.3VAM~D
1
CC72
10U_0805_4VAM~D
@ CC91
22U_0805_6.3VAM~D
CC76
10U_0805_4VAM~D
CC82
22U_0805_6.3VAM~D
1
CC71
10U_0805_4VAM~D
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
@ CC90
22U_0805_6.3VAM~D
CC68
10U_0805_4VAM~D
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
CC81
22U_0805_6.3VAM~D
1
CC87
10U_0805_4VAM~D
8.5A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
CC89
22U_0805_6.3VAM~D
CC75
10U_0805_4VAM~D
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
CC80
22U_0805_6.3VAM~D
CC79
22U_0805_6.3VAM~D
CC67
10U_0805_4VAM~D
CC69
22U_0805_6.3VAM~D
CC78
22U_0805_6.3VAM~D
CORE SUPPLY
53AAG35
1
Sheet
1
10
of
75
+1.5V_CPU_VDDQ Source
4
2
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3#
QC4B
DMN66D0LDW-7_SOT363-6~D
4
+1.5V_CPU_VDDQ
1
2
3
@ RC73
20K_0402_5%~D
8
7
6
5
CC135
10U_0805_6.3V6M~D
RC72
100K_0402_5%~D
RC74
100K_0402_5%~D
QC3
AO4728L_SO8~D
+15V_ALW
1
+3.3V_ALW2
+1.5V_MEM
JCPU1H
1
CC136
4700P_0402_25V7K~D
+V_DDR_REF
3
1
QC4A
2
1
2
0_0402_5%~D
1
@ RC79
42 CPU1.5V_S3_GATE
2
0_0402_5%~D
1
@ RC134
VREF
SM_VREF
1 0.1U_0402_10V7K~D
CC1792
1 0.1U_0402_10V7K~D
CC1492
1 0.1U_0402_10V7K~D
CC1502
1 0.1U_0402_10V7K~D
AL1
+V_SM_VREF should
have 10 mil trace width
@ CC171
10U_0603_6.3V6M~D
CC170
10U_0805_4VAM~D
M27
M26
L26
J26
J25
J24
H26
H25
VCCSA_SENSE
1
+
2
PAD-OPEN 4x4m
C22
C24
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
1
+
CC172
330U_D2_2VM_R6M~D
2
0_0402_5%~D
+GND_VCC_SA 61
+VCCSA_SENSE 61
1
@ RC138
H_FC_C22
2
0_0402_5%~D
VCCSA_VID_1 61
RC83
10K_0402_5%~D
FC_C22
VCCSA_VID1
+VCC_SA
H23
DDR3 -1.5V RAILS
6A
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
CC169
10U_0805_4VAM~D
SA RAIL
CC167
330U_D2_2VM_R6M~D
CC166
10U_0805_4VAM~D
1
@ RC137
MISC
+1.5V_MEM
@ PJP2
1
CC165
10U_0805_4VAM~D
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
5A
CC164
10U_0805_4VAM~D
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
PAD-OPEN 4x4m
CC163
10U_0805_4VAM~D
VCCPLL1
VCCPLL2
VCCPLL3
CC168
10U_0805_4VAM~D
+
2
CC1782
+V_SM_VREF_CNT
CC162
10U_0805_4VAM~D
CC176
330U_D2_2.5VM_R6M~D
CC175
1U_0402_6.3V6K~D
CC174
1U_0402_6.3V6K~D
2
A
CC173
10U_0805_4VAM~D
B6
A6
A2
VCC_AXG_SENSE 58
VSS_AXG_SENSE 58
@ PJP1
3A
+1.8V_RUN
AK35
AK34
CC161
10U_0805_4VAM~D
VAXG_SENSE
VSSAXG_SENSE
+1.5V_CPU_VDDQ
GRAPHICS
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
1.8V RAIL
CC148
22U_0805_6.3VAM~D
CC139
22U_0805_6.3VAM~D
CC147
22U_0805_6.3VAM~D
CC146
22U_0805_6.3VAM~D
CC153
22U_0805_6.3VAM~D
CC145
22U_0805_6.3VAM~D
CC152
22U_0805_6.3VAM~D
CC141
22U_0805_6.3VAM~D
CC151
22U_0805_6.3VAM~D
CC144
22U_0805_6.3VAM~D
CC138
22U_0805_6.3VAM~D
CC137
22U_0805_6.3VAM~D
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
SENSE
LINES
JCPU1G
26A
2
0_0402_5%~D
RUN_ON_CPU1.5VS3
POWER
+VCC_GFXCORE
RC78
100K_0402_5%~D
RUN_ON_CPU1.5VS3# 7,44
1
@ RC77
37,41,44,55,63 RUN_ON
+V_SM_VREF_CNT
QC5
NTR4503NT1G_SOT23-3~D
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
Title
Sandy Bridge (6/6)

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
11
of
75
+DIMM0_1_VREF_CPU
+DIMM0_1_VREF_DQ
2
0_0402_5%~D
2
0_0402_5%~D
All VREF traces should

8 DDR_A_D[0..63]
D
CD2
0.1U_0402_16V4Z~D
8 DDR_A_DQS#[0..7]
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
8 DDR_A_DQS[0..7]
Populate RD1 for Intel DDR3

VREFDQ multiple methods M1
8 DDR_A_MA[0..15]
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
Layout Note:
Place near JDIMMA
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
+1.5V_MEM
DDR_A_D26
DDR_A_D27
CD6
1U_0402_6.3V6K~D
CD5
1U_0402_6.3V6K~D
CD4
1U_0402_6.3V6K~D
CD3
1U_0402_6.3V6K~D
8 DDR_CKE0_DIMMA
8
DDR_A_BS2
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
+1.5V_MEM
DDR_A_MA3
DDR_A_MA1
+
2
8 M_CLK_DDR0
8 M_CLK_DDR#0
CD14
330U_SX_2VY~D
@ CD13
10U_0603_6.3V6M~D
CD12
10U_0603_6.3V6M~D
CD11
10U_0603_6.3V6M~D
CD10
10U_0603_6.3V6M~D
CD9
10U_0603_6.3V6M~D
CD8
10U_0603_6.3V6M~D
CD7
10U_0603_6.3V6M~D
DDR_A_BS0
8
8
DDR_A_WE#
DDR_A_CAS#
8 DDR_CS1_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D40
DDR_A_D41
B
+0.75V_DDR_VTT
DDR_A_D42
DDR_A_D43
CD20
1U_0402_6.3V6K~D
CD19
1U_0402_6.3V6K~D
CD18
1U_0402_6.3V6K~D
CD17
1U_0402_6.3V6K~D
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
RD21
CD22
2.2U_0603_6.3V6K~D
CD21
0.1U_0402_16V4Z~D
1
RD3
2 10K_0402_5%~D
+3.3V_RUN
2
10K_0402_5%~D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
+0.75V_DDR_VTT
205
GND1
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
JDIMMA H=5.2
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
+1.5V_MEM
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
RD27
1K_0402_1%~D
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
13 DDR3_DRAMRST#_R
DDR3_DRAMRST#_R 1
RD28
2
1K_0402_1%~D
DDR3_DRAMRST# 7
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 8
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
C
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
M_CLK_DDR1 8
M_CLK_DDR#1 8
DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 8
M_ODT0
8
+DIMM0_1_VREF_CA
M_ODT1
8
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
CD16
0.1U_0402_16V4Z~D
DDR_A_D34
DDR_A_D35
CD15
DDR_A_DQS#4
DDR_A_DQS4
Layout Note:
Place near JDIMMA.203,204
+1.5V_MEM
2.2U_0603_6.3V6K~D
DDR_A_D32
DDR_A_D33
+1.5V_MEM
JDIMM1
CD1
2.2U_0603_6.3V6K~D
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
1
@ RD1
1
@ RD7
+V_DDR_REF
1
@ RD29
2
0_0402_5%~D
1
@ RD31
2
0_0402_5%~D
+V_DDR_REF
+DIMM0_1_CA_CPU
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DDR_XDP_WAN_SMBDAT 7,13,14,15,28,36
DDR_XDP_WAN_SMBCLK 7,13,14,15,28,36
+0.75V_DDR_VTT
206
FOX_AS0A626-U4SN-7F
CONN@
change footprint.
Title
DDRIII-SODIMM SLOT1
Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
12
of
75
+DIMM0_1_VREF_DQ
All VREF traces should

8 DDR_B_MA[0..15]
DDR_B_D0
DDR_B_D1
CD24
0.1U_0402_16V4Z~D
Populate RD4 for Intel DDR3

VREFDQ multiple methods M1
CD23
2.2U_0603_6.3V6K~D
8 DDR_B_DQS[0..7]
D
+1.5V_MEM
JDIMM2
8 DDR_B_DQS#[0..7]
8 DDR_B_D[0..63]
+1.5V_MEM
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
Layout Note:
Place near JDIMMB
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDR_B_D4
DDR_B_D5
JDIMMB H=9.2
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
DDR3_DRAMRST#_R 12
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
+1.5V_MEM
DDR_CKE2_DIMMB
8 DDR_CKE2_DIMMB
CD28
1U_0402_6.3V6K~D
CD27
1U_0402_6.3V6K~D
CD26
1U_0402_6.3V6K~D
CD25
1U_0402_6.3V6K~D
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
1
+
2
CD36
330U_SX_2VY~D
DDR_B_BS0
8
8
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
8 DDR_CS3_DIMMB#
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
B
DDR_B_D40
DDR_B_D41
Layout Note:
Place near JDIMMB.203,204
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
+0.75V_DDR_VTT
DDR_B_D50
DDR_B_D51
CD42
1U_0402_6.3V6K~D
CD41
1U_0402_6.3V6K~D
CD40
1U_0402_6.3V6K~D
CD39
1U_0402_6.3V6K~D
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
+3.3V_RUN
1
10K_0402_5%~D
CD44
2.2U_0603_6.3V6K~D
+0.75V_DDR_VTT
CD43
0.1U_0402_16V4Z~D
RD6
10K_0402_5%~D
2
RD5
+3.3V_RUN
205
GND1
GND2
206
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 8
DDR_B_MA15
DDR_B_MA14
C
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
M_CLK_DDR3 8
M_CLK_DDR#3 8
DDR_B_BS1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 8
M_ODT2
8
+DIMM0_1_VREF_CA
M_ODT3
8
DDR_B_D36
DDR_B_D37
1
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+0.75V_DDR_VTT
FOX_AS0A626-U8SN-7F
CONN@
Title
DDRIII-SODIMM SLOT2
Size
Document Number
Rev
1.0
LA-6592P
Date:
CD38
0.1U_0402_16V4Z~D
DDR_B_D32
DDR_B_D33
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
CD37
2.2U_0603_6.3V6K~D
@ CD35
10U_0603_6.3V6M~D
CD34
10U_0603_6.3V6M~D
CD33
10U_0603_6.3V6M~D
CD32
10U_0603_6.3V6M~D
CD31
10U_0603_6.3V6M~D
CD30
10U_0603_6.3V6M~D
CD29
10U_0603_6.3V6M~D
M_CLK_DDR2
M_CLK_DDR#2
8 M_CLK_DDR2
8 M_CLK_DDR#2
+1.5V_MEM
DDR_B_BS2
DDR_B_BS2
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
Sheet
1
13
of
75
ME_CLR1 TPM setting

Clear ME RTC Registers
Open
Keep ME RTC Registers
RH66
1K_0402_5%~D
HDD_DET#_R
BBS_BIT0_R
Shunt
+RTC_CELL
18
GPIO36
18
GPIO37
18 EN_ESATA_RPTR#
18,41 TEMP_ALERT#
18 PCH_GPIO15
18 SIO_EXT_SCI#_R
PCH_AZ_SYNC
@ RH282
100K_0402_5%~D
@ RH24
+3.3V_ALW_PCH
1
3
5
7
1
XDP_FN0
9
XDP_FN1
@CH1
@
CH1
11
0.1U_0402_16V4Z~D
13
2
XDP_FN2
15
XDP_FN3
17
19
21
23
25
XDP_FN4
27
XDP_FN5
29
31
XDP_FN6
33
XDP_FN7
35
@ RH283 1K_0402_5%~D
37
1.05V_0.8V_PWROK_R
1
2
39
41
1
2 PCH_PWRBTN#_XDP
@ RH21
0_0402_5%~D
43
45
47
@ RH284 0_0402_5%~D
49
1
2 DDR_XDP_WAN_SMBDAT_R2
51
DDR_XDP_WAN_SMBCLK_R2
1
2
53
@ RH285 0_0402_5%~D
55
PCH_JTAG_TCK
57
59
+3.3V_ALW_PCH
42,58 1.05V_0.8V_PWROK
7,16 SIO_PWRBTN#_R
PCH_INTVRMEN
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
1 RSMRST#_XDP
1K_0402_5%~D
16,42 PCH_RSMRST#_Q
RH38
330K_0402_5%~D
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
YH1
1
RH22
1
RH23
1
RH11
2
20K_0402_5%~D
2
20K_0402_5%~D
2
1M_0402_5%~D
SRTCRST#
2
1
@ CH100
27P_0402_50V8J~D
1
CH5
@
CMOS1 SHORT PADS~D
1
2
1U_0402_6.3V6K~D
CH4
SHORT PADS~D
2
1U_0402_6.3V6K~D
30
30 PCH_AZ_CODEC_SYNC
30 PCH_AZ_CODEC_RST#
30 PCH_AZ_CODEC_BITCLK
31 PCH_AZ_MDC_SDIN1
1
@RH287
@
RH287
17
18
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
SPI_PCH_CS0#
1
R933
1
R894
SPI_WP#_SEL
1
@ R898
SPI_PCH_DIN
41 SPI_WP#_SEL
2 PCH_AZ_SYNC_Q
33_0402_5%~D
2
RH31
1
1M_0402_5%~D
HDA_DOCK_RST# / GPIO13
@ RH47
2
1
100_0402_1%~D
@ RH49
2
1
100_0402_1%~D
PCH_AZ_SYNC
PCH_SPI_CLK
T3
PCH_SPI_CS0#
Y14
PCH_SPI_CS1#
T1
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
JTAG_TCK
JTAG_TMS
JTAG_TDI
H1
SATAICOMPO
SATAICOMPI
JTAG_TDO
2 SPI_CS0#
47_0402_5%~D
2 SPI_DIN64
33_0402_5%~D
2
0_0402_5%~D
2
3
4
/CS
DO
/WP
GND
VCC
/HOLD
CLK
DIO
SPI_CLK64 1
R899
SPI_DO64 1
R901
SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C
XDP_FN14
XDP_FN15
+3.3V_ALW_PCH
RSMRST#_XDP
XDP_DBRESET#
XDP_DBRESET# 7,16
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
+3.3V_RUN
IRQ_SERIRQ
2
RH28
PCH_AZ_SYNC_Q 2
RH37
PCH_GPIO33
2
RH355
BBS_BIT0_R
2
RH51
29
29
29
29
SPI_CS1#
2
@RH35
@
RH35
1
10K_0402_5%~D
No Reboot Strap
Low = Default
SPKR
High = No Reboot
ESATA_PRX_DTX_N4_C 39
ESATA_PRX_DTX_P4_C 39
ESATA_PTX_DRX_N4_C 39
ESATA_PTX_DRX_P4_C 39
Y3
Y1
AB3
AB1
SATA_PRX_DKTX_N5_C 40
SATA_PRX_DKTX_P5_C 40
SATA_PTX_DKRX_N5_C 40
SATA_PTX_DKRX_P5_C 40
+1.05V_RUN
Y11
AB13
ODD/ E Module Bay
SPKR
Y7
Y5
AD3
AD1
Y10
1
8.2K_0402_5%~D
1
10K_0402_5%~D
1
100K_0402_5%~D
1
4.7K_0402_5%~D
HDD
AB8
AB10
AF3
AF1
+SATA_COMP
1
RH40
2
37.4_0402_1%~D
+SATA3_COMP
1
RH42
2
49.9_0402_1%~D
1
RH46
2
750_0402_1%~D
E-SATA
DOCK
B
+1.05V_RUN
AH1
RBIAS_SATA3
P3
SATA_ACT#
+3.3V_RUN
RH30
10K_0402_5%~D
SATALED#
SATA_ACT#
SATA0GP / GPIO21
V14
HDD_DET#_R
@RH290
@
RH290
SPI_MISO
SATA1GP / GPIO19
P1
BBS_BIT0_R
1
QH1
CougarPoint_Rev_1p0
45
2 0_0402_5%~D
HDD_DET#
28
PCH_SATA_MOD_EN# 42
BSS138W-7-F_SOT323-3~D
7,17 PCH_PLTRST#
2 SPI_CS1#
47_0402_5%~D
2 SPI_DIN32
33_0402_5%~D
2
0_0402_5%~D
200 MIL SO8

16Mb Flash ROM
/CS
DO(IO1)
/WP(IO2)
GND
BBS_BIT0 - BIOS BOOT STRAP BIT 0
R892
3.3K_0402_5%~D
U53 X76@
1
C745
0.1U_0402_16V4Z~D
1
2
VCC
/HOLD(IO3)
CLK
DI(IO0)
SPI_CLK32 1
R897
SPI_DO32 1
R900
2 SPI_PCH_CLK
33_0402_5%~D
2 SPI_PCH_DO
33_0402_5%~D

Title
PCH (1/8)
Size
W25Q16BVSSIG_SO8~D
W25Q64BVSSIG_SO8~D
Document Number
Rev
1.0
LA-6592P
Date:
XDP_FN12
XDP_FN13
+3.3V_RUN
HRS_FH12-16S-0P5SH(55)~D
5
XDP_FN10
XDP_FN11
AD7
AD5
AH5
AH4
SPI_MOSI
SPI_PCH_CS1#1
R935
SPI_PCH_DIN 1
R895
SPI_WP#_SEL
1
SPI_PCH_CLK
@R896
@
R896
2
33_0402_5%~D
SPI_PCH_DO
2
33_0402_5%~D
XDP_FN8
XDP_FN9
SPI_CS0#
R888
3.3K_0402_5%~D
33,34,41,42
V4
C746
0.1U_0402_16V4Z~D
1
2
U52 X76@
1
41
41
IRQ_SERIRQ
AM10
AM8
AP11
AP10
AB12
SATA3RBIAS
LPC_LDRQ0#
LPC_LDRQ1#
PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28
SATA3COMPI
SPI_CLK
IRQ_SERIRQ
U3
R891
3.3K_0402_5%~D
64Mb Flash ROM
XDP_FN16
XDP_FN17
LPC_LFRAME# 33,34,41,42
PCH_SPI_DIN
200 MIL SO8
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
33,34,41,42
33,34,41,42
33,34,41,42
33,34,41,42
AM3
AM1
AP7
AP5
SATA3RCOMPO
+3.3V_SPI
R890
3.3K_0402_5%~D
V5
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
PCH_SPI_DO
QH7
+3.3V_SPI
+3.3V_M
1
RH33
+3.3V_SPI
1
RH345
1
RH346
1
RH347
1
RH348
1
RH349
31 PCH_AZ_MDC_SYNC
SPI_PCH_CS1#
PCH_SPI_CS1#
SPI_PCH_DO
PCH_SPI_DO
SPI_PCH_DIN
PCH_SPI_DIN
SPI_PCH_CLK
PCH_SPI_CLK
SPI_PCH_CS0#
PCH_SPI_CS0#
N32
J3
PCH_JTAG_TDO
17,34,36,37,41,42 PCH_PLTRST#_EC
HDA_SDO
HDA_DOCK_EN# / GPIO33
1 200_0402_1%~D
E36
K36
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
C36
RH43 2
LDRQ0#
LDRQ1# / GPIO23
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
HDA_SDIN3
A36
K5
G1
G2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A34
PCH_JTAG_TDI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
HDA_SDIN2
1 200_0402_1%~D
2
0_0402_5%~D
HDA_SDIN1
C34
RH45 2
1
RH350
HDA_SDIN0
H7
+3.3V_M
CONN@
JSPI1
E34
PCH_JTAG_TMS
FWH4 / LFRAME#
D36
HDA_RST#
G34
1 200_0402_1%~D
SPKR
PCH_AZ_MDC_SDIN1
RH44 2
C38
A38
B37
C37
SERIRQ
PCH_AZ_CODEC_SDIN0
PCH_JTAG_TCK
High: Enable Intel

Anti-Theft Technology
Left floating: Disable Intel Anti-Theft Technology
+3.3V_SPI
HDA_SYNC
1 51_0402_1%~D
PCH_SPI_DO
SPI_MOSI
HDA_BCLK
L34
K34
USB30_SMI#
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
INTVRMEN
N34
RH59 2
@ RH48
2
1
100_0402_1%~D
2
2
+3.3V_ALW_PCH_JTAG
C17
2
1K_0402_5%~D
29 USB30_SMI#
@RH288
@
RH288
0_0603_5%~D
@ RH295
8.2K_0402_5%~D
PCH_INTVRMEN
PCH_AZ_SDOUT
2
2 33_0402_5%~D
1K_0402_5%~D
PCH_GPIO33
1
RH36 1
RH50
31 PCH_AZ_MDC_SDOUT
41
ME_FWP
INTRUDER#
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
SRTCRST#
K22
PCH_AZ_RST#
2
33_0402_5%~D
1
RH34
@ CH101
27P_0402_50V8J~D
2 PCH_AZ_SDOUT
33_0402_5%~D
2 PCH_AZ_SYNC_Q
33_0402_5%~D
2 PCH_AZ_RST#
33_0402_5%~D
2 PCH_AZ_BITCLK
33_0402_5%~D
1
RH29
1
RH26
1
RH27
1
RH25
G22
SPKR
30 PCH_AZ_CODEC_SDIN0
30 PCH_AZ_CODEC_SDOUT
RTCRST#
T10
31 PCH_AZ_MDC_RST#
CMOS place near DIMM
D20
INTRUDER#
PCH_AZ_BITCLK
2
33_0402_5%~D
PCH_AZ_SYNC
1
RH32
31 PCH_AZ_MDC_BITCLK
@
ME1
RTCX2
RTCX1
A20
C20
+RTC_CELL
CH3
32.768KHZ_12.5PF_Q13MC1461000~D
18P_0402_50V8J~D
PCH_RTCX2
2
1
1
2
RH286
0_0402_5%~D
PCH_RTCRST#
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
SAMTE_BSH-030-01-L-D-A
UH4A
LPC
SATA 6G
RH2
10M_0402_5%~D
RTC
IHDA
JTAG
INTVRMEN- Integrated SUS

1.1V VRM Enable
* High - Enable Internal VRs
Low - Enable External VRs
PCH_RTCX1
1
CH2
18P_0402_50V8J~D
2
1
SPI
On Die PLL VR is supplied by

1.5V when sampled high, 1.8 V
when sampled low
@ RH39
@RH39
330K_0402_5%~D
@ JXDP2
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
+3.3V_ALW_PCH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Keep CMOS
@ RH1
@ RH3
@ RH4
@ RH5
@ RH6
@ RH7
@ RH8
@ RH9
@ RH10
@ RH12
@ RH13
@ RH14
@ RH15
@ RH16
@ RH17
@ RH18
@ RH19
@ RH20
Open
17 USB_OC0#_R
17 USB_OC1#_R
17 USB_OC2#
17 USB_OC3#
17 USB_OC4#
17 USB_OC5#
17 USB_OC6#
17,42 SIO_EXT_SMI#
18,41 SLP_ME_CSW_DEV#
18,36 USB_MCARD1_DET#
2
G
Clear CMOS
Shunt
Can be place in 0 height area.
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
CMOS setting
SATA
CMOS_CLR1
Sheet
1
14
of
75
+3.3V_RUN
MEM_SMBCLK
QH5A
1
MEM_SMBDATA
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
35
35
35
35
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
BJ38
BG38
AU36
AV36
PERN6
PERP6
PETN6
PETP6
32
32
32
32
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
BG40
BJ40
AY40
BB40
PERN7
PERP7
PETN7
PETP7
BE38
BC38
AW38
AY38
PERN8
PERP8
PETN8
PETP8
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
36 CLK_PCIE_MINI1#
36 CLK_PCIE_MINI1
+3.3V_ALW_PCH
36 MINI1CLK_REQ#
32 CLK_PCIE_LAN#
32 CLK_PCIE_LAN
2
@ RH3072
@ RH3082
RH81
2
@ RH82 2
@ RH83
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MINI1#
PCIE_MINI1
1
1 0_0402_5%~D
0_0402_5%~D
PCIE_LAN#
PCIE_LAN
MMI Card--->
MiniWPAN (Mini Card 3)--->
Express card--->
MiniWLAN (Mini Card 2)--->
35 CLK_PCIE_MMI#
35 CLK_PCIE_MMI
+3.3V_RUN
35 MMICLK_REQ#
36 CLK_PCIE_MINI3#
36 CLK_PCIE_MINI3
+3.3V_ALW_PCH
36 MINI3CLK_REQ#
MINI1CLK_REQ#
LANCLK_REQ#
32 LANCLK_REQ#
BG37
BH37
AY36
BB36
2
@ RH85 2
@ RH86 1
RH87
2
@ RH88 2
@ RH90 2
RH152
1
1 0_0402_5%~D
2 0_0402_5%~D
10K_0402_5%~D
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MMI#
PCIE_MMI
MMICLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
Y40
Y39
J2
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
A8
37 CLK_PCIE_EXP#
37 CLK_PCIE_EXP
+3.3V_ALW_PCH
37 EXPCLK_REQ#
2
@ RH92 2
@ RH93 2
RH94
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_EXP#
PCIE_EXP
Y43
Y45
EXPCLK_REQ#
L12
36 CLK_PCIE_MINI2#
36 CLK_PCIE_MINI2
+3.3V_ALW_PCH
36 MINI2CLK_REQ#
2
@ RH95 2
@ RH96 2
RH97
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MINI2#
PCIE_MINI2
V45
V46
MINI2CLK_REQ#
L14
AB42
AB40
+3.3V_ALW_PCH
1
RH98
2
10K_0402_5%~D
PEG_B_CLKRQ#
E6
V40
V42
T13
eModule Bay--->
A
29 CLK_PCIE_EMB#
29 CLK_PCIE_EMB
+3.3V_ALW_PCH
29 EMBCLK_REQ#
2
@ RH3102
@ RH3122
RH104
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_EMB#
PCIE_EMB
7 CLK_CPU_ITP#
7 CLK_CPU_ITP
2
@ RH2802
@ RH281
1
1 0_0402_5%~D
0_0402_5%~D
CLK_BCLK_ITP# AK14
CLK_BCLK_ITP AK13
EMBCLK_REQ#
V38
V37
K12
A12
DDR_HVREF_RST_PCH
SML0ALERT# / GPIO60
2
0_0402_5%~D
+3.3V_ALW_PCH
C8
LAN_SMBCLK
SML0DATA
G12
LAN_SMBDATA
SML1ALERT# / PCHHOT# / GPIO74
C13
GPIO74
SML1CLK / GPIO58
E14
SML1_SMBCLK
SML1DATA / GPIO75
M16
SML1_SMBDATA
M7
PCH_CL_CLK1
CL_DATA1
T11
PCH_CL_DATA1
CL_RST1#
P10
PCH_CL_RST1#
SML0CLK
LAN_SMBCLK 32
LAN_SMBDATA 32
SML1_SMBCLK 42
SML1_SMBDATA 42
PCH_CL_CLK1 36
LAN_SMBCLK
LAN_SMBDATA
PCH_CL_DATA1 36
PCH_CL_RST1# 36
2
RH305
2
RH306
RH80
2
+3.3V_ALW_PCH
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
GFX_CLK_REQ#
10K_0402_5%~D
CLKOUT_PCIE0N
CLKOUT_PCIE0P
CLKOUT_PCIE1N
CLKOUT_PCIE1P
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
1
1K_0402_5%~D
1
10K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
+3.3V_LAN
CL_CLK1
PEG_A_CLKRQ# / GPIO47
PCIECLKRQ0# / GPIO73
1
RH298
1
RH299
DDR_HVREF_RST_PCH 2
RH300
GPIO74
2
RH301
MEM_SMBCLK
2
RH302
MEM_SMBDATA
2
RH303
PCH_SMB_ALERT#
2
RH304
SML1_SMBDATA
DDR_HVREF_RST_PCH 7
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
M10
AB37
AB38
CLK_PCIE_VGA#
CLK_PCIE_VGA
AV22
AU22
CLK_CPU_DMI#
CLK_CPU_DMI
AM12
AM13
CLK_CPU_DPLL#
CLK_CPU_DPLL
BF18
BE18
CLK_BUF_DMI#
CLK_BUF_DMI
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKIN_SATA_N
CLKIN_SATA_P
CLKOUT_PCIE5N
CLKOUT_PCIE5P
REFCLK14IN
CLKIN_PCILOOPBACK
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
XTAL25_IN
XTAL25_OUT
QH2
CLK_PCIE_VGA# 46
CLK_PCIE_VGA 46
CLK_CPU_DMI# 7
CLK_CPU_DMI 7
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_CPU_DPLL# 7
CLK_CPU_DPLL 7
1
RH74 1
RH75
CLK_BUF_BCLK
CLKIN_DMI_N
CLKIN_DMI_P
2
G
41,49 3.3V_RUN_GFX_ON
GFX_CLK_REQ#
2
2 10K_0402_5%~D
10K_0402_5%~D
RH91
10K_0402_5%~D
BJ30
BG30
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
G24
E24
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
1
CLK_BUF_CKSSCD
RH78 1
RH79
2
2 10K_0402_5%~D
10K_0402_5%~D
CLK_PCH_14M
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
AK7
AK5
K45
CLK_PCH_14M
2
2 10K_0402_5%~D
10K_0402_5%~D
1
RH183
10K_0402_5%~D
CLOCK TERMINATION for FCIM and need close to PCH
H45
V47
V49
1
RH76 1
RH77
CLK_PCI_LOOPBACK 17
XTAL25_IN
XTAL25_OUT
@ RH309
1 0_0402_5%~D
RH99
1M_0402_5%~D
PEG_B_CLKRQ# / GPIO56
XCLK_RCOMP
XCLK_RCOMP
Y47
CLKOUTFLEX0 / GPIO64
K43
PCI_TCM
4@ RH311
1 22_0402_5%~D
CLK_PCI_TPM_CHA 34
F47
SIO_14M
RH313
1 22_0402_5%~D
CLK_SIO_14M 41
H47 PCI_TPM
RH314
1 22_0402_5%~D
CLK_PCI_TPM 33
K49
@ RH315
1 22_0402_5%~D
JETWAY_CLK14M 34
CLKOUT_PCIE6N
CLKOUT_PCIE6P
1
RH100
2
+1.05V_RUN
90.9_0402_1%~D
YH2
25MHZ_18PF_7A25000110~D
2
1
CLKOUT_PCIE7N
CLKOUT_PCIE7P
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
JETWAY_14M
CougarPoint_Rev_1p0
PCIE REQ power rail:

suspend: 0 3 4 5 6 7
core: 1 2
1
@ RH297
CH19
18P_0402_50V8J~D
BF36
BE36
AY34
BB34
MEM_SMBDATA
PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4
MEM_SMBCLK
C9
SML1_SMBCLK
SMBUS
29
29
29
29
PCH_SMB_ALERT#
H14
2
0_0402_5%~D
10/100/1G LAN --->
PERN3
PERP3
PETN3
PETP3
SMBDATA
E12
1
@ RH296
CH18
18P_0402_50V8J~D
BG36
BJ36
AV34
AU34
MMI --->
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5
SMBCLK
PERN2
PERP2
PETN2
PETP2
37
37
37
37
36
36
36
36
SMBALERT# / GPIO11
Link
1/2vMINI CARD-3 PCIE

(Mini Card 3)--->
BE34
BF34
BB32
AY32
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
PERN1
PERP1
PETN1
PETP1
Controller
E3 Module Bay--->
BG34
BJ34
AV32
AU32
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
FLEX CLOCKS
EXPRESS Card--->
36
36
36
36
UH4B
CLOCKS
MiniWLAN (Mini Card 2)--->
36
36
36
36
QH5B
PCI-E*
MiniWWAN (Mini Card 1)--->
Follow DG0.9 Device down & Express/Mini

card topology
Title
PCH (2/8)
Size
Document Number
Date:
Tuesday, January 18, 2011
Rev
1.0
LA-6592P
Sheet
1
15
of
75
PCH_RI#
2
10K_0402_5%~D
ME_SUS_PWR_ACK_R
1
@ RH323
PCH_CRT_DDC_CLK
PCH_CRT_DDC_CLK 25
QH6A
+3.3V_RUN
DSWODVREN - On Die DSW VR Enable

G_DAT_DDC2
Enabled (DEFAULT)
1
RH140
2 SYS_PWROK
0_0402_5%~D
1
@ RH321
G_CLK_DDC2
RESET_OUT#
SIO_SLP_LAN#
2
10K_0402_5%~D
1
@ RH319
PCH_PCIE_WAKE#
2
10K_0402_5%~D
2PCH_RSMRST#_R
0_0402_5%~D
1
@ RH113
1
RH142
PCH_DPWROK
RH317
ME_SUS_PWR_ACK
2
10K_0402_5%~D
2.2K_0402_5%~D
1
RH144
RH316
SUS_STAT#/LPCPD#
2
10K_0402_5%~D
2.2K_0402_5%~D
1
@ RH318
+3.3V_RUN
+3.3V_ALW_PCH
2 SUSACK#_R
0_0402_5%~D
QH6B
PCH_CRT_DDC_DAT
3
PCH_CRT_DDC_DAT 25
HIGH: R221 STUFFED,

R222 UNSTUFFED
+3.3V_RUN
PCH_RSMRST#_Q
CLKRUN#
2
8.2K_0402_5%~D
1
RH137
1
RH322
2
10K_0402_5%~D
ME_SUS_PWR_ACK
1
@ RH145
2
10K_0402_5%~D
Disabled
LOW: R221 STUFFED,
R222 UNSTUFFED
L_DDC_DATA - LVDS Detected

1
LVDS is detected
LVDS is not detected
Intel request DDPB can not support eDP
UH4C
6
6
6
6
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
BE24
BC20
BJ18
BJ20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
AW24
AW20
BB18
AV18
AY24
AY20
AY18
AU18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
AW16
FDI_INT
FDI_FSYNC0
FDI_INT
+1.05V_RUN
DMI_COMP_R
2
49.9_0402_1%~D
RBIAS_CPY
2
750_0402_1%~D
1
RH111
1
RH112
DMI_ZCOMP
FDI_FSYNC0
AV12
BG25
DMI_IRCOMP
FDI_FSYNC1
BC10
FDI_FSYNC1
DMI2RBIAS
FDI_LSYNC0
AV14
FDI_LSYNC0
BB10
FDI_LSYNC1
FDI_LSYNC1
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
BJ24
BH21
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
6
6
6
6
6
6
6
6
24 PANEL_BKEN_PCH
24,41 ENVDD_PCH
24 BIA_PWM_PCH
23 LDDC_CLK_PCH
23 LDDC_DATA_PCH
6
6
6
6
6
6
6
6
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
41
1
@ RH114
SUSACK#
2
0_0402_5%~D
SUSACK#_R
C12
XDP_DBRESET# K3
7,14 XDP_DBRESET#
SUSACK#
SYS_RESET#
7,41 SYS_PWROK
1
@ RH116
2
0_0402_5%~D
42 RESET_OUT#
1
@ RH117
2
0_0402_5%~D
42 PM_APWROK
1
@ RH118
2
0_0402_5%~D
SYS_PWROK_R P12
PCH_PWROK L22
PM_APWROK_R
L10
7 PM_DRAM_PWRGD
1
@ RH320
PM_DRAM_PWRGD_R B13
2
0_0402_5%~D
14,42 PCH_RSMRST#_Q
1
@ RH120
2
0_0402_5%~D
42 ME_SUS_PWR_ACK
1
@ RH121
PCH_RSMRST#_R C21
ME_SUS_PWR_ACK_R K16
2
0_0402_5%~D
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST#
System Power Management
+RTC_CELL
DSWVRMEN
A18
DSWODVREN
DPWROK
E22
PCH_DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
RH1271
@RH129
@
RH1291
2 330K_0402_1%~D
N3
CLKRUN#
G8
SUS_STAT#/LPCPD#
@ T56
PAD~D
N14
SUSCLK
@ T57
PAD~D
@ T58
PAD~D
H4
SIO_SLP_S4#
PCH_PCIE_WAKE# 41
CLKRUN#
@ T60
SUSWARN#/SUSPWRDNACK/GPIO30
SLP_S3#
F4
SIO_SLP_S3#
1
@ RH122
SIO_PWRBTN#_R E20
2
0_0402_5%~D
PWRBTN#
SLP_A#
G10
ACPRESENT / GPIO31
SLP_SUS#
G16
1
RH139
PCH_BATLOW#
2
8.2K_0402_5%~D
PCH_RI#
E10
A10
BATLOW# / GPIO72
PMSYNCH
RI#
SLP_LAN# / GPIO29
AP14
H_PM_SYNC
K14
SIO_SLP_LAN#
T45
P39
L_CTRL_CLK
L_CTRL_DATA
AF37
AF36
AK39
AK40
23 LCD_A0-_PCH
23 LCD_A1-_PCH
23 LCD_A2-_PCH
AN48
AM47
AK47
AJ48
23 LCD_A0+_PCH
23 LCD_A1+_PCH
23 LCD_A2+_PCH
AN47
AM49
AK49
AJ47
23 LCD_BCLK-_PCH
23 LCD_BCLK+_PCH
AF40
AF39
23 LCD_B0-_PCH
23 LCD_B1-_PCH
23 LCD_B2-_PCH
AH45
AH47
AF49
AF45
23 LCD_B0+_PCH
23 LCD_B1+_PCH
23 LCD_B2+_PCH
AH43
AH49
AF47
AF43
25 PCH_CRT_BLU
25 PCH_CRT_GRN
25 PCH_CRT_RED
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
N48
P49
T49
LVD_IBG
LVD_VBG
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
G_CLK_DDC2
G_DAT_DDC2
T39
M40
20_0402_1%~D
2 HSYNC
2 VSYNC
20_0402_1%~D
M47
M49
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
PAD~D
PAD~D
25 PCH_CRT_HSYNC
25 PCH_CRT_VSYNC
RH123
1
1
RH124
CRT_IREF
PAD~D
SDVO_TVCLKINN
SDVO_TVCLKINP
AP43
AP45
SDVO_STALLN
SDVO_STALLP
AM42
AM40
SDVO_INTN
SDVO_INTP
AP39
AP40
SDVO_CTRLCLK
SDVO_CTRLDATA
LVD_VREFH
LVD_VREFL
PAD~D
SIO_SLP_SUS# 41
@ T63
+3.3V_ALW_PCH
L_DDC_CLK
L_DDC_DATA
23 LCD_ACLK-_PCH
23 LCD_ACLK+_PCH
SIO_SLP_A# 41,56
SIO_SLP_SUS#
L_BKLTCTL
T40
K47
AE48
AE47
SIO_SLP_S3# 41
@ T62
H20
42 AC_PRESENT
P45
LDDC_CLK_PCH
LDDC_DATA_PCH
L_IBG
2
2.37K_0402_1%~D
1
RH344
SIO_SLP_S4# 41
@ T61
7,14 SIO_PWRBTN#_R
42 SIO_PWRBTN#
34,41,42
SIO_SLP_S5# 42
@ T59
SLP_S4#
L_BKLTEN
L_VDD_EN
PCH_DPWROK 41
PCH_PCIE_WAKE#
SIO_SLP_S5#
J47
M45
BIA_PWM_PCH
2 330K_0402_1%~D
B9
D10
PANEL_BKEN_PCH
ENVDD_PCH
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
Digital Display Interface
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
LVDS
6
6
6
6
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
BC24
BE20
BG18
BG20
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
CRT_HSYNC
CRT_VSYNC
T43
T42
DAC_IREF
CRT_IRTN
6
6
6
6
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
PAD~D
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
CougarPoint_Rev_1p0
H_PM_SYNC 7
RH126
1K_0402_0.5%~D
2
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
FDI
6
6
6
6
DMI
UH4D
SIO_SLP_LAN# 32,41
CougarPoint_Rev_1p0
1
RH131
1
RH132
1
RH133
1
RH134
2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 ENVDD_PCH
100K_0402_5%~D
Title
PCH (3/8)
Size
Document Number
Rev
1.0
LA-6592P
Date:
5
Sheet
1
16
of
75
+3.3V_RUN
1
RH324
PCI_PIRQA#
2
8.2K_0402_5%~D
1
RH325
PCI_PIRQB#
2
8.2K_0402_5%~D
UH4E
1
RH326
PCI_PIRQC#
2
8.2K_0402_5%~D
1
RH329
PCI_PIRQD#
2
8.2K_0402_5%~D
1
RH327
PCI_REQ1#
2
10K_0402_5%~D
1
RH330
ATG_MAC_LCD_DET#
2
10K_0402_5%~D
1
RH331
CAM_MIC_CBL_DET#
2
10K_0402_5%~D
1
RH328
BT_DET#
2
10K_0402_5%~D
PCH_GPIO3
2
10K_0402_5%~D
1
@ RH332
High : Normal type panel
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
B21
M20
AY16
BG46
TP21
TP22
TP23
TP24
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD
LVDS_CBL_ID
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
PCI_GNT3#
@ RH333
1K_0402_5%~D
A16 swap override Strap/Top-Block
Swap Override jumper

36 PCIE_MCARD2_DET#
43
BT_DET#
Low = A16 swap
PCI_GNT#3
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
K40
K38
H38
G38
PCI_REQ1#
C46
C44
E40
BT_DET#
BBS_BIT1
High = Default
33
35
7
32
46
29
PLTRST_USH#
PLTRST_MMI#
PLTRST_XDP#
PLTRST_LAN#
PLTRST_GPU#
PLTRST_EMB#
1
@RH335
@
RH3351
@RH336
@
RH3361
@RH337
@
RH3371
@RH338
@
RH3381
@RH343
@
RH3431
@RH340
@
RH340
2
2
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
ATG_MAC_LCD_DET# G42
PCH_GPIO3
G40
CAM_MIC_CBL_DET# C42
FFS_PCH_INT D44
2
0_0402_5%~D
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
41 CLK_PCI_5028
42 CLK_PCI_MEC
40 CLK_PCI_DOCK
15 CLK_PCI_LOOPBACK
PAD~D
T104 @
K10
PCH_PLTRST#
RH160
RH102
RH103
2
2
1
2
RH105
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PCI_GNT3#
24 CAM_MIC_CBL_DET#
1
28 HDD_FALL_INT
@ RH334
PIRQA#
PIRQB#
PIRQC#
PIRQD#
D47
E42
F46
24 ATG_MAC_LCD_DET#
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
C6
PCI_5028
1
PCI_MEC
1 22_0402_5%~D
PCI_DOCK
2 22_0402_5%~D
33_0402_5%~D
PCI_LOOPBACKOUT
1
22_0402_5%~D
H49
H43
J48
K42
H40
USB
Low : High contrast ratio brightness
PCI
AY7
AV7
AU3
BG4
AT10
BC8
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
RSVD23
RSVD24
AV5
AV10
RSVD25
AT8
RSVD26
RSVD27
AY5
BA2
RSVD28
RSVD29
AT12
BF3
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBP13USBP13+
USBRBIAS#
C33
USBRBIAS
USBRBIAS
B33
USBP0- 38
USBP0+ 38
USBP1- 38
USBP1+ 38
USBP2- 39
USBP2+ 39
USBP3- 31
USBP3+ 31
USBP4- 36
USBP4+ 36
USBP5- 36
USBP5+ 36
USBP6- 36
USBP6+ 36
USBP7- 33
USBP7+ 33
USBP8- 40
USBP8+ 40
USBP9- 40
USBP9+ 40
USBP10- 37
USBP10+ 37
USBP11- 43
USBP11+ 43
USBP12- 24
USBP12+ 24
USBP13- 24
USBP13+ 24
----->Right Side 1
----->Right Side 2
----->Right Side (ESATA)
----->Left Side
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->USH
----->DOCK
----->DOCK
----->Express Card
----->Blue Tooth
----->Camera
----->LCD Touch
Within 500 mils
1
2
RH151
22.6_0402_1%~D
USB_OC5#
USB_OC6#
USB_OC2#
PME#
PLTRST#
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
A14
K20
B17
C16
L16
A16
D14
C14
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
1
@ RH3391
@ RH341
2
2 0_0402_5%~D
0_0402_5%~D
4
3
2
1
5
6
7
8
10K_1206_8P4R_5%~D
RPH2
4
5
3
6
2
7
1
8
10K_1206_8P4R_5%~D
USB_OC0#
39
USB_OC1#
31,39
USB_OC2#
14
USB_OC3#
14
USB_OC4#
14
USB_OC5#
14
USB_OC6#
14
SIO_EXT_SMI# 14,42
SIO_EXT_SMI# 2
RH41
1
10K_0402_5%~D
USB_OC0#_R 14
USB_OC1#_R 14
CougarPoint_Rev_1p0
+3.3V_RUN
+3.3V_ALW_PCH
RPH1
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
CH102
0.1U_0402_16V4Z~D
1
2
BBS_BIT1
O
SATA_SLPD
(BBS_BIT0)
Boot BIOS Location
PCH_PLTRST#_EC 14,34,36,37,41,42
LPC
Reserved (NAND)
PCI
SPI
TC7SH08FU_SSOP5~D
BBS_BIT1
1
@ RH342
1K_0402_5%~D
Title
PCH_PLTRST#
7,14 PCH_PLTRST#
UH3
Boot BIOS Strap

A
PCH (4/8)
Size
*
4
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
17
of
75
+3.3V_RUN
CONTACTLESS_DET# 1
RH256
2
10K_0402_1%~D
UH4F
PCH_GPIO15
TLS Confidentiality
Low = Intel ME Crypto Transport Layer

Security (TLS) cipher suite with no
confidentiality
High = Intel ME Crypto TLS cipher suite
with confidentiality
31
IO_LOOP#
LEDB_DET#
41 SIO_EXT_WAKE#
2
T7
0_0402_5%~D
A42
IO_LOOP#
H36
LEDB_DET#
E38
SIO_EXT_WAKE#
C10
14 PCH_GPIO15
14 EN_ESATA_RPTR#
+3.3V_ALW_PCH
2
1
SLP_ME_CSW_DEV#
46 DGPU_HOLD_RST#
14
14
Note: PCH has internal pull up 20k ohm on

E3_PAID_TS_DET# (GPIO27)
28
GPIO36
FFS_INT2
14,41 TEMP_ALERT#
43
KB_DET#
TACH7 / GPIO71
A40
USB_MCARD2_DET# 36
TACH0 / GPIO17
T5
SCLOCK / GPIO22
GPIO24 / MEM_LED
E16
GPIO27
SLP_ME_CSW_DEV#
P8
GPIO28
DGPU_HOLD_RST#
K1
STP_PCI# / GPIO34
V8
SATA2GP / GPIO36
GPIO37
M5
SATA3GP / GPIO37
TPM_ID0
N2
TPM_ID1
M3
FFS_INT2
V13
D6
AY11
THRMTRIP#
AY10
2
0_0402_5%~D
2
0_0402_5%~D
SIO_RCIN#
T14
INIT3_3V#
DF_TVS
AY1
DF_TVS
TS_VSS1
AH8
TS_VSS2
AK11
TS_VSS3
AH10
NC_1
PECI_EC
42
H_PECI
42
+3.3V_RUN
+1.05V_RUN_VTT
H_CPUPWRGD 7
PCH_THRMTRIP#_R
INIT3_3V#
2
RH262
@ T106
SIO_A20GATE
1
56_0402_5%~D
2
RH158
2
RH203
PCH_GPIO1
2
RH164
SIO_EXT_SCI#
1
RH263
SIO_RCIN#
1
CH97
0.1U_0402_16V4Z~D
AK10
P37
NC_1
@ T108
BG2
VSS_NCTF_15
BG48
VSS_NCTF_16
BH3
VSS_NCTF_17
BH47
VSS_NCTF_18
BJ4
VSS_NCTF_19
BJ44
VSS_NCTF_20
BJ45
VSS_NCTF_21
BJ46
VSS_NCTF_22
VSS_NCTF_23
BJ5
VSS_NCTF_23
BJ6
VSS_NCTF_24
SDATAOUT1 / GPIO48
VSS_NCTF_15
SATA5GP / GPIO49
VSS_NCTF_16
GPIO57
VSS_NCTF_17
A4
VSS_NCTF_2
A44
VSS_NCTF_3
A45
VSS_NCTF_4
A46
VSS_NCTF_5
A5
VSS_NCTF_5
VSS_NCTF_6
A6
VSS_NCTF_6
VSS_NCTF_24
VSS_NCTF_1
VSS_NCTF_19
VSS_NCTF_2
VSS_NCTF_20
VSS_NCTF_3
VSS_NCTF_21
VSS_NCTF_4
VSS_NCTF_22
VSS_NCTF_7
B3
VSS_NCTF_7
VSS_NCTF_25
C2
VSS_NCTF_25
VSS_NCTF_8
B47
VSS_NCTF_8
VSS_NCTF_26
C48
VSS_NCTF_26
VSS_NCTF_9
BD1
VSS_NCTF_9
VSS_NCTF_27
D1
VSS_NCTF_27
VSS_NCTF_10
BD49
VSS_NCTF_10
VSS_NCTF_28
D49
VSS_NCTF_28
VSS_NCTF_11
BE1
VSS_NCTF_11
VSS_NCTF_29
E1
VSS_NCTF_29
VSS_NCTF_12
BE49
VSS_NCTF_12
VSS_NCTF_30
E49
VSS_NCTF_30
VSS_NCTF_13
BF1
VSS_NCTF_13
VSS_NCTF_31
F1
VSS_NCTF_31
VSS_NCTF_14
BF49
VSS_NCTF_14
VSS_NCTF_32
F49
VSS_NCTF_32
PLACE RH150 CLOSE TO THE BRANCHING POINT

( TO CPU and NVRAM CONNECTOR)
+VCCDFTERM
RH149
2.2K_0402_5%~D
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45from the pad.
DF_TVS_R1
RH150
DMI & FDI Termination Voltage
DF_TVS
IO_LOOP#
2
10K_0402_5%~D
LEDB_DET#
2
10K_0402_5%~D
GPIO17
1
1K_0402_5%~D
+3.3V_RUN
+3.3V_RUN
1
3@ RH268
20K_0402_5%~D
2
1@ RH267
10K_0402_5%~D
TPM_ID1
2@ RH270
10K_0402_5%~D
TPM_ID1
No TPM, No China TPM

1
TPM_ID0
TPM_ID0
China TPM
4@ RH271
2.2K_0402_5%~D
USH2.0
Set to Vss when LOW

Set to Vcc when HIGH
Title
1
RH163
1
RH272
2
@ RH273
2 DF_TVS
0_0402_5%~D
CougarPoint_Rev_1p0
2
@ RH171
2
@ RH173
2
RH265
2
RH266
2
RH179
2
@ RH180
1
RH269
RH149 need to close to CPU
RH171, RH173 should be no pop as reverse strap.

GPIO36
1
10K_0402_5%~D
GPIO37
1
1K_0402_5%~D
EN_ESATA_RPTR#
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
MEDIA_DET#
1
10K_0402_5%~D
DGPU_HOLD_RST#
1
10K_0402_5%~D
GPIO17
2
8.2K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D
2
10K_0402_5%~D
SDATAOUT0 / GPIO39
VSS_NCTF_1
KB_DET#
2
10K_0402_5%~D
1
@RH261
@
RH261
SIO_A20GATE 42
1
@ RH159
SLOAD / GPIO38
+3.3V_ALW_PCH
PROCPWRGD
H_CPUPWRGD
TS_VSS4
NCTF
SIO_EXT_WAKE#
2
10K_0402_5%~D
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45from the pad.
+3.3V_RUN
SIO_RCIN#
VSS_NCTF_18
1
RH170
P5
RCIN#
+3.3V_ALW_PCH
1
RH177
H_PECI_R
GPIO35
GPIO36
KB_DET#
SIO_A20GATE
AU16
SATA4GP / GPIO16
E8
V3
P4
A20GATE
PECI
D40
TEMP_ALERT#
CONTACTLESS_DET# 33
GPIO8
K4
GPIO37
PCIE_MCARD3_DET# 36
TACH3 / GPIO7
GPIO15
14,36 USB_MCARD1_DET#
@ RH353
1K_0402_5%~D
C41
U2
TACH6 / GPIO70
EN_ESATA_RPTR#
E3_PAID_TS_DET#
24 E3_PAID_TS_DET#
DGPU_PWROK 41,63
TACH2 / GPIO6
LAN_PHY_PWR_CTRL / GPIO12
36 PCIE_MCARD1_DET#
B41
C4
MEDIA_DET#
31 MEDIA_DET#
C40
TACH5 / GPIO69
G2
GPIO17
RH356
4.7K_0402_5%~D
TACH4 / GPIO68
TACH1 / GPIO1
PCH_GPIO15
32 PM_LANPHY_ENABLE
CONTACTLESS_DET#
BMBUSY# / GPIO0
31
SIO_EXT_SCI# 1
@ RH259
PCH_GPIO1
2 PCH_GPIO15
1K_0402_5%~D
GPIO
42 SIO_EXT_SCI#
1
RH354
CPU/MISC
14 SIO_EXT_SCI#_R
+3.3V_ALW_PCH
PCH (5/8)
Size
Document Number
Rev
1.0
LA-6592P
Date:
5
Sheet
1
18
of
75
+1.05V_RUN
UH4G
PCH Power Rail Table
POWER
Voltage Rail
CRT
VSSALVDS
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
CH51
0.1U_0402_10V7K~D
2
+1.05V_RUN
VCCIO[26]
2 +VCCAPLL_FDI
0.022_0805_1%
1
@RH195
@
RH195
AP16
+1.05V_+1.5V_1.8V_RUN
+VCCAPLL_FDI
BG6
+1.05V_RUN
AP17
+1.05V_RUN_VTT
AU20
VCCTX_LVDS[4]
AP37
VCC3_3[6]
V33
VCC3_3[7]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
AT16
AT20
VCCCLKDMI
AB36
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
+1.05V_RUN_VTT
+VCCCLKDMI
1
1
AG16
1
2
1U_0402_6.3V6K~D
CH49
2
1
+1.05V_RUN
LH9
HK1608R10J-T_0603~D
AG17
2
@ RH198
1
0_0603_5%~D
AJ16
AJ17
2
0_0805_5%~D
1
CH52
0.1U_0402_10V7K~D
V1
3.3
0.266
VccADAC3
3.3
0.001
VccADPLLA
1.05
0.08
VccADPLLB
1.05
0.08
VccCore
1.05
1.3
VccDMI
1.05
0.042
VccIO
1.05
2.925
VccASW
1.05
1.01
VccSPI
3.3
0.020
VccDSW3_3
3.3
0.003
VCCDFTERM
1.8
0.19
VccRTC
3.3
2 (mA)
VccSus3_3
3.3
0.119
3.3
0.01
1.8 / 1.5
0.16
+3.3V_RUN
+1.8V_RUN
VccClkDMI
1.05
0.02
VccSSC
1.05
0.095
VccDIFFCLKN
1.05
0.055
VccALVDS
3.3
0.001
VccTX_LVDS
1.8
0.06
PAD-OPEN1x1m
+3.3V_M
CH54
1U_0402_6.3V6K~D
+1.05V_RUN
+
2
2
@ RH199
Vcc3_3
PJP51
+1.05V_RUN
0.001
VccVRM
+1.05V_+1.5V_1.8V_RUN
1
0_0603_5%~D
0.001
VccSusHDA
1
@ RH276
2
RH197
V5REF_Sus
+VCCDFTERM
+1.5V_RUN
V5REF
+1.05V_+1.5V_1.8V_RUN
CougarPoint_Rev_1p0
+1.8V_RUN
+1.8V_RUN
CH43
0.1U_0402_10V7K~D
V34
VCCDMI[1]
VCCDFTERM[1]
VCC3_3[3]
2
1
LH8
HK1608R10J-T_0603~D
+3.3V_RUN
VCCVRM[3]
0.001
2
VCCIO[25]
AN34
BH29
1
VCCIO[24]
AN33
+3.3V_RUN
HVCMOS
VCCIO[17]
AN26
AT24
AP36
@ CH106
10U_0603_4VAM~D
VCCTX_LVDS[3]
CH50
1U_0402_6.3V6K~D
CH48
1U_0402_6.3V6K~D
CH47
1U_0402_6.3V6K~D
CH46
1U_0402_6.3V6K~D
CH45
1U_0402_6.3V6K~D
CH44
10U_0805_4VAM~D
VCCIO[16]
AN21
+1.05V_RUN
C
VCCIO[15]
DMI
AN17
+1.8V_RUN_LVDS
AM38
VCCAPLLEXP
DFT / SPI
AN16
1.05
V_PROC_IO
AM37
VCCIO
2 @
BJ22
VCCTX_LVDS[2]
S0 Iccmax
Current (A)
Voltage
+3.3V_RUN
VCCIO[28]
FDI
CH40
10U_0805_4VAM~D
1UH_LB2012T1R0M_20%~D
VCCTX_LVDS[1]
AK37
CH105
22U_0805_6.3VAM~D
LVDS
VCC CORE
VCCALVDS
AK36
+3.3V_RUN
CH36
10U_0805_4VAM~D
+VCCAPLLEXP
CH104
0.01U_0402_16V7K~D
1
@RH247
@
RH247
U47
50 mA
AN19
VSSADAC
CH103
0.01U_0402_16V7K~D
+1.05V_RUN
VCCADAC
CH35
0.1U_0402_10V7K~D
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
LH1
2
1
BLM18PG181SN1_0603~D
+VCCADAC
U48
CH34
0.01U_0402_16V7K~D
CH31
1U_0402_6.3V6K~D
CH33
1U_0402_6.3V6K~D
+1.05V_RUN
CH32
1U_0402_6.3V6K~D
CH30
10U_0805_4VAM~D
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
1
@ CH41
330U_D2_2VM_R6M~D
@ CH42
330U_D2_2VM_R6M~D
1
0_0603_5%~D
Title
PCH (6/8)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
19
of
75
@ RH202
1
2
UH4J
+3.3V_RUN_VCC_CLKF33 T38
DCPSUSBYP
VCCIO[32]
VCCIO[33]
+VCCAPLL_CPY_PCH
BH23
+VCCSUS1
AL24
VCCSUS3_3[8]
VCCIO[14]
DCPSUS[3]
CH69
1U_0402_6.3V6K~D
+3.3V_RUN
CH68
1U_0402_6.3V6K~D
CH67
1U_0402_6.3V6K~D
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
AD31
2
0.022_0805_1%
@RH215
@
RH215
VCCASW[2]
W21
W23
W24
CH74
1U_0402_6.3V6K~D
CH73
10U_0805_6.3V6M~D
LH4
10UH_LBR2012T100M_20%~D
+3.3V_RUN_VCC_CLKF33
1
2
1
1
W26
W29
W31
W33
VCCASW[12]
VCCASW[13]
VCCASW[14]
N16
CH78
0.1U_0402_10V7K~D
Y49
+1.05V_+1.5V_1.8V_RUN
AF17
AF33
AF34
AG34
2 CH81
1U_0402_6.3V6K~D
AG33
+1.05V_RUN
M26
DCPSUS[4]
AN23
+VCCA_USBSUS
VCCSUS3_3[1]
AN24
V5REF
VCCSUS3_3[2]
N20
VCCSUS3_3[3]
N22
VCCSUS3_3[4]
P20
VCCSUS3_3[5]
P22
+PCH_V5REF_RUN
VCCIO[13]
VCCADPLLA
VCCIO[6]
VCCADPLLB
VCCAPLLSATA
VCCVRM[1]
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
CH70
1U_0603_10V6K~D
VCCSSC
VCCIO[4]
+
2
RH213
10_0402_5%~D
DH3
RB751S40T1_SOD523-2~D
+3.3V_RUN
+PCH_V5REF_RUN
1
1
AA16
2
W16
CH72
0.1U_0402_10V7K~D
CH71
1U_0603_10V6K~D
+3.3V_RUN
+VCCA_USBSUS
T34
1
CH75
0.1U_0402_10V7K~D
AJ2
@CH62
@CH62
1U_0402_6.3V6K~D
1
AF13
CH76
0.1U_0402_10V7K~D
+1.05V_RUN
1
AH13
2
AH14
CH77
1U_0402_6.3V6K~D
Note: Check Intel
+VCCSATAPLL
AK1
@ LH5
10UH_LBR2012T100M_20%~D
1
2
AF14
+1.05V_RUN
1
AF11
+1.05V_+1.5V_1.8V_RUN
2
VCCIO[2]
CH63
0.1U_0402_10V7K~D
VCCVRM[4]
+3.3V_ALW_PCH
DCPRTC
+PCH_V5REF_SUS
+5V_RUN +3.3V_RUN
+3.3V_RUN
VCCASW[20]
2
G
+3.3V_ALW_PCH
P34
VCC3_3[2]
DH2
RB751S40T1_SOD523-2~D
+1.05V_RUN
VCCASW[18]
AC16
@ CH80
10U_0805_6.3V6M~D
+1.05V_RUN
AC17
AD17
CH82
1U_0402_6.3V6K~D
+1.05V_M
DCPSST
V_PROC_IO
MISC
VCCASW[22]
CPU
DCPSUS[1]
DCPSUS[2]
VCCASW[23]
VCCASW[21]
A22
1
VCCRTC
CougarPoint_Rev_1p0
HDA
CH93
1U_0402_6.3V6K~D
CH95
220U_B2_2.5VM_R35M~D
CH92
1U_0402_6.3V6K~D
RH208
10_0402_5%~D
VCCASW[17]
VCCASW[19]
+3.3V_ALW_PCH
1
+PCH_V5REF_SUS
VCC3_3[4]
+5V_ALW_PCH
T21
V21
T19
+RTC_CELL
+1.05V_RUN_VCCA_B_DPL
1
+
@CH83
@CH83
1U_0402_6.3V6K~D
BJ8
+1.05V_RUN_VCCA_A_DPL
CH94
220U_B2_2.5VM_R35M~D
1
2
LH7
10UH_LBR2012T100M_20%~D
T17
V19
1
2
CH87
0.1U_0402_10V7K~D
LH6
10UH_LBR2012T100M_20%~D
1
2
CH86
0.1U_0402_10V7K~D
CH85
4.7U_0603_6.3V6K~D
2
2
V16
CH89
0.1U_0402_10V7K~D
CH84
0.1U_0402_10V7K~D
+3.3V_ALW_PCH
+1.05V_M_VCCSUS
CH88
0.1U_0402_10V7K~D
2
+VCCSST
CH96
1U_0402_6.3V6K~D
T26
VCCIO[3]
+1.05V_RUN_VTT
VCCIO[34]
VCC3_3[8]
SATA
BF47
CH79
1U_0402_6.3V6K~D
2 +1.05V_M_VCCSUS
0.022_0805_1%
P24
VCC3_3[1]
VCCASW[16]
RTC
BD47
+1.05V_RUN_VCCA_B_DPL
1
@ RH248
V24
VCCSUS3_3[6]
VCCIO[12]
+1.05V_RUN_VCCA_A_DPL
+1.05V_M
VCCSUS3_3[10]
+3.3V_ALW_PCH
+1.05V_RUN
V23
VCCIO[5]
+VCCRTCEXT
T24
VCCSUS3_3[9]
V5REF_SUS
VCCASW[15]
T23
CH66
0.1U_0402_10V7K~D
+1.05V_M
CH65
22U_0805_6.3VAM~D
CH64
22U_0805_6.3VAM~D
VCCASW[1]
AA21
PCI/GPIO/LPC
AA19
Clock and Miscellaneous
CH61
1U_0402_6.3V6K~D
T29
CH60
0.1U_0402_10V7K~D
AL29
VCCSUS3_3[7]
VCCAPLLDMI2
44 ALW_ENABLE
VCC3_3[5]
+1.05V_RUN
T27
CH59
0.1U_0402_10V7K~D
@ CH58
10U_0805_6.3V6M~D
1
@ CH57
0.1U_0402_10V7K~D
USB
@ LH3
10UH_LBR2012T100M_20%~D
1
2
V12
CH56
1U_0402_6.3V6K~D
P28
+PCH_VCCDSW
@ QH4
VCCIO[31]
Note: Check Intel
+1.05V_RUN
P26
VCCDSW3_3
N26
VCCIO[30]
T16
VCCIO[29]
+VCCDSW3_3
VCCACLK
CH55
0.1U_0402_10V7K~D
AD49
+5V_ALW_PCH
+1.05V_RUN
0_0402_5%~D
+5V_ALW
POWER
@ RH278
20K_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
CH98
0.1U_0402_10V7K~D
1
@ RH201
1
@RH253
@
RH253
+VCCACLK
2
0.022_0805_1%
1
@ RH200
+3.3V_ALW_PCH
+3.3V_ALW2
+1.05V_RUN
VCCSUSHDA
P32
+3.3V_ALW_PCH
1
CH90
1U_0402_6.3V6K~D
CH91
0.1U_0402_10V7K~D
Title
+1.05V_RUN_VCCA_A_DPL 1
@RH279
@
RH279
2 +1.05V_RUN_VCCA_B_DPL
0_0805_5%~D
PCH (7/8)
Size
Document Number
Rev
1.0
LA-6592P
Date:
4
Sheet
1
20
of
75
UH4I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
UH4H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
CougarPoint_Rev_1p0
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
CougarPoint_Rev_1p0
Title
PCH (8/8)
Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
21
of
75
DSC only
VGA_THERMDP
47 VGA_THERMDP
2
B
Q12
MMBT3904WT1G_SC70-3~D
@
C266
100P_0402_50V8J~D
REM_DIODE1_N_4022
1
2
3
4
FAN1_TACH_FB
C219
22U_0805_6.3VAM~D
FAN1_DET#
D2
RB751S40T1_SOD523-2~D
REM_DIODE1_P_4022
JFAN1 CONN@
+FAN1_VOUT
Place under CPU

Place C266 close to the Q12 as possible
1
2
3 G1
4 G2
5
6
+3.3V_M
C1171
0.1U_0402_16V4Z~D
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to JMINI1 for WWAN and C277 close Q13
2
3
6
13
+3.3V_M
2 VDD_PWRGD
10K_0402_5%~D
1
R389
REM_DIODE1_N_4022
REM_DIODE1_P_4022
2
2200P_0402_50V7K~D
3
1
1
3
Q14
2
Q13
REM_DIODE3_N_4022
2
C271
60 MAX8731_IINP
1
2200P_0402_50V7K~D
THERMATRIP2#
18
THERMATRIP3#
SYS_SHDN#
26
27
DN2/DP4
DP2/DN4
POWER_SW#
20
POWER_SW#
REM_DIODE3_P_4022
REM_DIODE3_N_4022
30
29
DP3/DN5
DN3/DP5
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
21
9
BC_INT#_EMC4022
VCP2
31
25
VCP
VIN
4.7K_0402_5%~D
R387
VSET_4022
1
10K_0402_5%~D
2
R426
1
10K_0402_5%~D
FAN1_DET#
2
R402
1
10K_0402_5%~D
28
FAN_OUT
FAN_OUT
VSET
SMCLK/BC_CLK
SMDATA/BC_DATA
FAN1_TACH_FB
10
TACH/GPIO1
FAN1_DET#
11
GPIO2
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
2
10K_0402_5%~D
1 PWM
R1178
THERM_STP#
5
4
1
@R390
@
R390
2
47K_0402_1%~D
53
+RTC_CELL
C
ACAV_IN
42,60,62
BC_INT#_EMC4022 42
+FAN1_VOUT
8
7
BC_CLK_EMC4022 42
BC_DAT_EMC4022 42
+3.3V_M
1
+3.3V_M
17
THERMTRIP3#
19
2
B
E
THERMTRIP2#
DN1/THERM
DP1/VREF_T
VGA_THERMDN
VGA_THERMDP
B
C277
@C272
@
C272
100P_0402_50V8J~D
100P_0402_50V8J~D
VDDH
VDDH
VDDL
VDD_PWRGD
23
24
REM_DIODE3_P_4022
1
2
R385
FAN1_TACH_FB
U9
1
C270
BC_INT#_EMC4022
+3.3V_RUN
C305
10U_0805_6.3V6M~D
C275
0.1U_0402_16V4Z~D
C276
10U_0805_10V4Z~D
VGA_THERMDN
47 VGA_THERMDN
MOLEX_53398-0471~D
+5V_RUN
C1104
470P_0402_50V7K~D
2 3V_PWROK#
1K_0402_5%~D
1
R391
R388
22_0402_5%~D
+3.3V_M
1
R395
8.2K_0402_5%~D
+1.05V_RUN_VTT
RTC_PWR3V
+VCC_4022
EMC4022-1-EZK-TR_QFN32_5X5~D
R403
10K_0402_5%~D
SMSC request
2
B
C274
1U_0402_6.3V6K~D
2
R393
14
22
33
1U_0402_6.3V6K~D
C1179
16
+RTC_CELL
TEST1
TEST2
VSS
+VCC_4022
+ADDR_XEN
1
4.7K_0402_5%~D
0.1U_0402_16V4Z~D
C273
VDD
ADDR_MODE/XEN
1
32
42 PCH_PWRGD#
THERMATRIP2#
R398
C
2.2K_0402_5%~D
2
2
B
Q15 E
PMST3904_SOT323-3~D
1
C278
0.1U_0402_16V4Z~D
+RTC_CELL
VSET_4022
1
7 H_THERMTRIP#
1
U10
TC7SH08FU_SSOP5~D
POWER_SW#
4 O
DOCK_PWR_SW# 42
POWER_SW_IN# 42
R406
953_0402_1%~D
2
C282
0.1U_0402_16V4Z~D
C281
0.1U_0402_16V4Z~D
2
+3.3V_M
+3.3V_RUN_GFX
R405
8.2K_0402_5%~D
2
THERMATRIP3#
1
2
R1112
2.2K_0402_5%~D
@ R1111
8.2K_0402_5%~D
Rest=953, Tp=88degree
THERMB3 2
B
Q115 E
PMST3904_SOT323-3~D
C280
0.1U_0402_16V4Z~D

46 THERMTRIP_VGA#
Title
FAN & Thermal Sensor

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
22
of
75
Channel A
Thermal_GND
DGPU_SELECT# 25,41
16 LCD_BCLK+_PCH
16 LCD_BCLK-_PCH
16 LCD_B2+_PCH
16 LCD_B2-_PCH
16 LCD_B1+_PCH
16 LCD_B1-_PCH
16 LCD_B0+_PCH
16 LCD_B0-_PCH
46
45
41
40
35
34
30
29
25
26
0B2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
54
SEL2
DGPU_SELECT#
SEL
Chanel
Source
COM=NC
GPU
COM=NO
PCH
PI3LVD400ZFEX_TQFN56_11X5~D
52
5
51
NC
NC
NC
57
Thermal_GND
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
2
3
7
8
11
12
14
15
19
20
SEL
17
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
6
9
13
16
21
24
28
33
39
44
49
53
55
C1149
0.1U_0402_16V4Z~D
57
DGPU_SELECT#
0B1
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
4
10
18
27
38
50
56
C1150
0.1U_0402_16V4Z~D
NC
NC
NC
1
6
9
13
16
21
24
28
33
39
44
49
53
55
SW_LVDS_ACLK+ 24
SW_LVDS_ACLK- 24
SW_LVDS_A2+ 24
SW_LVDS_A2- 24
SW_LVDS_A1+ 24
SW_LVDS_A1- 24
SW_LVDS_A0+ 24
SW_LVDS_A0- 24
LDDC_CLK_SW 24
LDDC_DATA_SW 24
47 LCD_BCLK+_GPU
47 LCD_BCLK-_GPU
47 LCD_B2+_GPU
47 LCD_B2-_GPU
47 LCD_B1+_GPU
47 LCD_B1-_GPU
47 LCD_B0+_GPU
47 LCD_B0-_GPU
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C1148
0.1U_0402_16V4Z~D
52
5
51
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
U85
48
47
43
42
37
36
32
31
22
23
@ C1160
0.1U_0402_16V4Z~D
SEL2
17
+3.3V_RUN
@ C1159
0.1U_0402_16V4Z~D
54
SEL
C1145
0.1U_0402_16V4Z~D
DGPU_SELECT#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
C1146
0.1U_0402_16V4Z~D
0B2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
2
3
7
8
11
12
14
15
19
20
C1147
0.1U_0402_16V4Z~D
LDDC_CLK_PCH
LDDC_DATA_PCH
46
45
41
40
35
34
30
29
25
26
@ C1158
0.1U_0402_16V4Z~D
16 LCD_ACLK+_PCH
16 LCD_ACLK-_PCH
16 LCD_A2+_PCH
16 LCD_A2-_PCH
16 LCD_A1+_PCH
16 LCD_A1-_PCH
16 LCD_A0+_PCH
16 LCD_A0-_PCH
16 LDDC_CLK_PCH
16 LDDC_DATA_PCH
LDDC_CLK_GPU
LDDC_DATA_GPU
0B1
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
@ C1157
0.1U_0402_16V4Z~D
47 LCD_ACLK+_GPU
47 LCD_ACLK-_GPU
47 LCD_A2+_GPU
47 LCD_A2-_GPU
47 LCD_A1+_GPU
47 LCD_A1-_GPU
47 LCD_A0+_GPU
47 LCD_A0-_GPU
46 LDDC_CLK_GPU
46 LDDC_DATA_GPU
@ C1156
0.1U_0402_16V4Z~D
4
10
18
27
38
50
56
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Channel B
+3.3V_RUN
U84
48
47
43
42
37
36
32
31
22
23
SW_LVDS_BCLK+ 24
SW_LVDS_BCLK- 24
SW_LVDS_B2+ 24
SW_LVDS_B2- 24
SW_LVDS_B1+ 24
SW_LVDS_B1- 24
SW_LVDS_B0+ 24
SW_LVDS_B0- 24
DGPU_SELECT#
SEL
Chanel
Source
COM=NC
GPU
COM=NO
PCH
PI3LVD400ZFEX_TQFN56_11X5~D
+3.3V_RUN_GFX
LDDC_CLK_GPU
2
2.2K_0402_5%~D
LDDC_DATA_GPU
2
2.2K_0402_5%~D
1
R1122
1
R1121
+3.3V_RUN
B
LDDC_CLK_PCH
2
2.2K_0402_5%~D
LDDC_DATA_PCH
2
2.2K_0402_5%~D
1
R1124
1
R1123
Fingerprint CONN.
JBIO1
7
8
1
2
3
4
G1 5
G2 6
1
2
3
4
5
6
+3.3V_FP
@ U12
1 GND
+3.3V_FP
FP_USB_DFP_USB_D+
FP_RESET#
FP_USB_D-
33
1
TYCO_2041084-6~D
CONN@
C285 Place
close to JBIO1.1
IO1
VCC
IO2
4
3
+3.3V_RUN
33 FP_USBD+
33 FP_USBD-
@ L8
DLW21SN121SQ2L_4P~D
1
2 2
FP_USB_D+
+3.3V_RUN
FP_USB_D+
PRTR5V0U2X_SOT143-4~D
C285
0.1U_0402_16V4Z~D
1
R409
1
R410
FP_USB_D-
+3.3V_ALW
2
0_0402_5%~D
2
0_0402_5%~D
@ R1135
0_0603_5%
1
2
+3.3V_FP
@R1136
@
R1136
0_0603_5%~D
1
2
Title
LVDS SW/FP Conn.

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
23
of
75
LCD Power
Q18
SI3456DDV-T1-GE3_TSOP6~D
+3.3V_ALW
6
4
5
2
R412
1
100K_0402_5%~D
1
+LCDVDD
+15V_ALW
+3.3V_RUN
LDDC_CLK_SW
2
2.2K_0402_5%~D
LDDC_DATA_SW
2
2.2K_0402_5%~D
3
2
3
4
+3.3V_RUN
BIA_PWM_GPU 46
D64
RB751V-40GTE-17_SOD323-2~D
1
2
PANEL_BKEN_DGPU 46
D69
RB751V-40GTE-17_SOD323-2~D
1
2
PANEL_BKEN_EC 41
C296
0.1U_0603_50V4Z~D
PWR_SRC_ON
Q22
PANEL_BKEN_PCH 16
1
R423
2
1
47K_0402_5%~D
2
G
DISP_ON
R422
100K_0402_5%~D
BIA_PWM_PCH 16
D67
RB751V-40GTE-17_SOD323-2~D
1
2
+BL_PWR_SRC
Close to JLVD1.41
Close to JLVDS1.42,43
40mil
6
5
2
1
C298
0.1U_0402_16V4Z~D
Q21
FDC654P-G_SSOT-6~D
+PWR_SRC
40mil
C297
1000P_0402_50V7K~D
ACES_59003-0400C-001
CONN@
BIA_PWM_LVDS
1
1
Q20
PDTC124EU_SC70-3~D
BAT54CW_SOT323-3~D
+LCDVDD
+LCDVDD
ATG_MAC_LCD_DET# 17
D63
RB751V-40GTE-17_SOD323-2~D
1
2
Place near to JLVDS1
SW_LVDS_A2+ 23
SW_LVDS_A2- 23
SW_LVDS_A1+ 23
SW_LVDS_A1- 23
SW_LVDS_A0+ 23
SW_LVDS_A0- 23
LDDC_DATA_SW 23
LDDC_CLK_SW 23
LCD_TST
41
+3.3V_RUN
D66
RB751V-40GTE-17_SOD323-2~D
1
2
6 2
EN_LCDPWR
1
3
46 ENVDD_GPU
1
R159
1
R160
SW_LVDS_ACLK+ 23
SW_LVDS_ACLK- 23
LDDC_DATA_SW
LDDC_CLK_SW
LCD_TST
41 LCD_VCC_TEST_EN
23
23
23
23
23
23
SW_LVDS_B2+
SW_LVDS_B2SW_LVDS_B1+
SW_LVDS_B1SW_LVDS_B0+
SW_LVDS_B0-
SW_LVDS_BCLK+ 23
SW_LVDS_BCLK- 23
D6
C292
0.1U_0402_16V4Z~D
C293
0.1U_0402_25V4Z~D
D53
RB751V-40GTE-17_SOD323-2~D
2
1
16,41 ENVDD_PCH
Q19B
DISP_ON
BIA_PWM_LVDS
1
2
LE92 BLM18BB221SN1D_2P~D
R414
100K_0402_5%~D
1
2
C246
0.1U_0603_50V4Z~D
+15V_ALW
R413
130_0402_5%~D
BATT_WHITE_LED 45
BATT_YELLOW_LED 45
BREATH_WHITE_LED 45
+BL_PWR_SRC
C243
0.1U_0402_16V4Z~D
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Q19A
GND
BATT_WHITE_LED
BATT_YELLOW_LED
BREATH_WHITE_LED
VR_SRC
VR_SRC
VR_SRC
NC
DISP_ON/OFF#
PWM
CONNTST_GND
VR_GND
VR_GND
VR_GND
LCD_B_CLK+
LCD_B_CLKGND
LVDS_B2+
LVDS_B2LVDS_B1+
LVDS_B1LVDS_B0+
LVDS_B0GND
LVDS_A_CLK+
LVDS_A_CLKGND
LVDS_A2+
LVDS_A2LVDS_A1+
LVDS_A1LVDS_A0+
LVDS_A0EDID_DATA
MGND6
EDID_CLK
MGND5
BIST
MGND4
V_EDID
MGND3
LCD_VDD
MGND2
LCD_VDD
MGND1
CONNTST
+LCDVDD
JLVDS1
R1138
100K_0402_5%~D
BIA_PWM_EC 42
42
EN_INVPWR
EN_INVPWR
D68
RB751V-40GTE-17_SOD323-2~D
1
2
R1137
10K_0402_5%~D
FDC654P: P CHANNAL
Panel backlight power control by EC
+CAMERA_VDD
CCD_OFF
2
G
1
R427
2
0_0402_5%~D
1
R428
2
0_0402_5%~D
42 TOUCH_SCREEN_PD#
C304
0.1U_0402_25V4Z~D
18 E3_PAID_TS_DET#
17
USBP1317
USBP13+
IO1
IO2
USBP13+
PRTR5V0U2X_SOT143-4~D
Place close JTCH1

+5V_TSP
JTCH1
1 1
2 2
3
USBP13- 4 3
4
USBP13+
5 5
6 6
2
2
+3.3V_RUN
+5V_TSP
G2
USBP12_D+
CCD_OFF
Q24
41
Webcam PWR CTRL
1
2
1
2
USBP13-
TYCO_1734595-6
5
4
USBP12+
USBP12_D6
USBP12+
2
R431
100K_0402_5%~D
17
USBP12-
VCC
C302
0.1U_0402_10V7K~D
USBP12-
Q32
C306
0.1U_0402_25V4Z~D
R429
100K_0402_5%~D
C301
0.1U_0402_16V4Z~D 17
@L10
@
L10
DLW21SN121SQ2L_4P~D
4 4
3 3
3
R430
100K_0402_5%~D
+3.3V_ALW
@U86
@
U86
1 GND
PMV45EN_SOT23-3~D
Q125B
30
Q125A
+15V_ALW
30
DMIC0
Touch Screen Connector
JST_BM08B-SRSS-TB1-LF-SN~D
CONN@
DMIC_CLK
+5V_RUN
@ R1592
0_0603_5%~D
1
2
+3.3V_RUN
DMIC0
@ D8
SD05.TCT_SOD323-2~D
Q23
PMV45EN_SOT23-3~D
+15V_ALW
DMIC_CLK
C300
10U_0805_10V4Z~D
C299
0.1U_0402_16V4Z~D
CAM_MIC_CBL_DET# 17
+CAMERA_VDD
CAM_MIC_CBL_DET#
USBP12_D+
USBP12_D-
1
2
3
4
5
6
7
8
9
10
@ D7
SD05.TCT_SOD323-2~D
1
2
3
4
5
6
7
8
G1
G2
For Webcam
G1
+5V_TSP
JCAM1
CONN@
C303
0.1U_0402_25V4Z~D
A
Title
eDP & CAM &TS Conn

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
24
of
75
+5V_RUN
U93
B
Channel A --> GPU
Channel B --> PCH
7
17
46 GPU_CRT_GRN
16 PCH_CRT_GRN
8
18
GRNA
GRNB
46 GPU_CRT_BLU
16 PCH_CRT_BLU
9
19
BLUA
BLUB
46 GPU_CRT_CLK_DDC
16 PCH_CRT_DDC_CLK
5
15
SCLA
SCLB
46 GPU_CRT_DAT_DDC
16 PCH_CRT_DDC_DAT
6
16
+3.3V_RUN
1
R1581
2 CRT_EN
100K_0402_5%~D
MAX14885E
46 GPU_CRT_RED
16 PCH_CRT_RED
REDA
REDB
SDAA
SDAB
VCC
29
VCC
21
VL
11
RED1
RED2
33
24
GRN1
GRN2
32
23
BLU1
BLU2
31
22
EN
46 GPU_CRT_HSYNC
16 PCH_CRT_HSYNC
3
13
SHA
SHB
SCL1
SCL2
35
26
46 GPU_CRT_VSYNC
16 PCH_CRT_VSYNC
4
14
SVA
SVB
SDA1
SDA2
34
25
1
40
39
38
S00
S01
S10
S11
SH1
SH2
37
28
41 EDID_SELECT#
41 CRT_SWITCH
23,41 DGPU_SELECT#
CRT_SWITCH
CRT_SWITCH
30
20
10
GND
GND
GND
41
GPAD
+3.3V_RUN
SV1
SV2
NC
1
C1182
1U_0603_10V7K~D
RED_CRT
RED_DOCK
31
40
GREEN_CRT 31
GREEN_DOCK 40
BLUE_CRT
BLUE_DOCK
C1181
1U_0402_6.3V6K~D
Port 1 --> MB Port RGB
31
40
CLK_DDC2_CRT 31
CLK_DDC2_DOCK 40
Port 2 --> Docking Port RGB
DAT_DDC2_CRT 31
DAT_DDC2_DOCK 40
HSYNC_BUF 31
HSYNC_DOCK 40
36
27
VSYNC_BUF 31
VSYNC_DOCK 40
12
MAX14885EETL+T_TQFN40_5X5~D
CRT_SWITCH
DGPU_SELECT#
EDID_SELECT#
A --> Port 1
B --> Port 1
A --> Port 2
B --> Port 2
Title
CRT/Video switch
Size
Document Number
Date:
Rev
1.0
LA-6592P
1
Sheet
25
of
75
2
3
+5V_RUN
HDMI_OE#
HDMI_HPD_SINK
R1164
10K_0402_5%~D
1
2HDMI_HPD_SINK_R
S
PJP54
PAD-OPEN1x1m
HDMI_CEC
TMDSE_CON_CLK#
TMDSE_CON_CLK
TMDSE_CON_N0
Close to U19 VCC pins
+3.3V_RUN_HDMI
1
R457
2
4.7K_0402_5%~D
HDMI_OE#
RB751V-40GTE-17_SOD323-2~D
+5V_HDMI_DDC
R460 2
R461 2
1 1.5K_0402_5%~D HDMI_SDA_SINK
1 1.5K_0402_5%~D HDMI_SCL_SINK
HDMI_SDA_CTL
HDMI_SCL_CTL
+3.3V_RUN
11
15
21
33
40
46
I2C_CTL_EN#
32
NC/DDCBUF_EN#
25
NC/OE#
8
9
3
4
1
6
TMDSE_CON_P2
1
@ R451
L19
HPD
SDAZ
SCLZ
DPE_GPU_HPD
TMDSE_RP_CLK#
29
28
TMDS_E_GPU_DDC#
TMDS_E_GPU_DDC
CEXT
2
0_0402_5%~D
1
@ R462
L20
TMDS_E_GPU_DDC# 47
TMDS_E_GPU_DDC 47
TMDSE_RP_P0
TMDSE_RP_N0
GND/PC2
C355
2.2U_0402_6.3V6M~D
TMDSE_CON_CLK
TMDSE_CON_CLK#
2
0_0402_5%~D
TMDSE_CON_P0
TMDSE_CON_N0
DLW21SN900HQ2L_0805_4P~D
1
2
@ R466
0_0402_5%~D
PS121QFN48G_QFN48_7X7
+3.3V_RUN
EQUALIZATION SETTING:
[PC2,PC1,PC0]=000, 12dB
[PC2,PC1,PC0]=001, 16dB
[PC2,PC1,PC0]=010, 10dB
[PC2,PC1,PC0]=011, 7dB
[PC2,PC1,PC0]=100, 1.5dB
[PC2,PC1,PC0]=101, 4dB (Default)
[PC2,PC1,PC0]=110, 9dB
[PC2,PC1,PC0]=111, 7dB
TMDSE_RP_CLK
DPE_GPU_HPD 46
I2C_ADDR0/PC0
I2C_ADDR1/PC1
REXT
20
21
22
23
TYCO_2041270-1
CONN@
TMDSE_RP_P2
TMDSE_RP_N2
TMDSE_RP_P1
TMDSE_RP_N1
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_CLK
TMDSE_RP_CLK#
HDMI_CEC
TMDSE_CON_P1
TMDSE_CON_N2
1
2
@ R459
0_0402_5%~D
SDA
SCL
SDA_CTL/CFG1
SCL_CTL/CFG0
23
22
20
19
17
16
14
13
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
HPD_SINK
26
10
R467
499_0402_1%~D
POW
30
34
35
PC0
2
2 4.7K_0402_5%~D PC1
4.7K_0402_5%~D
PC2
2
4.7K_0402_5%~D
1
R463 1
@R464
@
R464
1
R465
OUT1p
OUT1n
OUT2p
OUT2n
OUT3p
OUT3n
OUT4p
OUT4n
TMDSE_CON_P0
TMDSE_CON_N1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2GND
D2_shield GND
D2+
GND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
@ D65
R1163
0_0402_5%~D
HDMI_HPD_SINK
IN1p
IN1n
IN2p
IN2n
IN3p
IN3n
IN4p
IN4n
5
12
18
24
27
31
36
37
43
49
+3.3V_RUN
+3.3V_RUN
38
39
41
42
44
45
47
48
C345
0.1U_0402_16V4Z~D
TMDSE_GPU_C_P2
TMDSE_GPU_C_N2
TMDSE_GPU_C_P1
TMDSE_GPU_C_N1
TMDSE_GPU_C_P0
TMDSE_GPU_C_N0
TMDSE_GPU_C_CLK
TMDSE_GPU_C_CLK#
C344
0.1U_0402_16V4Z~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C343
0.1U_0402_16V4Z~D
1
1
1
1
1
1
1
1
C342
0.1U_0402_16V4Z~D
2
2
2
2
2
2
2
2
C341
0.1U_0402_16V4Z~D
C346
C347
C348
C349
C350
C351
C352
C353
C340
0.1U_0402_16V4Z~D
TMDSE_GPU_P2
TMDSE_GPU_N2
TMDSE_GPU_P1
TMDSE_GPU_N1
TMDSE_GPU_P0
TMDSE_GPU_N0
TMDSE_GPU_CLK
TMDSE_GPU_CLK#
C339
0.1U_0402_16V4Z~D
+5V_RUN
47
47
47
47
47
47
47
47
C354
0.01U_0402_16V7K~D
U19
JHDMI1
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDMI_SDA_SINK
HDMI_SCL_SINK
HDMI_SDA_CTL
2
4.7K_0402_5%~D
HDMI_SCL_CTL
2
4.7K_0402_5%~D
+3.3V_RUN
Q25
3
1
@ R446
1
@ R447
HDMI_HPD_SINK 2
G
B
1
2
1
+3.3V_RUN
C338
10U_0805_10V4Z~D
2A_8VDC_SMD1812P200TF
R443
4.7K_0402_5%~D
+VDISPLAY_VCC
C337
0.1U_0402_10V7K~D
F2
@R5
@
R5
0_1206_5%~D
+3.3V_RUN
+5V_RUN_HDMI
NC
D4
BAT1000-7-F_SOT23-3~D
2
R1165
1
@ R468
L21
2
0_0402_5%~D
TMDSE_RP_P1
TMDSE_CON_P1
TMDSE_RP_N1
TMDSE_CON_N1
1
10K_0402_5%~D
1
2
@ R469
0_0402_5%~D
A
DPE_GPU_HPD
1
R1128
2
100K_0402_5%~D
TMDSE_RP_P2
TMDSE_RP_N2
1
@ R470
L22
4 4
1
2
0_0402_5%~D
3
2
TMDSE_CON_P2
TMDSE_CON_N2
1
2
@ R471
0_0402_5%~D
Title
HDMI port
Size
Document Number
Date:
Rev
1.0
LA-6592P
1
Sheet
26
of
75
+3.3V_RUN
AUX/DDC GPU for DPC to E-DOCK
2
C356
+3.3V_RUN
AUX/DDC GPU for DPD to E-DOCK
2
C366
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
D
47 DPC_GPU_AUX/DDC
C357
0.1U_0402_10V7K~D
DPC_GPU_AUX/DDC
2
1 DPC_GPU_AUX_C
DPC_DOCK_AUX
40 DPC_DOCK_AUX
47 DPC_GPU_AUX#/DDC
U20
DPC_GPU_AUX#/DDC 2
C360
BE0
A0
B0
4
5
1 DPC_GPU_AUX#_C
0.1U_0402_10V7K~D
DPC_DOCK_AUX#
40 DPC_DOCK_AUX#
1
2
6
7
BE1
A1
VCC
BE3
14
13
A3
12
B3
BE2
B1
A2
GND
B2
C367
0.1U_0402_10V7K~D
DPD_GPU_AUX/DDC
2
1 DPD_GPU_AUX_C
47 DPD_GPU_AUX/DDC
DPC_GPU_AUX/DDC
DPD_DOCK_AUX
40 DPD_DOCK_AUX
11
10
47 DPD_GPU_AUX#/DDC
DPC_GPU_AUX#/DDC
DPD_GPU_AUX#/DDC 2
C368
BE0
A0
VCC
BE3
B0
4
5
1 DPD_GPU_AUX#_C
0.1U_0402_10V7K~D
DPD_DOCK_AUX#
40 DPD_DOCK_AUX#
U23
1
2
A3
BE1
A1
6
7
PI3C3125LEX_TSSOP14~D
B3
BE2
B1
A2
GND
B2
14
13
DPD_GPU_AUX/DDC
12
11
10
DPD_GPU_AUX#/DDC
9
8
PI3C3125LEX_TSSOP14~D
+5V_RUN
+5V_RUN
DPC_CA_DET#
2
A
3
DPD_CA_DET
40 DPD_CA_DET
U21
NC7SZ04P5X-G_SC70-5~D
DPC_CA_DET
40 DPC_CA_DET
NC
1
0.1U_0402_16V4Z~D
NC
2
C369
2
1
C365
0.1U_0402_16V4Z~D
DPD_CA_DET#
U24
+3.3V_RUN
R1539
2.2K_0402_5%~D
1
1
2
0_0402_5%~D
DPD_DOCK_AUX
2
3
1
C1175
0.01U_0402_16V7K~D
1
2
1
@ R1064
R1066
2.2K_0402_5%~D
5
4
2
0_0402_5%~D
+3.3V_RUN
DPC_DOCK_AUX#
1
@ R1067
Q111B
Q113B
1
1
2
2
DPD_CA_DET
3
4
R1530
2.2K_0402_5%~D
1
@R1523
@
R1523
R1065
100K_0402_5%~D
DPC_DOCK_AUX
1
2
6
1
R1063
100K_0402_5%~D
Q109A
C1174
0.01U_0402_16V7K~D
Q110A
DPC_CA_DET
1
+3.3V_RUN
+3.3V_ALW2
Q109B
2
0_0402_5%~D
Q111A
2
Q110B
R1062
2.2K_0402_5%~D
1
@ R1538
Q113A
R1537
100K_0402_5%~D
R1532
100K_0402_5%~D
+15V_ALW
+3.3V_ALW2
+3.3V_RUN
+15V_ALW
2
0_0402_5%~D
DPD_DOCK_AUX#
1
R491
1
R492
DPD_CA_DET
2
1M_0402_5%~D
DPC_CA_DET
2
1M_0402_5%~D

Title
DP AUX SW
Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
27
of
75
+3.3V_RUN
PJP63
PAD-OPEN1x1m
+3.3V_RUN_HDDR
INT 1
INT 2
SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD
3
11
1
2
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
2
4
5
10
1
2
1
8
9
12
13
14
GND
GND
GND
GND
VDD_IO
VDD
2
1
2
1
1
2
1
2
1
2
1
2
1
2
PSATA_PRX_DTX_P0_RP
PSATA_PRX_DTX_N0_RP
BINP
BINM
1
6
PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP
11
12
@ R495
0_0402_5%~D
HDD_FALL_INT
FFS_INT2
17 HDD_FALL_INT
7,12,13,14,15,36
7,12,13,14,15,36
DE351DLTR
15
14
PA
PB
@R496
@
R496
0_0402_5%~D
U26
C388
0.1U_0402_16V4Z~D
GND
GND
GND
GND
EP
AOUTP
AOUTM
MAX4951BECTP+TGH7_TQFN20_4X4~D
Note: +HDD_DEW1, +HDD_DEW2, +HDD_EQ1, +HDD_EQ2 need to route

10 mils and R1169,R1171,R1174,R1176 need to change to 10k and
no stuff R1174, R1176 to support TI SN75LVCP601
@ R1176
0_0402_5%~D
@ R1174
0_0402_5%~D
C387
10U_0805_6.3V6M~D
@ R1175
10K_0402_5%~D
+3.3V_RUN_FFS
@ R1173
10K_0402_5%~D
Free Fall Sensor
3
13
17
19
21
+HDD_EQ1
+HDD_EQ2
+3.3V_RUN
PJP53
PAD-OPEN1x1m
BOUTM
BOUTP
HDD_PE1
HDD_PE2
@ R1170
10K_0402_5%~D
C385
4
5
+HDD_DEW1
9
8
@ R1172
10K_0402_5%~D
AINP
AINM
+HDD_DEW2
6
10
16
20
@R494
@
R494
0_0402_5%~D
2
C386
14 PSATA_PRX_DTX_P0_C
1
2
VCC
VCC
VCC
VCC
@R493
@
R493
0_0402_5%~D
2
C384
14 PSATA_PRX_DTX_N0_C
EN
CAD
C383
14 PSATA_PTX_DRX_N0_C
+3.3V_RUN
PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
PSATA_PTX_DRX_N0
1
0.01U_0402_16V7K~D
PSATA_PRX_DTX_N0
1
0.01U_0402_16V7K~D
PSATA_PRX_DTX_P0
1
0.01U_0402_16V7K~D
14 PSATA_PTX_DRX_P0_C
@ R1169
0_0402_5%~D
U25
7
18
+3.3V_RUN
@R1171
@
R1171
0_0402_5%~D
C382
0.1U_0402_16V4Z~D
HDD Repeater
C381
0.01U_0402_16V7K~D
+3.3V_RUN
HDD PWR
DE351DLTR8_LGA14_3X5~D
+5V_ALW
+15V_ALW
PAD-OPEN1x1m
14 HDD_DET#
HDD_DET#
+5V_HDD
+5V_HDD
+3.3V_RUN
+5V_HDD
@R506
@
R506
100K_0402_5%~D
2
D16
FFS_INT2
FFS_INT2_Q
FFS_INT2
18
RB751S40T1_SOD523-2~D
C395
1000P_0402_50V7K~D
FFS_INT2_Q
C396
0.1U_0402_16V4Z~D
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V
42
HDDC_EN
R505
100K_0402_5%~D
GND1
GND2
23
24
1
2
5
6
@ Q27
G
S
4
+5V_HDD
+5V_RUN
PJP3
1
JUMP_43X79
2
3
5
4
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3.3V_RUN_HDD
@ Q28A
+3.3V_RUN
PJP64
B
SATA_PRX_DTX_N0
1
1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0
0.01U_0402_16V7K~D
PSATA_PRX_DTX_N0_RP
2
PSATA_PRX_DTX_P0_RP C391 2
C392
GND
RX+
RXGND
TXTX+
GND
C394
10U_0805_10V4Z~D
1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0
1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0
@ C393
0.1U_0603_50V4Z~D
PSATA_PTX_DRX_P0_RP C389 2
PSATA_PTX_DRX_N0_RP C390 2
@ Q28B
DDR_XDP_WAN_SMBDAT
2
10K_0402_5%~D
DDR_XDP_WAN_SMBCLK
2
10K_0402_5%~D
HDD_FALL_INT
2
100K_0402_5%~D
1
R501
1
R502
1
R503
@ R500
100K_0402_5%~D HDD_EN_5V
SHORT DEFAULT
R504
100K_0402_5%~D
2
JSATA1
1
2
3
4
5
6
7
@ R499
100K_0402_5%~D
+3.3V_RUN
+3.3V_ALW2
+5V_HDD Source
JAE_SP100421-HDD
CONN@
Main SATA +5V Default
Q29
Pleace near HDD CONN

+3.3V_RUN_HDD
C402
0.1U_0402_16V4Z~D
C399
0.1U_0402_16V4Z~D
Pleace near HDD CONN
Title
HDD CONNECTOR
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
28
of
75
+3.3V_ALW
1
R510
2 ZODD_WAKE#
10K_0402_5%~D
1
R513
2 MOD_MD
10K_0402_5%~D
+3.3V_ALW_PCH
+5VMOD Source
+15V_ALW
+3.3V_ALW2
+5V_ALW
1
2
5
6
D Q30
G
2 MOD_EN
42 DEVICE_DET#
+5V_MOD
MOD_MD
Pleace near ODD CONN

15 CLK_PCIE_EMB
15 CLK_PCIE_EMB#
15 PCIE_PRX_EMBTX_P4
15 PCIE_PRX_EMBTX_N4
15 PCIE_PTX_EMBRX_P4
15 PCIE_PTX_EMBRX_N4
0.1U_0402_10V7K~D 2
0.1U_0402_10V7K~D 2
+5V_MOD
EMBCLK_REQ#
PCIE_WAKE#
PLTRST_EMB#
BAY_SMBDAT
BAY_SMBCLK
15 EMBCLK_REQ#
36,37,41 PCIE_WAKE#
17 PLTRST_EMB#
42,52 BAY_SMBDAT
42,52 BAY_SMBCLK
41 MOD_SATA_PCIE#_DET
+3.3V_ALW
1 C409 PCIE_PTX_EMBRX_P4_C
1 C408 PCIE_PTX_EMBRX_N4_C
1
R1183
2
10K_0402_5%~D
DP
+5V
+5V
MD
GND
GND
14
15
16
17
18
19
20
21
22
23
24
GND
REFCLK+
REFCLKGND
PETX+
PETXGND
GND
PERX+
PERXGND
25
26
27
28
29
30
31
2
41
MODC_EN
R512
100K_0402_5%~D
+5V
CLKREQ#
WAKE#
PERST#
SMB_DATA
SMB_CLK
HPD
GND1
GND2
8
9
10
11
12
13
MODC_EN# 5
6
GND
A+
AGND
BB+
GND
SATA_ODD_PRX_DTX_N1
SATA_ODD_PRX_DTX_P1
1
2
3
4
5
6
7
14 SATA_ODD_PRX_DTX_N1_C
14 SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
14 SATA_ODD_PTX_DRX_P1_C
14 SATA_ODD_PTX_DRX_N1_C
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
S
+5V_MOD
+5V_RUN
PJP4
C401
10U_0805_10V4Z~D
2
C407 2
C406
2
C405 2
C404
Q31A
C398
0.1U_0402_16V4Z~D
C397
1000P_0402_50V7K~D
3
C400
0.1U_0603_50V4Z~D
JSATA2
Q31B
+5V_MOD
1
1
R507
100K_0402_5%~D
R509
100K_0402_5%~D
JUMP_43X79
R511
100K_0402_5%~D
For ODD
2 USB30_SMI#
100K_0402_5%~D
1
R514
32
33
TYCO_2-2129116-3
CONN@
+3.3V_ALW
R515
100K_0402_5%~D
2
Q76
USB30_EN
3
ZODD_WAKE#
ZODD_WAKE# 41
MOD_MD
Q123A
MOD_SATA_PCIE#_DET
2
1
MODC_EN#
Q123B
USB30_SMI#
3
USB30_SMI# 14
USB30_EN
Title
ODD CONNECTOR
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
29
of
75
DVDD_IO should match

with HDA Bus level
Speaker Connector
+3.3V_RUN
+3.3V_RUN
place close to pin27

+VDDA_AVDD
6
5
PCH_AZ_SDIN0_R
2
33_0402_5%~D
PCH_AZ_CODEC_RST#
1
R1096
I2S_DO
PORTA_L
PORTA_R
VrefOut_A
BITCLK
SDATA_OUT
31
32
PORTD_+L
PORTD_-L
40
41
PORTD_+R
PORTD_-R
44
43
SDATA_IN
RESET#
I2S_MCLK
MONO_OUT
25
16
I2S_SCLK
PC_BEEP
12
17
I2S_DOUT
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
2
4
46
48
CAP+
36
I2S_DI#
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
42
49
PVSS
AVSS1
AVSS
AVSS
GND
26
30
33
External MIC
PORT B
HeadPhone Out
I2S_12MHZ
1
RE1100
1A
1Y#
2A
2Y#
3A
3Y#
4A
4Y#
5A
5Y#
6A
6Y#
14
PORT D
Internal SPK
41 EN_I2S_NB_CODEC#
+VDDA_AVDD
R1078
2.49K_0402_1%~D
2
1
Resistor
SENSE_A
SENSE_B
39.2K
PORT A
PORT E
20K
PORT B
PORT F
1
15
R1110
1K_0402_5%~D
OE1#
OE2#
GND
13
CE574
12P_0402_50V8J~D
1
2
DAI_BCLK#
40
DAI_LRCK#
40
RE1102
33_0402_5%~D
1
2
11
I2S_DI#
CE573
12P_0402_50V8J~D
1
2
8
+3.3V_RUN
CD74HC366M96_SO16~D
@ D58
DA204U_SOT323-3~D
+3.3V_RUN
2.49K
Pull-up to AVDD
DAI_DI
40
R1082
100K_0402_5%~D
5
4
Q106A
41 DOCK_HP_DET
RE1101
33_0402_5%~D
1
2
DAI_DO# 40
R1081
100K_0402_5%~D
R1080
20K_0402_1%~D
R1079
39.2K_0402_1%~D
+VREFOUT_R
DAI_12MHZ# 40
+3.3V_RUN
C979
1000P_0402_50V7K~D
AUD_SENSE_B
Place closely to Pin 14
VCC
2
10
33_0402_5%~D
12
Dock Audio
2
33_0402_5%~D
I2S_LRCLK
I2S_DO
PORT C
Add for solve pop noise and detect issue
42
PORT A
U73
16
2
4
I2S_BCLK
1
RE1098
AUD_HP_NB_SENSE 31,41
@C967
@C967
0.1U_0402_16V4Z~D
14
+3.3V_RUN
1
2
@ C983
100P_0402_50V8J~D
GNDA1
2
R1087
100K_0402_5%~D
Q107B
@ D57
DA204U_SOT323-3~D
PAD-OPEN1x1m
Q107A
@ D56
DA204U_SOT323-3~D
31 AUD_MIC_SWITCH
+3.3V_RUN
@ C982
100P_0402_50V8J~D
1
2
PJP62
+3.3V_RUN
@ D55
DA204U_SOT323-3~D
2
SPKR
100K_0402_5%~D
2
BEEP
100K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
@ D54
DA204U_SOT323-3~D
R1086
20K_0402_1%~D
DOCK_MIC_DET 41
Q106B
2
0_0402_5%~D
MIC_IN_R
1
RB751V-40GTE-17_SOD323-2~D
@ C981
100P_0402_50V8J~D
1
2
Tie Analog Ground to Digital ground

under codec by a single point
C1103
0.1U_0402_10V7K~D
@ R1088
100K_0402_5%~D
C980
1000P_0402_50V7K~D
+3.3V_RUN
@ R352
39.2K_0402_1%~D
6
2
1
AUD_SENSE_A
+5V_RUN
change C981 to jumper to solve audio noise issue ( Special Head phone only)
+VDDA_AVDD
R1083
2.49K_0402_1%~D
2
1
Pop R161 0-ohm for Combo Jack,

pop C1164 1UF for E2 backup circuit
Place C963~C966 close to Codec
92HD90B2X5NLGXZBX8_QFN48_7X7~D
Place closely to Pin 13.
C966
10U_0805_10V6K~D
2
10K_0402_5%~D
Place C962 close to Codec
C965
1U_0603_10V6K~D
1
R1099
DVSS
R1095
0_0805_5%~D
1
2
C962
4.7U_0603_10V6K~D
C964
4.7U_0603_10V6K~D
7
@ C977
10P_0402_50V8J~D
21
22
34
37
C963
4.7U_0603_10V6K~D
@C978
@C978
0.1U_0402_10V7K~D
35
1
2
+3.3V_RUN
CAP-
MIC_IN_R
31 2
2
2
MIC_IN_L
1
2
MIC_IN_RR C1163 1U_0402_6.3V6K~D
1
2 +VREFOUT_R
R1143 2.2K_0402_5%~D
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_L 31
AUD_HP_OUT_R
AUD_HP_OUT_R 31
MIC_IN_L and MIC_IN_RR
INT_SPK_L+
must symmetric in layout
INT_SPK_LMIC_IN_RR
1
INT_SPK_R+
R161
INT_SPK_R+VREFOUT_R 2
D70
SPKR_R
1
2
1
C1105
0.1U_0402_16V4Z~D
R1119
AUD_PC_BEEP
BEEP_R
1
2
1
C1106
0.1U_0402_16V4Z~D
R1120
LE93
1
DMIC_CLK_L 1
@ R1141
2
DMIC_CLK
24
BLM18BB221SN1D_2P~D
1
DMIC0
24
@
R1142
Place LE93 close to codec
VREFFILT
CAP2
VVreg
C1180
1U_0603_10V6K~D
18
AUD_SENSE_A
AUD_SENSE_B
28
29
23
PORTB_L
PORTB_R
SYNC
+VDDA_PVDD
13
14
15
@ R1076
10_0402_5%~D
45
39
I2S_BCLK
I2S_DO_R
2
33_0402_5%~D
I2S_LRCLK
Place R1097 close to codec
41 AUD_NB_MUTE#
PVDD
PVDD
SENSE_A
SENSE_B
PCH_AZ_CODEC_BITCLK
@R1077
@
R1077
47_0402_5%~D
27
38
I2S_12MHZ
1
R1097
Close to U16 pin6
8
11
DVDD
AVDD1
AVDD2
3
1
DVDD_IO
Place R1096 close to codec
14 PCH_AZ_CODEC_RST#
10
14 PCH_AZ_CODEC_SYNC
14 PCH_AZ_CODEC_SDIN0
PCH_AZ_CODEC_SDOUT
DVDD_CORE
C961
0.1U_0402_16V4Z~D
PCH_AZ_CODEC_SDOUT
14 PCH_AZ_CODEC_SDOUT
U72
1
C960
10U_0805_10V6K~D
PCH_AZ_CODEC_BITCLK
14 PCH_AZ_CODEC_BITCLK
C959
0.1U_0402_16V4Z~D
Place C951~C961 close to Codec
Close to U16 pin5
C958
10U_0805_10V6K~D
@ DE2
PESD5V0U2BT_SOT23-3~D
@ DE1
C976
680P_0402_50V7K~D
C975
680P_0402_50V7K~D
C974
680P_0402_50V7K~D
C973
680P_0402_50V7K~D
C1173
0.1U_0402_16V4Z~D
MOLEX_53398-0471~D
C1172
1U_0603_10V6K~D
5
6
C957
0.1U_0402_16V4Z~D
1
2
3 G1
4 G2
C956
1U_0603_10V6K~D
1
2
3
4
C955
10U_0805_10V6K~D
INT_SPK_L+_L
INT_SPK_L-_L
INT_SPK_R+_L
INT_SPK_R-_L
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
C954
10U_0805_10V6K~D
2
2
2
2
C953
0.1U_0402_16V4Z~D
1
1
1
1
C952
1U_0603_10V6K~D
L91
L92
L93
L94
C994
0.1U_0402_16V4Z~D
JSPK1 CONN@
20 mils trace
INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-
L77
BLM21PG600SN1D_0805~D
1
2
+5V_RUN
place close to pin38
Internal Speakers Header
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals

Title
Azalia (HD) Codec

Size
Document Number
Date:
Rev
1.0
LA-6592P
1
Sheet
30
of
75
I/O board CONN.
SW1
42,43 POWER_SW#_MB
Change to TYCO_2041300-2_60P-T and Horizonal reverse
to SSI
JIO1
SKRBAAE010_4P~D
@ D23
32 SW_LAN_TX132 SW_LAN_TX1+
3
PESD24VS2UT_SOT23-3~D
2
32 SW_LAN_TX2+
32 SW_LAN_TX2-
@ SW2
42 LAT_ON_SW_BTN#
32 SW_LAN_TX332 SW_LAN_TX3+
+5V_RUN
+3.3V_LAN
32 LED_100_ORG#
32 LED_10_GRN#
32 LAN_ACTLED_YEL#
+5V_ALW
SKRBAAE010_4P~D
POWER & INSTANT ON SWITCH

Media Board
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
17
17
USBP3+
USBP3-
39,41 ESATA_USB_PWR_EN#
30,41 AUD_HP_NB_SENSE
DETECT_GND
41 WIRELESS_ON#/OFF
41,45 LID_CL#
62
64
66
GND
GND
GND
61
63
65
GND
GND
GND
IO_LOOP#
18
VSYNC_BUF 25
HSYNC_BUF 25
D
RED_CRT
25
GREEN_CRT 25
BLUE_CRT
25
DAT_DDC2_CRT 25
CLK_DDC2_CRT 25
XFR_ID_BIT# 42
MIC_IN_R
AUD_HP_OUT_R 30
MIC_IN_R
30
AUD_HP_OUT_L 30
+5V_ALW
1
+3.3V_ALW_PCH
2
PCH_AZ_MDC_RST1#
PCH_AZ_MDC_SDIN1 14
PCH_AZ_MDC_SYNC 14
PCH_AZ_MDC_SDOUT 14
PCH_AZ_MDC_BITCLK 14
Analog_GND
C
TYCO_2041300-2
CONN@
+3.3V_ALW_PCH
GND
GND
+3.3V_LAN
13
14
TYCO_1-2041070-2~D
CONN@
Place close
to JIO1.35
Place close
to JIO1.13
LED Board
C1000
0.1U_0402_16V4Z~D
C1001
0.1U_0402_16V4Z~D
18 MEDIA_DET#
1
2
3
4
5
6
7
8
9
10
11
12
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
C997
0.1U_0402_16V4Z~D
1
2
3
4
5
6
7
8
9
10
11
12
VOL_MUTE
VOL_DOWN
VOL_UP
+3.3V_ALW
17,39 USB_OC1#
JMDIA1
42
42
42
C50
0.1U_0402_16V4Z~D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
C1003
0.1U_0402_16V4Z~D
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
32 SW_LAN_TX0+
32 SW_LAN_TX0-
JLED1
7
8
@ PJP65
+5V_MIC
@
R425
IN+
@ R424
47K_0402_5%~D
AUD_MIC_SWITCH 30
O
IN-
@ U6
LMV331IDCKRG4_SC70-5~D
+5V_ALW_MIC_G
@ Q46
S
1
@ R33
47K_0402_1%~D
2
G
1
1
+5V_MIC
AUD_HP_NB_SENSE
SI2301CDS: P CHANNAL
need to route the trace as short as possible
@ R38
560K_0402_1%~D
MIC_IN_R
R751
100K_0402_5%~D
R752
10K_0402_5%~D
0.1U_0402_16V4Z~D
S
D
2
G
+5V_ALW
PCH_AZ_MDC_RST1#
+5V_RUN
@ C308
@ Q33
SI2301CDS-T1-GE3_SOT23-3~D
0.1U_0402_16V4Z~D
2
D71
RB751V-40GTE-17_SOD323-2~D
14 PCH_AZ_MDC_RST#
100K_0402_5%~D
Q44
@ C307
2
PAD-OPEN1x1m
1
TYCO_2041084-6~D
CONN@
1
2
3
4
5 G1
6 G2
1
2
3
4
5
6
LEDB_DET#
BATT_WHITE
BATT_YELLOW
SATA_LED
WLAN_LED
18
45
45
45
45
41 MDC_RST_DIS#
Title
5
PWR SW/Sub-board Connector

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
31
of
75
+3.3V_LAN
+3.3V_RUN
1
TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D
R547
10K_0402_5%~D
2
1
2
PETp
PETn
PERp
PERn
MDI_PLUS3
MDI_MINUS3
LAN_DISABLE#_R
0_0402_5%~D
SMB_CLK
SMB_DATA
RBIAS
JTAG
TEST_EN
12
R562
3.01K_0402_1%~D
30
RES_BIAS
Idc max=330mA
RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN
1
2
5
VDD3P3_OUT
VDD3P3_15
VDD3P3_19
VDD3P3_29
15
19
29
VDD1P0_47
VDD1P0_46
VDD1P0_37
47
46
37
VDD1P0_43
43
VDD1P0_11
11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
40
22
16
8
CTRL_1P0
VSS_EPAD
49
+RSVD_VCC3P3_1
2
+RSVD_VCC3P3_2 R553 2
R554
1
1 4.7K_0402_1%~D
4.7K_0402_1%~D
+3.3V_LAN
+3.3V_LAN_OUT
1
+1.0V_LAN
+1.05V_M
@R548
@
R548
0_0805_5%~D
1
2
Place R548, C462, C463 and L29 close to U31

C464
1U_0603_10V6K~D
+1.0V_LAN
+3.3V_LAN
REGCTL_PNP10
C1178
22U_0805_6.3V6M~D
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
LAN_TEST_EN
Need to verify A3 silicon drive

power before removing C427
KDS crystal vender verify
driving level in A3
REGCTL_PNP10
C1177
22U_0805_6.3V6M~D
32
34
33
35
XTAL_OUT
XTAL_IN
+1.0V_LAN
L29
C469
0.1U_0402_10V7K~D
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
9
10
R561
1K_0402_5%~D
LAN_TX3+
LAN_TX3-
C468
0.1U_0402_10V7K~D
LED0
LED1
LED2
XTALO
XTALI
23
24
C467
0.1U_0402_10V7K~D
26
27
25
1
2
@ R1144
0_0402_5%~D
Y3
25MHZ_18PF_7A25000110~D
1
2
C471
33P_0402_50V8J~D
RSVD_NC
LAN_DISABLE_N
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
C470
33P_0402_50V8J~D
LAN_TX2+
LAN_TX2-
C466
0.1U_0402_10V7K~D
@ T142 PAD~D
@ T143 PAD~D
20
21
41 LAN_DISABLE#_R
@ R557
10K_0402_5%~D
LAN_TX1+
LAN_TX1-
4.7UH_CBC2012T4R7M_20%~D
28
31
SMBus Device Address 0xC8
MDI_PLUS2
MDI_MINUS2
17
18
Default solution:
PCH +1.05V_M SVR - stuff R119, unstuff L99
Also, option to use iSVR - stuff L99, unstuff R119
C463
0.1U_0402_10V7K~D
@R555
@
R555
1
18 PM_LANPHY_ENABLE
15 LAN_SMBCLK
15 LAN_SMBDATA
41
42
MDI_PLUS1
MDI_MINUS1
LAN_TX0+
LAN_TX0-
C462
10U_0805_6.3V6M~D
15 PCIE_PTX_GLANRX_N7
R549
10K_0402_5%~D
38
39
PE_CLKP
PE_CLKN
13
14
Place C1178 close to pin5

Note:
+1.0V_LAN will work at 0.95V to 1.15V
82579_QFN48_6X6~D
+3.3V_M
+1.0V_LAN POWER OPTIONS

Shared with PCH
1.05V SVR
R1200 Resistor Value:

3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
STUFF: R548
NO STUFF: L29
15 PCIE_PTX_GLANRX_P7
44
45
MDI_PLUS0
MDI_MINUS0
* Internal SRV
@ R563
0_1206_5%~D
STUFF: L29
NO STUFF: R548
15 PCIE_PRX_GLANTX_N7
+3.3V_LAN
CLK_PCIE_LAN
CLK_PCIE_LAN#
2
1 PCIE_PRX_GLANTX_P7_C
C458
0.1U_0402_10V7K~D
2
1 PCIE_PRX_GLANTX_N7_C
C459
0.1U_0402_10V7K~D
1
2 PCIE_PTX_GLANRX_P7_C
C460
0.1U_0402_10V7K~D
1
2 PCIE_PTX_GLANRX_N7_C
C461
0.1U_0402_10V7K~D
@R551
@
R551
0_0402_5%~D
1
2 LAN_SMBCLK_R
1
2 LAN_SMBDATA_R
@R552
@
R552
0_0402_5%~D
CLK_REQ_N
PE_RST_N
MDI
15 CLK_PCIE_LAN
15 CLK_PCIE_LAN#
15 PCIE_PRX_GLANTX_P7
48
36
PCIE
U31
LANCLK_REQ#_R
SMBUS
@ R1187
0_0402_5%~D
1
2
15 LANCLK_REQ#
17 PLTRST_LAN#
LED
1
@ R545
1
@ R546
Q34
+3.3V_ALW
+3.3V_LAN
A1+
B2+
B2-
LAN_TX2+R
LAN_TX11
2
L32
12NH_0603CS-120EJTS_5%~D
LAN_TX1+ 1
2
L33
12NH_0603CS-120EJTS_5%~D
LAN_TX1-R
LAN_TX1+R
LAN_TX01
2
L31
12NH_0603CS-120EJTS_5%~D
LAN_TX0+ 1
2
L30
12NH_0603CS-120EJTS_5%~D
LAN_TX0-R
11
LAN_TX0+R
12
A1-
B3+
B3-
A2+
10
A2-
LEDB0
LEDB1
LEDB2
A3+
C0+
C0-
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
Layout Notice : Place bead as

close PI3L720 as possible
15
16
42
5
43
FROM NIC
DOCKED
A3-
C1+
C1-
SW_LAN_TX1- 31
SW_LAN_TX1+ 31
25
24
SW_LAN_TX0- 31
SW_LAN_TX0+ 31
17
18
41
36
35
32
31
16,41 SIO_SLP_LAN#
1
@ R567
2
0_0402_5%~D
C3+
C3-
DOCK_LOM_TRD0- 40
DOCK_LOM_TRD0+ 40
LEDC0
LEDC1
LEDC2
19
20
40
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
DOCK_LOM_ACTLED_YEL# 40
DOCK_LOM_SPD100LED_ORG# 40
DOCK_LOM_SPD10LED_GRN# 40
S
G
B
A
TO
DOCK
Title
Intel 82579 (Hanksville) / LAN SW

Size
Document Number
Date:
Rev
1.0
LA-6592P
5
WLAN_LAN_DISB# 41
TC7SH08FU_SSOP5~D
U15
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
+3.3V_LAN
C478
0.1U_0402_10V7K~D
1
2
1: TO DOCK
0: TO RJ45
6
2
2
0_0402_5%~D
DOCK_LOM_TRD2- 40
DOCK_LOM_TRD2+ 40
DOCK_LOM_TRD1- 40
DOCK_LOM_TRD1+ 40
LEDA0
LEDA1
LEDA2
1
@ R566
DOCK_LOM_TRD3- 40
DOCK_LOM_TRD3+ 40
23
22
C2+
C2-
AUX_ON
LAN_ACTLED_YEL# 31
LED_100_ORG# 31
LED_10_GRN# 31
27
26
SEL
PD
29
28
42
LAN_TX2-R
SW_LAN_TX2- 31
SW_LAN_TX2+ 31
LAN_TX21
2
L35
12NH_0603CS-120EJTS_5%~D
LAN_TX2+ 1
2
L34
12NH_0603CS-120EJTS_5%~D
34
33
ENAB_3VLAN
B1+
B1-
A0-
A0+
13
1
2
39
30
21
14
8
4
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DOCKED
LAN_TX3+R
SW_LAN_TX3- 31
SW_LAN_TX3+ 31
Q35A
41
LAN_TX3-R
38
37
C477
2200P_0402_50V7K~D
5
B0+
B0-
LAN_TX31
2
L37
12NH_0603CS-120EJTS_5%~D
LAN_TX3+ 1
2
L36
12NH_0603CS-120EJTS_5%~D
DOCKED
R565
100K_0402_5%~D
Q35B
LAN ANALOG
SWITCH
U32
4
C476
0.1U_0402_10V7K~D
R564
100K_0402_5%~D
C475
10U_0603_6.3V6M~D
C474
0.1U_0402_16V4Z~D
C473
0.1U_0402_16V4Z~D
C472
0.1U_0402_16V4Z~D
+3.3V_ALW2
+3.3V_LAN
SWAP for layout routing
6
5
2
1
+15V_ALW
Sheet
1
32
of
75
L7
WAKEUP_N
K1
IDDQ_EN
P1
CORE_PWRDN
E12
ALDO_PWRDN
2 USH_PWR_STATE#_R
0_0402_5%~D
1
2
R619
1K_0402_5%~D
1
2
R622
1K_0402_5%~D
1
2
R624
1K_0402_5%~D
1
@ R613
C3
B2
A2
A1
SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD
JTAG_RST#_USH
@ R605
0_0402_5%~D
1
2
BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13
T146PAD~D
T147PAD~D
T148PAD~D
T150PAD~D
M11 @ R607 2
1
M12 @ R608 2
1
@R609
R609 2
F2 @
1
F1 @ R611 2
1
M2 @ R614 2
1
L11 @ R616 2
1
M10 @ R620 2
1
N14
+SC_PWR
P14
SC_TEST
L10
2
@ R623
SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
BCM5882_SCCLK
AUX1UC
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCDET
BCM5882_IO
BCM5882_SCRST
All XTAL components and traces should be

placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.
HF_RX_TEST2
@ R618
0_0402_5%~D
1
2
+1.2V_ALW_AVDD
+3.3V_ALW_SC
1
AUX1UC
AUX2UC
I/OUC
OFFN
BCM5882_SCCLK
23
25
14
13
9
10
11
8
XTAL1
XTAL2
24
GPAD
GND
12
2
DO
/HOLD
SPI_RST
/WP
CLK
SPI_CLK
GND
DIO
SPI_TXD
W25X32VSSIG_SO8~D
1
2
3
4
D
C
RESET#
S#
Q
VSS
VCC
W#
1
8
7
6
5
SPI_RXD
BCM5882_GPIO15
1
2
3 G1
4 G2
HF_RFIDTAG_VTX
HF_RX_P
HF_RX_N
A10
B10
RFREADER_RXP
RFREADER_RXN
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
B9
C9
C10
E9
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2
D7
F8
D10
+RFID_AVDD1P2
HF_RX_AVDD2P5
HF_TX_AVDD2P5
F9
A7
+RFID_AVDD2P5
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3
HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7
C7
C8
E7
2
4.7K_0402_5%~D
HF_RFIDTAG_VREF
HF_RFIDTAG_DVDD1P2
C6
E6
HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6
D6
B5
HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5
HF_RFIDTAG_DVSS
1
1
2
+3.3V_ALW_USH
L41
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD3P3
A9
B11
E8
D9
RFID
JCS1
1
2
3
4
5
6
RFREADER_TXP1_PI
+3.3V_ALW_USH
D28
DA204U_SOT323-3~D
1
BCM5882_GPIO15
1
R647
T153PAD~D
18 CONTACTLESS_DET#
1
5
6
MOLEX_53398-0471~D
M45PE16-VMW6TG_SO8W8~D
+2.5V_ALW_AVDD
L42
2
BLM18BB100SN1D_2P~D
1 +RFID_AVDD2P5
1
2
3
4
5 G1
6 G2
CONN@
7
8
TYCO_2041084-6~D
connector list: 2041084-6

Hardware enable for USH TPM:Populate R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff
R841, Populate R483
+1.2V_ALW_AVDD
L43
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2
C522
0.1U_0402_16V4Z~D
SPI_TXD
SPI_CLK
SPI_RST
SPI_CS
C514
1U_0603_10V6K~D
SPI_RXD
PLL_TESTOUT
PLL_TESTOUT
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2
C521
1U_0603_10V6K~D
VCC
FCI_10089709-010010LF~D
5
UART_RX/GPIO0
UART_TX/GPIO1
L40
150NH_0805CS-151EGTS_2%~D
1
2
RFREADER_TXN1
C520
0.1U_0402_16V4Z~D
GND
GND
CONN@
JBCM1
1
2
3
4
C519
1U_0603_10V6K~D
/CS
+2.5V_ALW_AVDD
R644
15K_0402_1%~D
C518
1U_0603_10V6K~D
T151PAD~D
C13
RFREADER_TXN1_PI
U36
SPI_CS
SWV
RFREADER_RXN_C
+3.3V_ALW
BCM5882_GPIO15
@ D26
DA204U_SOT323-3~D
C505
0.1U_0402_16V4Z~D
1
2
C517
0.1U_0402_16V4Z~D
11
12
1
DA204U_SOT323-3~D
+3.3V_ALW_USH
@ U35
1
2
Place C507,C575 close to JSC1
CONN@
T149PAD~D
SWV
43
BCM5882KFBG_FBGA196~D
+3.3V_ALW_USH
POR_MONITOR
HF_RX_AVSS_A9
HF_RX_AVSS_B11
DA204U_SOT323-3~D
3
@ D27
Place C508 close

to U33 pin15
J13
K11
C5
L39
150NH_0805CS-151EGTS_2%~D
1
2
RFREADER_TXP1
+3.3V_ALW_USH
+3.3V_ALW_USH
1
2
3
4
5
6
7
8
9
10
C516
1U_0603_10V6K~D
R646
1.5K_0402_5%~D
RFREADER_RXP_C
C515
3.3U_0603_10V6K~D
1
2
3
4
5
6
7
8
9
10
POR_MONITOR
RFREADER_TXP1
RFREADER_TXN1
A5
2
0.01U_0402_16V7K~D
B4
C512
390P_0603_50V8G~D
SC_RST
SC_CLK
SC_C4
C511
390P_0603_50V8G~D
JSC1
SC_IO
SC_C8
SC_DET
1
SC_VCC should be 3X wide as

regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be p
laced very close to SC cage pin
C502
0.1U_0402_16V4Z~D
1
2
RFREADER_RXN
+SC_VCC
SPI_RST
A8
B8
RFREADER_RXP
SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET
C1
BT_PRI_STATUS
T144 PAD~D
HF_TX_P
HF_TX_N
R636
15K_0402_1%~D
C513
0.1U_0402_16V4Z~D
C510
0.22U_0402_10V6K~D
@ C509
10U_0805_10V4Z~D
0_0402_5%~D
22_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
PAD-OPEN1x1m
@ D25
2
2
2
2
2
2
RSTOUT_N
BCM5882
2
1
1
1
1
1
1
TDA8034HN_HVQFN24_4X4~D
+SC_VCC
+SC_VCC
R638
R639
R640
R641
R642
R643
CLKOUT
PJP55
+3.3V_ALW_USH
C507
10P_0402_50V8J~D
21
22
20
19
15
RST
CLK
I/O
AUX1
AUX2
PRESN
C506
10P_0402_50V8J~D
AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET
VCC
RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN
C508
.47U_0402_6.3V6-K~D
3
5
2
4
16
D3
HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N
C504
390P_0603_50V8G~D
PAD~D T154
BCM5882_SCRST
1SCC_CMDVCC_N
BCM5882_GPIO25
BCM5882_GPIO26
VDDP
C503
390P_0603_50V8G~D
@ R637
0_0402_5%~D
1
17
C491
10U_0603_6.3V6M~D
VDD(intf)
VDD
C489
4.7U_0603_6.3V6K~D
SCC_CMDVCC_N_R
PORadj
CLKDIV1
CLKDIV2
+5V_ALW
R634
3.3M_0402_5%~D
18
6
7
C501
10U_0805_10V6M~D
PORADJ
CLKDIV1
CLKDIV2
CLKOUT
A6
B6
A4
+5V_ALW_SC
C500
0.1U_0402_16V4Z~D
C499
10U_0805_10V6M~D
2
U34
C498
0.1U_0402_16V4Z~D
C497
0.1U_0402_16V4Z~D
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D
1
@ R631
1
R633
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D
PAD-OPEN1x1m
+5V_ALW_SC
+3.3V_ALW_SC
1
R632
1
R635
2
2
C496
1U_0402_6.3V6K~D
+3.3V_ALW_SC
POR_EXTR
+1.2V_ALW_AVDD
PJP52
SBOOT
POR_EXTR
CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15
BT_PRI_STATUS
TESTMODE
RFTAG_VRXP
RFTAG_VRXN
1
C487
+2.5V_ALW_AVDD
C488
1U_0402_6.3V6K~D
Smart Card
2 0_0402_5%~D
2 0_0402_5%~D
+3.3V_ALW
J1
D2
C2
B1
+3.3V_ALW_USH
C493
15P_0402_50V8J~D
J14
GPIO_4
GPIO_14
GPIO_15
GPIO_16
U33C
C490
10U_0603_6.3V6M~D
SECURE_BOOT
C487 should be placed

closer to pin A5
C495
1U_0402_6.3V6K~D
27.12MHZ_12PF_1N227120CC0B~D
C492
12P_0402_50V8J~D
E2
D1
43
L14
XO
SCANACCMODE
1 SCC_CMDVCC_N
0_0402_5%~D
C494
1U_0402_6.3V6K~D
GND
R630
5.1M_0402_5%~D
GND
R629
4.7K_0402_5%~D
OUT
@ R626
1K_0402_5%~D
OVSTB
E3
FP_RESET# 23
BT_COEX_STATUS2
BT_COEX_STATUS2
IN
POR_EXTR
E1
UART_TX/GPIO1
UART_RX/GPIO0
HF_RX_TEST3
REF_XIN
Y4
XI
SBOOT
USH_TESTMODE
HF_RX_TEST1
2 REF_XOUT
0_0402_5%~D
2
10M_0402_5%~D
SCANACCMODE
@ T145 PAD~D
HF_RX_TEST0
@ R621
0_0402_5%~D
1
2
@ R625 1
@ R628 1
1
@ R612
@ R601
OVSTB
0_0402_5%~D
JTCE_USH
1
@ R627
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE
SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1
USBH_OC1
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH
M9
L9
K9
M7
N8
SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_RXD1_GPIO_12
SSP_TXD1_GPIO_13
L1
M1
N1
N2
L3
L2
NC
JTAG_TDO_USH
@ R599
0_0402_5%~D
1
2
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
2 150_0402_5%~D
SMB_GPIO1
2
0_0402_5%~D
LPC
SPI
LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24
SM BUS
Smard Card
1
2
PCI_TPM_TERM
M3
M5
N6
G3
G2
H1
H2
RST_N
JTAG_TDI_USH
JTAG_TMS_USH
SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9
G1
D4
C4
B3
A3
UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3
PLTRST1#_USH
USH_LPCEN
LPD#
FP_USBD- 23
FP_USBD+ 23
1
4.7K_0402_5%~D
2
R590
BCM5882
REFCLK_XTALIN
REFCLK_XTALOUT
@ C486
4.7P_0402_50V8C~D
LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19
USBH_DN_1
USBH_UP_1
USBH_OC_1
P11
P12
P10
RST_N
G14
F14
SC_DET
R606 1
BT_COEX_STATUS2 1
@ R1131
41 USH_PWR_STATE#
P2
N3
M4
K5
N4
K4
L4
USBH_DN_0
USBH_UP_0
USBH_OC_0
FP_USBDFP_USBD+
USBH_OC0#
U33D
JTAG_CLK_USH
@ R591
0_0402_5%~D
1
2
@@@@
42 USH_SMBCLK
42 USH_SMBDAT
41 BCM5882_ALERT#
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
IRQ_SERIRQ_R
R593 1
2
R594 1
2
R595 1
2
R597 1
2
R598 1
2
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
1
@ R600
1
@ R602
1
@ R604
USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27
P7
P8
P9
REF_XIN
REF_XOUT
+3.3V_ALW_USH
BCM5882
P5
P6
N7
CLK_PCI_TPM
34,41 SP_TPM_LPC_EN
2 JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
USBP7-_R
USBP7+_R
USB_GPIO27
@ R588
0_0402_5%~D
15 CLK_PCI_TPM
14,34,41,42 LPC_LAD0
14,34,41,42 LPC_LAD1
14,34,41,42 LPC_LAD2
14,34,41,42 LPC_LAD3
14,34,41,42 LPC_LFRAME#
14,34,41,42 IRQ_SERIRQ
@ R603
10_0402_5%~D
@ R587
0_0402_5%~D
1
2
1
2
USBP7USBP7+
17 PLTRST_USH#
1
R610
1
2@ R615
U33A
PJP56
2
PAD-OPEN 2x2m~D
CLK
UART
2
1
2
G
Q37
2USB_GPIO27
17
G
17
2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D
2 SPI_RST
4.7K_0402_5%~D
+3.3V_ALW_USH
JTAG
+3.3V_ALW
1
R577
1
R578
1
R582
1
R645
R580
4.7K_0402_5%~D
CLK_PCI_TPM
+3.3V_ALW_USH
2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
2 USH_SMBCLK
2.2K_0402_5%~D
2 USH_SMBDAT
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
2 USBH_OC1
4.7K_0402_5%~D
1
@ R579
1
1@ R583
1
@ R584
1
R581
1
R589
1
R585
1
R592
1
R586
1
R596
+3.3V_ALW_PCH
Q36
SI2301CDS-T1-GE3_SOT23-3~D
2
0_0402_5%~D
2
1
3
1.5K_0402_5%~D
USB_GPIO27 1
@ R575
USBP7+
1
R576
+3.3V_ALW_USH
Title
USH BCM5882 (1/2)

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
33
of
75
U33B
+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW_USH
+1.2V_ALW_PLL
+3.3V_ALW_USH
C526
10U_0603_6.3V6M~D
D11
C535
0.1U_0402_16V4Z~D
+1.2V_ALW_PLL
+VDDC_5882
+VDDC_5882
+3.3V_ALW_USH
C546
1U_0402_6.3V6K~D
VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10
N5
LOW:Power Down Mode

High:Working Mode
D12
PLL_DVSS
E13
POR_AVSS
G13
OTP_PWR
E4
J2
K3
L8
N10
D5
E5
F13
PLL_AVSS
AVDD33_LDO25
VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8
K10
K12
L12
L13
B14
AVSS_REF
AVDD25_PLL_A14
D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8
L6
M6
C11
B13
C12
AVSS_PLL
PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I
M13
N13
AVSS_LDO12
AVSS_LDO25_B13
AVSS_LDO25_C12
AVDD25_LDO12_A13
AVDD25_LDO12_B12
D14
E14
C14
G4
H3
H4
J3
C549
10U_0603_6.3V6M~D
C545
1U_0402_6.3V6K~D
C548
1U_0402_6.3V6K~D
C547
1U_0402_6.3V6K~D
C544
1U_0402_6.3V6K~D
C543
1U_0402_6.3V6K~D
AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11
P13
H13
E10
E11
A14
+SC_PWR
C1161
1U_0402_6.3V6K~D
C525
1U_0402_6.3V6K~D
C542
1U_0402_6.3V6K~D
C534
10U_0603_6.3V6M~D
C533
1U_0402_6.3V6K~D
C541
1U_0402_6.3V6K~D
C532
1U_0402_6.3V6K~D
C540
1U_0402_6.3V6K~D
C531
1U_0402_6.3V6K~D
C539
1U_0402_6.3V6K~D
C530
1U_0402_6.3V6K~D
C538
1U_0402_6.3V6K~D
C529
1U_0402_6.3V6K~D
C537
1U_0402_6.3V6K~D
C536
1U_0402_6.3V6K~D
C528
1U_0402_6.3V6K~D
C527
1U_0402_6.3V6K~D
C524
1U_0402_6.3V6K~D
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12
A13
B12
C523
4.7U_0603_6.3V6K~D
BCM5882
H14
A11
A12
VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4
VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13
VDDO_LPC_L6
VDDO_LPC_M6
VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13
F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4
VDDO_VAR_D5
VDDO_VAR_E5
VESD
China TCM: NationZ & Jetway co-lay

+3.3V_RUN
4@ U37
R650
R649
R648
R651
R652
1
1
1
1
1
1
4@ R653 1
4@ R654
1
4@ R655
2
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
2
0_0402_5%~D
C_TPM_LPC_EN
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
28
26
23
20
17
21
LPC_LFRAME#_R 22
PCI_RST#_R
16
27
CLKRUN#_R
15
7
TCM_BA1
3
TCM_BA0
9
LPCPD#
LAD0
LAD1
LAD2
LAD3
GND_11
GND_18
GND_25
GND_4
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0
+3.3V_RUN
2
11
18
25
4
NC_5
NC_12
NC_13
5
12
13
NC_1
NC_2
NC_6
NC_8
NC_P
1
2
6
8
14
JETWAY_CLK14M
SSX44-B-D-T1_TSSOP28~D
USH_LPCEN
SIO 5028 ->SP_TPM_LPC_EN
PCH GPIO39 ->TPM_ID1
PCH GPIO38 ->TPM_ID0
USH BCM5882 and China TCM Z8H172T Option

Ref Des
TCM Enable TPM Enable
All 4@
POP
@
PU R583
@
POP
PD R615
POP
@
PU R772
@
@
PU RH268
@
POP
PD RH271
POP
@
PU RH267
@
POP
PD RH270
POP
@
ALL TPM/TCM Disable

@
@
@
@
POP
@
@
POP
JETWAY_PIN5
4@ C554
1U_0402_6.3V6K~D
2
@C555
@C555
0.1U_0402_16V4Z~D
TCM Vender
POP
NationZ
R659, R660, C550, C554
Jetway
C555, RH315
4@ R660
1K_0402_5%~D
4@ R659
1K_0402_5%~D
2
JETWAY_CLK14M 15
TCM_BA0
TCM_BA1
PART/PIN
TCM circuit
1
2
@ R658
10K_0402_5%~D
JETWAY_PIN5
@ R657
10K_0402_5%~D
4@ C550
10U_0603_6.3V6M~D
15 CLK_PCI_TPM_CHA
14,33,41,42 LPC_LFRAME#
14,17,36,37,41,42 PCH_PLTRST#_EC
+3.3V_RUN
16,41,42 CLKRUN#
1
2
@ R656
4.7K_0402_5%~D
4@
4@
4@
4@
4@
4@ C553
0.1U_0402_16V4Z~D
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
4@ C552
0.1U_0402_16V4Z~D
33,41
14,33,41,42
14,33,41,42
14,33,41,42
14,33,41,42
10
19
24
4@ C551
0.1U_0402_16V4Z~D
VDD_0
VDD_1
VDD_2
Title
USH BCM5882 (2/2)

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
34
of
75
need to apply CIS symbol.

+3.3V_RUN
PCIE_PRX_MMITX_P6
PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_P6
PCIE_PTX_MMIRX_N6
2
2
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
R677
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
2
191_0402_1%~D
6
7
5
4
3
PE_TXP
PE_TXM
PE_RXP
PE_RXM
PE_REXT
33
GPAD
13
PE_RST#
14
31
MULTI-IO1
MULTI-IO2
17 PLTRST_MMI#
15 MMICLK_REQ#
+OZ_DVDD
+OZ_AVDD
SKT_VCC
MMI_VCC_OUT
17
15
+SKT_VCC
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
28
26
29
27
25
24
23
22
21
20
SD/MMCDAT1_R
SD/MMCDAT2_R
SD/MMC/MSDAT0_R
MSDAT1_R
MSDAT2_R
SD/MMC/MSDAT3_R
SD/MMCDAT4_R
SD/MMCDAT5_R
SD/MMCDAT6_R
SD/MMCDAT7_R
11
19
18
12
30
MS_CD#
SD/MMC/MS_CMD_R R674 1
SD/MMC/MS_CLK_R
1
SD/MMCCD#
R676
SDWP
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI
R663
R664
R665
R666
R667
R668
R669
R670
R672
R673
1
1
1
1
1
1
1
1
1
1
+3.3V_RUN_CARD
2
2
2
2
2
2
2
2
2
2
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
SD/MMCDAT1
SD/MMCDAT2
SD/MMC/MSDAT0
MSDAT1
MSDAT2
SD/MMC/MSDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
PE_REFCLKP
PE_REFCLKM
10
8
R826
10K_0402_5%~D
@C574
@
C574
0.01U_0402_16V7K~D
@C573
@
C573
0.1U_0402_16V4Z~D
1
1
1
1
2
1
DVDD
AVDD
C572
4.7U_0603_10V6K~D
15
15
15
15
+PE_VDDH
1
C569
C571
C567
C568
3.3VDDH
VDDH
PE_VDDH
C570
0.1U_0402_16V4Z~D
15 CLK_PCIE_MMI
15 CLK_PCIE_MMI#
16
9
32
L44
+3.3VDDH
+VDDH_SD
+PE_VDDH
2
BLM18BD601SN1D_0603~D
1
U38
C560
4.7U_0603_10V6K~D
C559
0.1U_0402_16V4Z~D
C566
4.7U_0603_10V6K~D
C565
0.1U_0402_16V4Z~D
C562
0.1U_0402_16V4Z~D
C561
4.7U_0603_10V6K~D
C564
4.7U_0603_10V6K~D
C563
0.1U_0402_16V4Z~D
L47
1
2
C558
0.1U_0402_16V4Z~D
1
2
C557
0.1U_0402_16V4Z~D
+1.5V_RUN
C556
4.7U_0603_10V6K~D
L45
BLM18PG471SN1D_0603~D
1
2
@ L46
2 33_0402_5%~D SD/MMC/MS_CMD
SD/MMC/MS_CLK
2
33_0402_5%~D
OZ600FJ0LN_QFN32_5X5~D
place close to pin U38.32
Note: The trace need to route as

daisy-chain and the trace of SD signals
need to route as short as possible
JSD1
7
9
+3.3V_RUN_CARD
EMI request
SD/MMC/MS_CLK
@RE678
33_0402_5%~D
SD/MMC/MSDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMC/MSDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
22
23
1
2
3
5
19
21
SD/MMC/MS_CMD
SD/MMC/MS_CLK
SD/MMCCD#
SDWP
4
18
24
25
45
SD/MMC/MSDAT0
MSDAT1
MSDAT2
SD/MMC/MSDAT3
14
15
13
11
SD/MMC/MS_CLK
MS_CD#
SD/MMC/MS_CMD
10
12
16
@ CE757
6
8
17
20
10P_0402_50V8J~D
VDD
VCC
VCC
DAT0
DAT1
DAT2
CD/DAT3
DAT4
DAT5
DAT6
DAT7
CD
R/-B
-RE
-CE
CLE
ALE
-WE
-WP
CMD
CLK
COM(SW)
CD(SW)
WP(SW)
D0
D1
D2
D3
D4
D5
D6
D7
DATA0
DATA1
DATA2
DATA3
SCLK
INS
BS
GND
GND
VSS
VSS
VSS
VSS
GND1
GND2
GND3
GND4
44
27
28
29
30
31
32
33
34
36
37
38
39
40
41
42
43
26
35
46
47
48
49
T-SOL_152-1300302601_NR
CONN@
Support SD/MMC/MS
4
Title
Card Reader OZ600FJ0

Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
E
35
of
75
+3.3V_RUN
+3.3V_PCIE_WWAN
2
@ R1157
2
@ R1158
1
0_0402_5%~D
1
0_0402_5%~D
41 WLAN_RADIO_DIS#
+3.3V_ALW_PCH
2
0_0402_5%~D
1
PCIE_MCARD1_DET# 1
R692
WLAN_RADIO_DIS#_R
D31
RB751S40T1_SOD523-2~D
USB_MCARD1_DET#
1
@ R698
WWAN_SMBDAT
+3.3V_WLAN
54
@ C600
33P_0402_50V8J~D
2
0_0402_5%~D
53
GND1
GND2
54
+1.5V_RUN
WIMAX_LED#
WLAN_LED#
2
R719
C608
4.7U_0603_6.3V6K~D
C607
0.1U_0402_16V4Z~D
C606
0.1U_0402_16V4Z~D
C605
0.047U_0402_16V4Z~D
C604
0.047U_0402_16V4Z~D
@ C603
0.1U_0402_16V4Z~D
+3.3V_WLAN
2
2 PCIE_MCARD2_DET#
0_0402_5%~D
HOST_DEBUG_TX 42
WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
@R703
@
R703
0_0402_5%~D
USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
PWR
Rail
+3.3V
+3.3Vaux
JSIM1
C616
1U_0402_6.3V6K~D
5
6
7
8
9
10
VCC
RST
CLK
NC
GND
VPP
I/O
NC
GND
GND
MOLEX_475531001
CONN@
Voltage
Tolerance
+-9%
+-9%
Primary Power
Peak
Normal
1000
750
330
250
PCIE_WAKE#
COEX2_WLAN_ACTIVE
1
2
@ R709
0_0402_5%~D
MINI3CLK_REQ#
15 MINI3CLK_REQ#
Aux Power
Normal
+-5%
500
375
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
15 CLK_PCIE_MINI3#
15 CLK_PCIE_MINI3
250 (Wake enable)

5 (Not wake enable)
15 PCIE_PRX_WPANTX_N5
15 PCIE_PRX_WPANTX_P5
NA
0.1U_0402_10V7K~D
PCIE_PTX_WPANRX_N5_C
2
PCIE_PTX_WPANRX_P5_C
2
0.1U_0402_10V7K~D
PCIE_MCARD3_DET#
18 PCIE_MCARD3_DET#
UIM_VPP
UIM_DATA
15 PCIE_PTX_WPANRX_N5
15 PCIE_PTX_WPANRX_P5
C617
1
1
C618
1
R711
+3.3V_RUN
+1.5V_RUN
2
100K_0402_5%~D
+3.3V_PCIE_FLASH
53
WIRELESS_LED#
Q124B
+3.3V_PCIE_FLASH
USB_MCARD3_DET#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2 PCIE_MCARD3_DET#
0_0402_5%~D
1
@R708
@
R708
+1.5V_RUN
Confirm with DELL about UWB
@ R710
2
PCH_PLTRST#_EC
0_0402_5%~D
USBP6USBP6+
USB_MCARD3_DET#
USBP6- 17
USBP6+ 17
2
@ R712
just reserve
1
100K_0402_5%~D
+3.3V_ALW_PCH
WPAN Noise
USB_MCARD3_DET#
54
1
TYCO_1775861-1~D
C626
4.7U_0603_6.3V6K~D
C625
0.1U_0402_16V4Z~D
@ C631
33P_0402_50V8J~D
SRV05-4.TCT_SOT23-6~D
@ C629
33P_0402_50V8J~D
@ C630
33P_0402_50V8J~D
@ C628
33P_0402_50V8J~D
UIM_DATA
C624
0.1U_0402_16V4Z~D
2
UIM_CLK
C623
0.047U_0402_16V4Z~D
1
+SIM_PWR
C622
0.047U_0402_16V4Z~D
@C621
@
C621
0.1U_0402_16V4Z~D
UIM_RESET
C620
0.047U_0402_16V4Z~D
C619
0.047U_0402_16V4Z~D
@ U40
UIM_VPP
42
1/2 Minicard Flash Card H=4
+SIM_PWR
1
2
3
4
MSDATA
WIMAX_LED# STUDY FOR DEBUG
JMINI3
UIM_RESET
UIM_CLK
MSDATA
2
0_0402_5%~D
1
@ R706
WIRELESS_LED# 41,45
+3.3V_PCIE_FLASH
+1.5V
USBP4- 17
USBP4+ 17
USB_MCARD1_DET# 14,18
Q124A
3
Q77
SIM Card Push-Push
C595 4700P_0402_25V7K~D
+3.3V_WLAN
LED_WWAN_OUT#
2
100K_0402_5%~D
2
100K_0402_5%~D
TYCO_1775861-1~D
15 PCH_CL_DATA1
1
15 PCH_CL_RST1#
@ R707
check
15 PCH_CL_CLK1
USBP517
USBP5+
17
USB_MCARD2_DET# 18
@ C1176
330U_D2E_6.3VM_R25~D
C615
330U_D2E_6.3VM_R25~D
C614
33P_0402_50V8J~D
0.1U_0402_10V7K~D
2 PCIE_PTX_WLANRX_N2_C
2 PCIE_PTX_WLANRX_P2_C
0.1U_0402_10V7K~D
PCIE_MCARD1_DET#
COEX2_WLAN_ACTIVE
USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#
C613
22U_0805_6.3VAM~D
18 PCIE_MCARD1_DET#
+3.3V_PCIE_WWAN
C596
1
1
C598
15 PCIE_PTX_WLANRX_N2
15 PCIE_PTX_WLANRX_P2
WWAN_SMBCLK
WWAN_SMBDAT
USB_MCARD2_DET# 1
@ R697
C612
33P_0402_50V8J~D
C611
0.047U_0402_16V4Z~D
C610
0.047U_0402_16V4Z~D
WWAN_RADIO_DIS# 41
PCH_PLTRST#_EC 14,17,34,37,41,42
TYCO_1775861-1~D
+3.3V_PCIE_WWAN
2
0_0402_5%~D
C602
0.047U_0402_16V4Z~D
GND2
15 PCIE_PRX_WLANTX_N2
15 PCIE_PRX_WLANTX_P2
1
@R704
@
R704
100K_0402_5%~D
GND1
42 HOST_DEBUG_RX
42
MSCLK
C601
0.047U_0402_16V4Z~D
C594
0.047U_0402_16V4Z~D
C593
33P_0402_50V8J~D
53
+1.5V_RUN
+SIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1
MSDATA
+1.5V_RUN
15 CLK_PCIE_MINI2#
15 CLK_PCIE_MINI2
0.1U_0402_10V7K~D
2 PCIE_PTX_WANRX_N1_C
2 PCIE_PTX_WANRX_P1_C
0.1U_0402_10V7K~D
2 PCIE_MCARD2_DET#_R
0_0402_5%~D
15 MINI2CLK_REQ#
C597
1
15 PCIE_PTX_WANRX_N1
1
15 PCIE_PTX_WANRX_P1
C599
1
17 PCIE_MCARD2_DET# @ R725
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
PCIE_MCARD1_DET# 1
@ R699
USB_MCARD1_DET#
1
R701
100K_0402_5%~D
15 PCIE_PRX_WANTX_N1
15 PCIE_PRX_WANTX_P1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
R705
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
15 CLK_PCIE_MINI1#
15 CLK_PCIE_MINI1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+1.5V_RUN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
R718
MINI1CLK_REQ#
15 MINI1CLK_REQ#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
43 COEX2_WLAN_ACTIVE
43 COEX1_BT_ACTIVE
+3.3V_PCIE_WWAN
CONN@
JMINI1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+3.3V_PCIE_WWAN
PCIE_WAKE#
1
2
@ R7001
2 0_0402_5%~D
@ R702
0_0402_5%~D
29,37,41 PCIE_WAKE#
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
+3.3V_RUN
2 PCIE_MCARD1_DET#
0_0402_5%~D
+3.3V_WLAN
CONN@
JMINI2
Mini WWAN/GPS/LTE/UWB H=5.2
2
100K_0402_5%~D
Mini WLAN/WIMAX H=4
WWAN_SMBCLK
2
100K_0402_5%~D
100K_0402_5%~D
PCIE_MCARD2_DET#_R 1
R695
1
100K_0402_5%~D
@ R1160
2.2K_0402_5%~D
1
@ R693
@ R1159
2.2K_0402_5%~D
USB_MCARD2_DET# 2
R694
+3.3V_PCIE_WWAN
CONN@
@ C627
4700P_0402_25V7K~D
A
Title
Mini Card
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
36
of
75
Power Control for Mini card2
G
3
2
3
1
2
6
1
2
U41
R716
100K_0402_5%~D
2
11,41,44,55,63 RUN_ON
14,17,34,36,41,42 PCH_PLTRST#_EC
1
@ R717
2
0_0402_5%~D
EXPRCRD_STBY_R#
+3.3V_RUN
+3.3V_CARD
+1.5V_CARD
+1.5V_RUN
17
2
12
AUXIN
3.3VIN
1.5VIN
AUXOUT
3.3VOUT
1.5VOUT
15
3
11
20
1
6
19
SHDN#
STBY#
SYSRST#
OC#
PERST#
CPPE#
CPUSB#
8
10
9
4
5
13
14
16
NC
NC
NC
NC
NC
RCLKEN
18
GND
PAD
7
21
C638
10U_0603_6.3V6M~D
C637
0.1U_0402_16V4Z~D
C641
10U_0603_6.3V6M~D
C640
0.1U_0402_16V4Z~D
+1.5V_CARD
+3.3V_CARD
C643
10U_0603_6.3V6M~D
+3.3V_CARDAUX
C642
0.1U_0402_16V4Z~D
R715
20K_0402_5%~D
+3.3V_SUS
+3.3V_RUN
C633
0.1U_0402_16V4Z~D
+1.5V_RUN
C634
0.1U_0402_16V4Z~D
41 AUX_EN_WOWL
C635
0.1U_0402_16V4Z~D
Q39A
Express Card PWR S/W
Q38
+3.3V_WLAN
C632
4700P_0402_25V7K~D
R714
Q39B
100K_0402_5%~D
R713
100K_0402_5%~D
6
5
2
1
+3.3V_ALW
+15V_ALW
CARD_RESET#
EXPRCRD_CPPE#
CPUSB#
TPS2231MRGPR-2_QFN20_4X4~D
+3.3V_PCIE_WWAN
+3.3V_ALW
D
S
1
G
R723
1K_0402_5%~D
2
D
2
G
MCARD_WWAN_PWREN#
+3.3V_SUS
2
0_0402_5%~D
2
0_0402_5%~D
L49
17
USBP10-
USBP10+
1
2
1
1
@R724
@
R724
1
@R727
@
R727
17
+1.5V_CARD
Express Card Conn.
Note: Add connection on pin4, pin5, pin 13

and pin14 to support GMT 2nd source part
+3.3V_RUN
2
3
1
2
6
1
R732
2.2K_0402_5%~D
R726
100K_0402_5%~D
6
5
2
1
R731
2.2K_0402_5%~D
41 MCARD_WWAN_PWREN
@ R720
@R720
0_0805_5%~D
1
2
Q73
Q41A
Q40
C644
4700P_0402_25V7K~D
MCARD_WWAN_PWREN# 5
R722
100K_0402_5%~D
Q41B
R721
100K_0402_5%~D
+15V_ALW
CONN@
JEXP1
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
USBP10_DUSBP10_D+
CPUSB#
DLW21SN900SQ2L_0805_4P~D
2
1
41 MCARD_MISC_PWREN
CARD_SMBCLK
CARD_SMBDAT
29,36,41 PCIE_WAKE#
+3.3V_CARDAUX
CARD_RESET#
+3.3V_CARD
R730
20K_0402_5%~D
C646
0.1U_0402_16V4Z~D
1
2
3
4
Q43A
6
5
2
1
42 CARD_SMBCLK
42 CARD_SMBDAT
Q42
+3.3V_PCIE_FLASH
C650
4700P_0402_25V7K~D
R729
100K_0402_5%~D
Q43B
+3.3V_ALW
R728
100K_0402_5%~D
+15V_ALW
15 EXPCLK_REQ#
2
C649
0.1U_0402_16V4Z~D
C645
0.1U_0402_16V4Z~D
15 CLK_PCIE_EXP#
15 CLK_PCIE_EXP
15 PCIE_PRX_EXPTX_N3
15 PCIE_PRX_EXPTX_P3
15 PCIE_PTX_EXPRX_N3
15 PCIE_PTX_EXPRX_P3
EXPRCRD_CPPE#
C647
1
1
C648
0.1U_0402_10V7K~D
2 PCIE_PTX_EXPRX_N3_C
2 PCIE_PTX_EXPRX_P3_C
0.1U_0402_10V7K~D
GND1
USB_DUSB_D+
CPUSB#
RESERVED
RESERVED
SMB_CLK
SMB_DAT
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PER_N0
PER_P0
GND
PET_N0
PET_P0
GND
27
28
29
30
R733
100K_0402_5%~D
GND
GND
GND
GND
T-SOL_5421005002000-9_NR
Title
PCIE-SATA SW / PCIE PWR

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
37
of
75
+USB_SIDE_PWR
C656
0.1U_0402_16V4Z~D
USB conn update ok-6/5

JUSB2
1
2
3
4
+5V
AA+ GND
GNDGND
6
5
SUYIN_020133GR004M53UZL
CONN@
USBP0_DUSBP0_D+
D72
USBP0+
17
USBP0-
L52
USBP0_D+
USBP0_D-
17
USBP1+
17
USBP1-
USBP1_D+
USBP1_D-
1
2
@ R736
0_0402_5%~D
1
2
@R737
@
R737
0_0402_5%~D
1
@ R738
1
@R739
@
R739
2
0_0402_5%~D
L51
17
2
0_0402_5%~D
+USB_SIDE_PWR
C658
0.1U_0402_16V4Z~D
C657
150U_B2_6.3V-M~D
1
B
USB conn update ok-6/5

JUSB3
1
2
3
4
+5V
AA+ GND
GNDGND
6
5
SUYIN_020133GR004M53UZL
CONN@
USBP1_DUSBP1_D+
D73
Title
USB x2
Size
Rev
1.0
LA-6592P
Date:
Document Number
Sheet
1
38
of
75
+3.3V_RUN
1
2
@ R743
0_0402_5%~D
@ R742
0_0402_5%~D
@ R1587
0_0402_5%~D
2
0_0402_5%~D
@ R1586
0_0402_5%~D
1
R741
C662
0.1U_0402_16V4Z~D
2
+3.3V_RUN
C661
0.01U_0402_16V7K~D
ESATA Repeater
U44
BINP
BINM
11
12
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
Note: +ESATA_DEW1, +ESATA_DEW2, +ESATA_EQ1, +ESATA_EQ2 need to

route 10 mils and R1584~R1587 need to change to 10k and no
stuff R1584, R1585 to support TI SN75LVCP601
+USB_SIDE_PWR
41 USB_SIDE_EN#
USB_OC1#
17,31
USB_OC0#
17
+
2
JUMP_43X79
10
9
8
7
6
11
R747
24.9K_0402_1%~D
TPS2560DRCR-PG1.1_SON10_3X3~D
JESA1
USBP2_DUSBP2_D+
GND FAULT1#
IN
OUT1
IN
OUT2
EN1#
ILIM
EN2# FAULT#2
T-PAD
C668
0.1U_0402_16V4Z~D
C670
0.1U_0402_16V4Z~D
C669
10U_0805_10V4Z~D
U45
1
2
3
4
5
+5V_ALW_FUSE
C667
150U_B2_6.3V-M~D
+5V_ALW_FUSE
PJP7
2
ESATA_PTX_DRX_P4_RP
1
C671
ESATA_PTX_DRX_N4_RP
1
C672
ESATA_PRX_DTX_N4_RP
1
C673
ESATA_PRX_DTX_P4_RP
1
C674
USBP2+
17
USBP2-
2
3
USBP2_D-
1
2
@ R1150
0_0402_5%~D
1
@ R1151
2 SATA_PTX_DRX_P4
0.01U_0402_16V7K~D
2 SATA_PTX_DRX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_P4
0.01U_0402_16V7K~D
2
0_0402_5%~D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
L90
USBP2_D+
+SATA_SIDE_PWR
+SATA_SIDE_PWR
+5V_ALW
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
1
15
14
1
2
1
2
1
2
AOUTP
AOUTM
MAX4951BECTP+TGH7_TQFN20_4X4~D
@ R1585
0_0402_5%~D
@R1584
0_0402_5%~D
GND
GND
GND
GND
EP
@ R745
0_0402_5%~D
3
13
17
19
21
9
8
@R746
@
R746
0_0402_5%~D
@ R1583
10K_0402_5%~D
@ R1582
10K_0402_5%~D
PA
PB
BOUTM
BOUTP
+ESATA_DEW1
@ R1589
10K_0402_5%~D
+ESATA_EQ1
+ESATA_EQ2
+3.3V_RUN
4
5
+ESATA_DEW2
AINP
AINM
6
10
16
20
14 ESATA_PRX_DTX_P4_C
1
2
VCC
VCC
VCC
VCC
14 ESATA_PRX_DTX_N4_C
EN
CAD
14 ESATA_PTX_DRX_N4_C
14 ESATA_PTX_DRX_P4_C
7
18
ESATA_PTX_DRX_P4
0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_N4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_P4
0.01U_0402_16V7K~D
@ R1588
10K_0402_5%~D
ESATA_PTX_DRX_P4_C 2
C664
ESATA_PTX_DRX_N4_C 2
C663
ESATA_PRX_DTX_N4_C 2
C666
ESATA_PRX_DTX_P4_C 2
C665
D74
VBUS
DD+
GND
USB
GND
A+
ESATA
AGND
BB+
GND
GND
GND
GND
GND
TYCO_2129156-3
CONN@
Place D74 close to JESATA1
Title
USB/ESATA/IO/MDC
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
39
of
75
CONN@
JDOCK1
47 DPD_GPU_LANE_P0
47 DPD_GPU_LANE_N0
47 DPD_GPU_LANE_P1
47 DPD_GPU_LANE_N1
47 DPD_GPU_LANE_P2
47 DPD_GPU_LANE_N2
47 DPD_GPU_LANE_P3
47 DPD_GPU_LANE_N3
DPD_CA_DET
C690
C679
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_GPU_LANE_P0_C
DPD_GPU_LANE_N0_C
C681
C683
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_GPU_LANE_P1_C
DPD_GPU_LANE_N1_C
C692
C685
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_GPU_LANE_P2_C
DPD_GPU_LANE_N2_C
C687
C689
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_GPU_LANE_P3_C
DPD_GPU_LANE_N3_C
27 DPD_DOCK_AUX
27 DPD_DOCK_AUX#
DPD_GPU_HPD
46 DPD_GPU_HPD
DPD_GPU_HPD
+NBDOCK_DC_IN_SS
1
@ C695
0.033U_0402_16V7K~D
Close to DOCK
Its for Enhance ESD on dock issue.
2
25
RED_DOCK
RED_DOCK
R757
100K_0402_1%~D
BLUE_DOCK
25 BLUE_DOCK
GREEN_DOCK
25 GREEN_DOCK
25 HSYNC_DOCK
25 VSYNC_DOCK
42 CLK_MSE
42
DAT_MSE
30 DAI_BCLK#
30 DAI_LRCK#
30 DAI_DI
30 DAI_DO#
30 DAI_12MHZ#
41
41
D_LAD0
D_LAD1
41
41
D_LAD2
D_LAD3
41
41
D_LFRAME#
D_CLKRUN#
41
41
D_SERIRQ
D_DLDRQ1#
17 CLK_PCI_DOCK
42 DOCK_SMB_CLK
42 DOCK_SMB_DAT
42,52,62 DOCK_SMB_ALERT#
52 DOCK_PSID
42 DOCK_PWR_BTN#
41,52,62 SLICE_BAT_PRES#
SLICE_BAT_PRES#
2
1
145
146
147
148
153
154
155
156
157
158
GND1
PWR1
PWR1
PWR1
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
DOCK_AC_OFF
DPC_CA_DET
DPC_GPU_LANE_P0_C
DPC_GPU_LANE_N0_C
C691 2
C680 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_GPU_LANE_P1_C
DPC_GPU_LANE_N1_C
C682 2
C684 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_GPU_LANE_P2_C
DPC_GPU_LANE_N2_C
C693 2
C686 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_GPU_LANE_P3_C
DPC_GPU_LANE_N3_C
C688 2
C694 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_GPU_LANE_P0 47
DPC_GPU_LANE_N0 47
DPC_GPU_LANE_P1 47
DPC_GPU_LANE_N1 47
DPC_GPU_LANE_P2 47
DPC_GPU_LANE_N2 47
DPC_GPU_LANE_P3 47
DPC_GPU_LANE_N3 47
DPC_DOCK_AUX 27
DPC_DOCK_AUX# 27
DPC_GPU_HPD
DPC_GPU_HPD 46
ACAV_DOCK_SRC# 62
DAT_DDC2_DOCK 25
CLK_DDC2_DOCK 25
2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
2
C697 2
C698
1
C699 1
C700
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
2 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
@ C696
0.033U_0402_16V7K~D
SATA_PRX_DKTX_P5_C 14
SATA_PRX_DKTX_N5_C 14
Close to DOCK
Its for Enhance ESD on dock issue.
SATA_PTX_DKRX_P5_C 14
SATA_PTX_DKRX_N5_C 14
USBP8+ 17
USBP8- 17
DPC_GPU_HPD
USBP9+ 17
USBP9- 17
CLK_KBD 42
DAT_KBD 42
R758
100K_0402_1%~D
BREATH_LED# 42,45
DOCK_LOM_ACTLED_YEL# 32
DOCK_LOM_TRD0+ 32
DOCK_LOM_TRD0- 32
+3.3V_ALW
DOCK_LOM_TRD1+ 32
DOCK_LOM_TRD1- 32
+LOM_VCT
DOCK_DET#
1
+LOM_VCT
DOCK_LOM_TRD2+ 32
DOCK_LOM_TRD2- 32
1
R755
2
100K_0402_5%~D
C701
1U_0402_6.3V6K~D
DOCK_LOM_TRD3+ 32
DOCK_LOM_TRD3- 32
DOCK_DCIN_IS+ 60
DOCK_DCIN_IS- 60
D32
RB751S40T1_SOD523-2~D
1
2
DOCK_POR_RST# 42
DOCK_DET_R#
149
150
151
152
159
160
161
162
163
164
DOCK_AC_OFF 41,62
DOCK_LOM_SPD100LED_ORG# 32
DPC_CA_DET 27
DOCK_DET#
41
+DOCK_PWR_BAR
C703
0.1U_0603_50V4Z~D
C702
0.1U_0603_50V4Z~D
@ D33
SM24.TCT_SOT23-3~D
+DOCK_PWR_BAR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
32 DOCK_LOM_SPD10LED_GRN#
27 DPD_CA_DET
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
DOCK_DET_1
CLK_PCI_DOCK
1
JAE_WD2F144WB1
A
R756
33_0402_5%~D
C704
6.8P_0402_50V8D~D
Title
DOCKING CONN
Size
Document Number
Date:
Rev
1.0
LA-6592P
1
Sheet
40
of
75
+3.3V_ALW
PCIE_WAKE#
2
10K_0402_5%~D
DCIN_CBL_DET#
2
100K_0402_5%~D
CPU_DETECT#
2
100K_0402_5%~D
SLICE_BAT_PRES#
2
100K_0402_5%~D
1
R759
1
R761
1
R763
1
R760
+3.3V_ALW
1
C706
0.1U_0402_16V4Z~D
1
C707
0.1U_0402_16V4Z~D
1
C708
0.1U_0402_10V7K~D
1
C709
0.1U_0402_16V4Z~D
1
C710
0.1U_0402_16V4Z~D
C705
10U_0805_6.3V6M~D
D
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
62 MODULE_ON
62 SLICE_BAT_ON
40,52,62 SLICE_BAT_PRES#
52,62 MODULE_BATT_PRES#
62 CHARGE_MODULE_BATT
62 CHARGE_PBATT
62 DEFAULT_OVRDE
SLICE_BAT_ON
SLICE_BAT_PRES#
GFX_MEM_VTT_ON
49 GFX_MEM_VTT_ON
+3.3V_ALW
1
R796
2 DYN_TUR_PWR_ALRT#
10K_0402_5%~D
CPU_DETECT#
DGPU_PWR_EN
7 CPU_DETECT#
63 DGPU_PWR_EN
29 MOD_SATA_PCIE#_DET
46 DP_HDMI_HPD
DP_HDMI_HPD
29 ZODD_WAKE#
33 BCM5882_ALERT#
SUSACK#_EC
1
2
16
SUSACK#
@ R1132
0_0402_5%~D
25 EDID_SELECT#
18,63 DGPU_PWROK
VGA_ID
+3.3V_ALW
1
@ R800
VGA_ID
2
100K_0402_5%~D
VGA_ID
1
R803
2
100K_0402_5%~D
VGA_ID
Discrete
UMA
SLP_ME_CSW_DEV#
32 LAN_DISABLE#_R
62 CHARGE_EN
45 SYS_LED_MASK#
60 DYN_TUR_PWR_ALRT#
18 SIO_EXT_WAKE#
36,45 WIRELESS_LED#
16 PCH_PCIE_WAKE#
36 WLAN_RADIO_DIS#
SYS_LED_MASK#
DYN_TUR_PWR_ALRT#
1
2
@ R797
0_0402_5%~D
PCH_PCIE_WAKE#
A1
B2
A2
B3
A3
B45
A42
B4
A59
B62
A58
B61
A56
B59
A55
B58
B47
A45
B48
A46
B49
A47
B50
A48
WIRELESS_ON#/OFF
B13
A13
A53
B57
B14
A14
CPU_VTT_ON
B17
1
2
B18
@R802
@
R802
0_0402_5%~D
31 WIRELESS_ON#/OFF
43 BT_RADIO_DIS#
36 WWAN_RADIO_DIS#
7,16 SYS_PWROK
23,25 DGPU_SELECT#
46 DGPU_DI_INT#
57,61 CPU_VTT_ON
16 PCH_DPWROK
GPIOE0/RXD
GPIOE1/TXD
GPIOE2/RTS#
GPIOE3/DSR#
GPIOE4/CTS#
GPIOE5/DTR#
GPIOE6/RI#
GPIOE7/DCD#
GPIOF0
GPIOF1
GPIOF2
GPIOF3/TACH8
GPIOF4/TACH7
GPIOF5
GPIOF6
GPIOF7
GPIOG0/TACH5
GPIOG1
GPIOG2
GPIOG3
GPIOG4
GPIOG5
GPIOG6
GPIOG7/TACH6
GPIOK0
GPIOK1/TACH3
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
A8
B9
B10
A10
B11
A11
B12
A12
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
B60
A57
B64
B68
A9
B1
A18
A44
5048_GPIOL0
5048_GPIOL1
5048_GPIOL2
5048_GPIOL3
5048_GPIOL4
5048_GPIOL5
5048_GPIOL6
5048_GPIOL7
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
B34
B39
B51
5048_GPI0M1
5048_GPI0M3
5048_GPI0M4
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
14.318MHZ/GPIOM0
CLK32/GPIOM2
A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21
A32
B35
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
GPIOH0
GPIOH1
SYSOPT1/GPIOH2
SYSOPT0/GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
1
O 4D34 2
RB751S40T1_SOD523-2~D
U47
TC7SH08FU_SSOP5~D
DOCK_AC_OFF 40,62
DOCK_AC_OFF_EC 62
ME_FWP
14
MASK_SATA_LED# 45
1.8V_RUN_PWRGD 55
LED_SATA_DIAG_OUT# 45
2
0_0402_5%~D
R770
33K_0402_5%~D
TEMP_ALERT# 14,18
RUN_ON
11,37,44,55,63
SPI_WP#_SEL 14
C
+3.3V_RUN
D_CLKRUN#
2
R777
2
R780
2
R782
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
RUN_ON
2
R786
1
100K_0402_5%~D
CPU_VTT_ON
2
R789
1
100K_0402_5%~D
0.75V_DDR_VTT_ON 2
R790
SLICE_BAT_ON
1
R791
1
100K_0402_5%~D
2
100K_0402_5%~D
D_SERIRQ
D_DLDRQ1#
CLK_PCI_5028
CLK_SIO_14M
LPC_LAD0 14,33,34,42
LPC_LAD1 14,33,34,42
LPC_LAD2 14,33,34,42
LPC_LAD3 14,33,34,42
LPC_LFRAME# 14,33,34,42
PCH_PLTRST#_EC 14,17,34,36,37,42
CLK_PCI_5028 17
CLKRUN# 16,34,42
LPC_LDRQ0# 14
LPC_LDRQ1# 14
IRQ_SERIRQ 14,33,34,42
CLK_SIO_14M 15
EC_32KHZ_ECE5048 42
5048_GPIOL0
2
5048_GPIOL1 @ R1567 1
5048_GPIOL2 R1568 1
5048_GPIOL3 R1569 1
5048_GPIOL4 @ R1570 1
5048_GPIOL5 R1571 1
5048_GPIOL6 @ R1572 1
5048_GPIOL7 R1573 1
R1574
5048_GPI0M1
1
5048_GPI0M3@ R1575 1
5048_GPI0M4 R1576 1
R1577
D_LAD0
40
D_LAD1
40
D_LAD2
40
D_LAD3
40
D_LFRAME# 40
D_CLKRUN# 40
D_DLDRQ1# 40
D_SERIRQ 40
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
A29
B31
A30
BC_INT#_ECE5028 42
BC_DAT_ECE5028 42
BC_CLK_ECE5028 42
1
2
2
2
2
2
2
2
A4
SP_TPM_LPC_EN
TEST_PIN
B19
CAP_LDO
B46
2
R804
+CAP_LDO
DB Version 0.4
ECE5028-LZY_DQFN132_11X11~D
B27
C1
2
2 0_0402_5%~D
2 0_0402_5%~D
0_0402_5%~D
CLK_PCI_5028
RUNPWROK 7,42
B56
OUT65
10K_0402_5%~D
10K_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SP_TPM_LPC_EN 33,34
@ R794
10_0402_5%~D
1
1K_0402_5%~D
1
+CAP_LDO trace width 20mil.
@ R795
10_0402_5%~D
C714
4.7U_0603_6.3V6K~D
@ C712
4.7P_0402_50V8C~D
1
@C713
@
C713
4.7P_0402_50V8C~D
R805
100K_0402_5%~D
ME_FWP
@ R793
1K_0402_5%~D
LID_CL_SIO#
2
R807
1
10_0402_5%~D
LID_CL#
31,45
TEMP_ALERT#_R
1
@ R1591
RUN_ON
ME_FWP PCH has internal 20K PD.

(suspend power rail)
AUX_EN_WOWL 37
WLAN_LAN_DISB# 32
SIO_SLP_LAN# 16,32
SIO_SLP_SUS# 16
GPIO_PSID_SELECT 52
MODC_EN
29
DOCK_HP_DET 30
DOCK_MIC_DET 30
ME_FWP
CLK_SIO_14M
PWRGD
VSS
EP
+3.3V_ALW
B29
B28
A25
A24
B23
A19
B24
A20
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
B67
A64
A5
B6
A6
B7
A7
B8
2 C711
0.1U_0402_16V4Z~D
B32
A31
B33
B15
A15
B16
A16
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
SYS_LED_MASK#
2
10K_0402_5%~D
DGPU_PWR_EN
2
100K_0402_5%~D
GFX_MEM_VTT_ON
2
100K_0402_5%~D
DP_HDMI_HPD
2
100K_0402_5%~D
1
R775
1
R1152
1
R1153
1
R1154
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
GPIOB0
GPIOB1
GPOC2
GPOC3
GPOC4
GPOC5
GPOC6/TACH4
GPIOC7
GPIOD0
GPIOC1
GPIOC0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
1
2
@ R765
0_0402_5%~D
DOCK_AC_OFF_EC
SIO_SLP_A#
16,56
0.75V_DDR_VTT_ON 55
SIO_SLP_S4# 16
SIO_SLP_S3# 16
IMVP_PGOOD 58
IMVP_VR_ON 58
1
R766
1
@ R772
1
R767
PANEL_BKEN_EC
A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44
0.75V_DDR_VTT_ON
WIRELESS_ON#/OFF
2
100K_0402_5%~D
SP_TPM_LPC_EN
2
10K_0402_5%~D
LCD_TST
2
100K_0402_5%~D
USB_SIDE_EN#
39 USB_SIDE_EN#
30 EN_I2S_NB_CODEC#
33 USH_PWR_STATE#
62 EN_DOCK_PWR_BAR
24 PANEL_BKEN_EC
16,24 ENVDD_PCH
24
LCD_TST
52 PSID_DISABLE#
52,62 PBAT_PRES#
32
DOCKED
40 DOCK_DET#
30 AUD_NB_MUTE#
37 MCARD_WWAN_PWREN
24 LCD_VCC_TEST_EN
24
CCD_OFF
B63
A60
A61
B65
A62
B66
A63
+3.3V_RUN
PCIE_WAKE#
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
46 GPU_DEEP_CLKDWN
29,36,37 PCIE_WAKE#
46 GPU_CLKDWN
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7
DCIN_CBL_DET#
LID_CL_SIO#
B52
A49
B53
A50
B54
A51
B55
A52
42,60,62
25 CRT_SWITCH
31 MDC_RST_DIS#
37 MCARD_MISC_PWREN
52 DCIN_CBL_DET#
+3.3V_ALW
ACAV_IN_NB
USB_SIDE_EN#
2
10K_0402_5%~D
ESATA_USB_PWR_EN#
2
10K_0402_5%~D
1
R768
1
R769
VCC1
VCC1
VCC1
VCC1
VCC1
U46
+3.3V_ALW2
B5
A17
B30
A43
A54
C716
0.047U_0402_16V4Z~D

Title
ECE5028
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
41
of
75
+3.3V_ALW
+RTC_CELL
DOCK_POR_RST#
SUS_ON
AUX_ON
PCH_ALW_ON
FAN PWM & TACH

B22
A21
B23
B24
A23
B25
A24
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
+3.3V_ALW
C
43 BC_CLK_ECE1117
43 BC_DAT_ECE1117
43 BC_INT#_ECE1117
30
BEEP
16 SIO_SLP_S5#
41,60,62 ACAV_IN_NB
BC_DAT_ECE1117
B66
B17
B27
B28
2
1
1
@R862
@
R862 1
R863
1
@ R864 1
@R864
@R865
@
R865
MEC5055-LZY_DQFN132_11X11~D
53
22,60,62
R864& R865 for MEC5045

should be populated
CLK_KBD
CLK_MSE
DAT_MSE
GPU_SMBCLK
R871
1K_0402_5%~D
SYSTEM_ID
44 RUN_ON_ENABLE#
PCH_RSMRST#_Q
R872
10K_0402_5%~D
@D75A
@
D75A BAV99DW-7-F_SOT363-6~D
1
6
2
Q48
FWP#
Q45
2
G
C742
4700P_0402_25V7K~D
@R879
@
R879
10K_0402_5%~D
CHIPSET_ID for BID

function
@D75B
@
D75B BAV99DW-7-F_SOT363-6~D
4
3
5
22
2
G
14,16
2
R829
2
R822
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
+RTC_CELL
2
R1156
1
100K_0402_5%~D
2
10K_0402_5%~D
2
100K_0402_5%~D
1
2.7K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
10K_0402_5%~D
1
8.2K_0402_5%~D
1
100K_0402_5%~D
1=JTAG interface Reset disabled

0=Reset JTAG interface
1
R869
A_ON
1
R873
AUX_ON
2
R874
DDR_ON
2
R876
SUS_ON
2
R878
PCH_ALW_ON
2
R880
DOCK_POR_RST#
2
R881
EN_INVPWR
2
R882
1.05V_0.8V_PWROK
2
R883
RESET_OUT#
2
@R843
@
R843
CPU1.5V_S3_GATE
2
R889
Title
@ R823
2.2K_0402_5%~D
EMC5055
+5V_RUN
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
+3.3V_RUN
MSDATA
RUNPWROK
1
100K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
+3.3V_ALW
R799
10K_0402_5%~D
1
10K_0402_5%~D
2
R845
2
R846
2
R851
2
R852
DAT_KBD
GPU_SMBDAT
+PECI_VREF
PECI_EC_R
LAT_ON_SW_BTN# 31
+3.3V_ALW
+1.05V_RUN_VTT
trace width 20 mils
2
2 0_0402_5%~D
PECI_EC 18
43_0402_5%~D
1
R863 close to
U51 & least 250mils
2
2 0_0402_5%~D
2
0_0402_5%~D
DOCK_PWR_SW#
C739
4.7U_0603_6.3V6K~D
INTEL RSMRST# circuit

5
B51
A48
2
R835
2
R1590
DOCK_SMB_DAT
2
R838
DOCK_SMB_CLK
2
R841
DOCK_SMB_ALERT#
2
R762
LCD_SMBCLK
2
R418
LCD_SMBDAT
2
R420
VOL_MUTE
2
R1166
VOL_UP
2
R1167
VOL_DOWN
2
R1184
DEVICE_DET#
2
R1118
BAY_SMBDAT
2
R854
BAY_SMBCLK
2
R856
DYN_TUR_CURRNT_SET# 2
R764
LAT_ON_SW#
ACAV_IN
2
10K_0402_5%~D
XFR_ID_BIT#
BAY_SMBDAT 29,52
BAY_SMBCLK 29,52
GPU_SMBDAT 46
GPU_SMBCLK 46
CHARGER_SMBDAT 60
CHARGER_SMBCLK 60
CARD_SMBDAT 37
CARD_SMBCLK 37
USH_SMBDAT 33
USH_SMBCLK 33
ALWON
@C738
@
C738
1U_0402_6.3V6K~D
2
+3.3V_ALW_PCH
AC_PRESENT
DOCK_SMB_DAT 40
DOCK_SMB_CLK 40
VCI_INT1#
POWER_SW_IN#
40
C740
1U_0402_6.3V6K~D
AC_PRESENT 16
SIO_PWRBTN# 16
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
1
R877
1
40,52,62
VCI_INT1#
2
1
S
RESET_OUT#
DEVICE_DET#
RESET_OUT#
A_ON
PCH_RSMRST#
AC_PRESENT
LAT_ON_SW#
31
1
@ R866
4.7K_0402_5%~D
PCH_PWRGD#
@ Q47
1
2
@ R812
100K_0402_5%~D
PCH_RSMRST#
7,58,60
2
G
A59
B63
A60
A63
B67
B1
A1
2
0_0402_5%~D
R893
100K_0402_5%~D
1
2
PROCHOT#_EC
R1180
0_0402_5%~D
1
2
1
2
@R1179
@
R1179
10K_0402_5%~D
I2S_DAT
I2S_CLK
I2S_WS
@ Q126
+3.3V_ALW_PCH
+3.3V_M
H_PROCHOT#
R870
100K_0402_5%~D
1
@ C747
4.7P_0402_50V8C~D
2
1
R868
+3.3V_RUN
@ R885
10_0402_5%~D
VOL_MUTE
DOCK_SMB_ALERT#
VOL_UP
31
VOL_DOWN 31
ME_SUS_PWR_ACK 16
1.5V_SUS_PWRGD 54
PM_APWROK 16
1.05V_A_PWRGD 56
ALW_PWRGD_3V_5V 53
DEVICE_DET# 29
RESET_OUT# 16
A_ON
44,56
DOCK_PWR_BTN#
+RTC_CELL
Bat2 = Amber LED

Bat1 =White LED
+3.3V_ALW
CLK_PCI_MEC
A
2 1K_0402_5%~D
2
10K_0402_5%~D
C734
1U_0402_6.3V6K~D
+3.3V_RUN
Place closely pin A29
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
1
1 R825
20mA drive pins
DOCK_SMB_ALERT#
R886 1
2 1K_0402_5%~D
R887 1
2 1K_0402_5%~D
C744
4700P_0402_25V7K~D
33P_0402_50V8J~D
FWP#
PROCHOT#_EC
least
15mil
X00
X01
X02
A00
POWER_SW#_MB 31,43
@ C733
1U_0402_6.3V6K~D
R819
100K_0402_5%~D
1
2
BOARD_ID
240K 4700p
130K 4700p
62K 4700p
* 33K 4700p
8.2K 4700p
4.3K 4700p
2K 4700p
1K 4700p
15mil
REV
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
DOCK_PWR_SW#
22 DOCK_PWR_SW#
C919
I2S
32.768KHZ_12.5PF_Q13MC1461000~D
C743
1
2
MEC_XTAL1
R875
33K_0402_5%~D
R875
+3.3V_ALW
33P_0402_50V8J~D
Y6
PECI_VREF
PECI
DB Version 0.12
VR_CAP
NC1
NC2
NC3
Depopulated R867 for ECE5028 use

C741
1
2
PECI
XTAL1
XTAL2
GPIO160/32KHZ_OUT
+VR_CAP B12
B34
A64
B68
2
0_0402_5%~D
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
MASTER CLOCK
A61
A62
B62
XFR_ID_BIT#
DDR_ON
54,55
HOST_DEBUG_TX 36
HOST_DEBUG_RX 36
RUNPWROK
7,41
EN_INVPWR
24
PCH_SATA_MOD_EN# 14
TOUCH_SCREEN_PD# 24
XFR_ID_BIT# 31
DDR_HVREF_RST_GATE 7
DYN_TUR_CURRNT_SET#
60
CPU1.5V_S3_GATE 11
MSDATA
36
MSCLK
36
SIO_A20GATE 18
PS_ID
52
BAT1_LED# 45
BAT2_LED# 45
DELL PWR SW INF
VSS[1]
VSS[4]
MEC_XTAL1
1 MEC_XTAL2_R
0_0402_5%~D
GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI
B11
B60
41 EC_32KHZ_ECE5048
1
@R867
@
R867
CLK_PCI_MEC
A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33
2
10K_0402_5%~D
C722
1U_0402_6.3V6K~D
C737
0.1U_0402_16V4Z~D
MEC_XTAL2 2
@R1068
@
R1068
ACES_85204-06001~D
MEC_XTAL2
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
R884 1
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
SMBUS INTERFACE
AGND
2
1
1
2
1
2
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
32 KHz Clock
LPC_LDRQ#_MEC
14,17,34,36,37,41 PCH_PLTRST#_EC
17 CLK_PCI_MEC
14,33,34,41 LPC_LFRAME#
14,33,34,41 LPC_LAD0
14,33,34,41 LPC_LAD1
14,33,34,41 LPC_LAD2
14,33,34,41 LPC_LAD3
16,34,41 CLKRUN#
18 SIO_EXT_SCI#
R861
10K_0402_5%~D
R860
10K_0402_5%~D
R859
10K_0402_5%~D
14,17 SIO_EXT_SMI#
18 SIO_RCIN#
R858
10K_0402_5%~D
G1
G2
R857
49.9_0402_1%~D
7
8
1
2
3
4
5
6
1
2
3
4
5
6
GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
+3.3V_ALW
@ JTAG2
BC_DAT_EMC4022
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15
VSS_RO
HOST_DEBUG_TX
2
2 0_0402_5%~DHOST_DEBUG_RX
0_0402_5%~D
BC_DAT_ECE5028
B54
1
2
1
2
@R850
@
R850
100K_0402_5%~D
R849
10K_0402_5%~D
1 1
MSCLK
2 2
MSDATA
3 3
4 4 @ R8531
5 5 @ R8551
6 6
ACES_85204-06001~D
G1
G2
R848
10K_0402_5%~D
@JDEG1
@
JDEG1
7
8
R847
10K_0402_5%~D
BC-LINK
41 BC_CLK_ECE5028
41 BC_DAT_ECE5028
41 BC_INT#_ECE5028
22 BC_CLK_EMC4022
22 BC_DAT_EMC4022
22 BC_INT#_EMC4022
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
A46
GENERAL PURPOSE I/O
GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3
1
R811
1
1
2
GPIO145/I2C1K_DATA/JTAG_TDI
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
JTAG_RST#
C736
2 0.1U_0402_16V4Z~D
1
40 DOCK_POR_RST#
44 SUS_ON
32
AUX_ON
40,45 BREATH_LED#
44 PCH_ALW_ON
24 BIA_PWM_EC
28
HDDC_EN
A51
B55
B56
A53
B57
POWER_SW_IN#
22 POWER_SW_IN#
2
1
JTAG INTERFACE
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
@ JTAG1
SHORT PADS~D
C735
0.1U_0402_16V4Z~D
R836
100_0402_5%~D
@
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
PROCHOT#/PWM4
JTAG_RST#
JTAG_RST# citcuit
close to U51.B57
R824
10K_0402_5%~D
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
MISC INTERFACE
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO110/PS2_CLK2/GPTP-IN6
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO112/PS2_CLK1A
GPIO113/PS2_DAT1A
GPIO114/PS2_CLK0A
GPIO115/PS2_DAT0A
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO155/I2C1C_CLK/PS2_DAT1B
+3.3V_ALW
A5
B6
A37
B40
A38
B41
A39
B42
B59
A56
@C721
@
C721
1U_0402_6.3V6K~D
1
2
+RTC_CELL
PS/2 INTERFACE
15 SML1_SMBDATA
15 SML1_SMBCLK
43
CLK_TP_SIO
43
DAT_TP_SIO
40 CLK_KBD
40
DAT_KBD
40 CLK_MSE
40
DAT_MSE
52 PBAT_SMBDAT
52 PBAT_SMBCLK
R810
100K_0402_5%~D
R828
CHARGER_SMBDAT
2
2.2K_0402_5%~D
CHARGER_SMBCLK
2
2.2K_0402_5%~D
EP
R827
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
U51
14,58
C1
1.05V_0.8V_PWROK
B64
5
P
G
3
1.05V_0.8V_PWROK
C728
10U_0805_6.3V6M~D
C732
0.1U_0402_16V4Z~D
TC7SH08FU_SSOP5~D
C726
0.1U_0402_16V4Z~D
C725
0.1U_0402_16V4Z~D
C731
0.1U_0402_16V4Z~D
+3.3V_ALW
C730
0.1U_0402_16V4Z~D
@R821
@
R821
61 VCCSAPWROK
U50
R815
0_0402_5%~D
1
2 +RTC_CELL_VBAT
1
C729
0.1U_0402_16V4Z~D
R820
57,61 1.05V_VTTPWRGD
PBAT_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBCLK
2
2.2K_0402_5%~D
LPC_LDRQ#_MEC
1
100K_0402_5%~D
+RTC_CELL
C727
0.1U_0402_16V4Z~D
R818
C720
0.1U_0402_16V4Z~D
2
C724
0.1U_0402_16V4Z~D
R817
C723
0.1U_0402_16V4Z~D
R816
BC_DAT_ECE5028
2
100K_0402_5%~D
BC_DAT_EMC4022
1
100K_0402_5%~D
BC_DAT_ECE1117
1
100K_0402_5%~D
A11
A22
B35
A41
A58
A52
B3
A26
+3.3V_ALW
R814
Size
Document Number
Date:
Rev
1.0
LA-6592P
2
Sheet
1
42
of
75
1
2
L54 2
42
CLK_TP_SIO
L55 2
10P_0402_50V8J~D
C749
10P_0402_50V8J~D
C750
TP_CLK
1 BLM18AG601SN1D_0603~D
1
2
3
4
5
6
7
8
TP_CLK
TP_DATA
TP_DATA
1 BLM18AG601SN1D_0603~D
C751
10P_0402_50V8J~D
C752
10P_0402_50V8J~D
1
@R1130
@
R1130
+3.3V_ALW
2
0_0603_5%~D
+3.3V_TP
PS2_DAT_TS
PS2_CLK_TS
1
2
3
4
5
6
7
8
CONN@
JBT1
G1
G2
17
BT_DET#
36 COEX1_BT_ACTIVE
33 BT_COEX_STATUS2
33 BT_PRI_STATUS
45 BT_ACTIVE
41 BT_RADIO_DIS#
36 COEX2_WLAN_ACTIVE
9
10
TYCO_2041070-8
CONN@
17
17
+3.3V_ALW
+3.3V_RUN
C748
0.1U_0402_16V4Z~D
JTP1
DAT_TP_SIO
Touch Pad Conn. Pitch=0.5mm
+3.3V_BT
@ R1129
0_0603_5%
1
2
+3.3V_RUN
Touch Pad
42
BlueTooth
Pin reverse for PT

R902
4.7K_0402_5%~D
R903
4.7K_0402_5%~D
+3.3V_TP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BT_COEX_STATUS2
BT_PRI_STATUS
USBP11USBP11+
+3.3V_TP
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
E&T_3703-E12N-03R
1
2
1
2
1
2
@D37
@
D37
SD05.TCT_SOD323-2~D
C755
0.1U_0402_16V4Z~D
@D36
@
D36
SD05.TCT_SOD323-2~D
@ R1162
0_0603_5%~D
1
2
2 BT_COEX_STATUS2
1K_0402_5%~D
2 BT_PRI_STATUS
1K_0402_5%~D
1
@ R1133
1
@ R1134
+3.3V_BT
@ C754
100P_0402_50V8J~D
TP_CLK
TP_DATA
R904
10K_0402_5%~D
+3.3V_TP
C753
33P_0402_50V8J~D
@ R1161
0_0603_5%
1
2
Place close to JTP1
Power Switch for debug
Change KB connector to same as JSC1
KB Conn. Pitch=1.0mm
+3.3V_ALW
+5V_RUN
1
C756
0.1U_0402_16V4Z~D
C758
0.1U_0402_16V4Z~D
KB_DET#
KB_DET#
PS2_CLK_TS
PS2_DAT_TS
1
2
3
4
5
6
7
8
9
10
+3.3V_ALW
+5V_RUN
42 BC_INT#_ECE1117
42 BC_DAT_ECE1117
42 BC_CLK_ECE1117
11
12
Place close to JKB1
31,42 POWER_SW#_MB
JKB1
18
@ C759
100P_0402_50V8J~D
@ PWRSW1
@SHORT PADS~D
Place on Bottom
GND
GND
FCI_10089709-010010LF~D
CONN@
@LED Board FFC
NBX0000RP0L
Part Number
Description
FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
Part Number
DC30100BL0L
Description
CONN SET 0FD
MDC-RJ11
@ T/P FFC
Description
Part Number
NBX0000RS0L
@ LVDS cable
DC020003Y0L
Part Number
H-CONN SET ZJX MB-LCD

14 WXGA+(-1ch)
DC02C00180L
@ RTC BATT
Part Number
GC20323MX00
Description
Part Number
DC30100BO0L
Part Number
Part Number
DC28A000800
Description
@KB FFC
Part Number
H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
SP070007V0L
Description
DC020014Z10
Description
S SOCKET TYCO 1770551-1
10P H5.9 SMART
@BT wire cable
CONN SET 0FE DCJACK-MB WDMD-DCE30002-DF
@ Battery bridge cable
@ FAN
FFC 8P F P0.5
PAD=0.3 136MM
MB-TP/B 0FD
NBX0000RR0L
@ SG DC_IN wire cable
BATT CR2032 3V
220MAH MAXELL
Description
FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
@ LVDS cable
Description
@ MDC wire set cable
Part Number
@MEDIA Board FFC
Part Number
1
2
3
4
5
6
7
8
9
10
Part Number
DC020014Y0L
Description
H-CONN SET 0FD MB-BT
Description
H-CONN SET 0FD M/B-BATTERY 9PIN
Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
@ Speak
Part Number
PK230003Q0L
Description
SPK PACK ZJX 2.0W 4 OHM FG
Title
Touch PAD/Int KB/BT

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
43
of
75
DC/DC Interface
+3.3V_ALW_PCH Source
RUN_ON_ENABLE#
42 RUN_ON_ENABLE#
Q52B
R910
20K_0402_5%~D
D
Q52A
2
11,37,41,55,63 RUN_ON
1
1
@C762
@C762
3300P_0402_50V7K~D
@Q51A
@
Q51A
2
42 PCH_ALW_ON
5V_RUN_ENABLE
R909
100K_0402_5%~D
+5V_RUN
C763
2200P_0402_50V7K~D
ALW_ON_3.3V#
@ Q51B
PAD-OPEN 4x4m
G
3
1
1
2
ALW_ENABLE
ALW_ENABLE
+5V_ALW Q50
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R906
6
3
100K_0402_5%~D
5
PJP57
4
@R908
@
R908
20K_0402_5%~D
20
+15V_ALW
C761
10U_0805_10V4Z~D
6
5
2
1
@ R905
100K_0402_5%~D
C760
10U_0805_6.3V6M~D
@ R907
100K_0402_5%~D
+5V_RUN Source
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW
@ Q49
+3.3V_ALW_PCH
+3.3V_ALW
+15V_ALW
+3.3V_RUN Source
Q53A
2
42
SUS_ON
+3.3V_RUN
2
G
C767
4700P_0402_25V7K~D
R913
20K_0402_5%~D
1
Q56
C766
470P_0402_50V7K~D
Q53B
Q55
NTMS4920NR2G_SO8~D
1
2
3
3.3V_RUN_ENABLE
D
R912
100K_0402_5%~D
R914
20K_0402_5%~D
1
2
SUS_ON_3.3V#
C
8
7
6
5
S
4
C765
10U_0805_6.3V6M~D
6
5
2
1
SUS_ENABLE
R915
100K_0402_5%~D
+3.3V_ALW
+15V_ALW
C764
10U_0805_6.3V6M~D
R911
100K_0402_5%~D
+3.3V_ALW2
Q54
SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS
D
+3.3V_ALW
+15V_ALW
+3.3V_SUS Source
Discharg Circuit
3
2
Q62
Q64
1
R931
20K_0402_5%~D
+1.05V_RUN
1
2
1
3
2
1
3
1
3
1
3
1
2
2
1
3
1
3
1
3
1
2
C773
2200P_0402_50V7K~D
2
G
1.05V_RUN_ENABLE
2
G
Q72
2
G
+1.05V_M Q63
8
1
7
2
R930
6
3
100K_0402_5%~D
5
R927
22_0603_5%~D
C771
4700P_0402_25V7K~D
+15V_ALW
+DDR_CHG
Q71
2
G
+1.5V_CPU_VDDQ_CHG
2
G
+0.75V_DDR_VTT
R926
220_0402_5%~D
7,11 RUN_ON_CPU1.5VS3#
@ Q70
2
G
+1.5V_CPU_VDDQ
@ R925
39_0402_5%~D
+1.05V_RUN_CHG
R929
39_0603_5%~D
Q69
2
G
+1.05V_RUN
+3.3V_RUN_CHG
@ R924
1K_0402_5%~D
@ Q68
+3.3V_RUN
+1.5V_RUN_CHG
RUN_ON_ENABLE#
@ Q67
+5V_RUN_CHG
ALW_ON_3.3V# 2
G
@ Q66
@ Q65
2
G
+1.05V_RUN Source
+1.5V_RUN
@ R923
1K_0402_5%~D
+3.3V_ALWPCH_CHG
+3.3V_SUS_CHG
@ R928
1K_0402_5%~D
R921
20K_0402_5%~D
2
G
C772
10U_0805_6.3V6M~D
@ R922
1K_0402_5%~D
SUS_ON_3.3V#
+5V_RUN
+3.3V_ALW_PCH
Discharg Circuit
+3.3V_SUS
1.5V_RUN_ENABLE
1
3
2
G
C770
4700P_0402_25V7K~D
A_ON_3.3V#
R920
100K_0402_5%~D
1
2
A_ON_3.3V# 5
Q57A
2
42,56
A_ON
@ R919
20K_0402_5%~D
Q60
Q57B
6
5
2
1
S
3
A_ENABLE
+15V_ALW
D
1
+3.3V_M_CHG
C768
10U_0805_6.3V6M~D
R917
100K_0402_5%~D
R918
100K_0402_5%~D
Q59
NTGS4141NT1G_TSOP6~D
+1.5V_RUN
+1.5V_MEM
R916
39_0603_5%~D
+3.3V_M
C769
10U_0805_6.3V6M~D
6
5
2
1
+15V_ALW
+3.3V_ALW2
Q58
+3.3V_ALW
+1.5V_RUN Source
+3.3V_M
+3.3V_M Source
Title
POWER CONTROL
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
44
of
75
HDD LED solution for White LED

+5V_ALW
BAT2_LED
U54
R942
100K_0402_5%~D
31
BATT_YELLOW
31
Q83B
RB751S40T1_SOD523-2~D
4
3
2
Q84
PDTA114EU_SC70-3~D
Q82B
SYS_LED_MASK#
WLAN LED solution for White LED
+3.3V_ALW
BATT_WHITE
BAT2_LED#
31
Battery LED
2
4.7K_0402_5%~D
+5V_ALW
SATA_LED
C774
0.1U_0402_16V4Z~D
1
R941
2
4.7K_0402_5%~D
1
R934
MASK_BASE_LEDS#
D62
1
Q81
PDTA114EU_SC70-3~D
2
+5V_ALW
P
42
41 MASK_SATA_LED#
41 LED_SATA_DIAG_OUT#
Q75
PDTA114EU_SC70-3~D
RB751S40T1_SOD523-2~D
5
MASK_BASE_LEDS#
R940
47K_0402_5%~D
5
NC
2
3
1
6
6
Q82A
Q83A
+3.3V_ALW
Q74A
1
6 2
D59
4
14 SATA_ACT#
+5V_ALW
1
R932
10K_0402_5%~D
Q74B
R938
100K_0402_5%~D
1
2
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
3
Q78A
1
6
2
+3.3V_ALW
1
R939
2
4.7K_0402_5%~D
WLAN_LED
3
1
BAT1_LED
U55
31
Q92B
4
3
2
R950
100K_0402_5%~D
2
150_0402_5%~D
+3.3V_ALW
Q89B
R949
4.7K_0402_5%~D
2
BATT_WHITE_LED
24
Q93
PDTA114EU_SC70-3~D
R951
150_0402_5%~D
1
2
1
R946
R948
100K_0402_5%~D
NC
P
2
BAT1_LED#
42
+3.3V_ALW
C775
0.1U_0402_16V4Z~D
3
Q78B
Q88
PDTA114EU_SC70-3~D
1
5
R947
47K_0402_5%~D
Q79
PDTA114EU_SC70-3~D
MASK_BASE_LEDS#
Q89A
MASK_BASE_LEDS#
43 BT_ACTIVE
R945
100K_0402_5%~D
Q92A
2
1
6
2
R937
100K_0402_5%~D
36,41 WIRELESS_LED#
+5V_ALW
SYS_LED_MASK#
BATT_YELLOW_LED
24
+5V_ALW
+5V_ALW
BREATH_LED#_R
6
U57
3
5
SYS_LED_MASK#
1
R955
+5V_ALW
R956
100K_0402_5%~D
2
4.7K_0402_5%~D
BREATH_WHITE_LED
24
Q101B
4
3 2
Q96
PDTA114EU_SC70-3~D
1
5
P
A
G
NC
2
40,42 BREATH_LED#
Q94
PDTA114EU_SC70-3~D
+5V_ALW
R954
47K_0402_5%~D
B
Q95B
4
3 2
6
2
C777
0.1U_0402_16V4Z~D
1
2
Q101A
+3.3V_ALW
Q95A
R953
100K_0402_5%~D
MASK_BASE_LEDS#
LED1
1
R957
BREATH_WHITE_LED_SNIFF
2
1K_0402_5%~D
1
LTW-C193TS5_WHITE~D
Place LED1 close to SW1
+3.3V_ALW
41 SYS_LED_MASK#
@ FD1
1
LID_CL#
31,41
LID_CL#
FIDUCIAL MARK~D
A
@ FD2
1
FIDUCIAL MARK~D
LID_CL#
Mask All LEDs (Sniffer Function)

Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
0
1
1
CLIP1
EMI_CLIP
U58
O
SYS_LED_MASK#
SYS_LED_MASK#
GND
MASK_BASE_LEDS#
LED Circuit Control Table
Fiducial Mark
EMI CLIP
C778
0.1U_0402_16V4Z~D
1
2
TC7SH08FU_SSOP5~D
X
0
1
GND
@ FD3
1
FIDUCIAL MARK~D
@ FD4
1
CLIP2
EMI_CLIP
@ H1
H_3P2
@ H2
H_3P2
@ H3
H_3P0
@ H4
H_3P2
@ H5
H_3P0
@ H6
H_3P0
@ H7
H_3P0
@ H8
H_3P2
@ H9
H_3P0
@ H10
H_3P2
@ H11
H_3P7
@ H12
H_3P0
@ H13
H_3P0
@ H14
H_3P0
@ H15
H_3P0
@ H16
H_3P0
@ H17
H_2P2
@ H19
H_3P0x2P0
@ H20
H_2P0N
FIDUCIAL MARK~D

Title
PAD and Standoff

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
45
of
75
UV1A
PEG_CRX_GTX_P1
PEG_CRX_GTX_N1
CV4
CV3
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_P2
PEG_CRX_GTX_N2
CV5
CV6
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
CV7
CV8
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_P4
PEG_CRX_GTX_N4
CV9
CV10
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_P5
PEG_CRX_GTX_N5
CV11
CV12
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_P6
PEG_CRX_GTX_N6
CV14
CV15
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_P7
PEG_CRX_GTX_N7
CV16
CV17
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_P8
PEG_CRX_GTX_N8
CV18
CV19
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_P9
PEG_CRX_GTX_N9
CV20
CV21
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_P10
PEG_CRX_GTX_N10
CV22
CV23
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_P11
PEG_CRX_GTX_N11
CV24
CV25
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_P12
PEG_CRX_GTX_N12
CV26
CV27
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_P13
PEG_CRX_GTX_N13
CV28
CV29
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_P14
PEG_CRX_GTX_N14
CV30
CV31
2
2
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_P15
PEG_CRX_GTX_N15
CV32
CV33
2
2
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N15
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N15
AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
15 CLK_PCIE_VGA
15 CLK_PCIE_VGA#
Differential signal
B
PEX_TSTCLK_OUT
2
200_0402_1%~D PEX_TSTCLK_OUT#
1
@ RV13
2
RV15
DGPU_PEX_RST
1
@ RV18
1
+3.3V_RUN_GFX
RV21
1
2.49K_0402_1%~D
DGPU_PEX_RST_R
2
0_0402_5%~D
CLK_REQ#
2
10K_0402_5%~D
don't connect to PCH
AB10
AC10
AF10
AE10
AG10
AD9
AE9
THERMTRIP_VGA#
GPU_GPIO9
GPU_CLKDWN_R
DACA_RED
DACA_BLUE
DACA_GREEN
AE2
AD3
AE3
GPU_CRT_RED
GPU_CRT_BLU
GPU_CRT_GRN
DACA_VREF
DACA_RSET
AF1
AE1
DACA_VREF
DACA_RSET
T5
R4
T4
DACB_VREF
DACB_RSET
R6
V6
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
GPIO20
GPIO21
I2CS_SCL
I2CS_SDA
PEX_REFCLK
PEX_REFCLK_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
XTAL_SSIN
PEX_TERMP
XTAL_OUTBUFF
PEX_RST_N
PEX_CLKREQ_N
XTAL_OUT
+3.3V_RUN_GFX
1
RV29
2.2K_0402_5%~D
17 PLTRST_GPU#
5
1
DGPU_DI_INT# 41
CV13 1
2 0.1U_0402_10V7K~D
2
124_0402_1%~D
ENVDD_GPU
RV22
2
100K_0402_5%~D
Close to GPU
C
AF3
AG4
AE4
AF4
AG3
GPU_JTAG_TCK
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TMS
GPU_JTAG_TRST#
1
RV3
GPU_CRT_GRN
1
RV4
GPU_CRT_BLU
1
RV5
@ TV1
@ TV2
@ TV3
@ TV4
1
RV9
R1
T3
R2
R3
A2
B1
2
150_0402_1%~D
2
150_0402_1%~D
2
150_0402_1%~D
1K_0402_1%~D
GPU_TESTMODE
AD25
GPU_CRT_CLK_DDC_R
1
GPU_CRT_DAT_DDC_R RV10 1
RV11
I2CB_SCL
I2CB_SDA
LDDC_CLK_GPU
LDDC_DATA_GPU
A3
A4
I2CH_SCL
I2CH_SDA
T1
T2
GPU_SMBCLK
GPU_SMBDAT
2
2 33_0402_5%~D
33_0402_5%~D
GPU_CRT_CLK_DDC 25
GPU_CRT_DAT_DDC 25
+3.3V_RUN_GFX
LDDC_CLK_GPU 23
LDDC_DATA_GPU 23
@ RV7
10K_0402_5%~D
FERMI Changed
GPU_TESTMODE
GPU_SMBCLK 42
GPU_SMBDAT 42
XTAL_IN
D11
XTALSSIN
E9
XTALOUTBUFF
D10
RV16
1
@RV19
@
RV19
E10
RV8
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
NV_CLK_27M_OUT
2
0_0402_5%~D
RV12
CLK_27M_IN
YV1 27MHZ_10PF_X3S027000BA1H-U~D
NV_CLK_27M_OUT
1
3
2 G1
G2 4
+3.3V_RUN_GFX
1
1
@ RV23
1
@ RV24
1
RV100
1
RV101
2
RV27
2
RV28
1
RV102
1
RV103
1
RV104
DGPU_PEX_RST
74AHC1G09GW_TSSOP5~D
UV14
N12P-NS-S-A1_BGA533~D
CV34
22P_0402_50V8J~D
1
2
18 DGPU_HOLD_RST#
DPE_GPU_HPD 26
GPU_DEEP_CLKDWN 41
GPU_CRT_RED
+3.3V_RUN
@ RV33
100K_0402_5%~D
RB751V-40GTE-17_SOD323-2~D
GPU_CLKDWN 41
RV1
CLK_27M_IN
+3.3V_RUN
2
0_0402_5%~D
GPU_CRT_RED 25
GPU_CRT_BLU 25
GPU_CRT_GRN 25
RV6
DACB_RED
DACB_BLUE
DACB_GREEN
DV4
DPE_GPU_HPD
GPU_DEEP_CLKDWN_R1
2
@ RV25
0_0402_5%~D
DGPU_DI_INT#_R
1
2
@ RV26
0_0402_5%~D
DPD_GPU_HPD
DPD_GPU_HPD 40
GPU_CRT_HSYNC
GPU_CRT_HSYNC 25
GPU_CRT_VSYNC
GPU_CRT_VSYNC 25
AD2
AD1
U6
U4
RB751V-40GTE-17_SOD323-2~D
THERMTRIP_VGA# 22
1
@ RV20
DP_HDMI_HPD 41
DV3
DPD_GPU_HPD 2
DPE_GPU_HPD 2
DACA_HSYNC
DACA_VSYNC
DACB_HSYNC
DACB_VSYNC
RB751V-40GTE-17_SOD323-2~D
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N0
DPC_GPU_HPD 40
BIA_PWM_GPU 24
ENVDD_GPU 24
PANEL_BKEN_DGPU 24
GPU_VID_0
63
GPU_VID_1
63
1 0.22U_0402_16V7K~D
1 0.22U_0402_16V7K~D
DPC_GPU_HPD 2
DPC_GPU_HPD
BIA_PWM_GPU
ENVDD_GPU
PANEL_BKEN_DGPU
GPU_VID_0
GPU_VID_1
2
2
N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2
CV1
CV2
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
CV35
22P_0402_50V8J~D
PEG_CRX_GTX_P0
PEG_CRX_GTX_N0
GPIO
DACA
PEG_CRX_GTX_N[0..15]
DV2
DACB
PEG_CRX_GTX_P[0..15]
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PCI EXPRESS
6 PEG_CRX_GTX_N[0..15]
AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27
TEST
6 PEG_CRX_GTX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_P0
PEG_CTX_GRX_N0
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_P2
PEG_CTX_GRX_N2
PEG_CTX_GRX_P3
PEG_CTX_GRX_N3
PEG_CTX_GRX_P4
PEG_CTX_GRX_N4
PEG_CTX_GRX_P5
PEG_CTX_GRX_N5
PEG_CTX_GRX_P6
PEG_CTX_GRX_N6
PEG_CTX_GRX_P7
PEG_CTX_GRX_N7
PEG_CTX_GRX_P8
PEG_CTX_GRX_N8
PEG_CTX_GRX_P9
PEG_CTX_GRX_N9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N10
PEG_CTX_GRX_P11
PEG_CTX_GRX_N11
PEG_CTX_GRX_P12
PEG_CTX_GRX_N12
PEG_CTX_GRX_P13
PEG_CTX_GRX_N13
PEG_CTX_GRX_P14
PEG_CTX_GRX_N14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N15
I2C
6 PEG_CTX_GRX_N[0..15]
Part 1 of 5
PEG_CTX_GRX_P[0..15]
CLK
6 PEG_CTX_GRX_P[0..15]
@
@
GPU_CRT_CLK_DDC
2
4.7K_0402_5%~D
GPU_CRT_DAT_DDC
2
4.7K_0402_5%~D
I2CH_SCL
2
10K_0402_5%~D
I2CH_SDA
2
10K_0402_5%~D
I2CB_SCL
1
2.2K_0402_5%~D
I2CB_SDA
1
2.2K_0402_5%~D
GPU_GPIO9
2
10K_0402_5%~D
THERMTRIP_VGA#
2
10K_0402_5%~D
GPU_CLKDWN_R
2
10K_0402_5%~D
FERMI Changed
2
@ DV1
RB751V-40GTE-17_SOD323-2~D
100K_0402_5%~D
2

Title
N12P PCIE,I2C,DAC,GPIO
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
46
of
75
UV1C
Part 3 of 5
TO DOCKING
TO DOCKING
27
27
40
40
40
40
40
40
40
40
DPC_GPU_AUX/DDC
DPC_GPU_AUX#/DDC
DPC_GPU_LANE_P0
DPC_GPU_LANE_N0
DPC_GPU_LANE_P1
DPC_GPU_LANE_N1
DPC_GPU_LANE_P2
DPC_GPU_LANE_N2
DPC_GPU_LANE_P3
DPC_GPU_LANE_N3
27
27
40
40
40
40
40
40
40
40
DPD_GPU_AUX/DDC
DPD_GPU_AUX#/DDC
DPD_GPU_LANE_P0
DPD_GPU_LANE_N0
DPD_GPU_LANE_P1
DPD_GPU_LANE_N1
DPD_GPU_LANE_P2
DPD_GPU_LANE_N2
DPD_GPU_LANE_P3
DPD_GPU_LANE_N3
26 TMDS_E_GPU_DDC
26 TMDS_E_GPU_DDC#
26 TMDSE_GPU_P2
26 TMDSE_GPU_N2
26 TMDSE_GPU_P1
26 TMDSE_GPU_N1
26 TMDSE_GPU_P0
26 TMDSE_GPU_N0
26 TMDSE_GPU_CLK
26 TMDSE_GPU_CLK#
TO MB HDMI
DPC_GPU_AUX/DDC
DPC_GPU_AUX#/DDC
DPD_GPU_AUX/DDC
DPD_GPU_AUX#/DDC
TMDS_E_GPU_DDC
TMDS_E_GPU_DDC#
G4
G5
P4
N4
M5
M4
L4
K4
H4
J4
D3
D4
F5
F4
E4
D5
C3
C4
B3
B4
F7
G6
D6
C6
A6
A7
B6
B7
E6
E7
NC
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
PGOOD
1
RV61
MULTI_STRAP_REF2_GND
DBG_DATA1
DBG_DATA2
DBG_DATA3
DBG_DATA4
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
STRAP0
STRAP1
STRAP2
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
MULTI_STRAP_REF2_GND 1
RV62
T6
W6
Y6
AA6
N3
C7
STRAP0
B9
STRAP1
A9
STRAP2
BUFRST_N
N5
THERMDN
D8
THERMDP
D9
STRAP4
N2
STRAP4
STRAP3
F9
STRAP3
VGA_THERMDN 22
1
@ CV37
100P_0402_50V8J~D
VGA_THERMDP 22
Fermi changed
ROM_CS_N
B10
ROM_SCLK
C9
ROM_SCLK_GPU
ROM_SI
A10
ROM_SI_GPU
ROM_SO
C10
ROM_SO_GPU
IFPAB_RSET
AB6
@ RV32
IFPC_RSET
R5
IFPD_RSET
M6
IFPE_RSET
F8
A15
B16
W16
GND_SENSE MULTI_STRAP_REF0_GND
F11
E14
GND_SENSE MULTI_STRAP_REF1_GND
F10
1
RV42
1
RV43
1
RV44
1
RV46
2
40.2_0402_1%~D
2
60.4_0402_1%~D
2
40.2K_0402_1%~D
2
40.2K_0402_1%~D
1K_0402_1%~D
1
RV47
RV48
U2
U5
U11
U12
U13
U14
U15
U16
U17
U23
U26
V9
V19
W11
W14
W17
Y2
Y5
Y23
Y26
AC2
AC5
AC6
AC8
AC11
AC14
AC17
AC20
AC23
AC26
AF2
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
T16
T15
T14
F6
FB_CAL_PU_GND
1K_0402_1%~D
1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
FB_CAL_TERM_GND
1K_0402_1%~D
RV45
Part 5 of 5
2
1K_0402_1%~D
63 GPU_GND_SENSE
@ RV98
10K_0402_1%~D
1
2
RV97
34.8K_0402_1%~D
1
2
RV99
20K_0402_1%~D
1
2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
@ RV41
4.99K_0402_1%~D
1
2
RV54
10K_0402_1%~D
1
2
@ RV60
10K_0402_1%~D
1
2
@ RV53
4.99K_0402_1%~D
1
2
X76@ RV59
15K_0402_1%~D
1
2
RV52
4.99K_0402_1%~D
1
2
@ RV58
15K_0402_1%~D
1
2
@ RV51
45.3K_0402_1%~D
1
2
set to multi-level straps
+3.3V_RUN_GFX
Hynix 128Mx16 DDR3 part stuff RV59=35K

Samsung 128Mx16 DDR3 part stuff RV59=45.3K
USER[3:0]
STRAP1
3GIO_PADCFG_LUT_ADR[3:0]
STRAP2
PCI_DEVID[3:0]
5
DPC_GPU_AUX/DDC
2
100K_0402_5%~D
DPC_GPU_AUX#/DDC
2
100K_0402_5%~D
1
RV35
1
RV36
DPD_GPU_AUX/DDC
2
100K_0402_5%~D
DPD_GPU_AUX#/DDC
2
100K_0402_5%~D
TMDS_E_GPU_DDC
TMDS_E_GPU_DDC#
RV40
2.2K_0402_5%~D
Hynix 64Mx16 DDR3 part stuff RV59=15K

Samsung 64Mx16 DDR3 part stuff RV59=20K
STRAP0
1
RV38
1
RV37
RV39
2.2K_0402_5%~D
1
2
Resistor Values
**
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Decive ID change to 0x1056
RV57
34.8K_0402_1%~D
1
2
@ RV50
34.8K_0402_1%~D
1
2
RV56
34.8K_0402_1%~D
1
2
RV49
45.3K_0402_1%~D
1
2
@ RV55
4.99K_0402_1%~D
1
2
B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E17
E20
E23
E26
H2
H5
J11
J14
J17
K9
K19
L2
L5
L11
L12
L13
L14
L15
L16
L17
M12
M13
M14
M15
M16
P2
P5
P9
P19
P23
P26
T12
T13
2
40.2K_0402_1%~D
+3.3V_RUN_GFX
UV1E
2
10K_0402_5%~D
GB1B-64 : MULTI_STRAP_REF2_GND
DBG
AB3
AB2
W1
V1
W3
W2
AA2
AA3
AB1
AA1
GB1B-64 : PGOOD
C15
D15
J5
GND
LCD_BCLK+_GPU
LCD_BCLK-_GPU
LCD_B0+_GPU
LCD_B0-_GPU
LCD_B1+_GPU
LCD_B1-_GPU
LCD_B2+_GPU
LCD_B2-_GPU
NC
NC
PGOOD
STRAP
23
23
23
23
23
23
23
23
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
GENERAL
AC4
AD4
V5
V4
AA5
AA4
W4
Y4
AB4
AB5
SERIAL
LCD_ACLK+_GPU
LCD_ACLK-_GPU
LCD_A0+_GPU
LCD_A0-_GPU
LCD_A1+_GPU
LCD_A1-_GPU
LCD_A2+_GPU
LCD_A2-_GPU
LVDS / TMDS
23
23
23
23
23
23
23
23
Pull-up to +3V
Pull-down to Gnd
5K
1000
0000
10K
1001
0001
15K
1010
0010
20K
1011
0011
25K
1100
0100
30K
1101
0101
35K
1110
0110
45K
1111
0111
ROM_SCLK
ROM_SI
ROM_SO
PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_EN

RAM_CFG[3:0]
XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE
A

Title
N12P DP, STRAP, GND

Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
47
of
75
UV1D
Part 4 of 5
120mA
PLACE NEAR GPU
20 mil
+FB_AVDD
100mA
1
1
RV63
2
10K_0402_5%~D
+1.5V_MEM_VDDQ
LV2
2
1
+1.05V_RUN_VTT_GFX
BLM18PG300SN1D_2P~D
30R 100MHZ
add for GB1b-64

2
RV65
1
40.2_0402_1%~D
+1.5V_MEM_GFX
GPU_VDD_SENSE 63
route as 50ohm
120mAadd
add for GB1b-64
CV114
4.7U_0603_6.3V6K~D
CV113
4.7U_0805_10V7K~D
+3.3V_RUN_GFX
300ohm 100MHz ESR0.25ohm
LV7
MMZ1608D301BT_0603
1
2
CV112
0.1U_0402_10V7K~D
CV108
0.1U_0402_10V7K~D
CV110
0.1U_0402_10V7K~D
add for GB1b-64

CV109
0.1U_0402_10V7K~D
CV107
1U_0402_6.3V6K~D
CV106
0.1U_0402_10V7K~D
2
CV105
0.1U_0402_10V7K~D
add for GB1b-64
CV104
0.1U_0402_10V7K~D
120mA
220mA
LV4
BLM18AG121SN1D_0603~D
2
1
CV91
4.7U_0603_6.3V6K~D
+1.05V_RUN_VTT_GFX
CV93
4.7U_0805_10V7K~D
CV92
1U_0603_10V7K~D
CV90
0.1U_0402_10V7K~D
@ CV181
10U_0805_6.3V7K
CV180
22U_0603_6.3V6M~D
CV179
0.1U_0402_10V7K~D
+PEX_PLLVDD
+DACA_VDD
for GB1b-64
+PLLVDD
CV88
0.1U_0402_10V7K~D
150mA , 10mil
CV87
0.1U_0402_10V7K~D
CV89
0.1U_0402_10V7K~D
LV3
BLM18PG221SN1D_2P~D
1
+IFPE_PLLVDD
CV103
1U_0603_10V7K~D
CV102
4.7U_0805_10V7K~D
CV101
4.7U_0603_6.3V6K~D
45mA
add for GB1b-64
1
1
CV99
0.1U_0402_10V7K~D
CV98
0.1U_0402_10V7K~D
+IFPCD_PLLVDD
CV97
0.1U_0402_10V7K~D
CV167
0.1U_0402_10V7K~D
CV168
1U_0603_10V7K~D
CV171
4.7U_0805_10V7K~D
CV83
10U_0805_4VAM~D
E15
CV79
10U_0805_4VAM~D
CV67
22U_0805_6.3VAM~D
CV82
1U_0603_10V7K~D
VDD_SENSE
+1.05V_RUN_VTT_GFX
PLACE NEAR GPU

1
CV78
22U_0805_6.3VAM~D
IFPE_PLLVDD
+1.5V_MEM_GFX
N10M SPEC FBVDDQ TYP. 1.8V.
CV66
10U_0805_4VAM~D
VDD_SENSE
D7
CV57
10U_0805_6.3V6M~D
IFPD_PLLVDD
W15
CV165
0.1U_0402_10V7K~D
FB_CAL_PD_VDDQ
CV39
10U_0805_6.3V6M~D
CV77
4.7U_0603_6.3V6K~D
CV73
1U_0402_6.3V6K~D
IFPC_PLLVDD
+1.5V_MEM_GFX
+PLLVDD
+DACA_VDD
N6
CV65
4.7U_0603_6.3V6K~D
CV64
1U_0402_6.3V6K~D
100mA
B15
@ CV56
4.7U_0603_6.3V6K~D
CV55
1U_0402_6.3V6K~D
CV72
1U_0402_6.3V6K~D
T19
W5
DACB_VDD
CV48
4.7U_0603_6.3V6K~D
CV47
1U_0402_6.3V6K~D
PLACE CLOSE TO BALL
AG2
IFPAB_PLLVDD
220mA
LV5
MMZ1608D301BT_0603
1
2
add for GB1b-64
DACA_VDD
CV84
1U_0402_6.3V6K~D
LV6
MMZ1608D301BT_0603
1
2
285mA
IFPE_IOVDD
CV96
1U_0603_10V7K~D
+IFPAB_PLLVDD
FB_DLLAVDD
IFPCD_IOVDD
+3.3V_RUN_GFX
CV95
4.7U_0805_10V7K~D
AC19
CV94
4.7U_0603_6.3V6K~D
CV123
0.1U_0402_10V7K~D
FB_PLLAVDD
IFPB_IOVDD
+1.05V_RUN_VTT_GFX
CV122
0.1U_0402_10V7K~D
R19
CV63
1U_0402_6.3V6K~D
+IFPE_PLLVDD
PLLVDD
FB_PLLAVDD
CV54
0.047U_0402_10V7K~D
P6
45mA
60mA
K5
IFPA_IOVDD
CV46
0.01U_0402_25V7K~D
AD5
+IFPCD_PLLVDD
L6
CV71
0.1U_0402_10V7K~D
+IFPAB_PLLVDD
J6
K6
SP_PLLVDD
CV62
0.1U_0402_10V7K~D
H6
AF9 +PEX_PLLVDD
VID_PLLVDD
+1.05V_RUN_VTT_GFX
AG7
AF7
AE7
AD8
AD7
AC9
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
CV53
0.047U_0402_10V7K~D
+IFPCDE_IOVDD
CV45
0.01U_0402_25V7K~D
V2
AG6
AF6
AE6
AD6
AC13
AC7
AB17
AB16
AB13
AB9
AB8
AB7
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLLVDD
PEX_SVDD_3V3
CV70
0.1U_0402_10V7K~D
+IFPAB_IOVDD
2A
CV61
0.1U_0402_10V7K~D
+IFPCDE_IOVDD
CV121
0.1U_0402_10V7K~D
CV169
1U_0402_6.3V6K~D
AG9
V3
+3.3V_RUN_GFX
LV10
BLM18AG121SN1D_0603~D
2
1
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
2A
2.97A
CV52
0.047U_0402_10V7K~D
285mA
+1.05V_RUN_VTT_GFX
A
A12
B12
C12
D12
E12
F12
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
CV38
0.01U_0402_25V7K~D
CV69
0.1U_0402_10V7K~D
CV170
0.1U_0402_10V7K~D
CV120
1U_0402_6.3V6K~D
CV119
4.7U_0603_6.3V6K~D
CV118
1U_0402_6.3V6K~D
120mA
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C1747 to be close to the GPU
CV174
0.1U_0402_10V7K~D
+1.05V_RUN_VTT_GFX 220R 100MHZ

LV9 BLM18PG221SN1D_2P~D
2
1
120mA
J9
J10
J12
J13
L9
M9
M11
M17
N9
N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17
R9
R11
R12
R13
R14
R15
R16
R17
T9
T11
T17
U9
U19
W9
W10
W12
W13
W18
W19
+IFPAB_IOVDD
CV166
0.1U_0402_10V7K~D
150mA
150mA
285mA
285mA
285mA
220mA
220mA
220mA
220mA
285mA
CV172
1U_0402_6.3V6K~D
CV175
4.7U_0603_6.3V6K~D
CV173
1U_0402_6.3V6K~D
CV81
0.1U_0402_16V4Z~D
220R 100MHZ
BLM18PG221SN1D_2P~D
1
+PEX_SVDD_3V3
1
+1.8V_RUN_GFX
LV11
2
CV76
0.1U_0402_10V7K~D
+1.05V_RUN_VTT_GFX
2
0_0402_5%~D
2
0_0402_5%~D
CV80
4.7U_0603_6.3V6K~D
1
@ RV30
1
@ RV31
+3.3V_RUN_GFX
CV68
0.1U_0402_10V7K~D
CV75
1U_0402_6.3V6K~D
+3.3V_RUN_VDD33
CV74
4.7U_0603_6.3V6K~D
220R 100MHZ
LV1
BLM18PG221SN1D_2P~D
1
2
CV60
0.1U_0402_10V7K~D
+3.3V_RUN_GFX
CV43
0.022U_0402_16V7K~D
CV59
0.1U_0402_10V7K~D
CV58
0.1U_0402_10V7K~D
under GPU
@CV44
@
CV44
4.7U_0603_6.3V6K~D
CV42
0.022U_0402_16V7K~D
CV51
0.022U_0402_16V7K~D
@CV159
@
CV159
4.7U_0603_6.3V6K~D
CV41
0.022U_0402_16V7K~D
CV50
0.022U_0402_16V7K~D
CV40
0.1U_0402_10V7K~D
CV160
1U_0603_10V7K~D
CV161
1U_0603_10V7K~D
CV49
0.1U_0402_10V7K~D
NV DG for VDD Cap:

0.022uF 10% X7R x5
0.1uF 10% X7R x5
1uF 10% X7R x3
22uF 10% X5R x2
CV162
1U_0603_10V7K~D
CV163
22U_0805_6.3VAM~D
CV164
22U_0805_6.3VAM~D
+GPU_CORE
POWER
add for GB1b-64

1
Close to Pin

Title
N12P Power
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
48
of
75
FBAD[0..63]
FBAD[0..63] 50,51
FBA_CMD[0..30] 50,51
+1.8V_RUN_GFX Source
+1.8V_RUN
+1.8V_RUN_GFX
QV7
PMV45EN_SOT23-3~D
A7
CMD6
A3
BA1
CMD7
A0
A12
CMD8
A8
A8
CAS#
CMD16
CKE_H
CMD17
CS1#_H
CMD18
CS0#_H
CMD19
ODT_H
RST
RST
CMD21
A7
A6
CMD22
A4
A5
CMD23
A11
A9
CMD24
A2
A1
CMD25
A10
WE#
CMD26
A5
A4
CMD27
BA2
A15
CLKA0
CLKA0#
50
50
CMD28
WE#
A10
N24
N23
CLKA1
CLKA1#
51
51
CMD29
BA0
BA0
CMD30
A15
BA2
S
2
G
1
2
G
3
2
3
+15V_ALW
GFX_MEM_VTT_ON# 5
41 GFX_MEM_VTT_ON
2
+1.5V_MEM_GFX
10K_0402_5%~D
+1.5V_MEM
8
7
6
5
QV1
1
2
3
+1.05V_RUN_VTT_GFX Source
1
QV3
+1.05V_RUN_VTT_GFX
1
2
3
1
1
3
CV127
2200P_0402_50V7K~D
QV4
2
G
RV74
20K_0402_5%~D
8
7
6
5
CV126
10U_0805_6.3V6M~D
@CV128
@
CV128
0.01U_0402_25V7K~D
@ RV78
+1.05V_M
1.05V_RUN_VTT_GFX#_EN
+1.5V_MEM_GFX
GFX_MEM_VTT_EN
16mil
1
1
2
+1.5V_MEM_GFX Source
+3.3V_ALW2
+FB_VREF
1
CAS#
A13
CMD15
A3
A14
BA1
CMD14
QV6B
QV6A
2
CMD13
3.3V_RUN_GFX_EN
3.3V_RUN_GFX_ON# 5
A14
RAS#
A13
6
5
2
1
RV91
100K_0402_5%~D
RAS#
CMD12
QV5
+3.3V_RUN_GFX
CMD11
+3.3V_ALW
A2
A0
A1
A12
CMD10
RV92
100K_0402_5%~D
CMD9
+15V_ALW
+3.3V_ALW2
2
1
2
1
A11
A6
RV73
100K_0402_5%~D
+FB_VREF
1
RV76
A9
CMD5
CMD20
F24
F23
M22
CMD4
+3.3V_RUN_GFX Source
+15V_ALW
@ RV77
1.1K_0402_1%~D 1.1K_0402_1%~D
A16
CKE_L
+1.5V_MEM_GFX
DQSA_WP0
DQSA_WP1
DQSA_WP2
DQSA_WP3
DQSA_WP4
DQSA_WP5
DQSA_WP6
DQSA_WP7
CS0#_L
CMD3
RV70
20K_0402_5%~D
FBA_DEBUG
C25
A19
E19
A24
T22
AA24
AA26
T27
CMD2
CV124
10U_0805_6.3V6M~D
FBA_CLK1
FBA_CLK1_N
DQSA_RN0
DQSA_RN1
DQSA_RN2
DQSA_RN3
DQSA_RN4
DQSA_RN5
DQSA_RN6
DQSA_RN7
CS1#_L
CV125
2200P_0402_50V7K~D
FB_VREF
FBA_CLK0
FBA_CLK0_N
D25
A18
E18
B24
R22
Y24
AA27
R27
ODT_L
CMD1
QV2A
RV75
10K_0402_5%~D
RST
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
CMD0
QV2B
FBA_CMD20
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
C26
B19
D19
D23
T24
AA23
AB27
T26
32..63
RV67
100K_0402_5%~D
CKE_2
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
0..31
2 1.05V_RUN_VTT_GFX#_EN_R
0_0402_5%~D
RV69
100K_0402_5%~D
RV72
10K_0402_5%~D
FBA_CMD16
MEMORY INTERFACE
1
2
1
2
1
2
RV71
10K_0402_5%~D
ODT_1
Address
PAD~D TV5@
1.05V_RUN_VTT_GFX#_EN 1
RV95
DATA Bus
PAD~D TV6@
RV90
20K_0402_5%~D
FBA_CMD0
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
CV185
10U_0805_6.3V6M~D
G24
F27
F25
F26
G26
G27
G25
J25
J24
H24
H22
J26
G22
G23
J22
J27
M24
L24
J23
K23
K22
M23
K24
M27
N27
M26
K26
K27
K25
M25
L22
CV186
3300P_0402_50V7K~D
RV68
10K_0402_5%~D
ODT_2
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
RV96
20K_0402_5%~D
RV66
10K_0402_5%~D
FBA_CMD19
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
CV187
10U_0805_6.3V6M~D
FBA_CMD3
CKE_1
D22
E24
E22
D24
D26
D27
C27
B27
A21
B21
C21
C19
C18
D18
B18
C16
E21
F21
D20
F20
D17
F18
D16
E16
A22
C24
D21
B22
C22
A25
B25
A26
U24
V24
V23
R24
T23
R23
P24
P22
AC24
AB23
AB24
W24
AA22
W23
W22
V22
AA25
W27
W26
W25
AB25
AB26
AD26
AD27
V25
R25
V26
V27
R26
T25
N25
N26
Mode E - Mirror Mode Mapping
Part 2 of 5
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
1
UV1B
50,51
DQSA_WP[0..7] 50,51
DQSA_RN[0..7]
DQSA_WP[0..7]
DQMA#[0..7] 50,51
DQSA_RN[0..7]
DQMA#[0..7]
FBA_CMD[0..30]

Title
N12P Memory
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
49
of
75
Memory Partition A - Lower 32 bits

change to Hynix
FBA_CMD[0..30]
FBA_CMD[0..30] 49,51
FBAD[0..63]
FBAD[0..63] 49,51
DQMA#[0..7]
DQMA#[0..7] 49,51
DQSA_RN[0..7]
DQSA_RN[0..7]
DQSA_WP[0..7]
UV4
16mil
+FBA_VREF0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15
FBAD1
FBAD6
FBAD3
FBAD4
FBAD0
FBAD5
FBAD2
FBAD7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD17
FBAD21
FBAD19
FBAD20
FBAD18
FBAD22
FBAD16
FBAD23
16mil
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD30
Group0
Group2
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
FBA_CMD29
FBA_CMD13
FBA_CMD27
M2
N8
M3
BA0
BA1
BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
FBAD30
FBAD24
FBAD31
FBAD28
FBAD29
FBAD26
FBAD25
FBAD27
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD14
FBAD10
FBAD15
FBAD11
FBAD12
FBAD8
FBAD13
FBAD9
49
49
RV81
160_0402_1%~D
CLKA0
CLKA0#
CLKA0#
FBA_CMD3
J7
K7
K9
CK
CK#
CKE
FBA_CMD0
FBA_CMD11
FBA_CMD2
FBA_CMD15
FBA_CMD28
K1
J3
L2
K3
L3
ODT
RAS#
CS#
CAS#
WE#
DQSA_WP0
DQSA_WP2
F3
C7
DQMA#0
DQMA#2
E7
D3
DQSA_RN0
DQSA_RN2
G3
B7
+FBA_VREF0
DML
DMU
RESET
L8
ZQ
M8
H1
J1
J9
L1
L9
T7
B2
D9
G7
K2
K8
N1
N9
R1
R9
FBA_CMD29
FBA_CMD13
FBA_CMD27
CLKA0
CLKA0#
FBA_CMD3
J7
K7
K9
CK
CK#
CKE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBA_CMD0
FBA_CMD11
FBA_CMD2
FBA_CMD15
FBA_CMD28
K1
J3
L2
K3
L3
ODT
RAS#
CS#
CAS#
WE#
DQSA_WP3
DQSA_WP1
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#3
DQMA#1
E7
D3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
T2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VREFCA
VREFDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC
NC
NC
NC
NC
DQSA_RN3
DQSA_RN1
G3
B7
FBA_CMD20
B1
B9
D1
D8
E2
E8
F9
G1
G9
+FBA_VREF0
BA0
BA1
BA2
DQSL
DQSU
DML
DMU
RESET
L8
ZQ
J1
J9
L1
L9
T7
96-BALL
SDRAM DDR3
H5TQ2G63BFR-12C_FBGA96~D
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
T2
M8
H1
RV83
243_0402_1%~D
RV82
243_0402_1%~D
FBA_CMD20
DQSL
DQSU
Group3
DATA Bus
Group1
+1.5V_MEM_GFX
M2
N8
M3
VREFCA
VREFDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC
NC
NC
NC
NC
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
96-BALL
SDRAM DDR3
+1.5V_MEM_GFX
0..31
CMD0
ODT_L
CMD1
CS1#_L
CMD2
CS0#_L
CMD3
CKE_L
CMD4
A9
A11
CMD5
A6
A7
CMD6
A3
BA1
CMD7
A0
A12
CMD8
A8
A8
CMD9
A12
A0
CMD10
A1
A2
CMD11
RAS#
RAS#
CMD12
A13
A14
CMD13
BA1
A3
CMD14
A14
A13
CMD15
CAS#
CAS#
32..63
CMD16
CKE_H
CMD17
CS1#_H
CMD18
CS0#_H
ODT_H
CMD20
RST
RST
CMD21
A7
A6
CMD22
A4
A5
CMD23
A11
A9
CMD24
A2
A1
CMD25
A10
WE#
CMD26
A5
A4
CMD27
BA2
A15
CMD28
WE#
A10
CMD29
BA0
BA0
CMD30
A15
BA2
CV143
0.1U_0402_10V7K~D
CV142
0.1U_0402_10V7K~D
CV141
0.1U_0402_10V7K~D
CV140
0.1U_0402_10V7K~D
CV139
0.1U_0402_10V7K~D
CV138
1U_0402_6.3V6K~D
CV137
1U_0402_6.3V6K~D
CV188
1U_0402_6.3V6K~D
CV178
1U_0402_6.3V6K~D
CV136
0.1U_0402_10V7K~D
CV135
0.1U_0402_10V7K~D
CV134
0.1U_0402_10V7K~D
CV133
0.1U_0402_10V7K~D
CV132
0.1U_0402_10V7K~D
CV131
1U_0402_6.3V6K~D
CV130
1U_0402_6.3V6K~D
CV177
1U_0402_6.3V6K~D
CV176
1U_0402_6.3V6K~D
Address
CMD19
+1.5V_MEM_GFX
X76@
+1.5V_MEM_GFX
CLKA0
C
E3
F7
F2
F8
H3
H8
G2
H7
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
2
1
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD30
CV129
0.01U_0402_25V7K~D
RV79
1.1K_0402_1%~D
RV80
1.1K_0402_1%~D
+1.5V_MEM_GFX
UV3
X76@
49,51
DQSA_WP[0..7] 49,51

Title
VRAM A Lower
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
50
of
75
Memory Partition A - Upper 32 bits

FBAD[0..63]
FBAD[0..63] 49,50
FBA_CMD[0..30]
FBA_CMD[0..30] 49,50
DQMA#[0..7]
DQSA_RN[0..7]
DQSA_WP[0..7]
UV5
X76@
16mil
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD27
2
1
+FBA_VREF1
CV144
0.01U_0402_25V7K~D
RV85
1.1K_0402_1%~D
RV84
1.1K_0402_1%~D
+1.5V_MEM_GFX
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
UV6
16mil
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
FBAD35
FBAD32
FBAD38
FBAD33
FBAD37
FBAD34
FBAD39
FBAD36
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD42
FBAD46
FBAD40
FBAD45
FBAD44
FBAD43
FBAD41
FBAD47
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD27
Group4
Group5
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A15
E3
F7
F2
F8
H3
H8
G2
H7
FBAD61
FBAD57
FBAD58
FBAD60
FBAD56
FBAD62
FBAD59
FBAD63
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD51
FBAD52
FBAD49
FBAD53
FBAD48
FBAD54
FBAD50
FBAD55
+1.5V_MEM_GFX
FBA_CMD29
FBA_CMD6
FBA_CMD30
M2
N8
M3
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
49
49
CLKA1
CLKA1#
J7
K7
K9
FBA_CMD16
CLKA1
FBA_CMD19
FBA_CMD11
FBA_CMD18
FBA_CMD15
FBA_CMD25
K1
J3
L2
K3
L3
DQSA_WP4
DQSA_WP5
F3
C7
DQMA#4
DQMA#5
E7
D3
DQSA_RN4
DQSA_RN5
G3
B7
ODT
RAS#
CS#
CAS#
WE#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RV86
160_0402_1%~D
CK
CK#
CKE
CLKA1#
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
T2
RESET
L8
ZQ

DATA Bus
Group6
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBA_CMD19
FBA_CMD11
FBA_CMD18
FBA_CMD15
FBA_CMD25
K1
J3
L2
K3
L3
DQSA_WP7
DQSA_WP6
F3
C7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#7
DQMA#6
E7
D3
DQSA_RN7
DQSA_RN6
G3
B7
M2
N8
M3
CLKA1
CLKA1#
FBA_CMD16
J7
K7
K9
FBA_CMD20
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK#
CKE
ODT
RAS#
CS#
CAS#
WE#
DQSL
DQSU
DML
DMU
RESET
L8
ZQ
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
T2
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
M8
H1
J1
J9
L1
L9
T7
VREFCA
VREFDQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC
NC
NC
NC
NC
1
2
+FBA_VREF1
RV88
243_0402_1%~D
RV87
243_0402_1%~D
+FBA_VREF1
M8
H1
J1
J9
L1
L9
T7
96-BALL
SDRAM DDR3
+1.5V_MEM_GFX
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC
NC
NC
NC
NC
96-BALL
SDRAM DDR3
CV158
0.1U_0402_10V7K~D
CV157
0.1U_0402_10V7K~D
CV156
0.1U_0402_10V7K~D
CV155
0.1U_0402_10V7K~D
CV154
0.1U_0402_10V7K~D
CV153
1U_0402_6.3V6K~D
CV152
1U_0402_6.3V6K~D
CV192
1U_0402_6.3V6K~D
CV191
1U_0402_6.3V6K~D
CV151
0.1U_0402_10V7K~D
CV150
0.1U_0402_10V7K~D
CV149
0.1U_0402_10V7K~D
CV148
0.1U_0402_10V7K~D
CV147
0.1U_0402_10V7K~D
CV146
1U_0402_6.3V6K~D
CV145
1U_0402_6.3V6K~D
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_MEM_GFX
CV190
1U_0402_6.3V6K~D
CV189
1U_0402_6.3V6K~D
VREFCA
VREFDQ
Address
0..31
CMD0
ODT_L
CMD1
CS1#_L
CMD2
CS0#_L
CMD3
CKE_L
CMD4
A9
A11
CMD5
A6
A7
CMD6
A3
BA1
CMD7
A0
A12
CMD8
A8
A8
CMD9
A12
A0
CMD10
A1
A2
CMD11
RAS#
RAS#
CMD12
A13
A14
CMD13
BA1
A3
CMD14
A14
A13
CMD15
CAS#
CAS#
32..63
CMD16
CKE_H
CMD17
CS1#_H
CMD18
CS0#_H
ODT_H
CMD19
FBA_CMD20
DQSL
DQSU
Group7
+1.5V_MEM_GFX
FBA_CMD29
FBA_CMD6
FBA_CMD30
49,50
DQSA_WP[0..7] 49,50
X76@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQMA#[0..7] 49,50
DQSA_RN[0..7]
CMD20
RST
RST
CMD21
A7
A6
CMD22
A4
A5
CMD23
A11
A9
CMD24
A2
A1
CMD25
A10
WE#
CMD26
A5
A4
CMD27
BA2
A15
CMD28
WE#
A10
CMD29
BA0
BA0
CMD30
A15
BA2

Title
VRAM A Upper
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
51
of
75
+3.3V_ALW
1
PL21
FBMJ4516HS720NT_2P~D
1
2
GND
GND
Z5304
Z5305
Z5306
PR502
100_0402_5%~D
1
2
PR503
100_0402_5%~D
1
2
BAY_SMBCLK
BAY_SMBDAT
45
45
7
8
SUYIN_150010GR006M500ZR
MPBATT+
PAD-OPEN 2x2m~D
JRTC1
Z4012
+3.3V_RTC_LDO
1
2
+COINCELL
1 G
2 G
3
4
D
TYCO_2-1775293-2~D
+RTC_CELL
MODULE_BATT_PRES#
44
1
1
2
3
4
5
6
2
PC302
0.1U_0603_25V7K~D
2
1
PC301
2200P_0402_50V7K~D
2
1
1
2
3
4
5
6
PR501
100_0402_5%~D
1
2
+3.3V_ALW
PJP36
MBATT+_C
MBATT1
COIN RTC Battery
PR1
1K_0402_5%~D
PR504
100K_0402_5%~D
2
1
Media Bay Battery Connector
+COINCELL
PD32
DA204U_SOT323~D
3
1
2
PD34
DA204U_SOT323~D
3
1
2
PD33
DA204U_SOT323~D
3
1
2
ESD Diodes
PD1
RB715FGT106_UMD3
+3.3V_ALW
PC1
1U_0603_10V4Z~D
2
Move to power schematic
ESD Diodes
PL1
1
2
PJP43
PR4
100_0402_5%~D
1
2
Z4304
Z4305
Z4306
PR3
100_0402_5%~D
1
2
PR5
100_0402_5%~D
1
2
PBAT_SMBCLK
PBAT_SMBDAT
1
PC2
0.1U_0603_25V7K~D
2
1
11
10
9
8
7
6
5
4
3
2
1
<43>
<43>
PBATT+
PAD-OPEN 4x4m
PBAT_PRES#
<42,63>
@ PQ1
C
FDN338P_G_NL_SOT23-3~D
PBATT1
SUYIN_200275MR009G50PZR
@ PD5
1
DOCK_SMB_ALERT#
<41,42,63>
RB751V-40GTE-17_SOD323~D
2
2
PC3
2200P_0402_50V7K~D
2
1
PBATT+_C
GND
GND
9
8
7
6
5
4
3
2
1
+3.3V_ALW
PR2
100K_0402_5%~D
2
1
PL22
1
2
PD4
DA204U_SOT323~D
3
1
2
Primary Battery Connector
PD3
DA204U_SOT323~D
3
1
2
PD2
DA204U_SOT323~D
3
1
2
GND
GND
SLICE_BAT_PRES#
@ PR6
1
2
0_0402_5%~D
<41,42,63>
PC4
1500P_0402_7K~D
+5V_ALW
GND
@ PR14
PR8
2.2K_0402_5%~D
1
2
PQ2
FDV301N_G_NL_SOT23-3~D
PU1
1
<41> DOCK_PSID
2
NB_PSID_TS5A63157
NO
IN
GND
V+
NC
COM
GPIO_PSID_SELECT
+5V_ALW
PS_ID
<42>
<43>
TS5A63157DCKR_SC70-6~D
+5V_ALW
+5V_ALW
2
G
PR10
100K_0402_1%~D
1
2
PQ3
MMST3904-7-F_SOT323~D
E
@
PD7
SM24_SOT23
PR12
15K_0402_1%~D
1
2
PR9
33_0402_5%~D
1
2
2
B
PD9
DA204U_SOT323~D
+5V_ALW
B
DCIN_CBL_DET#
GND
PD8
DA204U_SOT323~D
3
1
2
PL2
2
1
NB_PSID
@
PR13
1
PSID_DISABLE#
<42>
10K_0402_5%~D
<42>
PC5
.47U_0402_6.3V6-K~D
1
2
1
2
0_0402_5%~D
PR7
1
2
0_0402_5%~D
PR11
10K_0402_1%~D
PD6
DA204UGT106_SOT323~D
3
1
2
+3.3V_ALW
DC_IN+ Source
+DC_IN
+DC_IN
1
2
PC11
10U_1206_25V6M~D
PR16
100K_0402_5%~D
2
1
PC9
0.1U_0603_25V7K~D
2
1
SOFT_START_GC
<63>
PC8
0.1U_0603_25V7K~D
2
1
10K_0402_5%~D
PC7
0.1U_0603_25V7K~D
2
1
1M_0402_5%~D
PR15
2
PR18
1
PR19
1M_0402_5%~D
2
1
PC6
0.022U_0805_50V7K~D
1
2
@
2
@ PR17
4.7K_0805_5%~D
2
1
+DCIN_JACK
PC13
0.1U_0603_25V7K~D
2
1
-DCIN_JACK
PC10
0.1U_0603_25V7K~D
2
1
1
MOLEX_87438-0743
7
7
6
6
5
5
4
4
3
3
2
2
1
1
PJPDC1
PD10
VZ0603M260APT_0603
PC12
0.1U_0603_25V7K~D
2
1
PL3
FBMA-L18-453215-900LMA90T_1812~D
1
2
+DC_IN_SS
PQ4
FDS6679AZ_G_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
PL4
FBMA-L18-453215-900LMA90T_1812~D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+DCIN
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
52
of
67
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
+DC1_PWR_SRC
PJP44
2
+5V_3V_REF
PC28
0.1U_0603_25V7K~D
1
2
PC23
10U_0805_25V6K
2
1
PC22
10U_0805_25V6K
2
1
PC21
10U_0805_25V6K
PQ6
AO4466L_SO8~D
5
6
7
8
PC38
330U_V_6.3VM~D
PC37
0.1U_0402_10V7K~D
2
1
PR33
0_0402_5%~D
2
1
1000P_0603_50V7K~D
PR39
0_0402_5%~D
2
1
2
1
+3.3V_ALW_LGATE
+5V_ALW_LGATE
+3.3V_ALWP
2.2_1206_5%~D
PC32
2
1
5
6
7
8
4
PQ8
AO4406AL_SO8~D
2
SECFB
GNDA_3V5V
+3.3V_ALWP
PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
2
1
PR37
17
18
19
20
21
22
23
24
PR35
2.2_0603_5%~D
+3.3V_ALW_BOOT 1
2
3
2
1
PR29
274K_0402_1%~D
GNDA_3V5V
1
2
+3.3V_OUT2
PR31 1 0_0402_5%~D
2
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE
32
31
30
29
28
27
26
25
GNDA_3V5V
PR34
2.2_0603_5%~D
1
2+5V_ALW_BOOT
PR28
@
1
2
0_0402_5%~D
3
2
1
REFIN2
TRIP2
VOUT2
SKIPSEL
PGOOD2
EN2
DRVH2
LL2
PAD
SN0608098_QFN32_5X5~D
PC30
0.1U_0402_10V7K~D
2
1
2
VSW
VOUT1
VFB1
TRIP1
PGOOD1
EN1
DRVH1
LL1
33
PC34
0.1U_0603_25V7K~D
2
1
PQ7
FDMS7692 1N POWER56-8
2.2_1206_5%~D
PR36
+5V_ALW_PHASE
9
10
11
12
13
14
15
16
PC31
1000P_0603_50V7K~D
2
2
1
PR32
0_0402_5%~D
2
1
PR38
0_0402_5%~D
2
1
PC36
0.1U_0402_10V7K~D
2
1
PC33
330U_V_6.3VM~D
PR27
0_0402_5%~D
PC35
0.1U_0603_25V7K~D
EN_3V_5V
+5V_ALWP
PU2
8
7
6
5
4
3
2
1
+5V_FB1
2
POK1
+5V_ALW_UGATE
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
2
1
GNDA_3V5V
2
0_0603_5%~D
VBST1
DRVL1
V5DRV
SECFB
GND
PGND
DRVL2
VBST2
PR30
348K_0402_1%~D
1
GNDA_3V5V
PL5
+5V_ALWP
LDOREFIN
LDO
VIN
VREF3
EN_LDO
V5FILT
TONSEL
VREF2
PC29
0.1U_0402_10V7K~D
2
1
3
D
GNDA_3V5V
PQ5
FDS8878_G 1N SO8
+5V_ALWP
1
@ PR26
Fsw = 300KHz
PC27
1U_0603_10V6K~D
2
1
@ PR25
0_0402_5%~D
1
2
+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V
LDOREFIN
PC26
1U_0402_6.3V4Z~D
2
1
PR23
0_0402_5%~D
2
1
PC25
0.1U_0603_25V7K~D
2
1
@ PR24
0_0402_5%~D
1
2
GNDA_3V5V
PR22
10_0603_5%~D
2
1
PAD-OPEN1x1m
+3.3V_RTC_LDO
PC19
2200P_0402_50V7K~D
2
1
+3.3V_ALW2
Fsw = 400KHz
+5V_VCC1
2
PC20
0.1U_0805_50V7M~D
2
1
PJP45
1
+5V_ALW2
PC24
4.7U_0603_6.3V6K~D
2
1
PC18
10U_0805_25V6K
2
1
PC17
10U_0805_25V6K
2
1
PC16
10U_0805_25V6K
2
1
PC15
0.1U_0805_50V7M~D
2
1
PC14
2200P_0402_50V7K~D
2
1
5 Volt +/-5%
Thermal Design Current : 7.869A
Peak Current : 11.242A
OCP_MIN : 13.490A
3.3 Volt +/-5%

Peak current : 7.256A
OCP_MIN : 8.707A
Pop 10 Ohm for MAX17020
PR21
0_0805_5%~D
1
2
PR20
0_0805_5%~D
1
2
PAD-OPEN 4x4m
D
REFIN2
+PWR_SRC
1
+
2
GNDA_3V5V
PD11
BAT54SW-7-F_SOT323-3~D
PC42
0.1U_0603_25V7K~D
1 1
2
+3.3V_ALWP
PAD-OPEN1x1m
GNDA_3V5V
PD13
BAT54CW_SOT323~D
PR44
200K_0402_5%~D
1
2
<23> THERM_STP#
PJP47
<43>
+15V_ALWP
(100mA,20mils ,Via NO.=1)

PJP50
2
+3.3V_ALW
PAD-OPEN 4x4m
PJP9
1
2
ALW_PWRGD_3V_5V
* connect to U51 (EC) Pin B15 (Vih =>2V)
2
2
PAD-OPEN1x1m
PR46
200K_0402_1%~D
2
1
PJP49
+15V_ALW
+5V_ALW
PAD-OPEN 4x4m
+3.3V_ALWP
ALW_PWRGD_3V_5V
PAD-OPEN 4x4m
PJP48
1
2
PR47
39K_0402_5%~D
1
+5V_ALWP
@
POK1
PC43
0.1U_0603_25V7K~D
2
1
PR45
0_0402_5%~D
2
1
BAT54SW-7-F_SOT323-3~D
@ PR43
0_0402_5%~D
2
1
POK2
2
<43> ALWON
PD12
3
PR42
2K_0402_5%~D
2
1
+3.3V_ALWP
PR41
100K_0402_1%~D
1
2
+5V_ALW2
PJP46
1
PR40
100K_0402_1%~D
1
2
PC41
0.1U_0603_25V7K~D
2
1
+5V_ALWP
PC39
0.1U_0603_25V7K~D
1 1
2
PC40
1U_0603_10V6K~D
2
1
GNDA_3V5V
GNDA_3V5V
PU2
PR22
PAD-OPEN 4x4m
GNDA_3V5V
Main (X7630031L10)
SN0608098
2nd (X7630031L11)
MAX17020
10 Ohm
Title
DC/DC +3V/ +5V

Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
53
of
67
+1.5V_SUS_P
1.5 Volt +/-5%

Thermal Design Current: 12.275A
Peak current: 17.535A
OCP_MIN:21.042A
D
@ PL601
1
2
PJP601
PC602
10U_1206_25V6M~D
2
1
PC603
10U_1206_25V6M~D
PC601
10U_1206_25V6M~D
2
1
+1.5V_SUS_P
PC606
0.1U_0402_10V7K~D
2
1
PC607
2200P_0402_50V7K~D
2
1
PC608
330U_SX_2VY~D
0_0402_5%~D
GNDA_1.5V
PC609
330U_SX_2VY~D
1
2
PGND
8
47P_0402_50V8J~D
PR608
10K_0402_1%~D
1
2
GNDA_1.5V
PR610
100K_0402_1%~D
2
1
4
PC611
4.7U_0805_10V4Z~D
DL_1.5VP
PC610
1000P_0603_50V7K~D
PR601
RT8209MGQW_WQFN14_3P5X3P5
1
+3.3V_ALW
PC615
7
@
2
LGATE
+5V_ALW
10
2
PR605
10K_0402_1%~D
VDDP
PGOOD
PR602
1
FB
GND
LX_1.5VP
12
11
FDMS0310S_DFN8-5
CS
BOOT
PHASE
VDD
2.2_1206_5%~D
15
14
NC
VOUT
DH_1.5VP
13
UGATE
PQ602
GNDA_1.5V
+PWR_SRC
PL602
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1
2
3
2
1
TON
EN/DEM
PU601
@ PC613
1U_0402_6.3V4Z~D
PR607
10_0402_5%~D
1
2
PC614
4.7U_0603_6.3V6K~D
PAD-OPEN 4x4m
0.1U_0603_25V7K~D
+5V_ALW
PC612
1
3
2
1
BST_1.5VP
0_0402_5%~D
@ PR611
300K_0402_5%~D
PR604
2.2_0603_5%~D
1
2
GNDA_1.5V
2
1
@ PR606
1
DDR_ON
45
PC604
0.1U_0805_50V7M~D
2
1
PC605
2200P_0402_50V7K~D
2
1
PR603
255K_0402_1%~D
1
2
FDMS7692_SO8~D
PQ601
1.5V_PWR_SRC
PR609
10K_0402_1%~D
1.5V_SUS_PWRGD
45
GNDA_1.5V
1.5V_SUS_PWRGD
* connect to U51 (EC) Pin B9 (Vih => 2V)
PJP602
PJP604
1
2
PAD-OPEN 4x4m
PJP603
PAD-OPEN1x1m
+1.5V_SUS_P
+1.5V_MEM
GNDA_1.5V
PAD-OPEN 4x4m
Title
+1.5V_MEM
Size
Rev
0.4
LA-6592
Date:
Document Number
Sheet
1
54
of
67
+1.8V_RUNP
+3.3V_ALW
@ PJP14
2
1.8 Volt +/-5%

Thermal Design Current: 0.981 A
Peak current: 1.402 A
OCP_MIN: 1.682 A
+1.8V_PWR_SRC
PR60
0_0603_5%~D
17
16
PGND
TPAD
14
15
PGND
VIN
12
VIN
PU4
+1.8V_VDD
PC69
13
PC68
0.1U_0603_25V7K~D
2
1
PC67
22U_0805_6.3V4Z~D
1
2
PC66
10U_0805_6.3V6M~D
1
2
PAD-OPEN 2x2m~D
VDD
PR61
24k_0402_1%~D
2
1
+1.8V_EN
EN
RUN_ON
<11,38,42,45,64>
.1U_0402_16V7K~D
GNDA_1.8V
11
AGND
RES
TPS51311RGTR_QFN16_3X3~D
10
FB
<42>
1.8V_RUN_PWRGD connect to
U46 Pin B10 (EC)
PL8
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
2
1
PC77
47P_0402_50V8J~D
2
1
PC76
22U_0805_6.3V4Z~D
1
2
1
2
1
2
PC74
680P_0603_50V8J~D
GNDA_1.8V
+1.8V_RUNP
PR70
4.7_0805_5%~D
GNDA_1.8V
PC75
22U_0805_6.3V4Z~D
1
2
0.22U_0603_10V7K~D
+1.8V_SW
PAD-OPEN1x1m
PR67
1
MODE
+1.8V_MODE 8
1
PR68
+3.3V_RUN
1.8V_RUN_PWRGD
PC73
2
1
PR69
57.6K_0402_1%~D
+1.8V_VBST
VBST
3.3_0603_1%~D
COMP
SW
PC72 100P_0402_50V8J~D
2
1
GNDA_1.8V
@ PJP15
1
10K_0402_5%~D
PR64
2K_0402_1%~D
PGOOD
PC71
0.018U_0402_16V7K~D
+1.8V_COMP
2
1
SW
PR66
1.43K_0402_1%~D
2
1
+1.8V_FB
SW
0.012U_0402_16V7K~D
10_0402_1%~D
PR65
2
1
PR63
2
1K_0402_1%~D
+1.8V_RUNP
PC70
1
+0.75V_DDR_VTT
+1.8V_RUNP
@
2
PJP16
1
+1.8V_RUN
PAD-OPEN 2x2m~D
DDR3 Termination
+5V_ALW
PU5
1DC_1+0.75V_VTT_PWR_SRC
+V_DDR_REF
PAD-OPEN 2x2m~D
VDDQSNS
VIN
10
2
PJP17
+1.5V_MEM
VLDOIN
PC78
4.7U_0805_10V4Z~D
0.75Volt +/-5%
Thermal Design Current: 0.525A
Peak current: 0.75A
+0.75V_P
8
6
PC79
0.1U_0603_25V7K~D
1
2
GND
VTTREF
VTT
GND
S5
11
PGND
VTTSNS
PC81
10U_0805_6.3V6M~D
1
2
5
PC80
10U_0805_6.3V6M~D
1
2
PC83
0.1U_0603_25V7K~D
2
1
PC82
10U_0805_6.3V6M~D
1
2
S3
+0.75V_S5
+0.75V_S3
RT9026GFP_MSOP10~D
PJP18
2
+0.75V_P
+0.75V_DDR_VTT
PAD-OPEN 2x2m~D
DDR_ON
<43,49>
@ PR72 0_0402_5%~D
1
0.75V_DDR_VTT_ON
<42>
@ PR71 0_0402_5%~D
Title
5
+0.75V_DDR_VT/+1.8V_RUN
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
55
of
67
+1.05V_M
PC84
PJP19
+1.05V_PWR_SRC
1U_0402_6.3V6K~D
+5V_ALW
SN1003055RUWR_QFN17_3P5X3P5~D
PC89
0.1U_0603_25V7K~D
2
1
PC88
0.1U_0603_25V7K~D
2
1
+1.05V_MP
PC107
6800P_0402_25V7K~D
2
1
PC106
0.1U_0603_25V7K~D
2
1
PC105
22U_0805_6.3V6M~D
2
1
PC104
22U_0805_6.3V6M~D
2
1
PC103
22U_0805_6.3V6M~D
2
1
PC102
22U_0805_6.3V6M~D
2
1
PC101
22U_0805_6.3V6M~D
2
1
PC100
22U_0805_6.3V6M~D
2
1
@ PR86
7.68K_0805_1%~D
GNDA_1.05VM
PC99
22U_0805_6.3V6M~D
2
1
PC95
0.1U_0603_25V7K~D
PC98
22U_0805_6.3V6M~D
2
1
@
PC97
10U_0603_6.3V6M~D
2
1
0_0402_5%~D
1
PL9
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VM_VX
2
1
PR85
2
@ PR84
2
<43,45>
GNDA_1.05VM
GNDA_1.05VM
GNDA_1.05VM
PC87
10U_1206_25V6M~D
2
1
PGND
10 +1.05VM_IMON
IMON
<17,42>
A_ON
PC96
10U_0603_6.3V6M~D
2
1
SS
SIO_SLP_A#
1.05 Volt +/-5%

OCP_MIN :8.198A
0_0402_5%~D
PR83
22K_0402_1%~D
MODE
PC86
10U_1206_25V6M~D
2
1
16
FSET
VOUT
+1.05VM_VX
GNDA_1.05VM
VFB
22.1K_0402_1%~D
12 +1.05VM_FSET
2
1
@ PR79
11 +1.05VM_MODE
1.33K_0402_1%~D
PC93
+1.05VM_SS
PR75 @
0_0402_5%~D
2
1
@ PR78
2
13 +1.05VM_EN
EN
PR81
PC94
2
1
+1.05V_MP
14 +1.05VM_PWRGD
PGOOD
COMP
0.01U_0402_25V7K~D
0_0402_5%~D 1800P_0402_50V7K~D
2.67K_0402_1%~D
PR82
+1.05V_MP
2K_0402_1%~D
1
GND
PGND
+1.05VM_COMP
+1.05VM_VFB
PR80
2
VIN
2
PC90
0.22U_0603_10V7K~D
PR74
3.3_0603_1%~D
15 +1.05VM_BST
1
2
VBST
PC92
680P_0402_50V7K~D
2
1
VCCA
SW
PC91 100P_0402_50V8J~D
2
1
VIN
PU6
+3.3V_ALW
17
GNDA_1.05VM
PR76
5.6K_0402_5%~D
2
1
PAD-OPEN 4x4m
+1.05VM_VX
1
PC85
0.1U_0603_25V7K~D
2
1
PR87
100K_0402_1%~D
2
1
+3.3V_ALW
PJP21
PJP20
1
PAD-OPEN 4x4m
@
+1.05VM_PWRGD
PR88 0_0402_5%~D
2
1
1.05V_A_PWRGD
PJP22
PAD-OPEN1x1m
<43>
+1.05V_MP
+1.05V_M
GNDA_1.05VM
PAD-OPEN 4x4m
1.05V_A_PWRGD
* connect to U51 (EC) Pin A14 (Vih => 2V)
Title
+1.05V_M
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
56
of
67
+1.05VTT
1.05Volt
=> (+/- 5% AC + DC +Ripple )
=> (+/- 2% DC + Ripple)
Peack current : 8.970A
OCP_MIN : 10.764A
PC108
PJP23
+1.05VTT_PWR_SRC
10 +1.05VTT_IMON
0_0402_5%~D
IMON
PR95
MODE
SS
@ PR91
0_0402_5%~D
2
PC113
0.1U_0603_25V7K~D
2
1
PC112
0.1U_0603_25V7K~D
2
1
<42,62>
GNDA_1.05VTT
+1.05VTTP
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VTT_VX
2
1
+1.05VTT_PWRGD
@ PR103
1
PC128
0.1U_0603_25V7K~D
2
1
PC127
22U_0805_6.3V6M~D
2
1
PC126
47U_0805_4V6M~D
2
1
PC125
22U_0805_6.3V6M~D
2
1
PC124
22U_0805_6.3V6M~D
2
1
PC123
22U_0805_6.3V6M~D
2
1
PC122
47U_0805_4V6M~D
2
1
PR102
+5V_RUN
+1.05VTT_SENSE
VTT_SENSE
<10>
VTT_GND
<10>
0_0402_5%~D
2
1.05V_VTTPWRGD
<43,62>
PR461
0_0402_5%~D
2
PC130
22U_0805_6.3V6M~D
2
1
1
PR101
9.31K_0402_1%~D
2
1
PC121
22U_0805_6.3V6M~D
2
1
@ PR99
7.68K_0805_1%~D
GNDA_1.05VTT
PC129
22U_0805_6.3V6M~D
2
1
PC119
0.1U_0603_25V7K~D
PC120
22U_0805_6.3V6M~D
2
1
GNDA_1.05VTT
0_0402_5%~D
1
10_0402_5%~D
2
1
PR100
1
PR97
PR98
2
+5V_ALW
SN1003055RUWR_QFN17_3P5X3P5~D
CPU_VTT_ON
GNDA_1.05VTT
GNDA_1.05VTT
PC111
10U_1206_25V6M~D
2
1
PC110
10U_1206_25V6M~D
2
1
2
1
VIN
VOUT
22.1K_0402_1%~D
12 +1.05VTT_FSET 2
1
@ PR92
11 +1.05VTT_MODE
22.1K_0402_1%~D
PR96
3.09K_0402_0.5%~D
FSET
14 +1.05VTT_PWRGD
13 +1.05VTT_EN
+1.05VTT_VX
PR105
20K_0402_0.5%~D
2
1
EN
PGND
PC117
COMP
VFB
@
PC114
0.22U_0603_10V7K~D
PR89
2.2_0603_5%~D
15 +1.05VTT_BST
1
2
PGND
+1.05VTT_SS
PGOOD
1800P_0402_50V7K~D
VIN
+1.05VTT_SENSE
VBST
GND
SW
VCCA
PR94
+1.05VTT_VFB
PC118
2
2K_0402_0.5%~D
1
0.01U_0402_25V7K~D
0_0402_5%~D
2
+1.05VTT_COMP
+1.05VTT_SENSE
PR93
2
PC116
680P_0402_50V7K~D
2
1
PC115 100P_0402_50V8J~D
2
1
PR90
5.6K_0402_5%~D
2
1
17
PU7
+3.3V_ALW
16
+1.05VTT_VX
GNDA_1.05VTT
PAD-OPEN 4x4m
@ PC109
10U_1206_25V6M~D
2
1
PC350
22U_0805_6.3V4Z~D
1
2
PC351
22U_0805_6.3V4Z~D
1
2
1U_0402_6.3V6K~D
D
PC131
6800P_0402_25V7K~D
2
1
GNDA_1.05VTT
2
0_0402_5%~D
13.3K_0402_1%~D
PR104
1.05V_VTTPWRGD
* connect to PU13 Pin 15 (Vih => 2V)
* connect to U50 Pin 1 (Vih => 2.31V)
B
PJP25
PJP24
1
PAD-OPEN 43X118
1
PAD-OPEN1x1m
PJP26
+1.05VTTP
+1.05V_RUN_VTT
GNDA_1.05VTT
PAD-OPEN 43X118
Title
5
ISL95870A +1.05V_RUN_VTT
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
57
of
67
LGATE3
MAX17491GTA+T_TQFN8_3X3~D
1
2
PC135
10U_1206_25VAK~D
2
1
PC134
10U_1206_25VAK~D
PC153
10U_1206_25VAK~D
2
1
PC152
10U_1206_25VAK~D
PC151
2200P_0402_50V7K~D
2
1
PC148
0.1U_0603_25V7K~D
2
1
AON6414AL 1N DFN
PC401
10U_1206_25VAK~D
2
1
PQ14
1
1
+VCC_CORE
2P2_Vo
PC159
PQ16
AON6704L_DFN8-5
PR145
1_0402_5%~D
PR148
1
1_1206_1%~D
3
2
1
POKA
PR154
0_0402_5%~D
PC164
2
@ PC162
1
2
1000P_0402_50V7K~D
@
1
PC166
0.22U_0603_16V7K~D
2
1
+Vcore_CSNA
BOST1
PC172
10U_1206_25VAK~D
2
1
1
2
PC171
10U_1206_25VAK~D
PC174
0.22U_0603_10V7K~D
1
2
PC170
2200P_0402_50V7K~D
2
1
PR161
2.2_0603_5%~D
2
1 BT1_1
PC169
0.1U_0603_25V7K~D
2
1
AON6414AL 1N DFN
@
UGATE1
PC402
10U_1206_25VAK~D
2
1
+VCC_PWR_SRC
3
2
1
CLK
23
PR152
2
1
22.1K_0402_1%~D
1000P_0402_50V7K~D
PL13
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
IMVP_PGOOD connect to
U46 Pin A62 (EC)
GNDA_VCC
PQ11,PQ12,PQ15,PQ16,PQ19,PQ20,PQ25,PQ26,PQ53
1
PR170
1_0402_5%~D
PR176
2
1
22.1K_0402_1%~D
PR177
0_0402_5%~D
@
1
PC178
2
1000P_0402_50V7K~D
+Vcore_CSPA1
Vcore/VAXG L/S Mosfet
1
2.1K_0402_1%~D
PR169
PC176
4700P_0402_25V7K~D
+VCC_CORE
2P1_Vo
LGATE1
P1_SW 3
1000P_0603_50V7K~D
1_1206_1%~D
PQ19
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
PQ9,PQ13,PQ18,PQ24,PQ60,PQ52
+
2
3
2
1
AON6414AL 1N DFN
AON6704L_DFN8-5
+Vcore_PWMA
+Vcore_SR
37
PQ13
PC161
4700P_0402_25V7K~D
2 +Vcore_POKA
Vcore/VAXG H/S Mosfet
2.1K_0402_1%~D
PHASE1
1
PR164
1
PR167
1
PR168
P2_SW 3
1000P_0603_50V7K~D
+Vcore_CSPA2
0_0402_5%~D
PC132
0.1U_0603_25V7K~D
2
1
PC400
10U_1206_25VAK~D
2
1
PR127
165K_0402_1%~D
1
2
3
2
1
+Vcore_THERMA
38
PR135
105K_0402_1%~D
1
2
5
PC160
26
25
1
130_0402_1%~D
1
130_0402_1%~D
1
54.9_0402_1%~D
PR144
GNDA_VCC
ALERT#
VDIO
AGND
27
VIDSCLK
PR126
165K_0402_1%~D
1
2
+Vcore_VDD
28
3
2
1
29
PC175
2
VIDSOUT
PR134
105K_0402_1%~D
1
2
30
PR173
1
<10>
PR133
10K_0402_1%~D
1
2
+VGFX_THERMB
39
THERMA
PH2
100K_0402_1%_TSM0B104F4251RZ~D
1
2
+Vcore_CSPAAVE
40
SR
+Vcore_CSPA1
41
THERMB
+Vcore_CSNA
42
CSPAAVE
+Vcore_CSPA2
43
CSPA1
+Vcore_CSPA3
44
CSNA
+Vcore_VCC
45
CSPA2
+Vcore_EN
46
DRVPWMA
LGAT2
<10>
2
PR159
2
@ PR160
2
PR162
<10> VIDALERT_N
PR166
31
+PWR_SRC
PL12
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
PQ15
+1.05V_RUN_VTT
0_0402_5%~D
1
2
UGATE2
PC173 0.1U_0402_25V6K~D
1
2
GNDA_VCC
@ PR171
1
32
PAD-OPEN 4x4m
PR141
PC157
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 BT2_1 1
2
+GFX_DLB
33
PHASE2
+Vcore_POKA 24
+GFX_DHB
<60>
PC167
1000P_0402_50V7K~D
+GFX_POKB
PR165
BSTA1
+Vcore_CLK
<60>
BOST2
PQ18
7.5K_0402_1%~D
1+VGFX_FBB
+GFX_LXB
+Vcore_IMAXA
AON6414AL 1N DFN
PR157
2
+3.3V_RUN
LXA1
POKB
<60> +GFX_BSTB
<60>
35
34
GNDA_VCC
PQ17
GNDA_VCC
DHA1
CSPB2
20
12
MAX17411GTM+_TQFN48_6X6~D
CSNB
+Vcore_ALERT# 22
PC163
1000P_0402_50V7K~D
+GFX_IMAXB
PJP27
1
AON6704L_DFN8-5
PR158 10_0402_5%~D
10K_0402_1%~D
DLA1
VDDB
11
PC146
0.22U_0603_16V7K~D
2
1
+VCC_PWR_SRC
3
2
1
1
2
<42> IMVP_PGOOD
VDDA
CSPB1
36
@ PC144
1
2
1000P_0402_50V7K~D
+Vcore_CSNA
PR156 10_0402_1%~D
1
2
1
10
PC145
2
1000P_0402_50V7K~D
3
2
1
@ PC165
1000P_0402_50V7K~D
+VCC_GFXCORE
CSPBAVE
+Vcore_VDIO 21
<11> VCC_AXG_SENSE
+VGFX_GNDSB
1
<11> VSS_AXG_SENSE
PGNDA
GNDA_VCC
PR153 10_0402_1%~D
1
2
DLA2
GNDSB
DRVPWMB
1000P_0402_50V7K~D
10_0402_5%~D
1
2
FBB
+GFX_POKB
PR149
PC205
1
2
@
GNDA_VCC
0_0402_5%~D
DHA2
19
@ PR199
0_0402_5%~D
LXA2
AGND
+Vcore_VDD
<60> +GFX_CSPBAVE
<60> +GFX_CSNB
@ PR198
2
+Vcore_VCC 1
VRHOT#
DLB
43P_0402_50V8J
BSTA2
13
PC168
+GFX_CSPB1
PR125
1K_0402_1%~D
1
2
2
8
0_0402_5%~D
1
GNDA_VCC
GNDA_VCC
+VGFX_GNDSB 7
@
1
+VGFX_FBB
PR120
2
1
22.1K_0402_1%~D
PR128
0_0402_5%~D
+Vcore_CSPA3
+GFX_IMAXB
2.2U_0603_10V7K~D
IMAXA
FBA
18
<7,43> H_PROCHOT#
GNDA_VCC
GNDSA
PGNDB
@ PR146
1
2
12.7K_0402_1%~D
1 +Vcore_FBA 3
+Vcore_VRHOT#
PC158
1000P_0402_50V7K~D GNDA_VCC
IMAXB
17
+1.05V_RUN_VTT
75_0402_5%~D
1
2
GNDA_VCC
PR140
2
TONB
DHB
1
@ PR143
@ PR411 10_0402_1%~D
1
2
16
2
2
PR139 10_0402_1%~D
1
2
<10> VCCSENSE
PC149
1000P_0402_50V7K~D
LXB
1
1
@ PC150
1000P_0402_50V7K~D
Local sense resister put HW side
CSPA3
+Vcore_GNDSA
15
<10> VSSSENSE
TPAD
PU9
PR138 10_0402_1%~D
1
2
VCC
49
@ PR410 10_0402_1%~D
1
2
+Vcore_TONA
+VGFX_TONB
48
2
200K_0402_1%~D
BSTB
1
PR136
47
GNDA_VCC
+VGFX_PWR_SRC
PC140
4700P_0402_25V7K~D
+Vcore_IMAXA
EN
2
200K_0402_1%~D
PR124
5.62K_0402_1%~D
1
2
0_0402_5%~D
2
0_0402_5%~D
14
1
PR132
@ PR129
1
@ PR131
<42> IMVP_VR_ON
PH3
100K_0402_1%_TSM0B104F4251RZ~D
1
2
<15,43> 1.05V_0.8V_PWROK
+VCC_PWR_SRC
PR123
5.62K_0402_1%~D
1
2
PC143
2.2U_0603_10V7K~D
1
2
GNDA_VCC
TONA
PC142
2.2U_0603_10V7K~D
2
1
PC141
1U_0603_10V6K~D
2
1
10_0402_5%~D
2
3
2
1
+Vcore_VCC
+5V_ALW
PR122
1
PR114
1_0402_5%~D
2.1K_0402_1%~D
PR113
3
2
1
4.32K_0402_1%~D
1
PR115
0_0402_5%~D
+Vcore_VDD
2
@ PR121
1
@ PC177
1
2
1000P_0402_50V7K~D
PC179
0.22U_0603_16V7K~D
2
1
PJP28
1
Main (X7630031L08)
PAD-OPEN1x1m
2nd
GNDA_VCC
AON6414AL
AON6704L
Main (X7630031L08)
SIR472
+Vcore_CSNA
SIR164DP
2nd
GNDA_VCC
@
1
PC180
2
1000P_0402_50V7K~D
3rd (X7630031L09)
MDU2657RH
3rd (X7630031L09)
MDU2653RH
Title
Vcore
Size
Document Number
Rev
0.4
LA-6592
Date:
EP
+VCC_CORE
2P3_Vo
DL
GND
PC155
100U_25V_M~D
PC154
100U_25V_M~D
P3_SW
1000P_0603_50V7K~D
4.32K_0402_1%~D
1
PQ11
P2_SW
PR112
2
4
P3_SW 3
2.1K_0402_1%~D
LX
PWM
1_1206_1%~D
4.32K_0402_1%~D
1
PHASE3
PQ20
AON6704L_DFN8-5
10K_0402_1%_ERTJ0EG103FA~D
PR110
2
PL11
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
PC139
PR111
DH
PQ12
AON6704L_DFN8-5
PH1
BST
SKIP
P1_SW
Layout Note:
PC142 close to PIN19
VDD
5
6
PR117
1
PR109
PC137
0.22U_0603_10V7K~D
1
2
PU8
PC156
100U_25V_M~D
PC138
1U_0603_10V6K~D
2
1
2
1
40.2K_0402_1%~D
PR107
2.2_0603_5%~D
BOST3 2
1 BT3_1
1_0603_1%~D
PC133
2200P_0402_50V7K~D
2
1
+5V_ALW
PR118
0.33U_0603_10V7K~D
@
4
AON6704L_DFN8-5
PC136
1
AON6414AL 1N DFN
UGATE3
3
2
1
3
2
1
PQ10
PC701 0.033U_0402_16V7K~D
3
2
1
VCC_Core
Thermal Design Current : 53A
Peak current : 94A
OCP_MIN :112.8A
AON6414AL 1N DFN
PQ9
+VCC_PWR_SRC
Sheet
1
58
of
67
VCC_AXG
Peak current : 33A
OCP_MIN :39.6A
+VGFX_PWR_SRC
PJP29
1
2
PC196
10U_1206_25VAK~D
2
1
PC195
10U_1206_25VAK~D
PC194
2200P_0402_50V7K~D
2
1
PC193
0.1U_0603_25V7K~D
2
1
AON6414AL 1N DFN
PC403
10U_1206_25VAK~D
2
1
PQ60
+PWR_SRC
3
2
1
3
2
1
PR189
PC197
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 GBT1_1 1
2
2GP1_Vo
+
2
PC199
2200P_0402_50V7K~D
2
1
PC202
470U_D2_2VM_R4.5M~D
PC702 0.033U_0402_16V7K~D
2
1
PC208
PR191
1_0402_5%~D
PC201
470U_D2_2VM_R4.5M~D
PC198
+VCC_GFXCORE
PC200
0.1U_0402_10V7K~D
2
1
2
1
3
2
1
PC203
4700P_0402_25V7K~D
PR193
<59> +GFX_DLB
GP1_SW
4
1000P_0603_50V7K~D
1_1206_1%~D
AON6704L_DFN8-5
PQ25
PQ26
AON6704L_DFN8-5
PL15
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
<59> +GFX_LXB
3
2
1
<59> +GFX_BSTB
AON6414AL 1N DFN
<59> +GFX_DHB
PQ24
1
PAD-OPEN 4x4m
PR119
1
0.33U_0603_10V7K~D
0_0603_1%~D
PR201
2
1
40.2K_0402_1%~D
PH4
1
PR190
PR203
2
10K_0402_1%_ERTJ0EG103FA~D
2.1K_0402_1%~D
1.43K_0402_1%~D
<59> +GFX_CSNB
GNDA_VCC
@
1
PC207
2
1000P_0402_50V7K~D
<59> +GFX_CSPBAVE

Title
+VCORE/+GFXCORE
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
59
of
67
PU11
PL16
2
1
SBR3A40SA-13_SMA2
PQ27
SI4835DDY-T1-GE3_SO8~D
8
1
7
2
6
3
5
D
PQ28
NTR4502PT1G_SOT23-3~D
PQ30A
NTGD4161PT1G_TSOP6~D
SW
DOCK_DCIN_IS+
LGATE
VREF
PGND
CSOP
CE
CSON
PR814
1
1U_0603_10V6K~D
CHG_UGATE
H_PROCHOT#
TP
BQ24747RHDR_QFN28_5X5~D
PJP34
1
PAD-OPEN1x1m
PC230
1000P_0603_50V7K~D
PR228
PC225
PC227
Main
10K
2200P
56P
2nd
PC228
PC234
PC233
Main
120P
1u
2nd
0.01u
PR234
4.7_1206_5%~D
PC240
0.1U_0603_25V7K~D
1
2
PC241
1
2
GNDA_CHG
PC241
PR232
0.1u
0.1u
0 ohm
2nd
0.22u
10 ohm
0.1U_0603_25V7K~D
1
2
0.1U_0603_25V7K~D
GNDA_CHG
PC240
Main
GNDA_CHG
PC293
MAX8731_REF
PR806
PR802
162K_0402_1%~D
PC801
100P_0402_50V8J~D
2
1
PR804
113K_0402_1%~D
<57>
PQ801
RHU002N06_SOT323-3~D
2
1
2
G
DYN_TUR_CURRNT_SET#
PU12B
LM393DR_SO8~D
PR223
Main
1 ohm
2nd
0 ohm
PU12A
PR239
10K_0402_1%~D
2
1
@ PR240
1
O
-
LM393DR_SO8~D
PR243
41.2K_0402_1%~D
2
1
PR238
100K_0402_1%~D
2
1
PR237
47K_0402_1%~D
2
1
PR235
232K_0402_1%~D
2
1
+5V_ALW
1
2
2
G
PR236
1M_0402_1%~D
1
2
PC243
100P_0402_50V8J~D
2
1
MAX8731_REF
PR242
42.2K_0402_1%~D
2
1
PR241
22.6K_0402_1%~D
2
1
5
6
0_0402_5%~D
0.01U_0402_25V7K~D
8
PC242
100P_0402_50V8J~D
2
1
PQ802
1
1
PR807
0_0402_5%~D
PR810
0_0402_5%~D
649K_0402_1%~D
2ICREF
PC802
220P_0402_50V8J~D
2
1
MAX8731_IINP
+3.3V_ALW
3
PR808
1.8M_0402_1%
1
2
PR805
20K_0402_1%~D
2
@ PR801
1
DYN_TUR_PWR_VO
PR809
221K_0402_1%~D
PR803
150K_0402_1%~D
ICOUT
+5V_ALW
Low
1
130W
@ PC244
100P_0402_50V8J~D
+3.3V_ALW2
PC245
High
2
G
@
PQ34
+DC_IN
90W
ACAV_IN
+5V_ALW
<42,43,63>
PR220
PC214
PC292
PR209
PR210
PC213
0 ohm
0 ohm
0.1u
1u
0.1u
10 ohm
10 ohm
0.047u
4.7 ohm
ACAV_IN_NB
0_0402_5%~D
Title
Adapter Protection Circuit for Turbo Mode

5
3
GNDA_CHG
DYN_TUR_CURRENT_SET#
+VCHGR
PR233
0_0402_5%~D
2
1
100_0402_5%~D
16
NC
+VCHGR
VFB
GND
7.5K
PR232
0_0402_5%~D
2
1
29
17
12
0.01u
<7,43>
PR227
0.01_1206_1%~D
PL17
2
1+VCHGR_L
4
5.6UH 20% FDVE1040-H-5R6M=P3_9.2A_20%~D
3
2nd
200K
<23>
PC221
10U_1206_25V6M~D
2
1
+3.3V_ALW
1_0603_1%~D
@ PC224
220P_0402_50V7K~D
CHG_LGATE
1 PR230
PR225
220P_0402_50V8J~D
GNDA_CHG
PC222
1
2
DYN_TUR_PWR_ALRT#
0_0402_5%~D
2
0_0402_5%~D
2
@ PR812
100K_0402_5%~D
19
18
15 VFB
PR224
Main
@ PC214
1U_0603_10V6K~D
1
2
PR813
1
5
6
7
8
Maximum charging current is 6.3A
PR228
1
2
10K_0402_5%~D
EAO
2.2K
PR231
1.8K_1206_5%~D
2
1
PR225
7.5K_0402_5%~D
20
EAI
@ PR811
0_0402_5%~D
+VCHGR_B
226K
MAX8731_REF
PR212
100K_0402_1%~D
2
1
2
2 PR223
23
PHASE
FBO
2nd
PC239
10U_1206_25V6M~D
2
1
VICM
PR211
100K_0402_1%~D
1
24
UGATE
0 Ohm
PC237
10U_1206_25V6M~D
2
1
PC235
0.1U_0402_10V7K~D
2
1
PC228
120P_0402_50VNPO~D
1
2
PC227
56P_0402_50V8~D
1
2
1
PC225
2200P_0402_50V7K~D
PC234
1U_0603_10V6K~D
2
1
PC229
220P_0402_50V8J~D
2
1
PR229
8.45K_0402_1%~D
2
1
<23> MAX8731_IINP
5
2
PC232
0.01U_0402_25V7K~D
2
1
PR226
4.7K_0402_5%~D
2
1
<43> CHARGER_SMBDAT
PC231
0.01U_0402_25V7K~D
2
1
<43> CHARGER_SMBCLK
PR224
200K_0402_5%~D
PC233
0.01U_0402_25V7K~D
2
1
1
GNDA_CHG
21 MAX8731A_LDO
VDDP
NC
4.7K
PC231
PC220
10U_1206_25V6M~D
2
1
CSSN_1
27
CSSN
28
CSSP
ICREF
SDA
SCL
PR226
220P
100k
PC236
0.1U_0603_25V7K~D
2
1
VDDSMB
PC223
0.1U_0402_10V7K~D
BOOT
<63>
DYN_TUR_PWR_VO
@ PC803
1
2
GNDA_CHG
3
2
1
MAX8731_IINP
DK_CSS_GC
3
2
1
9
14
GNDA_CHG
ACOK
PR812
PC229
<41>
0_0402_5%~D
@ PR220
PR219
33_0603_1%~D
2.2_0603_1%~D
BOOT
BOOT_D
25
1
2
ACIN
SIR472DP-T1-GE3_SO8~D
PC226
3300P_0402_50V7K~D
2
1
10
DOCK_DCIN_IS-
@ PR216
1
ICOUT
26
ICOUT
PD15
BAT54HT1G_SOD323-2~D
2
1
11
GNDA_CHG
PC217
0.1U_0603_25V7K~D
2
1
13
0_0402_5%~D
PR222
15.8K_0402_1%~D
2
1
+5V_ALW
@ PC292
0.1U_0603_25V7K~D
PC215
GNDA_CHG
PU11
0.1U_0805_50V7M~D
DCIN 22
2
1
DCIN
@ PR221
1
PR210
2
1
0_0402_5%~D
CSSP_1
ICREF
1_0805_5%~D
GNDA_CHG
0_0402_5%~D
1
PR209
2
PR215
10K_0402_5%~D
2
1
PR214
10K_0402_1%~D
2
1
PR217
316K_0402_1%~D
1
2
<63> +CHGR_DC_IN
PC213
0.1U_0603_25V7K~D
1
2
0 Ohm
HW
D
PC212
0.1U_0603_25V7K~D
1
2
PR213
PR218
49.9K_0402_1%~D
2
1
0.01U_0402_25V7K~D
15.8K
316K
MAX8731_REF
PR814
PQ30B
NTGD4161PT1G_TSOP6~D
S
+SDC_IN
PR208
10K_0402_5%~D
2
1
PR813
<41>
PR218
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
10K
Main
PC238
10U_1206_25V6M~D
2
1
PC219
0.1U_0603_25V7K~D
2
1
Adapter Protection Event
PC218
2200P_0402_50V7K~D
2
1
2
G
D
E2 AC_OK=17.7 Volt
ACAV_IN
PR217
PC211
0.1U_0603_25V7K~D
2
1
PAD-OPEN 4x4m
PQ31
@ PR207
1
CSS_GC
PQ33
SI4812BDY-T1-GE3_SO8~D
<63>
<63>
2
G
PQ29
NTR4502PT1G_SOT23-3~D
<23,43,63>
PR222
PC209
47P_0402_50V8J~D
2
1
DC_BLOCK_GC
0_0402_5%~D
PC216
PR214
10K
CHAGER_SRC
0_0402_5%~D
2nd (X7630031L13)
ISL88731C
+PWR_SRC
1
@ PR206
1
MAX8731A_LDO
BQ24747
PJP33
PC210
0.1U_0603_25V7K~D
+DC_IN_SS
PR205
0.01_1206_1%~D
+SDC_IN
@ PD14
2
PR215
Main (X7630031L12)
Charger
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
60
of
67
VCCSA
Peak current : 6A
OCP_MIN :7.2A
PJP35
+VCCSA_PWR_SRC
SET1
47.5K_0402_1%~D
+1.05V_RUN
GNDA_VCCSA
2
11
10
@ PR260
4.12K_0402_1%~D
1
2
PR259
+VCCSA_FSEL
12
VO
PC249
2200P_0402_50V7K~D
1
2
PQ35
AO4466L_SO8~D
3
2
1
PC260
10U_0805_6.3V6M~D
2
1
PC257
10U_0805_6.3V6M~D
2
1
PC256
2200P_0402_50V7K~D
2
1
PC255
330U_D2_2VY_R7M~D
@ PR251
1
13
FSEL
PR252
SET0
+VCCSA_SET1 9
@ PR248
@PR248
2.2_1206_1%~D
+
2
PC261
2
.015U_0603_25V7K~D
0_0402_5%~D
+VCCSA_SET0 8
PR247
12.7K_0402_1%~D
PC258
0.1U_0402_10V7K~D
2
1
+VCCSA_PWRGD
10_0402_5%~D
2
1
PR246
14
+VCCSA_LGATE
+VCCSA_EN
PGOOD
OCSET
PR250
113K_0402_1%~D
PR256
140K_0402_1%~D
PR295
1K_0402_5%~D
15
@ PC254
1000P_0603_50V7K~D
+VCCSA_P
1
1.05V_VTTPWRGD
PR253
<43,58>
2
0_0402_5%~D
@ PR254
1
2
CPU_VTT_ON
0_0402_5%~D
1
PR255
10K_0402_5%~D
@ PR258
1
2
ISL95870AHRUZ_UTQFN20_1P8X3P2
GNDA_VCCSA
+VCCSA_SENSE
<11>
0_0402_5%~D
<42,58>
10_0402_5%~D
2
1
PR257
SREF
16
+VCCSA_PHASE
EN
+VCCSA_UGATE
PHASE
VID0
FB
GNDA_VCCSA
+VCCSA_SREF
VID1
+VCCSA_FB
<11> VCCSA_VID_1
17
+3.3V_RUN
VCCSAPWROK
<43>
0_0402_5%~D
+VCCSA_OCSET
PR262
PR261
0_0402_5%~D
@PR249
@
PR249
0_0402_5%~D
+VCCSA_VID0
PC262
.068U_0603_16V7~D
1
2
+1.05V_RUN
3
2
1
VCCSA_VID_1
UGATE
0.22U_0603_10V7K~D
+VCCSA_RTN
+PWR_SRC
PL18
1UH 20% FDVE0630-H-1R0M=P3 11.9A
2
1
PC253
1
2
1 2
RTN
18
BOOT
PR245
2.2_0603_1%~D
+VCCSA_BT 1
2
PQ36
AO4406AL_SO8~D
GND
GNDA_VCCSA
19
VCC
5
6
7
8
GNDA_VCCSA
PC248
0.1U_0603_25V7K~D
1
PVCC
PGND
5
6
7
8
GNDA_VCCSA
LGATE
2
C
20
PC251
0.1U_0402_10V7K~D
+VCCSA_VCC
PC252
1U_0603_10V6K~D
+VCCSA_LGATE
PR244
2.2_0805_5%~D
PC247
10U_1206_25V6M~D
PC250
1U_0603_10V6K~D
1
2
PU13
PC246
10U_1206_25V6M~D
+5V_RUN
PAD-OPEN 43X118
+VCCSA_VO
1
12.7K_0402_1%~D
@ PR263
10K_0402_5%~D
PR265
1
+GND_VCC_SA
<11>
0_0402_5%~D
1
PR266
1K_0402_5%~D
0.8_VCCPWROK
* connect to U50 Pin 2 (Vih => 2.31V)
@ PR267
4.12K_0402_1%~D
GNDA_VCCSA
PJP37
2
1
PAD-OPEN1x1m
VCCSA_VID_1
PJP38
+VCCSA_P
+VCC_SA
0.9V
0
0.8V
1
GNDA_VCCSA
PAD-OPEN 4x4m
Title
output voltage adjustable network

5
ISL95870A 0.8V_VCC_SA
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
61
of
67
@ PR473
1
@ PR472
1
0_0402_5%~D
2
DEFAULT_OVRDE
PR289
499K_0402_1%~D
@ PR323
1
1
@ PR314
2
0_0402_5%~D
<55> DC_BLOCK_GC
ACAV_IN
1
@ PR318
2
0_0402_5%~D
+3.3V_ALW2
1
@ PR319
2
0_0402_5%~D
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
PC272
1500P_0402_7K~D
2
1
ERC2
PC275
0.1U_0402_25V4Z~D
2
1
ERC3
2
0_0402_5%~D
<55>
CSS_GC
<55> DK_CSS_GC
PC274
0.047U_0603_25V7K~D
2
1
2
2
DOCK_SMB_ALERT#
<41,42,47>
PC273
0.1U_0603_25V7K~D
2
1
P50ALW
P50ALW
PBATT_OFF
DK_AC_OFF_EN
ACAV_IN_NB
GND
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
10
11
12
13
14
15
16
17
18
TP
PQ51
FDN338P_G_NL_SOT23-3~D
SLICE_BAT_PRES#
<41,42,47>
1
@ PR321
1
2
ERC1
3
4
5
6
7
ACAVIN
8
P33ALW2 9
37
1
PD28
2
PD29
2
@ PR306
0_0402_5%~D
36
35
34
33
32
31
30
29
28
2ACAVDK_SRC
0_0402_5%~D
CD3301_SDC_IN
<23,43,55>
PC263
0.47U_0805_25V7K~D
PR292
499K_0402_1%~D
2
1
PC270
0.22U_0603_25V7K~D
PD23
2
1
1
+SDC_IN
+PWR_SRC
PD21
2
1
@ PR301
0_0402_5%~D
NC
CHARGERVR_DCIN
DC_IN_SS
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
100K_0402_5%~D
1
@ PR312
PDS5100H-13_POWERDI5-3~D
PQ46
1
D
S
2
D
S
3
D
S
4
D
G
PC267
2200P_0402_50V7K~D
2
1
PBATT_IN_SS
100K_0402_5%~D
2
CSS_GC
DK_CSS_GC
ERC3
ERC2
GND
PWR_SRC
SS_DCBLK_GC
EN_DK_PWRBAR
P33ALW
PR310
<41> ACAV_DOCK_SRC#
1
3
CHGVR_DCIN
DC_IN_SS
DK_PWRBAR
PU14
<47> SOFT_START_GC
1
2
+3.3V_ALW2
2
1
0.1U_0603_50V4Z~D
PR269
0_0402_5%~D
@
PD20
2
0_0402_5%~D
CD3301_DCIN
2
47_0805_5%~D
PC271
PBATT+
1
2
@ PR299 0_0402_5%~D
1
2
@ PR302 0_0402_5%~D
+DOCK_PWR_BAR
1
+CHGR_DC_IN
@ PR305
<55>
1
PR307
FDS6679AZ_G_SO8~D
MODULE_BATT_PRES#
0_0402_5%~D
+DC_IN_SS
+DC_IN
1
2
3
4
PC268
0.1U_0603_25V7K~D
2
1
S
S
S
G
PR268
330K_0402_5%~D
PR275
499K_0402_1%~D
2
1
1
2
PD19
2
1
D
D
D
D
FDS6679AZ_G_SO8~D
MPBATT+
PR471
510K_0402_5%~D
2
1
PBAT_PRES#
MODULE_ON
+DOCK_PWR_BAR
PD18
2
1
2
3
4
3
PD27
PD26
1
2
0_0402_5%~D
PQ37
8
7
6
5
1
6
PD25
1
1
2
1
2
SLICE_BAT_PRES#
390K_0402_5%~D
1
PR291
2
6
1
2
1
PD22
@ PR296
0_0402_5%~D
@ PR287
51
ES2AA-13-F SMA
PD16
2
1
FDS6679AZ_G_SO8~D
1
1
@
B
PR298
0_0402_5%~D
1
2 4
PR290
200K_0402_1%~D
6
2
1
2
PR288
499K_0402_1%~D
2
1
0_0402_5%~D
3
4
2
6
1
DEFAULT_OVRDE
PQ54A
2N7002DW-T/R7_SOT363-6~D
@ PR294
1
2N7002DW-T/R7_SOT363-6~D
PQ50B
SLICE_BAT_ON
PQ54B
2N7002DW-T/R7_SOT363-6~D
0_0402_5%~D
PBATT+
PD24
1
2
2
1
PR285
0_0402_5%~D
PD31
2
MPBATT_IN_SS
PC265
0.22U_0603_25V7K~D
4
PR282
620K_0402_5%~D
2
1
PC266
0.1U_0603_25V7K~D
2
1
PR279
100K_0402_5%~D
1
2
1
PR286
10K_0402_5%~D
CHARGE_EN
PDS5100H-13_POWERDI5-3~D
PQ41
1
D
S
2
D
S
3
D
S
4
D
G
8
7
6
5
PR284
33_0603_5%~D
1
2
2N7002DW-T/R7_SOT363-6~D
PQ50A
1
@ PR355
1
1
3
8
7
6
5
PQ49B
2N7002DW-T/R7_SOT363-6~D
PQ48B
PD30
PR280
20K_0402_1%~D
PQ48A
2N7002DW-T/R7_SOT363-6~D
PQ47B
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ47A
0_0402_5%~D
PR274
33_0603_5%~D
1
2
PQ45
FDS6679AZ_G_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
2N7002DW-T/R7_SOT363-6~D
PR297
20K_0402_1%~D
PQ49A
CHARGE_PBATT
PR283
330K_0402_5%~D
8
7
6
5
D
D
D
D
FDS6679AZ_G_SO8~D
PQ40
PBATT+
PQ44
1
8
2
7
3
6
5
2N7002DW-T/R7_SOT363-6~D
@ PR293
1
S
S
S
G
PR278
330K_0402_5%~D
+VCHGR
1
2
3
4
STSTART_DCBLOCK_GC
PR276
390K_0402_5%~D
2
1
2
6
0_0402_5%~D
PR281
390K_0402_5%~D
2
1
PR273
10K_0402_5%~D
PR272
620K_0402_5%~D
2
1
PR271
390K_0402_5%~D
2
1
MPBATT+
PQ42A
@ PR277
1
2N7002DW-T/R7_SOT363-6~D
CHARGE_MODULE_BATT
PQ42B
2N7002DW-T/R7_SOT363-6~D
PD17
PC264
0.1U_0603_25V7K~D
2
1
+VCHGR
PR270
100K_0402_5%~D
1
2
PQ39
1
8
2
7
3
6
5
27
26
25
24
23
22
21
20
19
1
@ PR309
2
0_0402_5%~D
CD_PBATT_OFF 1
@ PR311
2
0_0402_5%~D
1
@ PR313
2
0_0402_5%~D
+5V_ALW
SLICE_BAT_ON <42>
DOCK_AC_OFF
<41,42>
DK_AC_OFF
1
2 3301_ACAV_IN_NB
0_0402_5%~D
1
2
@ PR317 0_0402_5%~D
BLKNG_MOSFET_GC
1
@ PR316
DK_AC_OFF_EN
SL_BAT_PRES#
1
@ PR320
1
@ PR322
2
0_0402_5%~D
2
0_0402_5%~D
ACAV_IN_NB
SLICE_BAT_PRES#
<42,43,55>
DOCK_AC_OFF_EC
1M_0402_5%~D
PR315
<42>
<41,42,47>
+NBDOCK_DC_IN_SS
CD3301RHHR_QFN36_6X6~D
A
P33ALW
1
@ PR324
2
0_0402_5%~D
EN_DK_PWRBAR
1
@ PR325
2
0_0402_5%~D
STSTART_DCBLOCK_GC
+3.3V_ALW
EN_DOCK_PWR_BAR
1
<42>
1M_0402_5%~D
@ PR326

Title
3301_PWRSRC
1
@ PR327
2
0_0402_5%~D
+PWR_SRC
2
Selector
Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
62
of
67
GPU_CORE
OCP min : 24.2A
PJP39
+GPU_PWR_SRC
SET0
FSEL
SET0
SET1
14
GPU_PWRGD
10
VO
PC279
2200P_0402_50V7K~D
1
+
PC288
2200P_0402_50V7K~D
2
1
PC287
470U_D2_2VM_R4.5M~D
2
PR332
5.9K_0402_1%~D
PC286
470U_D2_2VM_R4.5M~D
PC284
1000P_0603_50V7K~D
PC285
0.1U_0402_10V7K~D
2
1
+VCC_GPU_CORE
10_0402_5%~D
2
1
PR330
PC289
2
0.15U_0603_16V7K~D
13
1 PR335
PR336
GNDA_GPU_CORE
GPU_OCSET
GPU_VDD_SENSE
<49>
0_0402_5%~D
12
PR339
GPU_VO
ISL95870AHRUZ_UTQFN20_1P8X3P2
1
5.9K_0402_1%~D
PR403
2
1
38.3K_0402_1%~D
PR344
GPU_FB
3.09K_0402_1%~D
PR346
5.11K_0402_1%~D
GNDA_GPU_CORE
PR343
10K_0402_5%~D
PR402
10_0402_5%~D
1
<47> GPU_VID_0
3
D
2
GPU_LGATE
2
1
1
+3.3V_RUN
OCSET
SET1
11
2
PR340
10K_0402_5%~D
@ PR345
2
15
GPU_EN
PGOOD
PR338
71.5K_0402_1%~D
EN
SREF
16
GPU_PHASE
VID0
PAD-OPEN 43X118
0_0402_5%~D
GNDA_GPU_CORE
0_0402_5%~D
PHASE
FB
PR334
30.1K_0402_1%~D
PR341
412K_0402_1%~D
<47> GPU_VID_1
@ PR337
2
@ PR333
10K_0402_5%~D
PC290
.056U_0603_16V7~D
1
2
SREF
VID1
GPU_UGATE
+3.3V_RUN
17
GPU_VID0
PQ52
AON6414AL 1N DFN
PC283
1
2
2 2
UGATE
18
0.22U_0603_10V7K~D
4
GPU_VID1
+PWR_SRC
PL19
0.56UH +-20% MPC1040LR56C 23A
PR331
1
RTN
GNDA_GPU_CORE
PR329
2.2_0603_1%~D
GPU_BOOT1
2
1_1206_1%~D
BOOT
19
GND
1
2
GNDA_GPU_CORE
VCC
PC278
0.1U_0603_25V7K~D
1
20
PVCC
PGND
PQ53
AON6704L
GNDA_GPU_CORE
LGATE
PC282
1U_0603_10V6K~D
PC281
0.1U_0402_10V7K~D
GPU_LGATE
GPU_CORE_VCC
PR328
2.2_0805_5%~D
PC277
10U_1206_25V6M~D
PC280
1U_0603_10V6K~D
1
2
PU15
PC276
10U_1206_25V6M~D
+5V_RUN
1
GNDA_GPU_CORE
2
0_0402_5%~D
@ PR347
10K_0402_5%~D
PR400
2
PR474
1
GPU_GND_SENSE
<49>
0_0402_5%~D
3.09K_0402_1%~D
PR401
5.11K_0402_1%~D
+3.3V_RUN
GNDA_GPU_CORE
PR348
10K_0402_5%~D
PJP41
PJP40
DGPU_PWROK
@ PR349
GPU_PWRGD
PAD-OPEN 43X118
0_0402_5%~D
1
PAD-OPEN1x1m
PJP42
+VCC_GPU_CORE
<11,38,42,45,56>
RUN_ON
DGPU_PWR_EN
2
@ PR350
2
@ PR351
1
0_0402_5%~D
GPU_VID_0
GPU_VID_1
GPU_EN
1.025V
0
0
1V
1
0
0.85V
0
1
0.8V
1
1
+GPU_CORE
GNDA_GPU_CORE
Title
output voltage adjustable network
0_0402_5%~D
5
PAD-OPEN 43X118
ISL62870 GPU core

Size
Document Number
Date:
Rev
0.4
LA-6592
Sheet
1
63
of
67
Version Change List ( P. I. R. List )

Item Page#
Title
Date
Request
Owner
Issue Description
Solution Description
Rev.
Delete PR264
D
Delete VCCSA_VID_0 net

Connect VCCSA_VID_1 net to PIN5
Depop PR249, PR267 and PR260
1
61
VCCSA
6/30
Intersil
VCCSA spike issue
Change PR261 and PR260 to 0 Ohm (SD02800008L) from 24.9k (SD03424918L)
X01
Change PR259 to 47.5k (SD03447528L) from 274k (SD03427438L)

Change PR256 to 140k (SD03414038L) from 0 Ohm (SD02800008L)
Change PR250 to 113k () from 34k (SD03434028L)
Add pull down PR295 10k(SD02810028L)
2
61
VCCSA
6/30
Intel
Change VCCSA VID pull down resistor value
Change PR295 and PR266 to 1k (SD02810018L) from 10k (SD02810028L)
X01
53
3V/5V
7/15
Compal
3V/5V Bulk cap interfere with ME
Change PC33 and PC38 to 330U/25m/H1.9(SGA00001A8L) from 330U/25m/H2.8 (SGA1933131L)
X01
54
+1.5V_SUS
7/15
Compal
Vendor will not support this part
Change PC609 and PC608 to 330U/9m/2V (SGA20331E0L) from 330U/9m/2.5V (SGA19331D1L)
X01
52
DCIN
7/15
Compal
PL3 and PL4 current rating is not enough

for 130W adapter
Change PL2 and PL3 to FBMA-L18-453215-900LMA90T (SM01002078L) from FBMJ4516HS720NT(SM010009C8L)
52
DCIN
7/15
Compal
PL1 current rating is not enough for 9cell

(3.0Ah 1C) discharge current
53
3V/5V
7/16
Compal
10u/1206/X5R/25V will COS
53
3V/5V
7/16
Compal
+3.3V phase node over Mosfet Vds rating
Change PL1 to FBMJ4516HS720NT(SM010009C8L) from FBMA-L18-453215-900LMA90T (SM01002078L)
X01
X01
Add PL22 FBMJ4516HS720NT(SM010009C8L)

Change PC16,PC17,PC18,PC21,PC22 and PC23 to 10u/0805/X5R (SE00000QK00) from 10u/1206/X5R
(SE142106M8L)
X01
Change PQ6 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L)
X01
Change PQ8 AO4712L (SB00000AJ1L) from SI4134DY(SB00000KB0L)

9
53
3V/5V
7/16
Compal
PC24 down size to 0603 from 0805
Change PC24 to 4.7u/6.3V/0603 (SE107475K8L) from 4.7u/6.3V/0805 (SE093475K8L)
X01
10
61
11
54
12
60
13
62
14
15
58,59
60
7/16
Compal
VCCSA output voltage is not constant so

change some net name
1.5V_SUS
7/16
Richtek
Reserve Pull down resister on EN pin for

power consumption issue
Charger
7/18
Compal
PQ27 body diode can handle surge current

when adapter plug in so depop PD14
Depop PD14 SBR3A40SA (SC100003J00)
X01
Leakage issue on PD16
Change PD16 to ES2AA (SC100005A0L) from SBR3A40SA (SC100003J00)
X01
VCCSA
Selector
7/18
Compal
Axg_core
Vcore
7/20
MAXIM
Charger
7/20
Compal
16
Change +0.8V_VCC net name to +VCCSA_P

Change 0.8V_VCCPWROK net name to VCCSAPWROK
Change +0.8V_VCC_SA net name to +VCC_SA
61
VCCSA
7/20
Compal
Reserve 0402 cap pad for transient fine tune
Reserve adapter protection circuit

for turbo mode
VCCSA phase node over Mosfet Vds rating
X01
Add 0402 resister pad on EN pin
X01
Add PC701 and PC702 0402 cap pad
X01
Change PU11 pin1 net name to ICREF from GNDA_CHG

Change PU11 pin26 net name to ICOUT from VCC
Reserve PR801,PR802,PR803,PR804,PR805,PR806,PR807,PR808,PR809,PR810,PR811,PR812
Reserve PC801,PC802,PC803
X01
Change PQ35 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L)

Change PQ36 AO4712L (SB00000AJ1L) from SI4172DY(SB00000HN0L)
X01
Title
PWR_PIR
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
64
of
67

Item Page#
D
17
18
58
58,59
Title
Date
Request
Owner
Vcore
VAXG_core
7/24
MAXIM
Vcore
VAXG_core
7/24
MAXIM
Issue Description
Fine tune OCP setting for Pass 2 IC
Broad band in 800MHz and 900MHz
PC610 1000P (SE025102K8L)

PR602 2.2 Ohm (SD011220B8L)
PC175 470P (SE024471J8L)
PR173 2.2 Ohm (SD011220B8L)
PC198 470P (SE024471J8L)
PR193 2.2 Ohm (SD011220B8L)
PC284 1000P (SE025102K8L)
PR331 2.2 Ohm (SD011220B8L)
PC85 0.1u (SE00000Q900)
X01
Pop adapter protection componment for

turbo mode with TI solution
Pop
Pop
Pop
Pop
Pop
Pop
Pop
PR803
PR804
PR802
PR801
PQ801
PR812
PC801
X01
Change PR140 to 11.8k (SD03411828L) from 12.4k (SD00000AJ8L)

Change PR157 to 8.25k (SD03482518L) from 8.66K(SD03486618L)
Pop PC701 and PC702 0.033uF (SE076333K8L)
7/28
Comapl
Bump noise in band of 700MHz
23
24
58,59
56
Charger
7/28
Vcore
VAXG_core
7/28
Compal
Fine tune load line and transient for

Vcore and VAXG_core
Selector
9/2
Compal
Change parts to HF parts
25
46
+DCIN
9/2
Compal
26
47
+5V/3.3
/+15VALW
9/2
Compal
27
54
Charger
9/2
Compal
28
48
+1.5V_SUS
9/2
Compal
470P (SE024471J8L)
470P (SE024471J8L)
2.2 Ohm (SD011220B8L)
2.2 Ohm (SD011220B8L)
100k (SD03410038L)
78.7k (SD03478728L)
115k (SD03411538L)
1.87M ()
RHU002N06 (SB50206008L)
100K (SD02810038L)
100P (SE071101J8L)
PD6
PQ4
PD1
PQ2
X01
Change PQ51 FDN338P_G (SB90338001L) from FDN338P (SB90338008L)

Change PD18, PD19, PD21, PD22, PD23, PD24, PD25, PD26, PD27, PD28, PD29, PD30 and PD31
RB751V-40GTE-17 (SCS00004L0L) from RB751V (SC1B751V08L)
Change PQ37, PQ40, PQ41, PQ45 and PQ46 FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
Change
Change
Change
Change
X01
Pop
Pop
Pop
Pop
Pop
Pop
Pop
Pop
Pop
Vcore
Rev.
(SD03410038L)
(SD03415038L)
(SD03410038L)
(SD03415038L)
X01
58
TI
100K
150K
100K
150K
PC139
PC159
PR117
PR148
20
60
from
from
from
from
Pop
Pop
Pop
Pop
Broad band issue in 700MHz
22
(SD03416530L)
(SD03410538L)
(SD03416530L)
(SD03410538L)
X01
Comapl
Comapl
165K
105K
165K
105K
Pop PC32 1000P (SE025102K8L)

Pop PR37 2.2 Ohm (SD011220B8L)
Pop PC31 1000P (SE025102K8L)
Pop PR36 2.2 Ohm (SD011220B8L)
Change PR35 to 2.2 Ohm (SD013220B8L) from 1 Ohm (SD013100B8L)
Change PR35 to 2.2 Ohm (SD013220B8L) from 1 Ohm (SD013100B8L)
7/28
7/28
to
to
to
to
X01
3V/5V
1.5V
Vcore
VGFX_Core
GPU_core
1.05VM
PR127
PR135
PR126
PR134
(SD013200B8L)
(SD013200B8L)
53
54,58
59,63
56
Change
Change
Change
Change
Phase node switching waveform abnormal issue Change PR118 to 1 Ohm (SD014100B8L) from 2 Ohm
for Pass 2 IC
Change PR119 to 1 Ohm (SD014100B8L) from 2 Ohm
19
21
DA204UGT106 (SC60000170L) from DA204UT106 (SC1A204U00L)

FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
RB715FGT106 (SCSB715F010) from RB715F (SCSB715F08L)
FDV301N_G (SB503010020) from FDV301N (SB50301008L)
X02
X02
X02
Change PQ5 FDS8878_G (SB00000BV1L) from FDS8878 (SB00000BV8L)

Change PQ33 SI4812BDY-T1-GE3 (SB00000DI1L) from SI4812BDY-T1-E3 (SB00000DI0L)
Change PL17 FDVE1040-H-5R6M=P3 (SH00000CH1L)from FDVE1040-5R6M=P3 (SH00000CH0L)
Change PQ27 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
X02
A
Change PL602 FDUE1040D-H-1R0M=P3 (SH000009U1L) from FDUE1040D-1R0M=P3 (SH000009U0L)
X02

Title
PWR_PIR
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
65
of
67

Item Page#
29
47
30
56
Title
+5V/3.3
/+15VALW
Date
9/2
Request
Owner
TI
Issue Description
Fine tune OCP setting for +5V/+3.3V
Rev.
Change PR29 to 274K (SD03427438L) from 220K (SD03422038L)

Change PR30 to 348K (SD00000WW8L) from 243K (SD03424338L)
X02
Selector
charger
9/13
Compal
Change PQ39 and PQ44 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
X02
9/13
Compal
Fine tune adapter protection circuit for

2nd source and reserve H_PROCHOT#
Delete PQ802 and PR807

MAX8731_IINP singal connect change to inverting input from Non-inverting
ICREF singal connect change to Non-inverting input from inverting input
Pop PR811 and PR813 0 Ohm (SD02800008L)
Depop PR814
X02
TI
Fine tune OCP setting
Change PR83 to 22k (SD03422028L) from 10k (SD03410028L)
X02
22u/1206/6.3V COS issue
Change PC98 ~ PC105 to 22u/0805 (SE00000110L) from 22u/1206 (SE077226M8L)
X02
X02
X02
31
60
32
56
+1.05VM
9/14
33
56
+1.05VM
10/05
Compal
input
34
57
+1.05VTT
10/05
Compal
22u/1206/6.3V COS issue
Change PC123 ~ PC125, PC121, PC127, PC120, PC129 and PC130 to 22u/0805 (SE00000110L)
from 22u/1206 (SE077226M8L)
Change PC122 and PC126 to 47u/0805 (SE00000G60L) from 22u/1206 (SE077226M8L)
35
52
DCIN
10/05
Compal
6 ~ 7mA leakage current in slice
Change PR2 and PR504 to 100K (SD02810038L) from 10K (SD03410028L)
36
61
VCCSA
10/14
Compal
Fine tune VCCSA OCP setting for 2nd and

3rd source choke
Change PR247 and PR262 to 12.7k (SD03412728L) from 11.5k (SD03411528L)
37
63
GPU_Core
10/14
nVidia
Fix output voltage to 0.9V for nVidia

ES sample
Depop PR337 and PR345 0 Ohm (SD02800008L)

Depop PR347 10K (SD02810028L)
Pop PR343 10K (SD02810028L)
X02
38
63
GPU_Core
10/14
Compal
Change OCP setting for new nVidia chip
Change PR332 and PR339 to 5.9k (SD03459018L) from 4.22k (SD03442218L)
X02
Depop PR347 10K (SD02810028L)

Pop PR343 10K (SD02810028L)
Change PR344 and PR400 to 3.09k (SD00000J38L) from 3.57k (SD03435718L)
Change PR341 to 412k (SD00000678L) from 402k (SD034402380)
Change PR403 to 38.3k (SD03438328L) from 200k (SD03420038L)
Change PR338 to 71.5k (SD03471528L) from 0 Ohm (SD02800008L)
Change PR334 to 30.1k (SD03430128L) from 23.7k (SD03423728L)
X03
Change PC270 and PC265 to 0.22uF (SE000005Z8L) from 1uF (SE00000698L)
X03
X02
39
63
GPU_Core
11/09
nVidia
Change VID setting for new nVidia chip.

Defult set 1V.
40
62
Selector
11/09
Compal
Fine tune main and media battery switching

to slice battery transient time
41
60
Charger
11/09
Compal
Change PR802 to 107k (SD03410738L) from 115K (SD03411538L)

Change adapter protection circuit
Change PR801 to 649K (SD03464938L) from 1.87M (SD00000WN0L)
trip point. (Adapter rated current + 0.75A)
Change PR804 to 80.6K (SD03480628L) from 78.7k (SD03478728L)
42
60
Charger
11/09
Compal
Change adapter protection event

to HW from SW
Pop PR814 0 Ohm (SD02800008L)

Depop PR813 0 Ohm (SD02800008L)
Depop PR812 100k Ohm (SD02810038L)
X03
43
60
Charger
12/09
Compal
H_PROCHOT# can not pull high issue with

external circuit at DC mode
Change PR803.1 net nam to +3.3V_ALW2 from MAX8731_REF

Change PQ801.3, PR804.1 and PC801.2 net nam to PGND from GAND_CHG
X04
44
60
Charger
12/09
Compal
H_PROCHOT# pull low level can not meet

Intel SPEC with TI solution at AC mode
X03
Depop PR801 (SD03464938L)

Change PR804 to 113k (SD03411338L) from 80.6K (SD03480628L)
Pop PR806, PR807,PR810 0 Ohm (SD02800008L)
Pop PQ802 RHU002N06 (SB50206008L)
Pop PR809 221K (SD00000HX8L)
Pop PR808 1.8M (SD00000K180)
Pop PR805 20K (SD03420028L)
Depop PR811 (SD02800008L)
X04

Title
PWR_PIR
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
66
of
67

Item Page#
45
58,59,63
Title
Date
+Vcore
+VAXG
+VGPU
12/10
Request
Owner
Compal
46
60
Charger
12/17
TI
47
58,59
+Vcore
+VAXG
12/17
Compal
48
59
+VAXG
12/17
MAXIM
49
60
Charger
01/12
Compal
50
52 ~ 63
01/12
Compal
ALL
Issue Description
Change sunbber valure for 3rd source MOSFET
Rev.
Change PC139, PC159, PC175, PC198, PC284 to 1000P (SE025102K8L) from 470P (SE024471J8L)
Change PR117, PR148, PR173, PR193, PR331 to 1 Ohm (SD012100B8L) from 2.2 Ohm (SD011220B8L)
X04
D
H_PROCHOT# spike voltage issue

when AC to DC transient
Pop PR208 10k (SD02810028L)
X04
Fine tune VAXG and Vcore load line

for 2nd source choke
Change PR157 to 7.5k (SD03475018L) from 8.25k(SD03482518L)

Change PR140 to 12.7k (SD03412728L) from 11.8k (SD03411828L)
X04
Low side driver no signal when loading

over 10A
Change PR119 to 0 Ohm (SD01400008L) from 1 Ohm (SD014100B8L)
X04
Adapter protection trip point for 2nd source Change PR802 to 162k (SD03416238L) from 174k (SD03417438L)
Remove debug resistor (0 Ohm)
A00
Change PR14,PR23,PR43,PR45,PR71,PR72,PR78,PR88,PR91,PR103,PR121,PR129,PR146,PR171,PR198
PR199,PR206,PR207,PR216,PR221,PR240,PR251,PR258,PR269,PR277,PR285,PR287,PR293,PR294
PR296,PR298,PR299,PR301,PR302,PR305,PR309,PR311,PR312,PR313,PR314,PR316,PR317,PR318
PR319,PR321,PR322,PR323,PR324,PR325,PR337,PR345,PR349,PR351,PR355,PR472,PR606 footprint
A00

Title
PWR_PIR
Size
Document Number
Date:
Rev
0.4
LA-6592
5
Sheet
1
67
of
67

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
HW
6/15/2010
COMPAL
Boot issue
Change QC1 control from SUS_ON to RUN_ON_CPU1.5VS3#
X01
11
HW
6/15/2010
COMPAL
Modify net name
Change +0.8V_VCC_SA to +VCC_SA
X01
HW
6/15/2010
COMPAL
Follow PPM recommendation to change

material
Change capacitors from 10uF_0805_10V Y5V to 10uF_0805_6.3V_X5R:

C305,C387,C462,C705,C728,C760,C764,C765,C768,C769,
C772,CC135,CH58,CH73,CH80,CV124,CV126,CV185,CV187
Change capacitors from 10uF_0805_6.3V to 10uF_0603_6.3V:
C475,C638,C641,C643
Change resistors to 0402 size: RC134, RH201,RH253,RH208,RH213
Delete RH192 and add PJP51
X01
14
HW
6/15/2010
COMPAL
De-pop PCH XDP
De-pop RH1,RH3~RH10,RH12~RH21,RH24,RH283~RH285,CH1
X01
14
HW
6/15/2010
COMPAL
Change HDA_SYNC topology
Add QH7 and RH37
X01
HW
6/15/2010
COMPAL
Change ODD connector from 13 pin to 31 pin
Change ODD connector to 31 pin, add @R1189,RH340 and remove C1168,

C1169,C1170,U87,U88,U89, R1188 and short R1188 pin1 and pin2 together
X01
17,29,42
18
HW
6/17/2010
COMPAL
Remove touch screen PAID pull down circuit
Remove RH241
X01
18
HW
6/17/2010
INTEL
Follow Intel Design Guide Rev1.0
Change RH149 to 1k and RH150 to 4.7k
X01
22
HW
6/17/2010
COMPAL
Change EMC4002 to EMC4022
Change U9 to EMC4022, remove R392,R394 R866,R404,C279
X01
10
25
HW
6/17/2010
COMPAL
Change CRT SW to MAX14885
Change CRT SW to MAX14885 and add C1181,C1182, R1581 remove C325~C336
X01
11
26
HW
6/17/2010
COMPAL
Safety request
Add no stuff D4 and co-lay with F2, change F2 to 2A_8V
X01
12
28, 39
HW
6/17/2010
COMPAL
Change SATA repeater to MAX4951BE
Chagne U25, U44 to MAX4591BE and change R1169,R1171,R1174,R1176 to 0

ohm and stuff R1174,R1176
X01
13
30
HW
6/17/2010
COMPAL
Change Codec to ZB version and speaker

connector
Change JSPK1 to TYCO_1734595-6 and change U72 to ZB version and stuff

C962
14
33
HW
6/17/2010
COMPAL
Add Jumper for power consumption measurement Add PJP52,PJP55
15
33
HW
6/17/2010
COMPAL
Change SI2301BDS to C version
Change Q36 to SI2301CDS
16
33
HW
6/17/2010
BRCOM
Change RFID capacitors for more popular
Change C502,C505 from 1uF to 0.1uF
X01
17
35
HW
6/17/2010
COMPAL
Link R677 to CIS
Link R677 to CIS to have the correct part number
X01
18
37
HW
6/17/2010
COMPAL
Change express card power SW to

TPS2231MRGPR-2
Change U41 to TPS2231MRGPR-2 and remove C636,C639
X01
19
41
HW
6/17/2010
COMPAL
Add pull down on SLICE_BAT_ON
Add R791
X01
20
42
HW
6/17/2010
COMPAL
Board ID
Change R875 to 130K
X01
X01
X01
X01
21
HW
46
6/17/2010
COMPAL
BIOS request
De-pop DV1, RV29 and pop U14
X01
Title
5
EE P.I.R (1/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
68
of
75

Item Page#
D
22
Date
Request
Owner
HW
6/18/2010
COMPAL
EOL concern
Change CC176 to SGA00005H0L, change YH1, Y6 to SJ132P7KW1L
X01
Title
11,14,42
Issue Description
Rev.
23
43
HW
6/18/2010
COMPAL
Change connector
Change JKB1 to same as JSC1
X01
24
43
HW
6/18/2010
COMPAL
Change TP pin definition
Reverse TP pin definition for PT
X01
25
41,42
HW
6/18/2010
COMPAL
Add series resistor and pull up resistors

on MIC_MUTE#, VOL_MUTE,VOL_UP,VOL_DOWN
Add R773,R806,R884,R886,R887,R1166,R1167,R1184
X01
26
24,45
HW
6/18/2010
COMPAL
Correct net name for LED signal
Modify signal name BREATH_BLUE_LED to BREATH_WHITE_LED and

BREATH_BLUE_LED_SNIFF to BREATH_WHITE_LED_SNIFF
X01
27
26,40,
41,46
HW
6/21/2010
NVIDIA
Add HPD circuit to inform system for NV

request
Add DV2,DV3,DV4,R1154 and use ECE5028 GPIOE7/DCD# as HPD signal to

inform system
X01
HW
6/21/2010
INTEL
Remove useless resistors
Remove R556, R558, R559, R560 and short the pin1 and pin2 together
X01
HW
6/22/2010
COMPAL
Change part for Halogen free
Change Q18,Q27,Q30,Q34,Q38,Q40,Q42,Q49,Q54,Q58,QV5 to HF part
X01
28
32
29
24,28,29,
32,37,44,49
30
10
HW
6/22/2010
COMPAL
To have better return path
De-pop CC130 and pop CC134
X01
31
44
HW
6/23/2010
COMPAL
Solution +1.5V_RUN voltage drop issue
Change Q59 from SI3456BDV to NTGS4141NT1G
X01
32
41
HW
6/23/2010
COMPAL
Remove double pull high resistor
Remove R1177
X01
33
29
HW
6/23/2010
COMPAL
Remove useless resistor
Remove R1125,R1126
X01
34
44
HW
6/25/2010
COMPAL
NTMS4107NR2G EOL
Change Q55 to
X01
35
10
HW
6/25/2010
COMPAL
CC129~CC134 D2T LESR5M EOL
Change CC129~CC134 to SGA00004X0L
X01
36
24
HW
6/25/2010
COMPAL
Change LVDS connector to 40 pin
Change JLVDS1 to 40 pin
X01
37
31
HW
6/25/2010
COMPAL
Change I/O connector to TYCO
Change JIO1 vendor from Lotes to TYCO
X01
38
24
HW
6/25/2010
COMPAL
PT panel change touch screen pin definition
Change JTS1 pin definition for new TS pin define
X01
39
14,29,
36,42
HW
7/1/2010
COMPAL
Modify Module Bay circuit
1.Remove R1181,R1182,R1189. 2.Change BAY_SMBUS, DEVICE_DET# pull up

power rail from +3.3V_RUN to +3.3V_ALW. 3.Change net name ODD_DET# to
PCH_SATA_MOD_EN#. 4.Add Q123,Q76,R513,R514,R515 for USB_SMI# circuit.
5.De-pop C627,R712
X01
40
24
HW
7/1/2010
COMPAL
Pop R1137
X01
41
HW
7/1/2010
COMPAL
For support XDP device
De-pop RC9
X01
HW
7/1/2010
COMPAL
Base on GPIO map to modify
1. Move SLP_ME_CSW_DEV# from GPIO45 to GPIO28, add MCARD_PCIE_SATA# on

5028 GPIOE3. 2. Remove RH238, change RH80 from 1k to 10k. 3. Change
SLICE_BAT_PRES# pull up power rail from +3.3V_ALW2 to +3.3V_ALW. 4. Add
R889
X01
NTMS4920NR2G
42
15,18,
41,42
Stuff PWM pull down resistor for PT solution
Title
5
EE P.I.R (2/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
69
of
75

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
43
24
HW
7/1/2010
COMPAL
PWM function
Remove R1139,R1140 and add D68,D69
X01
44
11
HW
7/1/2010
COMPAL
VCCSA VID circuit
Change VCCSA_VID_0 to VCCSA_VID_1 and pop RC138
X01
45
36,45
HW
7/2/2010
COMPAL
Modify LED circuit
Remove R1578,R1579,R1580,D42,D60,D61, add Q77,Q124,R705,R718,R719
X01
46
22
HW
7/2/2010
COMPAL
Modify thermal diode for thermal request
Remove C268,C269, use DP1/DN1 for CPU,DP2/DN2 for GPU, DP3/DN3 for
DIMM, DN5/DP5 for WWAM
X01
47
15,32
HW
7/5/2010
COMPAL
EOL concern
Change Y3 and YH2 from 1Y725000CE1A to 7A25000110
X01
48
11,24,
27,45
HW
7/7/2010
COMPAL
Change part for Halogen free part
Change QC5 to NTR4501NT1G, U21,U24,U54,U55,U57

NC7SZ04P5X-G, Q21 change to FDC654P-G
X01
change to
49
29
HW
7/7/2010
COMPAL
USB30 SMI circuit
Stuff R513 due to this pin is OD type on USB30 module
X01
50
29
HW
7/8/2010
COMPAL
Link CIS symbol
Link JSATA2 CIS symbol
X01
51
35
HW
7/9/2010
O2-Mirco
Add discharge circuit for +3.3V_RUN_CARD
Add R826 on +3.3V_RUN_CARD
X01
52
15,29,32,
35,36,37
HW
7/9/2010
COMPAL
Move PCIE TX AC coupling capacitors close

to PCH
Move C408,C409,C460,C461,C567,C568,C596,C597,C598,C599,C617,C618,
C647,C648 to page 15 to close to PCH
X01
53
14
HW
7/12/2010
COMPAL
To solve SPI EA
Add R933,R935 on SPI chip select signals
X01
54
24
HW
7/12/2010
COMPAL
Link CIS symbol
Link JLVDS1
X01
55
28
HW
7/12/2010
COMPAL
Meet EA result
Stuff R493,R494
X01
EMI request to solve EMI issue
Add R678,C757,L92,L93, and stuff L51,L52,L90, de-pop

R736~R739,R1150,R1151, and remove R1106
X01
Remove Mic mute function and LED
Remove R773,R806,R1108,R1061,Q105 and delete MIC_MUTE# signal
X01
56
24,30,35,
38,39
EMI
7/12/2010
COMPAL
57
31,41,45
HW
7/13/2010
Dell
58
28
HW
7/13/2010
COMPAL
Follow EA result
De-pop R493,R494 and pop R495,R496
X01
59
29
HW
7/13/2010
COMPAL
Modify zero ODD circuit
Change ZODD_WAKE#,MODC_EN#,MOD_SATA_PCIE#_DET,USB30_EN connection
X01
60
33
HW
7/14/2010
COMPAL
Change power rail for smart card
Change R632,R635 pull up power rail from +3.3V_ALW to +3.3V_ALW_SC
X01
61
22
HW
7/14/2010
COMPAL
Reserve capacitor for WWAN thermal diode
Add @C277
X01
62
14,17,18
HW
7/14/2010
COMPAL
To solve back drive issue
Move SIO_EXT_SMI# from PCH GPIO1 to GPIO14, remove RH254, and change
RH164 pull up power rail from +3.3V_RUN to +3.3V_ALW_PCH
X01
63
45
HW
7/14/2010
COMPAL
Remove CLIP
Remove CLIP3,CLIP4,CLIP6~CLIP8
X01
64
38,39
HW
7/15/2010
COMPAL
Remove one TPS2560 for cost saving
Remove U43,C659,C660,R740,PJP6, and share with power source of U45
X01
65
31,41,45
HW
7/15/2010
COMPAL
Remove speaker LED
Remove Q119,Q102,R1109,R1059
X01
Title
5
EE P.I.R (3/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
70
of
75

Item Page#
D
Title
Date
Request
Owner
Issue Description
66
17,18
HW
7/15/2010
COMPAL
Add pull up for PCH GPIO1
Add RH41 and
change reference RH164 to RH41
X01
67
24,30,35
HW
7/16/2010
COMPAL
Change part reference for EMI request
Change L92 to LE92,L93 to LE93,R678 to RE678,CE757 to CE757
X01
68
20,44
HW
7/16/2010
COMPAL
For cost saving
Add PJP57,RH202, no stuff QH4,Q49,RH278,R908
X01
Modify current sense connection
Move MAX8731_IINP from U9.25 to U9.31
Follow GPIO 0713
Add DYN_TURB_PWR_ALRT#, DYN_TUR_CURRNT_SET#, and change R796 pull

up power rail from +3.3V_RUN to +3.3V_ALW
X01
De-pop RE678,CE757
X01
COMPAL
22
HW
7/16/2010
70
41,42
HW
7/16/2010
DELL
71
35
HW
7/16/2010
COMPAL
Follow vendor request
72
28,45
HW
7/19/2010
COMPAL
Part leverage select
Change D16,D59,D62 to SC100000S0L
73
14
HW
7/19/2010
COMPAL
Follow Intel XDP design
Change RH43,RH44,RH45 to 200 ohm
74
38,39
HW
7/19/2010
COMPAL
Change power rail for layout limitation
Change U90,U91 power rail to +USB_SIDE_PWR,U92 power rail to

+SATA_SIDE_PWR
75
46
HW
7/19/2010
NV
NV request to add 10k pull on GPIO9
Add RV102
76
23
HW
7/20/2010
SMSC
Follow SMSC review result
Add R403
77
31
HW
7/20/2010
COMPAL
Change USB3(on IO/B) enable signal
Chnage USB3 enable signal from USB_SIDE_EN# to ESATA_USB_PWR_EN#
78
31
HW
7/20/2010
COMPAL
Change JIO1 for correct connector list
Change JIO1 to TYCO_2041300-2
79
46
HW
7/20/2010
Follow NV request
Add RV103,RV104, @RV20,@RV25,@RV26 and de-pop R1111
80
26
HW
7/20/2010
Follow safety request
De-pop F2, pop D4 and add R5
81
17,30,40
HW
7/20/2010
Follow EMI request
Add RE1098,RE1100,RE1101,RE1102,CE573,CE574, change RH103,R756

to 33 ohm, C704 to 12pF
X01
82
14
HW
7/20/2010
COMPAL
Change SPI chip select damping R
Change R933,R935 to 47 ohm
X01
83
24,39
HW
7/20/2010
COMPAL
Change material for small size
Change C300,C669 from 1206 16V to 0805 10V
84
24
HW
7/20/2010
COMPAL
Change U86 power rail for touch screen
Change U86.4 power rail from +3.3V_RUN to +5V_RUN
85
38,39
HW
7/20/2010
COMPAL
Remove useless capacitors
Remove C1151~C1154
86
41
HW
7/20/2010
COMPAL
Follow GPIO map
Change R796 to 10k ohm, add R764
87
44
HW
7/20/2010
COMPAL
Change PJP57 footprint
Change PJP57 footprint to 4x4m
88
31
HW
7/21/2010
COMPAL
Modify HP & Mic circuit
Change JIO1 pin connection
89
36
HW
7/21/2010
COMPAL
Add 0 ohm R on PCIE_MCARD2_DET#
Add R725
90
40
HW
7/21/2010
COMPAL
Follow EA request
Change C704 to 6.8pF
NV
Safety
EMI
X01
69
Rev.
X01
X01
C
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
Title
5
EE P.I.R (4/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
71
of
75

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
91
35
HW
7/21/2010
COMPAL
Change JSD1 to support Memory Stick
Change R666,R667, change JSD1
X01
92
31, 42
HW
7/22/2010
COMPAL
GPIO MAP update.
add R1590
X01
93
39
HW
7/22/2010
COMPAL
Follow Vender request.
add R1582~R1585
X01
94
39
HW
7/23/2010
COMPAL
To compatible with SN75LVCP601
Add R1586~R1589
X01
95
41
HW
7/23/2010
COMPAL
Add 0 ohm R on TEMP_ALERT# for backup
Add R1591
X01
96
24,42
HW
7/24/2010
COMPAL
Follow GPIO map to add touch screen power

down control circuit
Add TOUCH_SCREEN_PD#, Q125,Q32,R430,R431,C304,C306, and change JTCH1

pin 1,pin2 from +5V_RUN to +5V_TSP
X01
97
24
HW
7/26/2010
COMPAL
Reserve a 0 ohm resistor for +5V_TSP
Add R1592
X01
98
45
HW
7/26/2010
COMPAL
Add pull down 100k on BT_ACTIVE
Add R950
X01
X01
99
48
HW
7/27/2010
NV
Follow NV suggestion to modify BOM
De-pop CV184, and change CV183 to 1uF,CV182 to 4.7uF, CV109 to

470pF,CV110 to 4700pF, LV8 to 100nH
100
37
HW
8/23/2010
COMPAL
Add connection for express card SW
Add connection of pin4,pin5,pin13 and pin 14
X01
101
18
HW
8/23/2010
Intel
Follow Intel design guide Rev1.2
Change RH149 to 2.2k and RH150 to 0 ohm
X01
102
46
HW
8/23/2010
COMPAL
De-pop pull up resistors
De-pop RV23,RV24
X01
HW
8/23/2010
DELL
Remove PAID function of RTC and speaker
Change speaker connector to 4 pin and remove RTC_DET# and SPEAKER_DET#
X01
103
14,18,30
104
17
HW
8/26/2010
Intel
Follow Intel check list rev1.2
Add @RH332
X01
105
14,18
HW
8/26/2010
Intel
Follow Intel request
Add RH51 and RH356
X01
106
33
HW
8/27/2010
BRCOM
Follow BRCOM request
Change L39,L40 to rated current is 400mA
X01
107
45
HW
8/27/2010
COMPAL
Follow ME request
Change H17 to 2P2
X01
108
16
HW
8/27/2010
COMPAL
Reserve pull down R for ME_SUS_PWR_ACK
Add @RH145
X01
109
36
HW
9/2/2010
COMPAL
De-pop ESD diode
De-pop U40
X01
110
11
HW
9/2/2010
COMPAL
Change QC5 VGS to 20V part
Change QC5 to SB00000HK0L
X01
111
45
HW
9/3/2010
COMPAL
Follow ME request
Change H11 from 3P8 to 3P7
X01
112
26
HW
9/3/2010
COMPAL
Follow safety request
Pop F2 and de-pop R5
X01
113
46,47,48,49
HW
9/6/2010
COMPAL
Change GPU to N12P FERMI
Change UV1 to N12P FERMI
X01
114
24,26,46
HW
9/8/2010
COMPAL
Change RB751V to HF part
Change D53,D63~D69,DV1~DV4 to SCS00004L0L
X01
Title
5
EE P.I.R (5/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
72
of
75

Item Page#
D
Title
Date
Request
Owner
115
30,31
HW
9/9/2010
IDT
116
35
HW
9/10/2010
O2
117
50,51
HW
9/14/2010
118
30,38,39
HW
9/14/2010
Issue Description
Rev.
To solve pop noise and detect issue
Add U6,Q33,Q46,D70,D71,R425,R33,R38,R424,R161,R352,R1088,C967,C307,C308
X01
To solve RF noise issue
Add @C573,@C574,L45
X01
COMPAL
Change VRAM to 800MHz
Change UV3~UV6 to SA00003VS0L
X01
COMPAL
For EMI request
Change C973~C976 to 680pF and pop, add L91~L94, D72~D74, remove U90~U92
X01
Modify circuit
Remove R661,R662, add L46,L47, change L45 to SM01000GG0T
X01
119
35
HW
9/14/2010
O2
120
17,24
HW
9/15/2010
COMPAL
To support high contrast ratio brightness
Change net name from LVDS_CBL_DET# to LVDS_CBL_ID
X01
121
37,38,39
HW
9/16/2010
COMPAL
change materials
Change L49,L51,L52,L90 to SM070001E0L
X01
add CV89,CV176,CV177,CV178,CV188~CV192,RV30, RV31, change RV81/86 to

160ohm RV59 to 15K, CV80 to 4.7uF, CV40,CV58,CV59,CV60 to
0.1u,CV41,CV42,CV43,CV50,CV51 to 0.022u. CV160~CV162 to 1u, CV181 to
10u CV180 to 22u, pop RV99 and change it to 20K pop RV41 and change to
4.99K, de-pop RV50, pop RV56. Rename from I2CS_SCL/SDA to I2CH_SCL/SDA
X01
122
46,48,50,51
HW
9/20/2010
Nvidia
Vender request
123
48
HW
9/28/2010
Nvidia
Vender request
Change LV3 to SM01000BE0L (220ohm)
X01
124
24
HW
9/28/2010
COMPAL
solve PWM leackage issue.
Change R1137 to 10Kohm
X01
125
46
HW
9/28/2010
COMPAL
solve systen can't boot in UMA only mode.
correct from U14 to UV14 and change the PN to SA00003Y00L. pop RV29,
de-pop RV22
X01
126
14
HW
10/01/2010
COMPAL
DG1.5 update.
add RH31
X01
127
32
HW
10/04/2010
COMPAL
GPIO MAP update.
add U15, C478.
X01
128
45
HW
10/04/2010
COMPAL
LED brightness test result
change R957 to 1K, R955, R941, R949, R939, R934 to 4.7K
X01
129
32
HW
10/07/2010
COMPAL
Solve LAN Package Lost Problem
change L30~L37 from 22NH to 12NH.
X01
130
HW
10/07/2010
COMPAL
DG1.5 update.
depop RC96, RC97
X01
131
30
HW
10/07/2010
COMPAL
change Codec to YA version.
change the PN from SA00003ZZ1L to SA00003ZZ2L
X01
HW
10/11/2010
COMPAL
Follow GPIO Map
Change LVDS_CBL_ID
X02
132
17,24,41
to ATG_MAC_LCD_DET#, remove R771
133
31
HW
10/11/2010
DELL
Remove Latitude On button
Depop SW2
X02
134
28
HW
10/12/2010
DELL
Support SSD
Add PJP64,C399,C402
135
31
HW
10/18/2010
IDT
Change GND reference
Change Mic detect circuit DGND to AGND
136
30
HW
10/19/2010
COMPAL
Change Mic detect to external detect
Remove R161 and add C1164
137
14,18
HW
10/19/2010
COMPAL
Follow Intel debug port DG
Connect PCH_GPIO15 to PCH XDP
X02
X02
X02
X02
Title
5
EE P.I.R (6/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
73
of
75

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
138
42
HW
10/19/2010
COMPAL
Change board ID to X02
Change R875 to 62k
X02
139
30,31
HW
10/21/2010
COMPAL
Modify Mic detect circuit
1. Add PJP65, 2. Change C307,C308 to 0402 size 3. Change C308

connection, 4. Change Mic detect power from +5V_ALW to +5V_RUN,
5. De-pop Q33,Q46,R424, 6. Move C1180 to +VREFOUT_R
X02
140
18
HW
10/22/2010
COMPAL
Follow check list rev1.0
Change RH177 to 10k
141
31
HW
10/26/2010
COMPAL
Cost saving
Change C307,C308 to 0402 package
142
34
HW
10/26/2010
COMPAL
Follow BRCOM request
Pop C1161
143
14~21
HW
10/28/2010
Intel
Change PCH stepping
Change UH4 to B2 stepping
144
30,31
HW
10/28/2010
COMPAL
Use internal Mic detect circuit
De-pop D71,R425,R33,R38,C307,C308,U6, R352,R1088,C967
145
47
HW
11/1/2010
NV
Solve HDMI audio issue
De-pop RV41, change RV97 to 34.8K and stuff it
146
47
HW
11/1/2010
NV
Chagne Device ID to 0x1056
De-pop RV51,change RV57 to 34.8k and stuff
147
47
HW
11/1/2010
NV
Follow NV request
De-pop RV60, change RV54 to 10k and stuff it, change RV52 to 4.99k
148
15
HW
11/5/2010
COMPAL
To fix ME issue
De-pop RH296,RH297, pop QH5,RH302,RH303
149
37
HW
11/16/2010
COMPAL
To fix soldering issue
Change express card connector JEXP1 to TAISOL 5-421005002000-9
150
28
HW
11/17/2010
Intel
Follow Intel CRB design
Change R501,R502 to 10k
151
12,13
HW
11/18/2010
COMPAL
Follow part reference design rule
Change JDIMMA1 & JDIMMB1 to JDIMM1 & JDIMM2
152
46,47,
48,49
HW
11/18/2010
NV
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
X02
Change UV1 to N12P-NS-S-A1
Change GPU to QS sample
X02
B
X02
153
28,44
HW
11/19/2010
COMPAL
For cost saving
De-pop R499,R500,C393,Q28,R905,R907,C762,Q51
154
31
HW
11/22/2010
COMPAL
Follow part reference design rule
Change JMEDIA1 to JMDIA1
155
14
HW
11/22/2010
COMPAL
Change SPI ROM to version C
Change U52 to SA000039A1L, U53 to SA00003FO1L
156
46
HW
12/03/2010
COMPAL
Solve GPU reset timing issue
Add RV33 100Kohms pull up to +3.3V_RUN and de-pop RV22
157
42
HW
12/03/2010
COMPAL
Follow INTEL DG1.5 RSMRST# timing cicuit
158
46
HW
12/07/2010
COMPAL
Solve GPU reset timing issue
de-pop RV33 and pop RV22
159
18
HW
12/07/2010
COMPAL
Audio MIC detect selection
de-pop RH269 and add RH273 1Kohms pull low
160
33
HW
12/17/2010
COMPAL
Follow NXP design guide
Add @C575
X02
X02
X02
Just add RSMRST# circuit for backup. but de-pop
X02
X02
X02
A00
Title
5
EE P.I.R (7/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
74
of
75

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
160
14
HW
12/17/2010
COMPAL
For cost saving
De-pop RH47,RH48,RH49,RH288
A00
161
42
HW
12/20/2010
COMPAL
Change Board ID
Change R875 to 33k
A00
162
42
HW
12/21/2010
COMPAL
To solve backdrive issue
Pop Q45
A00
163
33,34
HW
12/24/2011
COMPAL
Change USH chip to CID7
Change U33 to SA00003AO1L
A00
164
34
HW
1/6/2011
COMPAL
update TPM/TCM pop option table
Correct pop option table
A00
165
ALL
HW
1/11/2011
COMPAL
For cost saving
Change 125pcs 0402 0 ohm resistors and 3pcs 0603 0 ohm footprint to new
footprint which is short pin1 and pin2
A00
Title
5
EE P.I.R (7/7)
Size
Document Number
Date:
Rev
1.0
LA-6592P
Sheet
1
75
of
75

E6420 2f800 - Compal - LA-6592P - r10

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A

GPIO MAP: E3 Master GPIO Map10102010.xlsx

rPGA Sandy Bridge +

TPM EN/ TCM DIS

TPM DIS/ TCM EN

TPM DIS/ TCM DIS

ATG TPM EN/ TCM DIS

ATG TPM DIS/ TCM EN

ATG TPM DIS/ TCM DIS

PCB 0FE LA-6592P REV0 M/B DIS

Block Diagram Compal confidential

Memory BUS (DDR3)

Trough eDP Cable

PCI Express BUS 100MHz

1/2 Mini Card

1/2 Mini Card Full Mini Card

CPU XDP Port

PCH XDP Port

S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s

PCI Express BUS 100MHz

Trough eDP Cable

WiFi ON/OFF &

Compal Electronics, Inc.

DIS Block Diagram

S3 (Suspend to RAM) / M-OFF

JUSB2 (Right side 1)

JUSB3 (Right side 2)

JESA1 (Right Side ESATA)

JESA1 (Ext Left Side )

S4 (Suspend to DISK) / M-OFF

S5 (SOFT OFF) / M-OFF

ODD/ E3 Module Bay

S5 S4/AC don't exist

need to update Power Status and PM Table

MINI CARD-1 WWAN

MINI CARD-2 WLAN

E3 Module Bay (USB3)

1/2vMINI CARD-3 PCIE

DSC DP/HDMI Port

Index and Config.

Compal Electronics, Inc.

SMBUS Address [0x9a]

SMBUS Address [A0]

SMBUS Address [A4]

SMBUS Address [C8]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [0x3B]

SMBUS Address [TBD]

SMBUS Address [0x16]

SMBUS Address [0xa4]

SMBUS Address [TBD]

SMBUS Address [0x12]

SMBUS Address [0xd2]

Compal Electronics, Inc.

SMBUS Address [0xXX]

Thursday, January 13, 2011

(1) EDP_COMPIO use 4mil trace to RC1

PCI EXPRESS* - GRAPHICS

eDP_COMPIO and ICOMPO signals should be shorted near

PEG_ICOMPI and RCOMPO signals should be shorted and routed

Sandy Bridge (1/6)

Thursday, January 13, 2011