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  • Q. Generate PWM Signal at 10Khz, 20% Duty Cycle, 8Mhz Crystal

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    Alamaskhan Pathan
    12 views3 pages
    The document provides code to generate a 10kHz PWM signal with a 20% duty cycle using a 8MHz crystal oscillator. It configures the CCP1 and Timer2 modules to output the PWM signal, setting the period register PR2 to 199 and duty cycle register CCPR1H to 20. The code then enables the CCP1 and Timer2 interrupts and turns on Timer2 to start generating the PWM signal in an infinite loop.

    Original Description:

    pwm program in c

    Original Title

    pwm-10khz

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    The document provides code to generate a 10kHz PWM signal with a 20% duty cycle using a 8MHz crystal oscillator. It configures the CCP1 and Timer2 modules to output the PWM signal, setting the period register PR2 to 199 and duty cycle register CCPR1H to 20. The code then enables the CCP1 and Timer2 interrupts and turns on Timer2 to start generating the PWM signal in an infinite loop.

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    © All Rights Reserved
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    12 views3 pages

    Q. Generate PWM Signal at 10Khz, 20% Duty Cycle, 8Mhz Crystal

    Uploaded by

    Alamaskhan Pathan
    The document provides code to generate a 10kHz PWM signal with a 20% duty cycle using a 8MHz crystal oscillator. It configures the CCP1 and Timer2 modules to output the PWM signal, setting the period register PR2 to 199 and duty cycle register CCPR1H to 20. The code then enables the CCP1 and Timer2 interrupts and turns on Timer2 to start generating the PWM signal in an infinite loop.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
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    of 3

    Q.

    generate pwm signal at 10khz, 20% duty cycle,


    8MHz crystal

    ORG.

    00H

    GOTO

    MAIN

    ORG. 04H
    GOTO

    main

    MAIN:
    BANKSEL
    CLRF
    digital i/o

    ANSEL
    ANSEL

    CLRF

    ANSELH

    BANKSEL

    CCP1CON

    //configure all ports

    MOVLW 04H
    MOVWF CCP1CON

    //configure ccp1con

    BANKSEL

    PR2

    MOVLW C7H
    MOVWF PR2

    //PR2=C7H

    BANKSEL CCPR1H
    MOVLW 0AH
    MOVWF CCPR1H

    BANKSEL

    //CCPR1H=0AH

    T2CON

    MOVLW 00H
    MOVWF T2CON

    //T2CON=00H

    //NOW ENABLE INTERRUPTS OF MODULE

    BANKSEL
    BSF

    PIE1

    PIE1,CCP1IE

    BSF
    PIE1,TMR2IE
    INTERRUPT

    //CCP1IE ENABLE
    //ENABLE TMR2

    BANKSEL

    PIR1

    BCF

    PIR1,CCPIF

    //CLEAR CCP1IF

    BCF

    PIR1,TMR2IF

    //CLEAR TMR2 FLAG

    BSF
    INTCON,PEIE
    INTERRUPT
    BSF

    INTCON,GIE //ENABLE

    BANKSEL
    BSF

    GIE

    T2CON

    T2CON,TMR2ON

    MLOOP: GOTO
    END

    //ENABLE PERIPHERAL

    MLOOP

    //TIMER2 ON

    //INF. LOOP

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