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Department of Electronics and Instrumentation Technology, University of Kashmir, Srinagar 190006, India
*Corresponding Author E-mail: farooqsnn20@yahoo.co.in
to-one onto property improves controllability as well as the
observability of the circuit.
I. INTRODUCTION
The emerging technologies pertaining to circuit design lay
great emphasis on small size, high device density, and low
power dissipation to achieve objective of portability of
systems [1]. Among up-and-coming technologies, Quantumdot Cellular Automata (QCA) [2,3] promises aforementioned
features. The implementation of circuits using QCA is based
on Coulombic interactions. In QCA, inverter (INV) and
majority voter (MV) gates as well as other devices such as
binary wire and INV chain have been proposed as primitives
for the combinational circuit design [5]. It has been shown in
[6, 7] that for QCA, the functions with at most three input
variables (such as MV) forms the basis for efficient
combinational design. As a combined methodology for
computation and communication [8, 9, 10], different designs
of logic circuits have been proposed for implementation in
QCA [8, 11-17].
(a)
(b)
(c)
Fig. 1 Block diagram representation of two, three and four input
reversible
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TABLE I
INPUT OUTPUT RELATION OF REVERSIBLE GATES
S. No.
Gate
Input
Vector
Output
Vector
Output
2*2 Feynman
Gate [25]
3*3 Double
Feynman Gate
[26].
3*3 Toffoli Gate
[23]
I A, B
O P, Q
A B
I A, B, C
O P , Q , R
A B
AC
I A, B, C
O P , Q , R
AB C
4.
3*3 Fredkin
Gate [24]
I A, B, C
O P , Q , R
AB AC
AC AB
5.
I A, B, C
O P , Q, R
AB C
AC B
6.
I A, B, C
O P , Q , R
A B
7.
I A, B, C
O P , Q , R
A B
8.
4 * 4 BVF
Gate[29]
I A, B, C , D
O P , Q, R , S
9.
I A, B, C , D
10.
4*4 HNFG
Gate[31]
11.
1.
2.
3.
R=ABC
AB C
BC AC
BC AC
A B
CD
O P , Q, R , S
A BC
A B C AB D
I A, B, C , D
O P , Q, R , S
AC
BD
4*4 SCL
Gate[32]
I A, B, C , D
O P , Q, R , S
A B C D
12.
4*4 TSG
Gate[30]
I A, B, C , D
O P , Q, R , S
AC B
AC B D
AC B D AB C
13.
4*4 MTSG
Gate[33]
I A, B, C , D
O P , Q, R , S
A B
A BC
A B C AB D
14.
Multifunction
Reversible
(BVMF)
Gate[34]
I A, B, C , D
O P , Q, R , S
A B C
A B
AB D
AB D
Fig. 2 QCA cells showing how binary information is encoded in the two fully
polarized diagonals of the cell
(a)
(b)
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(c)
(d)
(b)
Fig. 3 QCA implementation of (a) Majority Voter (b) Inverter (c) Binary wire
and (d) XOR gate
(a)
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a) Universal Gate
i) AND and OR
Value
S. No.
Parameters
1.
69
2.
3.
0.119556 (m)2
4.
1/4.22
5.
b) Fan-out
i) Fan-out
ii) Fan-out and Complement
c) Comparator
The above functions can be obtained from the multifunction reversible gate by adjusting the inputs to different
logic levels as given in Table III. The QCA designs of these
functions are shown in Fig. 7. The simulation results of the
design, acquired by the QCADesigner bistable vector
simulation engine, are given in Fig. 8.
Gate
1.
AND and OR
2.
OR and NAND
3.
4.
5.
Fan-out
6.
Fan-out and
Complement
7.
Comparator
Input
Vector
I A, B,0,0
I A, B,0,1
I A, B,1,0
I A, B,1,1
I 0,0, C , D
I 0,1, C , D
I 1,0, C , D
I 1,1, C , D
I A, B,1,0
Output
Output
Vector
O P , Q, R , S
A B
AB
AB
AB
O P , Q, R , S
A B
A B
A B
AB
O P , Q, R , S
AB
AB
AB
AB
O P , Q, R , S
A B
A B
A B
AB
O P , Q, R , S
C
C
D
D
D
D
D
D
D
D
D
A B 0
A B
A B
A B 1
O P , Q, R , S
O P , Q, R , S
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(c)
(b)
(d)
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(g)
(e)
(f)
(h)
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(i)
Fig. 7 QCA implementation of logic functions obtained from multi-function reversible gate, (a) AND and OR, (b) OR and NAND, (c) AND and NOR (d) NOR
and NAND (e) Fan-out (f) Fan-out and Complement 1, (g) Fan-out and Complement 2, (h) Fan-out and Complement 3 and (i) Comparator
(a)
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(b)
(c)
(d)
C 2011-2012 World Academic Publishing
CISME Vol. 2 Iss. 4 2012 PP. 8-18 www.jcisme.org
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(e)
(f)
(g)
C 2011-2012 World Academic Publishing
CISME Vol. 2 Iss. 4 2012 PP. 8-18 www.jcisme.org
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(h)
(i)
Fig. 8 Simulation Results of logic functions obtained from multi-function reversible gate, (a) AND and OR, (b) OR and NAND, (c) AND and NOR (d) NOR and
NAND (e) Fan-out (f) Fan-out and Complement 1, (g) Fan-out and Complement 2, (h) Fan-out and Complement 3 and (i) Comparator
V. CONCLUSION
In this paper, multi-function reversible gate was
implemented using QCA. The gate is very useful for the future
computing techniques like ultra low power digital circuits and
quantum computers. The use of gate in the design and
development of combinational and sequential circuits would
prove to be beneficial in respect of power saving, reduction of
garbage outputs and less amount of delay. Besides, being
reversible will enjoy low energy dissipation, simple testability
and increased fault detection features. Further, the multifunction feature of the gate has also been demonstrated in this
paper.
REFERENCES
[1]
[2]
[3]
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