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Designing RC Snubbers: Rev. 1 - 25 April 2012 Application Note
Designing RC Snubbers: Rev. 1 - 25 April 2012 Application Note
Designing RC snubbers
Rev. 1 25 April 2012
Application note
Document information
Info
Content
Keywords
Abstract
AN11160
NXP Semiconductors
Designing RC snubbers
Revision history
Rev
Date
Description
v.1
20120425
initial version
Contact information
For more information, please visit: http://www.nxp.com
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AN11160
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Designing RC snubbers
1. Introduction
This document describes the design of a simple RC snubber circuit. The snubber is used
to suppress high-frequency oscillations associated with reverse recovery effects in power
semiconductor applications
2. Test circuit
The basic circuit is a half-bridge and shown in Figure 1.
VDD
Q1
HS driver
inductor
VCC
LS driver
Q2
0V
aaa-002741
Fig 1.
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Designing RC snubbers
Q2 VDS
(5V/div)
oscillation
frequency
31.25 MHz
aaa-002742
Fig 2.
stray
inductance (LLK)
Q1
Coss
(CLK)
Q2
VDD
Q2
VDS
aaa-002743
Fig 3.
Equivalent circuit
LLK is the total stray or leakage inductance comprised of PCB trace inductance,
device package inductance, etc.
The parasitic capacitance CLK is mainly due to Coss of the upper (Q1) device.
Q2 is treated as a simple switch. The oscillation can be eliminated (snubbed) by placing
an RC circuit across Q1 drain-source; see Figure 4
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Designing RC snubbers
stray
inductance (LLK)
Q1
Coss
(CLK)
Q2
RS
VDD
CS
Q2
VDS
aaa-002744
Fig 4.
(1)
where fRING0 is the frequency of oscillation without a snubber in place; see Figure 2. If we
add an extra additional capacitor across Q1 (Cadd), the initial oscillation frequency from
fRING0 to fRING1 (fRING1 < fRING0) will change. It can be shown that (see Section 7 Appendix
A; determining CLK from Cadd, fRING0 and fRING1):
C add
C LK = ------------2
x 1
(2)
where:
f RING0
x = --------------f RING1
(3)
So if we measure fRING0 (without Cadd), then add a known Cadd and measure fRING1, we
can determine CLK and LLK (two equations, two unknowns).
Cadd = 3200 pF was added in circuit, and fRING1 found to be 22.2 MHz (fRING0 previously
found to be 31.25 MHz; see Figure 2).
from Equation 3:
31.25
x = ------------- = 1.41
22.2
(4)
Application note
(5)
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Designing RC snubbers
Rearranging Equation 1:
1
L LK = ---------------------------------------2
( 2f RING0 ) C LK
(6)
(7)
and with fRING1 = 22.2 MHz and (CLK + Cadd) = 3239 pF + 3200 pF = 6439 pF:
9
1
L LK = --------------------------------------------------------------------------------------- = 7.98 10 H = 8.0nH
7 2
9
( 2 2.22 10 ) 6.439 10
(8)
In other words, the calculated value of LLK remains almost unchanged when we add the
additional 3200 pF capacitance. This is a good sanity check of the method for determining
CLK and LLK.
aaa-002745
2.0
(1)
(2)
(3)
(4)
1.5
1.0
(5)
(6)
(7)
0.5
()
(1) = 0.
(2) = 0.1.
(3) = 0.2.
(4) = 0.4.
(5) = 0.7.
(6) = 1.
(7) = 2.
Fig 5.
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(9)
(10)
Again, we must choose which value of fC to be used, and there is no single correct answer
to this question. The cut-off frequency of the snubber must be low enough to effectively
short-circuit the undamped oscillation frequency fRING0, but not so low as to present a
significant conduction path at the operating frequency of the circuit (for example 100 kHz
or whatever). A good starting point has been found to be fC = fRING0.
(11)
1
F C = ------------------= f RING0
2R S C S
(12)
The first task is to choose a value of damping (Figure 5). We have chosen = 1, that is,
critical damping. Rearranging Equation 11 we have:
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L LK
1
1
8.0 10 9
R S = ------ --------- = --- ------------------------------ = 0.78
2 C
2 3.239 10 9
LK
(13)
(14)
aaa-002746
a. Without snubber
aaa-002747
b. With snubber
Fig 6.
As seen in Figure 6, the snubber has almost eliminated the ringing in the VDS waveform.
This technique could also be applied to the MOSFET in the Q2 position.
6. Summary
Reverse recovery effects in power devices can induce high frequency oscillations in
devices connected to them.
The snubbed circuit has been shown to be a variation on the classic RLC circuit.
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(15)
where fRING0 is the frequency of oscillation without a snubber in place and LLK and CLK are
the parasitic inductances and capacitances respectively.
If we add capacitor Cadd across Q1 drain-source, fRING0 is reduced by an amount x
where:
f RING0
1
---------------- = -------------------------------------------------x
2 L ( C
LK
LK + C add )
(16)
therefore
1
x
--------------------------- = -------------------------------------------------2 L C
2 L ( C
LK LK
LK
LK + C add )
(17)
1
x
------------------------ = ---------------------------------------------L LK C LK
L LK ( C LK + C add )
(18)
L LK ( C LK + C add )
L LK C LK = ---------------------------------------------x
(19)
C LK + C add
C LK = --------------------------2
X
(20)
C LK x 2 C LK = C add
(21)
C LK ( x 2 1 ) = C add
(22)
C add
C LK = ------------x2 1
(23)
where:
f RING0
x = --------------f RING1
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8. Legal information
8.1
Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
8.2
Disclaimers
AN11160
Application note
8.3
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
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9. Contents
1
2
3
4
5
6
7
8
8.1
8.2
8.3
9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Determining CLK and LLK. . . . . . . . . . . . . . . . . . 5
Designing the snubber - theory . . . . . . . . . . . . 6
Designing the snubber - in practice. . . . . . . . . 7
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Appendix A; determining CLK from Cadd,
fRING0 and fRING1 . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.