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17 MOSFET Amplifiers & Eq Circuit
17 MOSFET Amplifiers & Eq Circuit
IS
I1
VG = 4 V
RL
3V
ID, mA
10V
6
5
VG = 3 V
4
3
VG = 2 V
VG = 1 V
1
0
0
10
VD, V
3
In MOSFET amplifiers, the operating point is normally in the saturation region
Saturation current, mA
9
8
VG = 4 V
ID, mA
6
5
VG = 3 V
4
3
2
VG = 2 V
VG = 1 V
0
0
10
10
9
8
7
6
5
4
3
2
1
0
-1
VD > 7 V
VD, V
2
VG, V
Cgd
Cgs
rs
rd
gmVgs
IS
I1
Gate to drain
capacitance
Cgd
rd Drain series
Cgs
Gate to source
capacitance
Input
signal
S
resistance
gmVgs
gds
rs Source series
resistance
Slope of ID vs Vds
Output
signal
5
Cgd
rd
Cgs
gds
gmVgs
rs
S
Simplified equivalent circuit diagram
Cgd
+
+
vi
v gs
g
C
gs
ds
vo
Assuming
rd, rs=0
gm v gs
MOSFET Gain
voltage gain
Cgd
Id
I(Cgd)
+
+
+
vi
v gs
g
C
gs
ds
vo
gm v gs
gm
v01 =
vgs
g ds + jCgd
7
MOSFET Gain
2) Now, turn off the current gmvgs
voltage gain
Cgd
+
+
vi
v gs
g
C
gs
ds
vo
vi rdsjCgd/(jCgdrds + 1) =
vi jCgd/(jCgd + 1/rds) =
gm v gs
vi jCgd/(jCgd + gds);
v02 =
jCgd
g ds + jCgd
vgs
gm
v01 =
vgs
g ds + jCgd
v0 =
g m + jCgd
g ds + jCgd
vgs
8
MOSFET Gain
voltage gain
Cgd
+
+
vi
v gs
ds
C
gs
vo
gm v gs
v0 g m + jCgd
Av =
=
vgs
g ds + jCgd
The gate - drain capacitance is very low
in the saturation region. Hence,
v0
gm
Av =
vgs g ds + jCgd
At frequencies f > fv
gm
Av
jCgd
fv
Cgd g ds ;
g ds
2 Cgd
MOSFET Gain
Cgd
+
+
vi
v gs
vo
ds
C
gs
gm v gs
Cgd
+
vi
+
v gs
gm v gs
Cgs
iL
iL
gm
Ai =
=
ii
j Cgs + Cgd
)
10
iL
gm
Ai =
=
ii
j Cgs + Cgd
fT =
gm
2 C gs + Cgd
fT estimation
Assume that Cgs + Cgd ~ Ci where Ci = iWL/di is the gate oxide capacitance.
Transconductance, gm
Consider short-gate MOSFETs at high drain voltage.
In short-gate devices, the electron velocity is saturated: Id = q nsvsW
The transconductance: gm = dId/dVg
I d
ns
gm =
=q
vsW
Vg
Vg
11
ci
Ci
ns = (VGS VT ) =
(VGS VT )
q
qWL
where W is the MOSFET width and L is the gate length
From this,
Ci
I d
ns
gm =
vsW = q
=q
vsW
Vg
Vg
qWL
Ci vs
gm =
L
The cutoff frequency becomes:
fT =
gm
Ci vs
v
=
= s
2 ( Cgs + Cgd ) 2 LCi 2 L
12
gm
Ci vs
vs
fT =
=
=
2 ( Cgs + Cgd ) 2 LCi 2 L
Note that, L/vs = ttr , the electron transit time under the gate
Using this,
fT = 1/ 2ttr
Practical cut-off frequency must also include the parasitic and fringing
capacitances, Cp, which add to the gate capacitance:
fT =
gm
2 C gs + Cgd + C p
13
fmax
fT
r + fT
where
R
d
C gd
+
Gate
v
gs
g
C
Drain
ds
gs
gm v gs
R
i
s
Source
r = gds (Rs + Ri + Rd )
f max
= 2 RgCgd.
fT
fT
=
2 Rg Cgd
f T
14