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Hspice Quick Ref
Hspice Quick Ref
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Behavior Macromodeling
Controlling Input
18
Analyzing Data
41
Optimizing Data
56
Output Format
59
Introduction
This Quick Reference Guide is a condensed version of
the HSPICE Simulation and Analysis User Guide,
HSPICE Applications Manual, and HSPICE Command
Reference. For more specific details and examples refer
to the relevant manual.
Syntax Notation
xxx, yyy, zzz
UPPERCASE
lowercase
...
Common Abbreviations
Angstrom
amp
ampere
cm
centimeter
deg
ev
electron volt
farad
Henry
meter
second
volt
Introduction
/usr/george/mydesign.sp
/usr/george/
mydesign
mydesign
tr0
The suffix.
.sp
design
configuration
.cfg
Output
graph data
* or $
.OPTION
<.TRAN> <.AC>
<.DC> <.OP>
.TEMPERATURE
PRINT/PLOT/
GRAPH/PROBE
.IC or .NODESET
SOURCES
NETLIST
Circuit description.
.MACRO libraries
<.PROTECT>
<.UNPROTECT>
.ALTER
.PARAMETER
Defines a parameter.
.END
=1e-18
=1e-15
=1e-12
=1e-9
=1e-6
=1e-3
=1e3
MEG (or X)
=1e6
MI
=25.4e6
=1e9
Algebraic Expressions
In addition to simple arithmetic operations (+, -, *, /), the
following quoted string functions may be used:
sin(x)
sinh(x)
abs(x)
cos(x)
cosh(x)
min(x,y)
tan(x)
tanh(x)
max(x,y)
atan(x)
sqrt(x)
exp(x)
db(x)
log(x)
log10(x)
pwr(x,y)
pow(x,y)= (instead of
x**y
x**y)
algebraic expression
Equation Constants
o
ox
3.453143e-11 F/m
si
Frequency
t - tnom
tnom
vt(t)
vt(tnom)
Behavior Macromodeling
HSPICE performs the following types of behavioral
modeling.
Subcircuit/Macros
.SUBCKT or .MACRO Statement
General Form
Or
n1
parnam
subnam
.ENDS <SUBNAM>
Or
.EOM <SUBNAM>
Subcircuit Calls
General
Form
Multiplier
n1
parnam
subnam
Xyyy
Behavior Macromodeling
E Elements
Voltage Controlled Voltage SourceVCVS
Linear
General Form
Polynomial
General Form
Piecewise Linear
General Form
Multi-Input Gates
General Form
Behavior Macromodeling
Delay Element
General Form
Exxx n+ n- VOL=equation
+ <MAX=val> <MIN=val>
E Element Parameters
Parameter Description
ABS
DELAY
DELTA
Exxx
gain
Voltage gain.
gatetype(k)
IC
Initial condition.
in +/-
MAX
Behavior Macromodeling
Parameter Description
MIN
n+/-
NDIM
NPDELAY
OPAMP
P0, P1
Polynomial coefficients.
POLY
Polynomial keyword.
PWL
SCALE
TC1, TC2
TD
TRANSFOR
MER
VCVS
x1,
y1,
F Elements
Current Controlled Current SourcesCCCS
Linear
General Form
Polynomial
General Form
Behavior Macromodeling
Piecewise Linear
General Form
Multi-Input Gates
General Form
Delay Element
General Form
F Element Parameters
Parameter Heading
10
ABS
CCCS
DELAY
DELTA
Fxxx
gain
Current gain.
gatetype(k)
IC
MAX
MIN
n+/-
Behavior Macromodeling
Parameter Heading
NDIM
NPDELAY
P0, P1
Polynomial coefficients.
POLY
Polynomial keyword.
PWL
SCALE
TC1, TC2
TD
vn1
x1,
y1,
G Elements
Voltage Controlled Current SourceVCCS
Linear
General
Form
Polynomial
General
Form
Behavior Macromodeling
11
Piecewise Linear
General
Form
Or
Or
Multi-Input Gates
General
Form
Delay Element
General
Form
Gxxx n+ n- CUR=equation
+<MAX>=val> <MIN=val> <M=val>
+<SCALE=val>
12
Behavior Macromodeling
Polynomial
General
Form
Piecewise Linear
General
Form
Or
Or
Multi-Input Gates
General
Form
Behavior Macromodeling
13
G Element Parameters
Parameter Description
14
ABS
CUR=
equation
DELAY
DELTA
Gxxx
gatetype(k)
IC
Initial condition.
in +/-
MAX
MIN
n+/-
NDIM
NPDELAY
NPWL
p0, p1
Polynomial coefficients.
POLY
Polynomial keyword.
PWL
PPWL
SCALE
SMOOTH
Behavior Macromodeling
Parameter Description
TC1,TC2
TD
VCCAP
VCCS
VCR
x1, ...
y1, ...
H Elements
Current Controlled Voltage SourceCCVS
Linear
General
Form
Polynomial
General
Form
Piecewise Linear
General
Form
Behavior Macromodeling
15
Multi-Input Gates
General
Form
Hxxx n+ n- gatetype(k)
+ vn1, ... vnk <DELTA=val>
+ <SCALE=val> <TC1=val>
+ <TC2=val> x1,y1 ...
+ x100,y100 <IC=val>
Delay Element
General
Form
H Element Parameters
Parameter Description
16
ABS
CCVS
DELAY
DELTA
gatetype(k)
Hxxx
IC
Initial condition.
MAX
MIN
n+/-
NDIM
NPDELAY
P0, P1
Polynomial coefficients.
POLY
Polynomial dimension.
PWL
SCALE
TC1, TC2
TD
transresistance
Behavior Macromodeling
Parameter Description
vn1
x1,
y1,
Or
COMP=1
in+
Noninverting input
in-
Inverting input
modelname
out
vcc
Positive supply
vee
Negative supply
AMP
mname
parameter
value
Behavior Macromodeling
17
Controlling Input
For complete definitions, see the HSPICE Simulation and
Analysis User Guide, Specifying Simulation Input and
Controls.
.OPTION Statement
General
Form
opt1
Description
ACCT
ACOUT
ALT999,
ALT9999
ALTCHK
BEEP
18
BINPRINT
BRIEF, NXX
CO = x
INGOLD = x
LENNAM = x
Controlling Input
Option
Description
LIST, VERIFY
MEASDGT = x
NODE
NOELCK
Bypasses element checking, to reduce preprocessing time for very large files.
NOMOD
NOPAGE
NOTOP
NUMDGT = x
NXX
OPTLST = x
No information (default).
OPTS
PATHNUM
PLIM = x
POSTTOP=n
POST_VERSION
=x
STATFL
SEARCH
Controlling Input
19
Option
Description
VERIFY
Description
EBDMAP
EBDTYPE
PKGMAP:
PKGTYPE
CPU Options
Option
Description
CPTIME = x
EPSMIN = x
EXPMAX = x
LIMTIM = x
20
Controlling Input
Interface Options
Option
Description
ARTIST = x
CDS, SDA
CSDF
DLENCSDF
MEASOUT
MENTOR = x
MONTECON
POST = x
PROBE
PSF = x
SDA
ZUKEN = x
Controlling Input
21
Analysis Options
Option
Description
ASPEC
FFTOUT
LIMPTS = x
PARHIER
SPICE
SEED
Error Options
Option
Description
BADCHR
DIAGNOSTIC
NOWARN
Version Options
Option
Description
H9007
22
Controlling Input
General Options
Option
Description
DCAP
SCALE
TNOM
MODMONTE
Description
CVTOL
DEFAD
DEFAS
DEFL
DEFPS
DEFW
SCALM
Controlling Input
23
Option
Description
WL
Inductor Options
You can use the following inductor options in HSPICE:
GENK
KLIM
24
Option
Description
ABSH = x
ABSI = x
ABSMOS = x
ABSTOL = x
ABSVDC = x
DI = x
KCLTEST
MAXAMP = x
Sets the maximum current, through voltagedefined branches (voltage sources and
inductors).
Controlling Input
Option
Description
RELH = x
RELI = x
RELMOS = x
Sets error tolerance (percent) for drain-tosource current, from iteration to iteration.
Determines convergence for currents in
MOSFET devices.
RELV = x
RELVDC = x
Matrix Options
ITL1 = x
ITL2 = x
NOPIV
PIVOT = x
PIVREF
Pivot reference.
PIVREL = x
PIVTOL = x
SPARSE = x
Same as PIVOT.
DCCAP
VFLOOR = x
Convergence Options
CONVERGE
Controlling Input
25
CSHDC
DCFOR = x
DCHOLD = x
DCON = X
DCSTEP = x
DCTRAN
DV = x
GMAX = x
GMINDC = x
GRAMP = x
GSHUNT
ICSWEEP
ITLPTRAN
NEWTOL
OFF
RESMIN = x
26
Option
Description
CSCAL
Controlling Input
Option
Description
FMAX
FSCAL
GSCAL
LSCAL
PZABS
PZTOL
RITOL
(X0R,X0I),
(X1R,X1I),
(X2R,X2I)
Description
ABSH = x
ABSV = x
ACCURATE
ACOUT
CHGTOL = x
CSHUNT
DI = x
GMIN = x
GSHUNT
Controlling Input
27
Option
Description
MAXAMP = x
RELH = x
RELI = x
RELQ = x
RELTOL,
RELV
RISETIME
TRTOL = x
VNTOL = x,
ABSV
Speed Options
AUTOSTOP
BKPSIZ = x
BYPASS
BYTOL = x
FAST
ITLPZ
MBYPASS = x
28
Controlling Input
TRCON
Timestep Options
ABSVAR = x
DELMAX = x
DVDT
FS = x
FT = x
ITL5 = x
RELVAR = x
RMAX = x
Controlling Input
29
RMIN = x
SLOPETOL = x
TIMERES = x
Algorithm Options
DVTR
IMAX = x,
ITL4 = x
MAXORD = x
METHOD =
name
PURETP
MU = x
TRCON
30
Controlling Input
ITRPRT
MEASFAIL
MEASSORT
PUTMEAS
UNWRAP
Statements
HSPICE supports the following statements.
.ALTER Statement
General
Form
.ALTER <title_string>
Comments
General
Form
Or
.ALIAS Statement
You can alias one model name to another:
.alias pa1 par1
Controlling Input
31
.CONNECT Statement
Connects two nodes in your HSPICE netlist, so that
simulation evaluates the two nodes as only one node.
Both nodes must be at the same level in the circuit
design that you are simulating: you cannot connect
nodes that belong to different subcircuits.
Syntax
.connect node1 node2
where:
node1
node2
.DATA Statement
See .DATA in the HSPICE Command Reference.
Inline .DATA Statement
General Form
32
Controlling Input
.DATA datanm
+ MER FILE = filename1
+ pname1=colnum
+ <panme2=colnum >
+ <FILE = filename2
+ pname1 = colnum
+ <pname2 = colnum >>
+ <OUT = fileout>
.ENDDATA
.DATA datanm
+ LAM FILE=filename1
+ pname1=colnum
+ <panme2=colnum >
+ <FILE=filename2
+ pname1=colnum
+ <pname2=colnum >>
+ <OUT = fileout>
.ENDDATA
datanm
LAM
filenamei
MER
pnami
colnum
fileout
pvali
Controlling Input
33
entryname
filename
filepath
libnumber
Element Statements
General Form
Or
Or
expression
34
Controlling Input
elname
M = val
Element multiplier.
mname
node1
pname1
val1
.END Statement
General Form
.END <comment>
comment
.GLOBAL Statement
General Form
Or
.DCVOLT V(node1)=val 1
+ V(node2)=val 2
Controlling Input
35
.IF-.ELSEIF-.ELSE-.ENDIF Statements
You can use this if-else structure to change the circuit
topology, expand the circuit, set parameter values for
each device instance, or select different model cards in
each if-else block.
.if (condition1)
<statement_block1>
{ .elseif (condition2)
<statement_block2>
}
[ .else (condition3)
<statement_block3>
]
.endif
.INCLUDE Statement
General Form
entryname
filename
filepath
Path to a file.
.LIN Statement
General Form
sparcalc
modelname
filename
format
noisecalc
36
Controlling Input
gdcalc
.LIB entryname1
.
. $ ANY VALID SET OF HSPICE
+ STATEMENTS
.
.ENDL entryname1
.LIB entryname2
.
. $ ANY VALID SET OF HSPICE
+ STATEMENTS
.
.ENDL entryname2
.LIB entryname3
.
. $ ANY VALID SET OF HSPICE
+ STATEMENTS
.
.ENDL entryname3
.MALIAS Statement
You can use the .MALIAS statement to assign an alias
(another name) to a diode, BJT, JFET, or MOSFET model
that you defined in a .MODEL statement. You can also
use the .MALIAS statement to assign an alias to a
subcircuit defined in a .SUBCKT statement. See
.MALIAS Statement in the HSPICE Command
Reference.
The syntax of the .MALIAS statement is:
.MALIAS model_name=alias_name1 <alias_name2 . . .>
Controlling Input
37
.MODEL Statement
General Form
VERSION
mname
pname1
Parameter name.
type
.NODESET Statement
General
Form
Or
node1
val1
Specifies voltage.
38
Controlling Input
.PARAM Statement
General
Form
.PARAM
<ParamName>=<RealNumber>
OPTIMIZE=opt_pav_fun
Or (element
or model
keyname)
.PARAM
<ParamName>=<OptParamFunc>
(<Init>, <LoLim>, <Hi Lim>, <Inc>)
paramname
1
LoLim
HiLim
Inc
Controlling Input
39
.PROTECT Statement
General
Form
.PROTECT
.TITLE Statement
General Form
Or
Title
.UNPROTECT Statement
General Form
.UNPROTECT
.WIDTH Statement
General Form
.WIDTH OUT={80|132}
OUT
40
Controlling Input
Analyzing Data
You can perform several types of analysis with HSPICE.
DC Analysis
HSPICE can perform the following types of DC analysis.
Or
Data-Driven Sweep
General Form
Or
Or
Monte Carlo
General Form
Or
Optimization
General Form
Or
Analyzing Data
41
42
DC analysis
statement
DATA=datanm
incr1
MODEL
MONTE=val
np
OPTIMIZE
RESULTS
start1
stop1
SWEEP
TEMP
type
var1
Analyzing Data
format
time
interpolation
.PZ ov srcnam
ov
srcnam
ov1 ov2
.TF ov srcnam
ov
srcnam
Analyzing Data
43
AC Analysis
.AC Statement
Single/Double Sweep
General Form
Or
Or
Or
Or
44
General Form
Or
Or
Or
Or
Or
Analyzing Data
Optimization
General Form
AC analysis
statement
Random/Monte Carlo
General Form
DATA=datanm
fstart
fstop
Final frequency.
incr
MONTE = val
np
start
stop
SWEEP
TEMP
type
Analyzing Data
45
var
inter
refpwr
Rload
skw2
spwf
inter
ovv
srcnam
46
General Form
BETA
FS = freq
Analyzing Data
MAXFLD
NUMF
TOL
Or
Two-port network
General Form
input
output
RIN
ROUT
Analyzing Data
47
ij
YIN
Input admittance.
YOUT
Output admittance.
ZIN
Input impedance.
ZOUT
Output impedance.
Temperature Analysis
.TEMP Statement
General Form
t1 t2
Transient Analysis
.TRAN Statement
See .TRAN in the HSPICE Command Reference.
Single-Point Analysis
.TRAN tincr1 tstop1 <tincr2
tstop2 ...tincrN tstopN>
+ <START = val> <UIC>
48
Analyzing Data
Double-Point Analysis
.TRAN tincr1 tstop1 <tincr2
tstop2 ...tincrN tstopN>
+ <START = val> <UIC>
+ <SWEEP var type np pstart pstop>
or
.TRAN tincr1 tstop1 <tincr2
tstop2 ...tincrN tstopN>
+ <START = val> <UIC> <SWEEP var
+ START="param_expr1" STOP="param_expr2"
+ STEP="param_expr3">
or
.TRAN tincr1 tstop1 <tincr2 tstop2 ...
tincrN tstopN>
+ <START=val> <UIC> <SWEEP var start_expr
+ stop_expr step_expr>
Data-Driven Sweep
General Form
(data-driven
sweep)
Or
Or
Or
Or
Or
Analyzing Data
49
Optimization
50
General Form
TRAN analysis
statement
DATA = datanm
MONTE = val
np
param_expr...
User-specified expressions.
pincr
pstart
pstop
START
SWEEP
tincr1
tstop1
type
UIC
var
Analyzing Data
.BIASCHK Statement
General
Form
type
terminal 1,
terminal2
limit
noise
name
mname
.option biasfile=biaschk/mos.bias
.option biawarn=1
.option biawarn=0
Analyzing Data
51
.OPTION METHOD=GEAR
Backward-Euler
General Form
.OPTION METHOD=GEAR MU = 0
Trapezoidal Algorithm
General Form
.OPTION METHOD=TRAP
FFT Analysis
.FFT Statement
General Form
ALFA
FMAX
FMIN
FORMAT
Output format.
NORM= normalized magnitude
UNORM=unnormalized magnitude
52
FREQ
Frequency to analyze.
FROM
NP
Analyzing Data
output_var
START
STOP
TO
WINDOW
Sigma Deviations
Type
Param
Slow
Fast
NMOS
XL
RSH
DELVTO
PMOS
TOX
XW
XL
RSH
DELVTO
TOX
XW
Analyzing Data
53
.DC MONTE=val
DC Sweep
General Form
AC Sweep
General Form
TRAN Sweep
General Form
54
General Form
.PARAM xx=UNIF(nominal_val,
+ rel_variation <, multiplier>)
Or
.PARAM xx=AUNIF(nominal_val,
+ abs_variation <,multiplier>)
Or
.PARAM xx=GAUSS(nominal_val,
+ rel_variation, sigma <,multiplier>)
Or
.PARAM xx=AGAUSS(nominal_val,
+ abs_variation, sigma <,multiplier>)
Or
.PARAM xx=LIMIT(nominal_val,
+ abs_variation)
abs_variation
AGAUSS
AUNIF
GAUSS
LIMIT
Analyzing Data
multiplier
nominal_val
rel_variation
sigma
UNIF
xx
1-
Analyzing Data
55
Optimizing Data
This chapter briefly describes how to optimize your
design data.
DATA
MODEL
OPTIMIZE
Or
Or
RESULTS
56
General Form
.PARAM parameter=OPTxxx
+ (initial_guess, low_limit, upper_limit)
Or
.PARAM parameter=OPTxxx
+ (initial_guess, low_limit, upper_limit,
+ delta)
delta
Optimizing Data
OPTxxx
parameter
CENDIF
CLOSE
CUT
DIFSIZ
GRAD
ITROPT
LEVEL
MAX
mname
Model name.
PARMIN
RELIN
RELOUT
Optimizing Data
57
Laplace Transforms
See Laplace Transform (LAPLACE) Function and
Laplace Transform in the HSPICE Simualation and
Analysis User Guide.
Transconductance H(s)
General Form
2-
58
Optimizing Data
Output Format
For a detailed description of graphing with HSPLOT and
GSI, see the HSPICE Simulation and Analysis User
Guide Graphing.
-plot
Output Format
59
-d
-c
-laf [windows|
openlook| motif]
Setup Commands
Cmd
Default
Description
--
XMIN,
XMAX,
YMIN,
YMAX
X=LIM
Y=AUTO
XSCAL
1.0
YSCAL
1.0
XS, YS
LIN
Set x or y scale.
default
0.0
NONE
ON
Set/Toggle ticks.
NO
XG, YG ON
Set/Toggle x or y grids.
--
60
-Panel
-X-axis
-Y-axis
Output Format
$A
$Q
MORE
/BACK
$S
AC Analysis
*R
*I
*M
*P
Graph Commands
A, D
X, Y
Print Menu
The Print menu lists printers and /or plotters at your site
on which you may create a hardcopy plot.
Screensave Option
The SCREENSAVE function produces a file that can later
be displayed on the terminal. The function is useful for
making video slides.
Output Format
61
Print Commands
<CR>
1n-1
.PRINT Statement
General Form
.PLOT Statement
General Form
.PROBE Statement
General Form
.GRAPH Statement
General
Form
antype
mname
ov1 ovn
plo, phi
unam1
62
General Form
mname
Output Format
PLOT
pnam1=val1
<DC|AC|TRAN>
GOAL
MEASURE
Specifies measurements.
MINVAL
Trigger
General Form
Or
TRIG AT=val
result
Target
General Form
AT = val
CROSS = c
RISE = r
FALL = f
Output Format
63
LAST
TARG
targ_val
targ_var
time_delay
TRIG
trig_val
trig_var
.MEASURE <DC|AC|TRAN>
+ result func out_var
+ <FROM = val> <TO = val>
+ <GOAL = val>
+ <MINVAL = val> <WEIGHT = val>
or
<DC|AC|TRAN>
FROM
func
64
GOAL
MINVAL
Output Format
out_var
result
TO
WEIGHT
start
end
Equation Evaluation
General Form
<DC|AC|TRAN>
calc_var
ERRfun
FROM
IGNOR|YMIN
meas_var
MINVAL
result
TO
Output Format
65
WEIGHT
YMAX
66
General Form
Or
Or
Or
Or
<DC|AC|TRAN>
CROSS = c
RISE = r
FALL = f
FIND
GOAL
LAST
Output Format
MINVAL
out_var(1,2,3)
result
TD
WEIGHT
WHEN
.DOUT Statement
.DOUT nd VTH ( time state
< time state > )
where:
nd is the node name.
VTH is the single voltage threshold.
time is an absolute time-point.
state is one of the following expected conditions of
the nd node at the specified time:
- 0
expect ZERO,LOW.
- 1
expect ONE,HIGH.
- else
Dont care.
Output Format
67
expect ONE,HIGH.
- else
Dont care.
.STIM Statement
You can use the .STIM statement to reuse the results
(output) of one simulation, as input stimuli in a new
simulation.
The .STIM statement specifies:
Expected stimulus (PWL Source, DATA CARD, or
VEC FILE).
Signals to transform.
Independent variables.
One .STIM statement produces one corresponding
output file.
Syntax
Brackets [ ] enclose comments, which are optional.
.stim <tran|ac|dc> PWL|DATA|VEC
<filename=output_filename> ...
Nodal Voltage
General Form
V (n1<,n2>)
n1, n2
68
Output Format
I (Vxxx)
Vxxx
In (Wwww)
or
Iall (Www)
Wwww
Element name.
Iall (Www)
Power Output
See Power Output in the HSPICE Simulation and
Analysis User Guide.
Print/Plot Power
General Form
.PRINT <DC|TRAN>
P(element_or_subcircuit_name)
POWER
Or
.PLOT <DC|TRAN>
P(element_or_subcircuit_name)
POWER
antype
ov1
plo1,phi1
Output Format
69
AC Analysis Output
See AC Analysis Output Variables in the HSPICE
Simulation and Analysis User Guide.
Nodal Voltage
General Form
Vz (n1,<,n2>)
DB
Decibel
Imaginary Part
Magnitude
Phase
Real Part
Group Delay
n1, n2
Iz (Vxxx)
Vxxx
70
Output Format
Izn (Wwww)
Wwww
VT (n1, <n2>)
or
IT(Vxxx)
or
ITn(Wwww)
n1, n2
Vxxx
Wwww
Element name
Output Format
71
Network Output
General Form
ij
YIN
Input admittance.
YOUT
Output admittance.
ZIN
ZOUT
Output impedance.
ovar <(z)>
Elname:Property
Elname
Property
72
Output Format
Alias
Description
LV1
LV2
TC1
LV3
TC2
LV4
Capacitor
Alias
Description
CEFF
Name
LV1
IC
LV2
Initial condition
LX0
CURR
LX1
VOLT
LX2
LX3
Inductor
Name
Alias Description
LEFF
LV1
IC
LV2
Initial condition
FLUX
LX0
VOLT
LX1
CURR
LX2
LX4
Mutual Inductor
Name
Alias
Description
LV1
Mutual inductance
Output Format
73
Alias
Description
VOLT
LX0
Source voltage
CURR
LX1
CV
LX2
Controlling voltage
DV
LX3
Alias
Description
CURR
LX0
CI
LX1
Controlling current
DI
LX2
Alias
Description
CURR
LX0
LX0
LX0
CV
LX1
Controlling voltage
CQ
LX1
DI
LX2
ICAP
LX2
VCAP
LX3
74
Alias
Description
VOLT
LX0
Source voltage
CURR
LX1
Source current
CI
LX2
Controlling current
Output Format
Name
Alias
Description
DV
LX3
Alias
Description
VOLT
LV1
DC/transient voltage
VOLTM
LV2
AC voltage magnitude
VOLTP
LV3
AC voltage phase
Alias
Description
CURR
LV1
DC/transient current
CURRM
LV2
AC current magnitude
CURRP
LV3
AC current phase
Name
Alias
Description
AREA
LV1
AREAX
LV23
IC
LV2
VD
LX0
IDC
LX1
GD
LX2
QD
LX3
ICAP
LX4
Diode
LX5
PID
LX7
Output Format
75
BJT
76
Name
Alias
Description
AREA
LV1
Area factor
ICVBE
LV2
ICVCE
LV3
MULT
LV4
FT
LV5
ISUB
LV6
Substrate current
GSUB
LV7
Substrate conductance
LOGIC
LV8
LOG 10 (IC)
LOGIB
LV9
LOG 10 (IB)
BETA
LV10
BETA
LOGBETAI
LV11
ICTOL
LV12
IBTOL
LV13
RB
LV14
Base resistance
GRE
LV15
GRC
LV16
PIBC
LV18
PIBE
LV19
VBE
LX0
VBE
VBC
LX1
CCO
LX2
CBO
LX3
GPI
LX4
GU
LX5
GM
LX6
G0
LX7
QBE
LX8
CQBE
LX9
QBC
LX10
CQBC
LX11
QCS
LX12
Output Format
Name
Alias
Description
CQCS
LX13
QBX
LX14
CQBX
LX15
GXO
LX16
CEXBC
LX17
LX18
Base-collector conductance
(GEQCBO) (not used in HSPICE
releases after 95.3)
CAP_BE
LX19
cbe capacitance (C )
CAP_IBC
LX20
CAP_SCB
LX21
csc substrate-collector
capacitance for vertical transistors
csb substrate-base capacitance for
lateral transistors
CAP_XBC
LX22
CMCMO
LX23
(TF*IBE) /vbc
VSUB
LX24
Substrate voltage
JFET
Name
Alias Description
AREA
LV1
VDS
LV2
VGS
LV3
PIGD
LV16
PIGS
LV17
VGS
LX0
VGS
VGD
LX1
CGSO
LX2
Gate-to-source (CGSO)
CDO
LX3
CGDO
LX4
GMO
LX5
Transconductance (GMO)
GDSO
LX6
Output Format
77
Name
Alias Description
GGSO
LX7
GGDO
LX8
QGS
LX9
CQGS
LX10
QGD
LX11
CQGD
LX12
CAP_GS
LX13
Gate-source capacitance
CAP_GD
LX14
Gate-drain capacitance
LX15
QDS
LX16
CQDS
LX17
GMBS
LX18
MOSFET
78
Name
Alias
Description
LV1
LV2
AD
LV3
AS
LV4
ICVDS
LV5
ICVGS
LV6
ICVBS
LV7
LV8
VTH
LV9
VDSAT
LV10
PD
LV11
PS
LV12
RDS
LV13
RSS
LV14
Output Format
Name
Alias
Description
XQC
LV15
GDEFF
LV16
GSEFF
LV17
IDBS
LV18
ISBS
LV19
VDBEFF
LV20
BETAEFF
LV21
BETA effective
GAMMAEFF
LV22
GAMMA effective
DELTAL
LV23
UBEFF
LV24
VG
LV25
VFBEFF
LV26
VFB effective
LV31
IDSTOL
LV32
IDDTOL
LV33
COVLGS
LV36
COVLGD
LV37
COVLGB
LV38
VBS
LX1
VGS
LX2
VDS
LX3
CDO
LX4
CBSO
LX5
CBDO
LX6
GMO
LX7
GDSO
LX8
DC drain-source conductance
(GDSO)
Output Format
79
Name
Alias
Description
GMBSO
LX9
DC substrate transconductance
(GMBSO)
GBDO
LX10
GBSO
LX11
80
LX12
CQB
LX13
QG
LX14
CQG
LX15
QD
LX16
CQD
LX17
CGGBO
LX18
CGDBO
LX19
CGSBO
LX20
CBGBO
LX21
BGBO = Qb / Vgb,
(for Meyer CGB = -CBGBO)
CBDBO
LX22
CBSBO
LX23
QBD
LX24
LX25
QBS
LX26
LX27
CAP_BS
LX28
Bulk-source capacitance
CAP_BD
LX29
Bulk-drain capacitance
CQS
LX31
CDGBO
LX32
Output Format
Name
Alias
Description
CDDBO
LX33
CDSBO
LX34
Alias
Description
MU
LX0
LX1
LX2
Alias
Description
LEFF
LV1
IC
LV2
Initial condition
FLUX
LX0
VOLT
LX1
Output Format
81
82
Output Format