Slide 2

1/Chapter2
Ni dung mn hc
1. Gii thiu chung v h vi x l
2. B vi x l Intel 8088/8086
2/Chapter2
Chng 2: B vi x l Intel 8088/8086
Cu trc bn trong
S chn
Bn b nh ca my tnh IBM-PC
Cc ch a ch ca 8086
Cch m ho lnh ca 8086
M t tp lnh ca 8086
Cch nh a ch ch bo v cc my tnh t 80286
3/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Cc thanh ghi con tr v ch s
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
4/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
5/Chapter2
S khi 8088/8086
Cc thanh
ghi a nng
Cc thanh ghi
con tr
v ch s
AX
BX
CX
DX
SP
BP
SI
DI
EU
bus a ch
20 bit
Cc thanh ghi
on v con tr
lnh
CS
DS
SS
ES
IP
Bus d liu
ALU 16 bit
Bus ngoi
Khi iu
khin
ca EU
Hng i lnh
Thanh ghi c
Bus trong ca CPU

16 bit d liu
20 bit a ch
Logic
iu khin
bus
Cc thanh ghi tm thi
ALU
BIU
6/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
7/Chapter2
Cc thanh ghi a nng ca 8088/8086

8 bit cao
8 bit thp
8088/8086 n 80286 : 16 bits
AX
AH
AL
BX
BH
BL
CX
CH
CL
DX
DH
DL
80386 tr ln: 32 bits EAX,

EBX, ECX, EDX
Thanh ghi cha AX (accumulator): cha kt qu ca cc php tnh. Kt qu 8 bit

c cha trong AL
Thanh ghi c s BX (base): cha a ch c s, v d ca bng dng trong lnh
XLAT (Translate)
Thanh ghi m CX (count): dng cha s ln lp trong cc lnh lp (Loop). CL
c dng cha s ln dch hoc quay trong cc lnh dch v quay thanh ghi
Thanh ghi d liu DX (data): cng AX cha d liu trong cc php tnh nhn chia s
16 bit. DX cn c dng cha a ch cng trong cc lnh vo ra d liu trc
tip (IN/OUT)
8/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
9/Chapter2
Cc thanh ghi on
T chc ca b nh 1 Mbytes
on b nh (segment)
FFFFFH
216 bytes =64 KB

on 1: a ch u 00000 H
on 2: a ch u 10000 H
on cui cng:
FFFF0 H
nh trong on:
a ch lch: offset
1: offset: 0000
cui cng: offset: FFFF
1FFFFH
a ch vt l:
Segment : offset
a ch vt l=Segment*16 + offset
Ch thc (real mode)
1F000H
10000H
00000H
Offset=F000
1000
Thanh ghi on
10/Chapter2
Cc thanh ghi on
V d: a ch vt l 12345H
a ch on
i ch lch
1000 H
2345H
1200 H
0345H
1004 H
0300 H
V d: Cho a ch u ca on: 49000 H, xc nh a ch cui
11/Chapter2
Cc thanh ghi on
Cc thanh ghi on: cha a ch on
FFFFF
58FFF
49000
43FFF
34000
30000
2FFFF
20000
1FFFF
10000
00000
.............
on d liu ph
extra segment
on ngn xp
Stack segment
4900
3400
ES
SS
on m
Code segment
on d liu
Data segment
2000
CS
1000
DS
12/Chapter2
Cc thanh ghi on
Cc on chng nhau
FFFFF
s
t
a
c
k
d
a
t
a
c
o
d
e
0A480
0A47F
0A280
0A27F
0A0F0
0A0EF
090F0
00000
Stack
0A28
SS
Data
0A0F
DS
090F
CS
Code
13/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
14/Chapter2

Cha a ch lch (offset)
Con tr lnh IP (instruction pointer): cha a ch lnh tip theo trong
on m lnh CS.
CS:IP
Con tr c s BP (Base Pointer): cha a ch ca d liu trong on

ngn xp SS hoc cc on khc
SS:BP
Con tr ngn xp SP (Stack Pointer): cha a ch hin thi ca nh

ngn xp
SS:SP
Ch s ngun SI (Source Index): cha a ch d liu ngun trong on

d liu DS trong cc lnh chui
DS:SI
Ch s ch (Destination Index): cha a ch d liu ch trong on d

liu DS trong cc lnh chui
DS:DI
SI v DI c th c s dng nh thanh ghi a nng

80386 tr ln 32 bit: EIP, EBP, ESP, EDI, ESI
15/Chapter2
Thanh ghi on v thanh ghi lch ngm nh

Segment
Offset
Ch thch
CS
IP
a ch lnh
SS
SP hoc BP
a ch ngn xp
DS
BX, DI, SI, s 8 bit

hoc s 16 bit
a ch d liu
ES
DI
a ch chui
ch
16/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
17/Chapter2
Thanh ghi c (Flag Register)

15 14
2
O
D I
0
C
9 bit c s dng, 6 c trng thi:

C hoc CF (carry flag)): CF=1 khi c nh hoc mn t MSB
P hoc PF (parity flag): PF=1 (0) khi tng s bt 1 trong kt qu l chn
(l)
A hoc AF (auxilary carry flag): c nh ph, AF=1 khi c nh hoc
mn t mt s BCD thp sang BCD cao
Z hoc ZF (zero flag): ZF=1 khi kt qu bng 0
S hoc SF (Sign flag): SF=1 khi kt qu m
O hoc OF (Overflow flag): c trn OF=1 khi kt qu l mt s vt ra
ngoi gii hn biu din ca n trong khi thc hin php ton cng tr
s c du
18/Chapter2

15 14
2
O
D I
0
C
3 c iu khin
T hoc TF (trap flag)): c by, TF=1 khi CPU lm vic ch chy
tng lnh
I hoc IF (Interrupt enable flag): c cho php ngt, IF=1 th CPU s cho
php cc yu cu ngt (ngt che c) c tc ng (Cc lnh: STI,
CLI)
D hoc DF (direction flag): c hng, DF=1 khi CPU lm vic vi chui
k t theo th t t phi sang tri (lnh STD, CLD)
19/Chapter2

V d:
80h
80h
100h
SF=0 v msb trong kt qu =0

PF=1 v tong cac bit la 0 (so chan)
ZF=1 v kt qa thu c l 0
CF=1 v c nh t bt msb trong php cng
OF=1 v c trn trong php cng 2 s m
20/Chapter2

Cu trc bn trong
S khi
Cc thanh ghi a nng
Cc thanh ghi on
Thanh ghi c
Hng i lnh
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
21/Chapter2
Hng i lnh
4 bytes i vi 8088 v 6 bytes i vi 8086
X l pipeline
Khng c
pipelining
F1 D1 E1 F2 D2 E2 F3 D3 E3
F1 D1 E1
C pipelining
c m lnh
F2 D2 E2
F3 D3 E3
Gii m lnh
Thc hin lnh
1 chu k lnh ca CPU
22/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
23/Chapter2
Intel 8088
16-bit processor
introduced in 1979
3 m, 5 to 8 MHz, 29 KTOR
0.33 to 0.66 MIPS
24/Chapter2
Intel 8088
Ch Min v ch Max:
MN/MX = 1 ch Min
= 0 ch Max vi bus
controller 8288
25/Chapter2
Intel 8086
26/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
27/Chapter2
Bn b nh ca my tnh IBM PC
Vng nh
m rng
FFFFF
A0000
9FFFF
00000
Vng nh
h thng
484 Kbytes
Vng nh
chng trnh
640 Kbytes
1 Mbytes
b nh thc
28/Chapter2
Bn vng nh chng trnh

9FFFF
9FFF0
MSDOS
Vng dnh cho cc
chng trnh ng dng
08E30
08490
02530
01160
00700
00500
00400
00000
COMMAND.COM
Device drivers (mouse.sys)
MSDOS
IO.SYS
Vng DOS
Vng BIOS
Cc vector ngt
29/Chapter2
Bn vng nh h thng
FFFFF
F0000
E0000
ROM BIOS
ROM BASIC
Vng dnh
C8000
C0000
B0000
A0000
Video BIOS ROM

Video RAM (text)
Video RAM ( ho)
30/Chapter2
Cc cng vo ra
a ch: 0000H FFFFH, M/IO =0
FFFF
Vng m rng
03F8
03F0
03D0
0378
0320
02F8
0060
0040
0020
0000
COM1
iu khin a mm
CGA adapter
LPT1
iu khin cng
COM2
8255
nh thi (8253)
iu khin ngt
iu khin DMA
31/Chapter2
Trnh t khi ng
Khi bt ngun hoc nhn Reset
CS=FFFFh v IP=0000 => a ch FFFF0 cha ch th chuyn iu khin
n im khi u ca cc chng trnh BIOS
Cc chng trnh BIOS kim tra h thng v b nh
Cc chng trnh BIOS khi to bng vector ngt v vng d liu BIOS
BIOS np chng trnh khi ng (boot program) t a vo b nh
Chng trnh khi ng np h iu hnh t a vo b nh
H iu hnh np cc chng trnh ng dng
32/Chapter2
Vng nh dnh ring ca 8088/8086

FFFFF
FFFF0
Reset Bootstrap
program jump
003FF
00000
Cc vector ngt
33/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
Ch a ch thanh ghi
Ch a ch tc th
Ch a ch trc tip
Ch a ch gin tip qua thanh ghi
Ch a ch tng i c s
Ch a ch tng i ch s
Ch a ch tng i ch s c s

M t tp lnh ca 8086
1, Ch a ch thanh ghi
(Register Addressing Mode)
34/Chapter2
Dng cc thanh ghi nh l cc ton hng

Tc thc hin lnh cao
V d:
MOV BX, DX ; Copy ni dung DX vo BX
MOV AL, BL ; Copy ni dung BL vo AL
MOV AL, BX ; khng hp l v cc thanh ghi c kch thc khc nhau
MOV ES, DS ; khng hp l (segment to segment)
MOV CS, AX ; khng hp l v CS khng c dng lm thanh ghi ch
ADD AL, DL ; Cng ni dung AL v DL ri a vo AL
2, Ch a ch tc th
(Immediate Addressing Mode)
Ton hng ch l thanh ghi hoc nh
Ton hng ngun l hng s
Dng np hng s vo thanh thi (tr thanh ghi on v
thanh c) hoc vo nh trong on d liu DS
V d:
MOV BL, 44 ; Copy s thp phn 44 vo thanh ghi BL
MOV AX, 44H ; Copy 0044H vo thanh ghi AX
MOV AL, A ; Copy m ASCII ca A vo thanh ghi AL
MOV DS, 0FF0H ; khng hp l
MOV AX, 0FF0H ;
MOV DS, AX
; khng hp l
MOV [BX], 10 ; copy s thp phn 10 vo nh DS:BX
35/Chapter2
3, Ch a ch trc tip
(Direct Addressing Mode)
36/Chapter2
Mt ton hng l a ch nh cha d liu

Ton hng kia ch c th l thanh ghi
V d:
MOV AL, [1234H] ; Copy ni dung nh c a ch DS:1234 vo AL
MOV [ 4320H ], CX ; Copy ni dung ca CX vo 2 nh lin tip DS: 4320
v DS: 4321
MOV [ 4321H ], CL ; ?
37/Chapter2
4, Ch a ch gin tip qua thanh ghi

(Register indirect Addressing Mode)
Mt ton hng l thanh ghi cha a ch ca 1 nh d liu
V d:
MOV AL, [BX] ; Copy ni dung nh c a ch DS:BX vo AL

MOV [ SI ], CL ; Copy ni dung ca CL vo nh c a ch DS:SI
MOV [ DI ], AX ; copy ni dung ca AX vo 2 nh lin tip DS: DI v DS:
(DI +1)
5, Ch a ch tng i c s
(Based relative Addressing Mode)
38/Chapter2
Mt ton hng l thanh ghi c s BX, BP v cc hng s biu

din gi tr dch chuyn
V d:
MOV CX, [BX]+10 ; Copy ni dung 2 nh lin tip c a ch DS:BX+10 v
DS:BX+11 vo CX
MOV CX, [BX+10] ; Cch vit khc ca lnh trn
MOV AL, [BP]+5 ; copy ni dung ca nh SS:BP+5 vo thanh ghi AL
6, Ch a ch tng i ch s
(Indexed relative Addressing Mode)
39/Chapter2
Mt ton hng l thanh ghi ch s SI, DI v cc hng s biu

din gi tr dch chuyn
V d:
MOV AX, [SI]+10 ; Copy ni dung 2 nh lin tip c a ch DS:SI+10
v DS:SI+11 vo AX
MOV AX, [SI+10] ; Cch vit khc ca lnh trn
MOV AL, [DI]+5 ; copy ni dung ca nh DS:DI+5 vo thanh ghi AL
40/Chapter2
7, Ch a ch tng i ch s c s
( Based Indexed relative Addressing Mode)
V d:
MOV AX, [BX] [SI]+8 ; Copy ni dung 2 nh lin tip c a
ch DS:BX+SI+8 v DS:BX+SI+9 vo AX
MOV AX, [BX+SI+8] ; Cch vit khc ca lnh trn
MOV CL, [BP+DI+5] ; copy ni dung ca nh SS:BP+DI+5
vo thanh ghi CL
41/Chapter2
Tm tt cc ch a ch
Ch a ch
Ton hng
Thanh ghi on ngm nh
Thanh ghi
Thanh ghi
Tc th
D liu
Trc tip
[offset]
DS
Gin tip qua thanh ghi
[BX]
[SI]
[DI]
DS
DS
DS
Tng i c s
[BX] + dch chuyn

[BP] + dch chuyn
DS
SS
Tng i ch s
[DI] + dch chuyn

[SI] + dch chuyn
DS
DS
Tng i ch s c s
[BX] + [DI]+ dch chuyn

[BX] + [SI]+ dch chuyn
[BP] + [DI]+ dch chuyn
[BP] + [SI]+ dch chuyn
DS
DS
SS
SS
42/Chapter2
B ch ngm nh thanh ghi on

(Segment override)
Mun loi v cc t hp ngm nh ni trn, trong khi vit lnh

ta phi ghi r thanh ghi on s dng tnh a ch v km
thm du 2 chm trc thanh ghi lch.
Cc cp thanh ghi on v thanh ghi lch ngm nh
V d:
MOV AL, [BX]; Copy ni dung nh c a ch DS:BX vo AL
MOV AL, ES:[BX] ; Copy ni dung nh c a ch ES:BX vo AL
43/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
44/Chapter2

Opcode
1-2 byte
MOD-REG-R/M
0-1 byte
0-2 byte
0-2 byte
Mt lnh c di t 1 n 6 byte
D
Opcode
cha m lnh
W
W=0 d liu 1 byte
W=1 d liu 2 byte
D=1 d liu i n thanh ghi cho bi 3 bit REG

D=0 d liu i t thanh ghi cho bi 3 bit REG
45/Chapter2

2 bt MOD (ch ) cng vi 3 bt M/R (b nh/thanh ghi) to ra 5 bt dng ch ra
ch a ch cho cc ton hng ca lnh.
MOD
REG
R/M
MOD =11
00
01
10
11
khng c dch chuyn

dch chuyn 8 bit
dch chuyn 16 bit
R/M l thanh ghi
R/M: Register/Memory
Thanh ghi
W=1
AX
BX
CX
DX
SP
DI
BP
SI
W=0
AL
BL
CL
DL
AH
BH
CH
DH
M
000
011
001
010
100
111
101
110
MOD <> 11
M
Ch a ch
000
001
010
011
100
101
110
111
DS:[BX+SI]
DS:[BX+DI]
SS:[BP+SI]
SS:[BP+DI]
DS:[SI]
DS:[DI]
SS:[BP]
DS:[BX]
46/Chapter2
Ghi ch:
addr8, addr16 tng ng vi a ch 8 v 16 bt
Cc gi tr cho trong cc ct 2, 3, 4 (ng vi MOD =00, 01, 10) l cc
a ch hiu dng (EA) s c cng vi DS to ra a ch vt l
(ring BP phi c cng vi SP)
47/Chapter2

V d: chuyn lnh MOV CL, [BX] sang m my
opcode MOV: 100010
D liu l 1 byte: W=
Chuyn ti thanh ghi: D=
Khng c dch chuyn: MOD=
[BX] nn R/M=
CL nn REG=
MOV
D W
MOD
?
CL
[BX]
48/Chapter2

V d: chuyn lnh MOV CL, [BX] sang m my
opcode MOV: 100010
D liu l 1 byte: W=0
Chuyn ti thanh ghi: D=1
Khng c dch chuyn: MOD=00
[BX] nn R/M=111
CL nn REG=001
MOV
D W
MOD
CL
V d 2: chuyn lnh MOV [SI+F3H], CL sang m my
[BX]
49/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
Cc lnh di chuyn d liu
Cc lnh s hc v logic
Cc lnh iu khin chng trnh
50/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
Cc lnh s hc v logic
51/Chapter2

MOV, XCHG, POP, PUSH, POPF, PUSHF, IN, OUT
Cc lnh di chuyn chui MOVS, MOVSB, MOVSW
MOV
Dng chuyn gia cc thanh ghi, gia 1 thanh ghi v 1 nh hoc
chuyn 1 s vo thanh ghi hoc nh
C php: MOV ch, ngun
Lnh ny khng tc ng n c ( cp bui trc cng trn)
V d:
MOV AX, BX
MOV AH, A
MOV AL, [1234H]
52/Chapter2
Kh nng kt hp ton hng ca lnh MOV

nh
Hng s
a nng
Thanh ghi
on
Thanh ghi
a nng
YES
YES
YES
NO
Thanh ghi
on
YES
NO
YES
NO
nh
YES
YES
NO
NO
Hng s
YES
NO
YES
NO
ch
Ngun
Thanh ghi
53/Chapter2
Lnh XCHG
Dng hon chuyn ni dung gia hai thanh ghi, gia 1 thanh ghi v 1 nh
C php: XCHG ch, ngun
Gii hn: ton hng khng c l thanh ghi on
Lnh ny khng tc ng n c
V d:
XCHG AX, BX
XCHG AX, [BX]
54/Chapter2
Lnh PUSH
Dng ct 1 t t thanh ghi hoc nh vo nh ngn xp

C php: PUSH Ngun
M t: SP=SP-2, Ngun => {SP}
Gii hn: thanh ghi 16 bit hoc l 1 t nh
V d:
PUSH BX
PUSH PTR[BX]
Lnh PUSHF
Ct ni dung ca thanh ghi c vo ngn xp
Ton t PTR, xc inh Byte hay word

MOV BYTE PTR [1000h],12h ; [1000h] 12h
MOV WORD PTR [2000h],1200h ; [2001h,2000h] 1200h
55/Chapter2
V d v lnh PUSH
PUSH AX
SP
1300A
13009
13008
13007
13006
13005
13004
13003
13002
13001
13000
1300A
13009
13008
13007
13006
13005
13004
13003
13002
13001
12
34
13000
PUSH BX
1300A
13009
SP 13008
13007
13006
13005
13004
13003
13002
13001
12
34
78
56
13000
SS
1300
SS
1300
SS
1300
SP
000A
SP
0008
SP
0006
1234
AX
1234
BX
7856
AX
SP
56/Chapter2
Lnh POP
Dng ly li 1 t vo thanh ghi hoc nh t nh ngn xp

C php: POP ch
M t: {SP} => ch, SP=SP+2
Gii hn: thanh ghi 16 bit (tr CS) hoc l 1 t nh
V d:
POP BX
POP PTR[BX]
Lnh POPF
Ly 1 t t nh ngn xp ri a vo thanh ghi c
57/Chapter2
POP DX
V d lnh POP
1300A
13009
13008
13007
13006
13005
13004
13003
13002
13001
12
34
78
56
13000
SP
1300A
13009
13008
13007
13006
13005
13004
13003
13002
13001
12
34
78
56
13000
SS
1300
SS
1300
SP
0006
SP
0008
DX
3254
DX
7856
SP
58/Chapter2
Lnh IN
Dng c 1 byte hoc 2 byte d liu t cng vo thanh ghi AL hoc AX

C php: IN Acc, Port
V d:
IN AX, 00H
IN AL, F0H
IN AX, DX
Lnh OUT
Dng a 1 byte hoc 2 byte d liu t thanh ghi AL hoc AX ra cng

C php: OUT Port, Acc
V d:
OUT 00H, AX
OUT F0H, AL
OUT DX, AX
59/Chapter2

Cc lnh di chuyn chui MOVS, MOVSB, MOVSW
Dng chuyn mt phn t ca chui ny sang mt chui khc
C php: MOVS chui ch, chui ngun
MOVSB
MOVSW
Thc hin:
DS:SI l a ch ca phn t trong chui ngun
ES:DI l a ch ca phn t trong chui ch
Sau mi ln chuyn SI=SI +/- 1, DI=DI +/- 1 hoc SI=SI +/- 2,
DI=DI +/- 2 tu thuc vo c hng DF l 0/1
V d:
MOVS byte1, byte2
60/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
Cc lnh s hc v logic
61/Chapter2
Cc lnh s hc v logic
ADD, ADC, SUB, MUL, IMUL, DIV, IDIV, INC, DEC

AND, OR, NOT, NEG, XOR
Lnh quay v dch: RCL, RCR, SAL, SAR, SHL, SHR
Lnh so snh: CMP, CMPS
Lnh ADD
Lnh cng hai ton hng
C php: ADD ch, ngun
Thc hin: ch=ch + ngun
Gii hn: ton hng khng c l 2 nh v thanh ghi on
Lnh ny thay i c: AF, CF, OF, PF, SF, ZF
V d:
ADD AX, BX
ADD AX, 40H
62/Chapter2
Cc lnh s hc v logic
Lnh ADC
Lnh cng c nh hai ton hng

C php: ADC ch, ngun
Thc hin: ch=ch + ngun+CF
V d:
ADC AL, 30H
Lnh SUB
Lnh tr
C php: SUB ch, ngun
Thc hin: ch=ch - ngun
V d:
SUB AL, 30H
63/Chapter2
Cc lnh s hc v logic
Lnh MUL
Lnh nhn s khng du
C php: MUL ngun
Thc hin:
AX=AL* ngun8bit
DXAX=AX*ngun16bit
Lnh ny thay i c: CF, OF

V d:
MUL BL
Lnh IMUL
nhn s c du
64/Chapter2
Cc lnh s hc v logic
Lnh DIV
Lnh chia 2 s khng du
C php: DIV ngun
Thc hin:
AL = thng (AX / ngun8bit) ; AH=d (AX / ngun8bit)
AX = thng (DXAX / ngun16bit) ; DX=d (DXAX / ngun16bit)
Lnh ny khng thay i c

V d:
DIV BL
Lnh IDIV
chia 2 s c du
65/Chapter2
Cc lnh s hc v logic
Lnh INC
Lnh cng 1 vo ton hng l thanh ghi hoc nh
C php: INC ch
Thc hin: ch=ch + 1
Lnh ny thay i c: AF, OF, PF, SF, ZF
V d:
INC AX
Lnh DEC
Lnh tr 1 t ni dung mt thanh ghi hoc nh
C php: DEC ch
Thc hin: ch=ch - 1
Lnh ny thay i c: AF, OF, PF, SF, ZF
V d:
DEC [BX]
66/Chapter2
Cc lnh s hc v logic
Lnh AND
Lnh AND logic 2 ton hng
C php: AND ch, ngun
Thc hin: ch=ch And ngun
Gii hn: ton hng khng c l 2 nh hoc thanh ghi on
Lnh ny thay i c: PF, SF, ZF v xo c CF, OF
V d:
AND BL, 0FH
Lnh XOR (khc nhau th =1), OR: tng t nh lnh AND

Lnh NOT: o tng bit ca ton hng
Lnh NEG: xc nh s b 2 ca ton hng
67/Chapter2
Cc lnh s hc v logic
Lnh CMP
Lnh so snh 2 byte hoc 2 t
C php: CMP ch, ngun
Thc hin:
ch = ngun : CF=0 ZF=1
ch> ngun : CF=0 ZF=0
ch < ngun : CF=1 ZF=0
Gii hn: ton hng phi cng di v khng c l 2 nh
Lnh CMPS
Dng so snh tng phn t ca 2 chui c cc phn t cng loi
C php: CMPS chui ch, chui ngun
CMPSB
CMPSW
Thc hin:
DS:SI l a ch ca phn t trong chui ngun
ES:DI l a ch ca phn t trong chui ch
Sau mi ln so snh SI=SI +/- 1, DI=DI +/- 1 hoc SI=SI +/- 2, DI=DI +/- 2
tu thuc vo c hng DF l 0/1
Cp nht c AF, CF, OF, PF, SF, ZF
68/Chapter2
Cc lnh s hc v logic
Lnh RCL
Lnh quay tri thng qua c nh
C php: RCL ch, CL (vi s ln quay ln hn 1)
RCLch, 1
RCL ch, S ln quay (80286 tr ln)
Thc hin: quay tri ch CL ln
ch l thanh ghi (tr thanh ghi on) hoc nh
CF
MSB
Lnh RCR
Lnh quay phi thng qua c nh
LSB
69/Chapter2
Cc lnh s hc v logic
Lnh ROL
Lnh quay tri
C php: ROL ch, CL (vi s ln quay ln hn 1)
ROL ch, 1
ROL ch, S ln quay (80286 tr ln)
Thc hin: quay tri ch CL ln
ch l thanh ghi (tr thanh ghi on) hoc nh
CF
Lnh ROR
Lnh quay phi
MSB
LSB
70/Chapter2
Cc lnh s hc v logic
Lnh SAL
Lnh dch tri s hc
C php: SAL ch, CL (vi s ln dch ln hn 1)
SAL ch, 1
SAL ch, s ln dch (80286 tr ln)
Thc hin: dch tri ch CL bit tng ng vi ch=ch*2 CL
Lnh ny thay i c SF, ZF, PF
CF
MSB
LSB
0
Lnh SHL
Lnh dch tri logic tng t nh SAL
71/Chapter2
Cc lnh s hc v logic
Lnh SAR
Lnh dch phi s hc
C php: SAR ch, CL (vi s ln dch ln hn 1)
SAR ch, 1
hoc SAR ch, s ln dch (80286 tr ln)
Thc hin: dch phi ch CL bit
Lnh ny thay i c SF, ZF, PF, CF mang gi tr ca MSB
MSB
LSB
CF
72/Chapter2
Cc lnh s hc v logic
Lnh SHR
Lnh dch phi logic
C php: SHR ch, CL (vi s ln dch ln hn 1)
SHR ch, 1
hoc SHR ch, s ln dch (80286 tr ln)
Thc hin: dch phi ch CL bit

Lnh ny thay i c SF, ZF, PF, CF mang gi tr ca LSB
MSB
LSB
CF
Ch :
Trong cc lnh dch v quay, ton hng khng c l thanh ghi o n
73/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
Cc lnh s hc v logic
Lnh
Lnh
Lnh
Lnh
Lnh
nhy khng iu kin: JMP

nhy c iu kin JE, JG, JGE, JL, JLE...
lp LOOP
gi chng trnh con CALL
gi chng trnh con phc v ngt INT v IRET
74/Chapter2
Lnh nhy khng iu kin JMP

Dng nhy ti mt a ch trong b nh
3 loi: nhy ngn, gn v xa
Lnh nhy ngn (short jump)
di lnh 2 bytes
Phm vi nhy: -128 n 127 bytes so vi lnh tip theo l nh
JMP
Thc hin: IP=IP + lch
V d:
XOR BX, BX
Nhn: MOV AX, 1
ADD AX, BX
JMP SHORT Nhn
77/Chapter2
Tm tt lnh JMP
FFFFFH
on m 2
Nhy xa
+127
Nhy ngn
-128
00000H
on m 1
JMP
Nhy gn
78/Chapter2
Lnh nhy c iu kin

JE or JZ, JNE or JNZ, JG, JGE, JL, JLE (dng cho s c du)
v JA, JB, JAE, JBE (dng cho s khng du) ...
Nhy c thc hin ph thuc vo cc c
L cc lnh nhy ngn
V d:
Nhan1: XOR BX, BX
Nhan2: MOV AX, 1
CMP AL, 10H
JNE Nhan1
JE Nhan2
Thc hin: IP=IP + dch
79/Chapter2
Lnh lp LOOP
LOOP, LOOPE/LOOPZ, LOOPNE/LOOPNZ
L lnh phi hp gia DEC CX v JNZ
XOR AL, AL
XOR AL, AL
XOR AL, AL
MOV CX, 16
MOV CX, 16
MOV CX, 16
Lap: INC AL
LOOP Lap
Lp n kh CX=0
Lap: INC AL
Lap: INC AL
CMP AL, 10
CMP AL, 10
LOOPE Lap
LOOPNE Lap
Lp n kh CX=0
hoc AL<>10
Lp n kh CX=0
hoc AL=10
80/Chapter2
Lnh CALL
Dng gi chng trnh con
C 2 loi: CALL gn v CALL xa
CALL gn (near call): tng t nh nhy gn
Gi chng trnh con trong cng mt on m
Tong PROC NEAR
ADD AX, BX
ADD AX, CX
RET
Tong ENDP
...
Tong PROC NEAR

ADD AX, BX
ADD AX, CX
RET
Tong ENDP
...
MOV BX, OFFSET Tong
CALL BX
CALL WORD PTR [BX]
CALL Tong
Ct IP vo ngn xp
IP=IP + dch chuyn
RET: ly IP t ngn xp
Ct IP vo ngn xp
IP= BX
RET: ly IP t ngn xp
Ct IP vo ngn xp
IP= [BX+1] [BX]
RET: ly IP t ngn xp
81/Chapter2
Lnh CALL
CALL xa (far call): tng t nh nhy xa
Gi chng trnh con ngoi on m
Tong PROC FAR
CALL DWORD PTR [BX]
ADD AX, BX
ADD AX, CX
RET
Tong ENDP
...
CALL Tong
Ct CS vo ngn xp
Ct IP vo ngn xp
IP=IP ca Tong
CS =CS ca Tong
RET: ly IP t ngn xp
ly CS t ngn xp
Ct CS vo ngn xp
Ct IP vo ngn xp
IP = [BX+1][BX]
CS= [BX+3][BX+2]
RET: ly IP t ngn xp
ly CS t ngn xp
82/Chapter2
Lnh ngt INT v IRET

INT gi chng trnh con phc v ngt (CTCPVN)
Bng vector ngt: 1 Kbytes 00000H n 003FF H
256 vector ngt
1 vector 4 bytes, cha IP v CS ca CTCPVN
32 vector u dnh ring cho Intel
224 vector sau dnh cho ngi dng
C php: INT Number

V d: INT 21H gi CTCPVN ca DOS
83/Chapter2
Lnh ngt INT v IRET

Thc hin INT:
Ct thanh ghi c vo ngn xp
IF=0 (cm cc ngt khc tc ng), TF=0 (chy sut)
Ct CS vo ngn xp
Ct IP vo ngn xp
IP=[N*4], CS=[N*4+2]
Gp IRET:
Ly IP t ngn xp
Ly CS t ngn xp
Ly thanh ghi c t ngn xp
84/Chapter2
Cu trc bn trong
S chn
Cc ch a ch ca 8086
M t tp lnh ca 8086
85/Chapter2
nh a ch b nh ch bo v
Cho php truy cp d liu v chng trnh vng nh trn 1M
Thanh ghi lch cha a ch lch
Thanh ghi on cha t chn on (segment selector)
t chn on chn 1 phn t trong 1 trong 2 bng m t on
(descriptor table), mi bng c kch thc 64 KB
Bng m t on ton cc (Global DT): cha thng tin v cc
on ca b nh m tt c cc chng trnh c th truy nhp
Bng m t on cc b (Local DT): cha thng tin v cc
on ca 1 chng trnh
M t on cha thng tin v a ch bt u ca on

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1/Chapter2

Chng 2: B vi x l Intel 8088/8086

Chng 2: B vi x l Intel 8088/8086

Chng 2: B vi x l Intel 8088/8086

Bus trong ca CPU

Cc thanh ghi tm thi

Chng 2: B vi x l Intel 8088/8086

Cc thanh ghi a nng ca 8088/8086

80386 tr ln: 32 bits EAX,

Thanh ghi cha AX (accumulator): cha kt qu ca cc php tnh. Kt qu 8 bit

Chng 2: B vi x l Intel 8088/8086

216 bytes =64 KB

Ch thc (real mode)

V d: Cho a ch u ca on: 49000 H, xc nh a ch cui

Chng 2: B vi x l Intel 8088/8086

Cc thanh ghi con tr v ch s

Con tr c s BP (Base Pointer): cha a ch ca d liu trong on

Con tr ngn xp SP (Stack Pointer): cha a ch hin thi ca nh

Ch s ngun SI (Source Index): cha a ch d liu ngun trong on

Ch s ch (Destination Index): cha a ch d liu ch trong on d

SI v DI c th c s dng nh thanh ghi a nng

Cc thanh ghi con tr v ch s

Thanh ghi on v thanh ghi lch ngm nh

BX, DI, SI, s 8 bit

Chng 2: B vi x l Intel 8088/8086

Thanh ghi c (Flag Register)

9 bit c s dng, 6 c trng thi:

Thanh ghi c (Flag Register)

Thanh ghi c (Flag Register)

SF=0 v msb trong kt qu =0

Chng 2: B vi x l Intel 8088/8086

Chng 2: B vi x l Intel 8088/8086

Chng 2: B vi x l Intel 8088/8086

Bn vng nh chng trnh

Video BIOS ROM

Vng nh dnh ring ca 8088/8086

Chng 2: B vi x l Intel 8088/8086

Cch m ho lnh ca 8086

Dng cc thanh ghi nh l cc ton hng

Mt ton hng l a ch nh cha d liu

4, Ch a ch gin tip qua thanh ghi

MOV AL, [BX] ; Copy ni dung nh c a ch DS:BX vo AL

Mt ton hng l thanh ghi c s BX, BP v cc hng s biu

Mt ton hng l thanh ghi ch s SI, DI v cc hng s biu

Thanh ghi on ngm nh

Gin tip qua thanh ghi

[BX] + dch chuyn

[DI] + dch chuyn

[BX] + [DI]+ dch chuyn

B ch ngm nh thanh ghi on

Mun loi v cc t hp ngm nh ni trn, trong khi vit lnh

Chng 2: B vi x l Intel 8088/8086

Cch m ho lnh ca 8086

D=1 d liu i n thanh ghi cho bi 3 bit REG

Cch m ho lnh ca 8086

khng c dch chuyn

Cch m ho lnh ca 8086

Cch m ho lnh ca 8086

Cch m ho lnh ca 8086

V d 2: chuyn lnh MOV [SI+F3H], CL sang m my

Chng 2: B vi x l Intel 8088/8086

Cch nh a ch ch bo v cc my tnh t 80286

Chng 2: B vi x l Intel 8088/8086