a9) ‘US 200702: United States 1738A1 2) Patent Application Publication co) Pub. No.: US 2007/0241738 Al oy 6) en (@) Baranauskas et al. START UP CIRCUIT APPARATUS AND Inventors: Dalius Barunauskas, Pocife Palisades, CA (US); Dents Zelenin, Carlsbad, CA (US); Pasur Sengottaivan, Carsbad, cA WS) PULSE-LINK, INC 1969 KELLOGG AV CARLSBAD, CA 92008 (US) Appl. Nos 10/402,497 Filed: Apr: 12, 2006 lref (43) Pub. Date: Oct. 18, 2007 Publication Classification ca) F320 (200601) (2) a2v16 6 ABSTRACT A startup ciruit for electronic circuits is provided. In one embodiment, the circuit uses a smaller capacitor and a ‘current amplification means to foree a larger capacitor 10 ‘aca chargod stale in a reduced time, The present inve tion is useful in any type of electronic circuit where fast Star-up times are desirable. The present invention is espe- cially usefil in portable electonics, such as wireless com- ‘munication devices, where minimal power consumption is ‘desired, This Absirct is provided for the sole purpose of ‘complying withthe Abstract requirement rules that allow a reader to quickly ascertain the subject matter ofthe disclo- Sire contained herein. This Abstract is submitted with the cexplict understanding that twill aot be uscd to interpret oF to limit the seape or the meaning of the clus.Patent Application Publication Oct. 18, 2007 Sheet 1 of 7 US 2007/0241738 AI EMITTED SIGNAL POWER DWIOTH) SPREAD SPECTR ULTRAWIDE! ect COUN ASIONS NARROW BAND, COMMUNICATIONS [BD-kohertz BAN FREQUENCY FIG. 1 ‘ 600- ’\ »-- PICOSECOND i PULSE POWER (watts per hertz] 4 FREQUENCY [gigahertz] FIG. 2US 2007/0241738 AI Patent Application Publication Oct. 18, 2007 Sheet 2 of 7 € ‘old ZHO ul fouanbas4 bon 960 66 gor oe }eS2- ees- le"LS- IS'6b- ise a ZHW/WEP UI [aA97 UOISsIWyPatent Application Publication Oct. 18, 2007 Sheet 3 of 7 US 2007/0241738 AI tguard FIG. 4A Ivec fe bt ime FIG. 4BPatent Application Publication Oct. 18, 2007 Sheet 4 of 7 US 2007/0241738 A1 FIG. 5Patent Application Publication Oct. 18, 2007 Sheet 5 of 7 US 2007/0241738 A1 S 8 oO > 7 N72 5; z O a SD N 2 oll 6 S| 1G = o o We iz Wu z z z ° oO = eS | 5 3 O qUS 2007/0241738 A1 Patent Application Publication Oct. 18, 2007 Sheet 6 of 7 Z°old ual] Wel soa O9APatent Application Publication Oct. 18, 2007 Sheet 7 of 7 US 2007/0241738 AI 10 r ' No accelerated start-up ON} { | Charge on C, Ver = _ |, Vat he ———— | ta FIG. 8A 20 r With accelerated start-up ON veo PP —» Charge on C, Charge on C, icn o22Vet Ver lets | a tUS 2007/0241738 AI START UP CIRCUIT APPARATUS AND METHOD. FIELD OF THE INVENTION [0001] The present invention generally relates to elec tronic circuits, More particularly, the invention concems @ starup circu BACKGROUND OF THE INVENTION [0002] The Information Age is upon ws. Access to vast ‘quantities of information through a variety of differen ‘commiinicaton systems is changing the way people work, ‘entertain themselves, and communicate with each other Faster, more capable communication technologies are con- stantly being developed. For the manufacturers and design cers of these new technologies, achieving low power con sumption is becoming an increasingly difficult challenge. Low power consumption is important as it directly affects the battery life of portable electronic devices [0003] The wireless device industry, which includes por- Table devices, has recently seen unprecedented growth. With the growth of this industry, communieation between wine Jess devices has become increasingly important, There are & numberof different technologies for inter provide for laser change times for capacitors CT and C2. ‘This results in VC reaching an operational state of Veel in ‘4 much shorter time period tga. At this operational state ‘current source Irefl and associated current mimors ill, reach operational readiness in time period instead of ta [0081] Thus, its seen that an apparatus for acceleration of Start-up of electronic circuits is provided. One skilled in the fact will pprcciate that the present invention ean he practiced by other than the above-described embodiments, hich are presented in this deseription for purposes of illustration and not of limitation. The specification and drawings are not intended to limit the exclusionary seope of this. patent ‘document, It is noted that various equivalents for the pare ticular embadiments discussed inthis description may prac- tice the invention as well. That i, while the present iaven- tion has heen described in conjunction with specific nbodiments, it i evident that many alternatives, modili= ‘ations, permutations and variations wll become appareat 10 those of ordinary’ skill in the art ia light of the foregoing description, Accordingly, itis intended that the present Jnvention embrace all steh alternatives, modifications and Variations a fall withia the scope of the appended claims. ‘The fact that a product, process or method exhibits difer- ‘ences from one a more af the above-described exemplary ‘embovdiments does not mean thatthe product oF process #8 ‘outside the senpe (literal scope andlor other legally-rocos- nized scope) of the following elaims. Oct. 18, 2007 ‘What i claimed is 1. Amethod of initializing curentsourees in an electronic circuit, the method comprising the steps of charging a frst capacitor with a frst charging current mirroring the first curea to provide a second current; charging # second capacitor with the second current; and providing a bias voltage (0 4 current source circuit fro ‘¢ charge onthe second capacitor. 2. The method of claim I, seherein the first capacitor has ‘capacitance that is N times smaller that capacitance a the second capacitor, N being a number greater than ‘3. The method of claim 1, whetein the second current is 1 times larger than tht the frst current. 4. Amethod of initializing current sources in an electronic cireuit, the method comprising the steps of ‘transitioning first signal from a Jow state ta high state; switching the state ofa fst transistor wih dhe fist signal to provide a path for a fist current to charge a first capacitor: inverting the fist signal to prod a second signal ‘witching the stale of second transistor with the second signal to remove a path fora second current to reach 3 low voltage: multiplying the fist curent by a value greater than 110 peodoce a third current; and charging a second capacitor with the thd curren 5. The method of claim 4, whercin a capacitance ratio of the second capacitor to the frst eapacitor is grater than 1 ‘6. The method of elsim 4, futher comprising the step of providing a bias vollage from the second capacitor 1 a feurrent source cireuit 7. cirouit comprising: first transistor having a fist connection to the current source, the transistor having a second connection 10 3 ‘contol signal and thie conection toa fist capacitor; 4 current amplification circuit connected to the current source; and 1 second capacitor connected to the eurrent amplification 8. The circuit of claim 7, farther comprising an inverter connected (othe control signal, and furer connected 10 at Teast a second transistor 9. The circuit of claim 7, further comprising second urrent source ereuit connected tothe second capacitor. 10, The circuit ofelsim 7, wherein a capacitance rato of the second capacitor to the fest eapacitor is greater than 1 11. The circuit of claim 7, wherein 2 ratio of a curent srovidea by the fist current source toa curret provided by fhe current amplification circuit i greater than I