Professional Documents
Culture Documents
Chapter 2:
Combinational Logic Design
Slides to accompany the textbook Digital Design, First Edition,
by Frank Vahid, John Wiley and Sons Publishers, 2007.
http://www.ddvahid.com
2.1
Introduction
Digital circuit
1
a
b
Combinational
0
1
F
digital circuit
Combinational circuit
A digital circuit whose outputs depend solely on
the present combination of the circuit inputs
values
Digital Design
Copyright 2006
Frank Vahid
1
a
b
Sequential
0
?
F
digital circuit
2
Note: Slides with animation are denoted with a small red "a" near the animated items
2.2
Switches
Electronic switches are the basis of
binary digital circuits
Electrical terminology
A
.5
4
A
.5
4
9V
2 ohms
9V
0V
4.5 A
V = I * R (Ohms Law)
Digital Design
Copyright 2006
Frank Vahid
Switches
A switch has three parts
control
input
off
Control input
Voltage that controls whether that
current can flow
source
input
1930s: Relays
1940s: Vacuum tubes
1950s: Discrete transistor
1960s: Integrated circuits (ICs)
on
output
(b)
output
control
input
discrete
transistor
vacuum tube
IC
quarter
(to see the relative size)
Moores Law
IC capacity doubling about every 18 months
for several decades
Known as Moores Law after Gordon Moore,
co-founder of Intel
Predicted in 1965 predicted that components
per IC would double roughly every year or so
Digital Design
Copyright 2006
Frank Vahid
2.3
nMOS
A positive
voltage here...
gate
gate
oxide
source
conducts
does not
conduct
IC package
drain
pMOS
gate
(a)
IC
does not
conduct
conducts
2.4
Logic gates are better digital circuit building blocks than switches (transistors)
Why?...
Digital Design
Copyright 2006
Frank Vahid
Boolean Algebra
Variables represent 0 or 1 only
Operators return 0 or 1 only
Basic operators
AND: a AND b returns 1 only when both a=1 and b=1
OR: a OR b returns 1 if either (or both) a=1 or b=1
NOT: NOT a returns the opposite of a (1 if a=0, 0 if a=1)
Digital Design
Copyright 2006
Frank Vahid
a
0
0
1
1
b
0
1
0
1
AND
0
0
0
1
a
0
1
NOT
1
0
a
0
0
1
1
b
0
1
0
1
OR
0
1
1
1
Nice features
a
0
0
1
1
b
0
1
0
1
AND
0
0
0
1
a
0
0
1
1
b
0
1
0
1
OR
0
1
1
1
Formally evaluate
m=1, j=0, s=1 --> F = (1 OR 0) AND NOT(1) = 1 AND 0 = 0
Formally transform
F = (m and NOT(s)) OR (j and NOT(s))
Looks different, but same function
Well show transformation techniques soon
a
0
1
NOT
1
0
Digital Design
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Frank Vahid
a
0
0
1
1
b
0
1
0
1
AND
0
0
0
1
a
0
0
1
1
b
0
1
0
1
OR
0
1
1
1
a
0
1
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Copyright 2006
Frank Vahid
NOT
1
0
10
Q2. either of a or b is 1.
Answer: F = a OR b
Q4. a is 1 and b is 0.
Answer: F = a AND NOT(b)
Digital Design
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Frank Vahid
11
12
NOT
Symbol
For telephone
Switches
(1930s) switching and other
Truth table
OR
F
x
0
1
Showed application
of Boolean algebra
to design of switchbased circuits
x
F
F
1
0
x
0
0
1
1
electronic uses
Shannon (1938)
AND
y
0
1
0
1
F
0
1
1
1
x
0
0
1
1
y
y
0
1
0
1
F
0
0
0
1
y
y
x
Transistor
x
circuit
F
F
y
Digital design
y
x
0
1
13
x
0
1
x
0
0
1
F
0
0
1
time
F
0
0
time
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Copyright 2006
Frank Vahid
0
1
time
14
Turn on lamp (F=1) when motion sensed (a=1) and no light (b=0)
F = a AND NOT(b)
Build using logic gates, AND and NOT, as shown
We just built our first digital circuit!
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Frank Vahid
15
F
(a)
a
c
(b)
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Frank Vahid
16
BeltWarn
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Frank Vahid
17
yes
F
no
yes
ok
not ok
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Frank Vahid
18
Boolean Algebra
2.5
While symbols come from regular algebra, dont say times or plus
Boolean algebra precedence, highest precedence first.
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Frank Vahid
Symbol
Name
()
Description
NOT
AND
OR
19
Q2. F = ab + c.
Answer: the problem is identical to the previous problem, using the shorthand
notation for *.
Q3. F = ab.
a
Answer: we first evaluate b because NOT has precedence over AND, resulting in
F = 1 * (1) = 1 * (0) = 1 * 0 = 0.
Q4. F = (ac).
Answer: we first evaluate what is inside the parentheses, then we NOT the result,
yielding (1*0) = (0) = 0 = 1.
Q5. F = (a + b) * c + d.
Answer: Inside left parentheses: (1 + (1)) = (1 + (0)) = (1 + 0) = 1. Next, * has
precedence over +, yielding (1 * 0) + 1 = (0) + 1. The NOT has precedence over
the OR, giving (0) + (1) = (0) + (0) = 0 + 0 = 0.
Digital Design
Copyright 2006
Frank Vahid
20
10
Represents a value (0 or 1)
Three variables: a, b, and c
Literal
Appearance of a variable, in true or complemented form
Nine literals: a, b, c, a, b, c, a, b, and c
Product term
Product of literals
Four product terms: abc, abc, ab, c
Sum-of-products
Equation written as OR of product terms only
Above equation is in sum-of-products form. F = (a+b)c + d is not.
Digital Design
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21
Commutative
a+b=b+a
a*b=b*a
Complement
a + a = 1
a * a = 0
Complement property
Replace c+c by 1: ab(c+c) = ab(1).
Identity property
Identity
0+a=a+0=a
1*a=a*1=a
Associative
(a + b) + c = a + (b + c)
(a * b) * c = a * (b * c)
Distributive
a * (b + c) = a * b + a * c
a + (b * c) = (a + b) * (a + c)
Show x + xz equivalent to x + z.
Second distributive property
Replace x+xz by (x+x)*(x+z).
Complement property
Replace (x+x) by 1,
Identity property
replace 1*(x+z) by x+z.
22
11
Equation: f = hc + hpc
h
DoorOpener
f
c
p
f = ch(1) + chp
f = ch + chp
f = hc + hpc
Same!
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Frank Vahid
23
a+1=1
a*0=0
Behavior
Idempotent Law
a+a=a
a*a=a
Transform
Involution Law
(a) = a
DeMorgans Law
(a + b) = ab
(ab) = a + b
Very useful!
To prove, just
evaluate all
possibilities
Digital Design
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Frank Vahid
S = a + b + c
Alternative: Instead of
lighting Available,
light Occupied
Opposite of
Available function S
= a + b + c
So S = (a + b + c)
S = (a) * (b) * (c)
(by DeMorgans
Law)
S = a * b * c (by
Involution Law)
Circuit
Circuit
a
b
a
b
c
24
12
2.6
Equation 1: F(a,b) = ab + ab
Equation 2: F(a,b) = a
(c)
(b)
Circuit 1
Truth table
a
(d)
Circuit 2
The function F
25
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Frank Vahid
(a)
b
0
1
0
1
a
0
0
0
0
1
1
1
1
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
(b)
a
0
0
0
0
1
1
1
1
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
F
0
0
0
0
0
1
1
1
a
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
b
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
c
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
d
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(c)
26
13
Inputs
b
0
1
0
1
a
0
0
1
1
Outputs
Term
F
1
1
0
0
F = sum of
ab
ab
F = ab + ab
Q: Convert to equation
a
0
0
0
0
1
1
1
1
Digital Design
Copyright 2006
Frank Vahid
a
0
0
1
1
b
0
1
0
1
Output
a' b'
1
0
0
0
a' b
0
1
0
0
F
1
1
0
0
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
F
0
0
0
0
0
1
1
1
abc
abc
abc
f = chp + chp + ch
f = ch(p + p) + chp
f = ch(1) + chp
Same as f = hc + hpc?
Used algebraic methods
But if we failed, does that prove
not equal? No.
f = ch + chp
(what if we stopped here?)
f = hc + hpc
Digital Design
Copyright 2006
Frank Vahid
b
0
1
0
1
F = ab +
ab + ab
F
1
1
0
1
a
0
0
1
1
me
a
S
b
0
1
0
1
F
1
1
0
1
28
14
Digital Design
Copyright 2006
Frank Vahid
Multiple-Output Circuits
Many circuits have more than one output
Can give each a separate circuit, or can share gates
Ex: F = ab + c, G = ab + bc
a
b
F
c
b
F
c
(a)
(b)
15
Multiple-Output Example:
BCD to 7-Segment Converter
a
f
b
g
e
c
d
abcdefg =
(a)
1111110
0110000
1101101
(b)
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Frank Vahid
31
2.7
Description
Step 2 Convert to
equations
Step 3 Implement
as a gatebased
circuit
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Frank Vahid
32
16
10101011 0
a
b
c
abc
bcd
d
cde
e
y
def
f
efg
g
fgh
h
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Frank Vahid
33
a
b
c
a
b
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Frank Vahid
a
b
c
a
b
c
y
a
b
c
a
b
c
a
b
c
34
17
2.8
More Gates
1
NAND
NOR
XOR
XNOR
F
x
0
0
1
1
y
0
1
0
1
F
1
1
1
0
NOR
NAND
x
0
0
1
1
y
0
1
0
1
F
1
0
0
0
x
0
0
1
1
y
0
1
0
1
F
0
1
1
0
x
0
0
1
1
y
0
1
0
1
F
1
0
0
1
x
y
0
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Copyright 2006
Frank Vahid
35
a
b
c
S = (abc)
Detecting all 0s
Use NOR
0
0
0
Detecting equality
Use XNOR
Detecting odd # of 1s
a0
b0
a1
b1
A=B
a2
b2
Use XOR
Useful for generating parity
bit common for detecting
errors
Digital Design
Copyright 2006
Frank Vahid
36
18
Completeness of NAND
Any Boolean function can be implemented using just NAND
gates. Why?
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Frank Vahid
37
a
0
0
1
1
b
0
1
0
1
F
0 or 1
0 or 1
0 or 1
0 or 1
N variables
24 = 16
possible functions
f4
f5
f6
f7
f8
f9
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
a OR b
a NOR b
a XNOR b
b
D
N
A
a
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Frank Vahid
b
R
O
b
R
O
a
b
R
O
N
a
b
R
O
N
X
a
'
1
0
1
1
1
1
0
0
1
1
0
1
'
1
1
1
0
1
1
1
1
f3
0
0
1
0
a NAND b
f2
0
0
0
1
f1
0
0
0
0
f0
0
1
0
1
a AND b
a
0
0
1
1
a XOR b
2N rows
N
2(2 ) possible functions
2 choices
2 choices
2 choices
2 choices
b
D
A
N
a
38
19
2.9
d0
d0
i0 d1
0 1
i0 d1
1 0
i0 d1 0 1
i0 d1
i1 d2
0 0
i1 d2
0 1
i1 d2 1 1
i1 d2
d3
d3
d0
d3
d1
i1i0
i1i0
d2
i1i0
d3
n-input decoder:
outputs
d0
i0
d1
i1
d2
e d3
2n
d3 0
d0
i1i0
Internal design
d0 0
d0
i0
d1
i1
d2
e d3
i0
i1
Digital Design
Copyright 2006
Frank Vahid
39
Decoder Example
New Years Eve
Countdown Display
Microprocessor counts
from 59 down to 0 in
binary on 6-bit output
Want illuminate one of 60
lights for each binary
number
Use 6x64 decoder
21 0
210
r
o
s
e
p
o
ci
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
i0
i1
i2
i3
i4
i5
d0
d1
d2
d3
d58
d59
d60
d61
6x64 d62
dcd
d63
e
0
0
1
0
0
1
0
0
1
0
0
0
0
1
2
3
Happy
New Year
0 0 0
0 0 0
58
59
4 outputs unused
Digital Design
Copyright 2006
Frank Vahid
40
20
Multiplexor (Mux)
Mux: Another popular combinational building block
Routes one of its N data inputs to its one output, based on binary
value of select inputs
4 input mux needs 2 select inputs to indicate which input to route
through
8 input mux 3 select inputs
N inputs log2(N) selects
Digital Design
Copyright 2006
Frank Vahid
41
i1
s0
21
i0
i0
i1
i1
i1
s0
0
i0 (1*i0=i0)
i0
21
0
s0
1
i0
(0+i0=i0)
2x1 mux
0 s0
i0
4 1
i0
i1
i2
i1
d
d
i2
i3
s1 s0
i3
4x1 mux
s1
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Copyright 2006
Frank Vahid
s0
42
21
Mux Example
City mayor can set four switches up or down, representing
his/her vote on each of four proposals, numbered 0, 1, 2, 3
City manager can display any such vote on large green/red
LED (light) by setting two switches to represent binary 0, 1,
2, or 3
Mayors switches
Use 4x1 mux
1
on/off
4x1
i0
2
i1
d
i2
i3
Green/
Red
LED
s1 s0
manager's
switches
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Copyright 2006
Frank Vahid
43
i0
i1
2 1
d
s0
a2
b2
i0
i1
2 1
d
s0
a1
b1
2 1
i0
d
i1
s0
a0
b0
s0
i0
i1
2 1
d
s0
4
I0
4-bit
2x1
D
4
B
I1
Simplifying
notation:
4
C
4
C
is short
for
s0
c3
s0
c2
c1
c0
44
22
45
Additional Considerations
2.10
Inputs
i0
i0
i1
Outputs
d3
Simulate
i1
Outputs
d3
d2
d2
d1
d1
d0
d0
Simulate
Schematic capture
Computer tool for user to capture logic circuit graphically
Simulator
Computer tool to show what circuit outputs would be for given inputs
Outputs commonly displayed as waveform
Digital Design
Copyright 2006
Frank Vahid
46
23
Additional Considerations
Non-Ideal Gate Behavior -- Delay
47
Chapter Summary
Combinational circuits
Circuit whose outputs are function of present inputs
No state
48
24