SANT BABA BHAG SINGH UNIVERSITY

2nd semester 2015-2016 (Test-1)

M.Tech(ECE)
Institute: UIET
Department: ECE
Time: 3 hrs.
Note: Attempt all questions.

Subject: Advanced Microprocessor & Embedded System

Subject Code: ECE-510
M.M 50

Q.1

(10*1=10)

a)
b)
c)
d)
e)
f)

How the 20-bit effective address is calculated in 8086 processor?

What do you mean by pipelining in 8086?
Which addressing mode often addresses a 2-D array of memory data?
Draw the format of 8086 flag register?
What is the use of BIU in 8086?
What are the advantages of memory segmentation?

g)

Why is a Capacitor connected between Reset and

h)
i)

Which interrupts are used for critical events?

The instruction MOV CL, [BX+4] shows which addressing mode?

j)

What is the size of 8086 instruction? What is meant by instruction queue?

V cc pin?

(5*4=20)
Q.2 The original contents of AX, BL word-sized memory location SUM, and carry flag CF are 1234H, ABH,
00CDH, and 0H, respectively. Describe the results of executing the following sequence of instructions:
ADD AX,[SUM]
ADC BL, 05H
INC WORD PTR [SUM]
Q.3 Explain the instruction a) DAA b)LEA c)RCL d)LAHF e)SAHF f)LDS g) ROR h) TEST
Q.4 Explain the function of various flags of 8086 microprocessor?
Q.5 Describe any five addressing modes with suitable example?
Q.6 Explain 8284 clock generator and draw its block diagram?
(2*10=20)
Q.7 Describe Intel 8086 microprocessor architecture in detail?
Or
Write an ALP in 8086 to add two 16 bit hexadecimal numbers?
Q.8 With appropriate pin diagrams explain the minimum and maximum mode operations of 8086?
Or
Distinguish between a memory read and write machine cycle. Draw the timing diagrams in minimum and
maximum modes of operation?