Notes:

Digital and Data Communications

Prepared by: Jan Ray C. Rulida, ECE

PHASE-SHIFT KEYING
- is another form of angle-modulated, constant-amplitude digital modulation.
- is an M-ary digital modulation similar to conventional phase modulation except with PSK the input is a
binary digital signal and there are a limited number of output phases possible.

Binary Phase-Shift Keying (BPSK)

- the simplest form of PSK, where N=1 and M=2.
- one phase represents a logic 1, the other phase represents a logic 0.
- as the input digital signal changes state, the phase of the output carrier shifts between two angles
that are separated by 180°.
- other names: phase reversal keying (PRK) and biphase modulation.

BPSK transmitter:

The figure below shows a simplified block diagram of a BPSK transmitter.

Level Balanced Bandpass Modulated

Binary converter Modulator filter PSK
data in (UP to BP) output

Buffer

Reference
carrier
oscillator

The balanced modulator acts as a phase reversing switch. Depending on the logic condition of the digital
input, the carrier is transferred to the output either in phase or 180 degrees out of phase with the reference
carrier oscillator.

Bandwidth Considerations of BPSK:

- A balanced modulator is a product modulator.

- In a BPSK modulator, the carrier input signal is multiplied by the binary data. If +1V is assigned to a

logic 1 and a -1V is assigned to a logic 0, the input carrier (sin ωct) is multiplied by either a + or – 1.
Consequently, the output signal is either +1sin ωct or -1sinωct; the first represents a signal that is in
 phase with the reference oscillator, the latter a signal that is 180 degrees out of phase with the
reference oscillator.
- the output rate of change (baud) is equal to the input rate of change (bps).

- The fundamental frequency (fa) of an alternative 1/0 bit sequence is equal to one-half of the bit rate
(fb/2).
- Mathematically, the output of a BPSK modulator is proportional to

BPSK output =  sin  2f a t     sin  2f c t  

where: fa = maximum fundamental frequency of binary input (hertz)
fc = reference carrier frequency (hertz)

Solving for the trig identity for the product of two sine functions,
1 1
cos 2  f c  f a  t   cos 2  f c  f a  t 
2 2

Thus, the minimum double-sided Nyquist bandwidth (B) is

fc  fa
f  f
c a
or  fc  f
  f c  f a  a

2 f a

and because fa = fb/2, where fb = input bit rate,

2 fb
B  fb
2

where: B = is the minimum double-sided Nyquist bandwidth.

BPSK Receiver:

 sin( c t ) Balanced
BPF Modulator LPF Level UP
converter Binary
BPSK data
input output
sin( c t )
Coherent Clock
carrier recovery
recovery

The figure above shows the block diagram of a BPSK receiver.

- The input signal may be + sin(c t ) or  sin( c t ) . The coherent carrier recovery circuit detects and
regenerates a carrier signal that is both frequency and phase coherent with the original transmit carrier. The
balanced modulator is a product detector; the output is the product of the two inputs (the BPSK signal and the
recovered carrier).
- The low-pass filter (LPF) separates the recovered binary data from the complex demodulated signal.

Quaternary Phase-Shift Keying (QPSK)

- also called quadrature PSK
- another form of angle-modulated, constant-amplitude digital modulation
- is an M-ary encoding scheme where N=2 and M=4
- four output phases are possible for a single carrier frequency
- the binary input data for QPSK are combined into groups of 2 called dibits
- each symbol represents two bits
- the bit rate is twice the baud rate
- with two input bits, there are four possible input conditions (00, 01, 10, and 11), thus having four
output phases

QPSK Phasor and Constellation Diagrams

Phasor Diagram Constellation Diagram

cos(
cos( c t )c
t)

10 11 10 ● ● 11

sin(c
sin( t )c t ) sin(c
sin( t )c t )

00 01 00 ● ● 01

cos(
cos( c t )c
t)

QPSK truth table

Binary Input Output Phase
Q I
0 0 -135°
0 1 -45°
1 0 135°
1 1 45°

QPSK Bandwidth Considerations (fN)

 f  f
f N  2 b   b
 4 2
where: fN = double-sided Nyquist bandwidth
fb = input bit rate

M-ary Encoding (for M=4)

N = log2 M
N = 2 (for M = 4)

where: N = number of input bits

M = number of output conditions possible with N bits