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Space Wire
Space Wire
Dr SM Parkes,
Applied Computing, University of Dundee,
Dundee, DD1 4HN, Scotland, UK
Tel: +44 1382 345194, Fax +44 1382 345509
email: sparkes@computing.dundee.ac.uk
DRIVER
100R
EMC Specifications
-
The EMC specifications for SpaceWire have been + - RECEIVER
derived from the EMC specifications for the
Rosetta [6] and ENVISAT [7] missions. A
preliminary EMC specification is given in [8].
Initial EMC testing was performed by Patria
Finavitec Oy with support from the University of Figure 2. LVDS Operation
Dundee. The testing covered: The LVDS driver uses current mode logic. A
• Radiated emission, electric and magnetic constant current source of around 3.5mA provides
fields, the current that flows out of the driver, along the
transmission medium, through the 100-ohm
• Radiated susceptibility, electric and magnetic
termination resistance and back to the driver via the
fields,
transmission medium. Two pairs of transistor
• Conducted susceptibility, switches in the driver control the direction of the
• Electro-static discharge, current flow through the termination resistor.
When the driver transistors marked “+” in figure 2
• Signalling rate,
are turned on and those marked “-” are turned off,
• Bit error rate, current flows as indicated by the arrows on the
• Fault isolation, and diagram creating a positive voltage across the
termination resistor. When the two driver
• Power consumption.
transistors, marked “-”, are turned on and those
SpaceWire is expected to meet all the EMC marked “+” are turned off, current flows in the
requirements. It has already been shown to meet opposite direction producing a negative voltage
many of them [9]. across the termination resistor. LVDS receivers are
specified to have high input impedance so that most
Signal Level of the current will flow through the termination
The signal level part of the SpaceWire standard resistor to generate around ±350mV with the
covers signal voltage levels, noise margins and nominal 3.5mA current source.
signal encoding. LVDS has several features that make it very
attractive for data signalling [10]:-
• Near constant total drive current (+3.5mA for Data Encoding
logic 1 and -3.5mA for logic 0) which SpaceWire uses Data-Strobe (DS) encoding. This
decreases switching noise on power supplies. is a coding scheme which encodes the transmission
• High immunity to ground potential difference clock with the data into data and strobe so that the
between driver and receiver - LVDS can clock can be recovered by simply XORing the data
tolerate at least ±1V ground difference. and strobe lines together. The data values are
transmitted directly and the strobe signal changes
• High immunity to induced noise because of
state whenever the data remains constant from one
differential signaling normally using twisted-
data bit interval to the next. This coding scheme is
pair cable.
illustrated below in figure 4. The DS encoding
• Low EMI because small equal and opposite scheme is also used in the IEEE-1355-1995 [1] and
currents create small electromagnetic fields IEEE 1394-1995 (Firewire) standard [11].
which tend to cancel one another out.
• Not dependent upon particular device supply
Data 0 1 0 0 1 1 0 1 1 0
voltage(s).
• Simple 100 ohm termination at receiver.
D
• Failsafe operation - the receiver output goes to
the high state (inactive) whenever
S
• the receiver is powered and the driver is
not powered,
• the inputs short together,
Figure 4. Data-Strobe (DS) Encoding
• input wires are disconnected.
• Power consumption is typically 50mW per A SpaceWire link comprises two pairs of
driver/receiver pair for LVDS compared to differential signals, one pair transmitting the D and
S signals in one direction and the other pair
120mW for ECL.
transmitting D and S in the opposite direction. That
The signalling levels used by LVDS are illustrated is a total of eight wires for each bi-directional link.
in figure 3.
Character Level
Driver Voltage Across 100 ohm Termination
1 0 1
SpaceWire employs the character level protocol
VB OFF ON OFF defined in IEEE 1355-1995.
+247 to 454 mV There are two types of characters:-
• Data characters which hold an eight-bit data
1.2V typ. O V (diff.)
-247 to 454 mV
VA
value, transmitted least-significant bit first.
Each data character contains a parity-bit, a
data-control flag and the eight-bits of data.
Receiver Input Thresholds The parity-bit covers the previous eight-bits of
data, the current parity-bit and the current data-
+Vi
+100 mV
Transition
control flag. It is set to produce odd parity so
O V (diff.)
-100 mV
Region that the total number of 1’s in the field covered
-Vi
is an odd number. The data-control flag is set
to zero to indicate that the current character is a
Figure 3. LVDS Signalling Levels data character.
There are two standards which define LVDS • Control characters which hold a two-bit control
1. TIA/EIA-644 that defines the driver output code. Each control character is formed from a
characteristics and the receiver input parity-bit, a data-control flag and the two-bit
characteristics only [3]. control code. The data-control flag is set to one
to indicate that the current character is a
2. IEEE 1596.3 Low Voltage Differential
control character. Parity coverage is similar to
Signaling (LVDS) for Scalable Coherent
that for a data character. One of the four
Interface (SCI) that defines the signalling
possible control characters is the escape code
levels used and the encoding for packet
(ESC). This can be used to form longer control
switching used in SCI data transfers [2].
codes. One longer control code is specified
One of these two standards will be used to define which is the NULL code. NULL is formed
LVDS for SpaceWire. from ESC followed by the flow control
character (FCC). NULL is transmitted
whenever a link is not sending data or control window (850 nsec). Once a disconnection error
tokens to keep the link active and to support has been detected the link attempts to restart
link disconnect detection. (see below).
The data characters, control characters and parity • Detection of Parity Errors: Parity errors
coverage are illustrated in figures 5 and 6. occuring within a data or control character are
detected when the next character is sent, since
Data Characters
the parity bit for a data or control token is
P 0 X X X X X X X X contained in the next character. Once a parity
0 1 2 3 4 5 6 7
LSB MSB error has been detected the link will attempt to
Data-Control Flag
Parity Bit
restart (see below).
Control Characters • Link Restart: Following an error or reset the
P 1 0 0 FCC Flow Control Character
link attempts to re-synchronise and restart
using an “exchange of silence” protocol (see
P 1 0 1 EOP_1 Normal End of Packet
figure 7). The end of the link that is either
P 1 1 0 EOP_2 Exceptional End of Packet reset or that finds an error, ceases transmission.
P 1 1 1 ESC Escape
This is detected at the other end of the link as a
link disconnect and that end stops transmitting
P 1 1 1 P 1 0 0 NULL
too. The first link resets its input and output
for 6.4 usec to ensure that the other end will
detect the disconnect. The other end will also
Figure 5. Data and Control Characters
wait for 6.4 usec after ceasing transmission.
Each link then waits a further 12.8 usec before
starting to transmit. These periods of time are
D a ta C h a r a c t e r E O P _ 1 F C C
sufficient to ensure that the two links are
P 0 X X X X X X X X P 1 0 1 P 1 0 0
resynchronised and ready to receive data.
Parity Parity One End Other End
Coverage Coverage of Link of Link
Error Detected
Disconnect Detected
STOP
Figure 6. Parity Coverage TX STOP
TX
RESET I/P
Exchange Level & WAIT RESET I/P
& WAIT
After 6.4 usec
An exchange level protocol is proposed following After 6.4 usec
WAIT
that defined in IEEE 1355-1995 which provides the 12.8 usec WAIT
following services:- 12.8 usec
After 12.8 usec
After 12.8 usec
• Initialisation: Following reset the link output SEND
NULLS SEND
is held in the reset state until it is instructed to Null Received
NULLS
begin transmission. The link output then starts NORMAL Null Received
OPER. NORMAL
to transmit NULL characters and the link input OPER.
is monitored for the reception of a character.
Once a valid character has been received on the Figure 7. Link Restart
input then the output can start normal
operation. Packet Level
• Flow Control: A transmitter is only allowed to The packet level protocol follows the packet level
transmit data characters if there is space in the protocol defined in IEEE-1355. It defines how
receiver buffer for them. The receiver message is delivered from source to destination.
indicates that there is space for eight more data The format of a packet is illustrated in figure 8.
characters by sending a flow control character
(FCC). If multiple FCC’s are received then it D E S T IN A T IO N
means that there is a corresponding amount of
space available in the receiver buffer e.g. four
FCC’s means that there is room for 32 data P A Y L O A D
characters.
• Detection of Disconnect Errors: Link
disconnection is detected when following E N D O F P A C K E T M A R K E R
reception of a data bit no new data bit is
received within a link disconnect timeout Figure 8. Packet Format
The “Destination” is a list of one or more bytes that standard. Particular mention should be made of
represent the destination identity. This list of bytes Philippe Armbruster and Josep Rosello at ESTEC,
represents either the identity code of the destination and Tim Pike and his team at Dornier
node or the path that the packet will take to get to Satellitensysteme. Acknowledgment is also given
the destination node. to Taisto Tuominem and Jyrki Laaksonen of Patria
The “Payload” is the data or message to be Finavitec Oy for the work done on EMC testing.
transferred from source to destination. The format
of payload is not defined by the SpaceWire REFERENCES
standard at present although extensions to support [1] IEEE Computer Society, “IEEE Standard for
fault tolerance are being considered. Heterogeneous Interconnect (HIC) (Low-Cost, Low-
The “End of Packet Marker” (EOP) is used to Latency Scalable Serial Interconnect for Parallel
indicate the end of a packet. Two EOP markers are System Construction)”, IEEE Standard 1355-1995,
IEEE, June 1996.
defined.
[2] IEEE Computer Society, “IEEE Standard for Low-
1. EOP_1 Normal end_of_packet marker - Voltage Differential Signals (LVDS) for Scalable
indicates end of packet Coherent Interface (SCI)”, IEEE Standard 1596.3-
2. EOP_2 Exceptional end_of_packet marker - 1996, IEEE, July 1996.
indicates end of packet or an error [3] Telecommunications Industry Association,
The packet level protocol provides suport for “Electrical Characteristics of Low Voltage
packet routing via wormhole routing switches [12]. Differential Signaling (LVDS) Interface Circuits”,
ANSI/TIA/EIA-644-1995, March 1996.
[4] Rosello J, Parkes SM and Christen AZ, “ From
Higher Level Protocols IEEE-1355 to SpaceWire”, Proceedings DASIA’99,
Higher level protocols are being considered to Lisbon, Portugal, May 1999, To be published.
support fault tolerance. [5] Parkes SM and Martin I, “Lunar Surface Simulation
– Modelling for Vision-Guided Lunar Landers”,
Proceedings DASIA’99, Lisbon, Portugal, May 1999,
CONCLUSIONS To be published.
This paper has provided an overview of the [6] Konig W, “Rosetta EMC Requirements
proposed SpaceWire standard. Specification”, RO-DSS-RS-1002, Issue 1A,
Several issues have to be resolved before Daimler-Benz Aerospace, August 1997.
SpaceWire can be presented as a draft ESA [7] Gottschlag D and Aulton J, “ ENVISAT-1 EMC
standard: Requirements Specification”, PO-RS-DOR-PL-0006,
Issue 2, Dornier GmbH, February 1994.
1. Provide specification for space qualifiable
cable and connectors. [8] Parkes SM et al, “Review of Standard and Status”,
Digital Interface Circuit Evaluation Study WP1000
2. Consider high-level virtual channel protocols. Technical Report, Document No. UoD-DICE-TN-
3. Resolve problems with IEEE-1355 start- 1000, ESA Contract No. 12693/97/NL/FM,
up/reconnect problems. University of Dundee, July 1998.
These activities are planned as part of the DICE [9] Parkes SM and Tuominen T, “EMC Test Results”,
study phase 2. A draft standard will be issued to Digital Interface Circuit Evaluation Study WP3000
Technical Report, Document No. UoD-DICE-TN-
members of a SpaceWire working group later in
3000, ESA Contract No. 12693/97/NL/FM,
1999 [4]. University of Dundee, April 1999.
SpaceWire is set to become an important standard [10] Parkes SM, “High-Speed, Low-Power, Excellent
for satellite on-board data handling. It combines EMC: LVDS for On-Board Data Handling”,
appropriate features from two commercial Proceedings of the 6th International Workshop on
standards with improvements necessary to ensure Digital Signal Processing Techniques for Space
that it is suitable for many space missions. Applications, ESTEC, Sept. 1998.
[11] IEEE Computer Society, “IEEE Standard for a
ACKNOWLEDGEMENTS High Performance Serial Bus”, IEEE Standard 1394-
1995, IEEE, August 1996.
The Author would like to acknowledge the support
[12] May MD, Thompson PW & Welch PH,
of ESA for the Digital Interface Circuit Evaluation “Networks, Routers & Transputers: Function,
study, ESA Contract No. 12693/97/NL/FM, on Performance and Application”, IOS Press, ISBN 90
which this paper is based. Many people have 5199 129 0, 1993.
contributed to the development of the SpaceWire