FQB9N50C/FQI9N50C

QFET TM

FQB9N50C/FQI9N50C
500V N-Channel MOSFET

General Description Features

These N-Channel enhancement mode power field effect • 9 A, 500V, RDS(on) = 0.8 Ω @VGS = 10 V
transistors are produced using Fairchild’s proprietary, • Low gate charge ( typical 28 nC)
planar stripe, DMOS technology. • Low Crss ( typical 24 pF)
This advanced technology has been especially tailored to • Fast switching
minimize on-state resistance, provide superior switching • 100% avalanche tested
performance, and withstand high energy pulse in the • Improved dv/dt capability
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.

D
D !

"

! "
"
G!
D2-PAK I2-PAK "

G S FQB Series FQI Series

!
G D S
S

Absolute Maximum Ratings TC = 25°C unless otherwise noted

Symbol Parameter FQB9N50C/FQI9N50C Units

VDSS Drain-Source Voltage 500 V
ID Drain Current - Continuous (TC = 25°C) 9 A
- Continuous (TC = 100°C) 5.4 A
IDM Drain Current - Pulsed (Note 1) 36 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 360 mJ
IAR Avalanche Current (Note 1) 9 A
EAR Repetitive Avalanche Energy (Note 1) 13.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 135 W
- Derate above 25°C 1.07 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
TL 300 °C
1/8" from case for 5 seconds

Thermal Characteristics
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 0.93 °C/W
RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 500 -- -- V
∆BVDSS Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.57 -- V/°C
/ ∆TJ Coefficient
IDSS VDS = 500 V, VGS = 0 V -- -- 1 µA
Zero Gate Voltage Drain Current
VDS = 400 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 4.5 A -- 0.65 0.8 Ω
On-Resistance
gFS Forward Transconductance VDS = 40 V, ID = 4.5 A (Note 4) -- 6.5 -- S

Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 790 1030 pF
Coss Output Capacitance f = 1.0 MHz -- 130 170 pF
Crss Reverse Transfer Capacitance -- 24 30 pF

Switching Characteristics
td(on) Turn-On Delay Time -- 18 45 ns
VDD = 250 V, ID = 9 A,
tr Turn-On Rise Time -- 65 140 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 93 195 ns
(Note 4, 5)
tf Turn-Off Fall Time -- 64 125 ns
Qg Total Gate Charge VDS = 400 V, ID = 9 A, -- 28 35 nC
Qgs Gate-Source Charge VGS = 10 V -- 4 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 15 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 9 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 36 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 9 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 9 A, -- 335 -- ns
Qrr Reverse Recovery Charge dIF / dt = 100 A/µs (Note 4) -- 2.95 -- µC

Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 8 mH, IAS = 9A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 9A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Typical Characteristics

VGS
Top : 15.0 V
10.0 V
8.0 V
1
7.0 V 10
1
10 6.0 V
o
5.5 V 150 C
ID, Drain Current [A]

ID, Drain Current [A]

5.0 V
Bottom : 4.5 V
o
-55 C
o
25 C
0
10
0 10

※ Notes :
※ Notes :
1. 250μ s Pulse Test
1. VDS = 40V
2. TC = 25℃
2. 250μ s Pulse Test
-1 -1
10 10
10
-1
10
0
10
1 2 4 6 8 10

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

2.0

VGS = 10V 1
10
Drain-Source On-Resistance

IDR, Reverse Drain Current [A]

1.5
RDS(ON) [Ω ],

1.0
0
VGS = 20V 10

150℃
※ Notes :
0.5 1. VGS = 0V
※ Note : TJ = 25℃ 25℃ 2. 250μ s Pulse Test
-1
10
0 5 10 15 20 25 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation with Source Current
and Temperature

2000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd VDS = 100V
10
1600
VDS = 250V
VGS, Gate-Source Voltage [V]

Ciss 8
VDS = 400V
Capacitance [pF]

1200
Coss
6

800
※ Notes ; 4
Crss 1. VGS = 0 V
2. f = 1 MHz
400
2

※ Note : ID = 9A

0 0
10
-1
10
0
10
1 0 5 10 15 20 25 30

VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Typical Characteristics (Continued)

1.2 3.0

2.5
Drain-Source Breakdown Voltage

1.1

Drain-Source On-Resistance
RDS(ON) , (Normalized)
BV DSS , (Normalized)

2.0

1.0 1.5

1.0

0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
0.5
2. ID = 250 μ A 1. VGS = 10 V
2. ID = 4.5 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C]
o TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs Temperature vs Temperature

2
10
Operation in This Area 10
is Limited by R DS(on)
10 µs

100 µs 8

1
10
ID, Drain Current [A]

1 ms
ID, Drain Current [A]

10 ms 6
100 ms
DC
4
0
10
※ Notes :
o
1. TC = 25 C
o
2
2. TJ = 150 C
3. Single Pulse

-1
10 0
0 1 2 3
10 10 10 10 25 50 75 100 125 150

VDS, Drain-Source Voltage [V] TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature

0
10
Z (t), T h e rm a l R e s p o n s e

D = 0 .5

0 .2
※ N o te s :
10
-1 0 .1 1 . Z θ J C( t ) = 0 . 9 3 ℃ / W M a x .
2 . D u ty F a c to r , D = t1/t2
0 .0 5 3 . T J M - T C = P D M * Z θ J C( t )

0 .0 2
PDM
0 .0 1
JC

t1
s in g le p u ls e
t2
θ

-2
10

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]

Figure 11. Transient Thermal Response Curve

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Gate Charge Test Circuit & Waveform

VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
3mA

Charge

Resistive Switching Test Circuit & Waveforms

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
10V DUT
td(on) tr td(off)
tf
t on t off

Unclamped Inductive Switching Test Circuit & Waveforms

L BVDSS
1
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)

10V DUT VDD VDS (t)

tp
tp Time

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Mechanical Dimensions

D2 - PAK

Dimensions in Millimeters

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
Mechanical Dimensions

I2-PAK

9.90 ±0.20 4.50 ±0.20

(0.40)

+0.10
1.30 –0.05

1.20 ±0.20
9.20 ±0.20
MAX13.40
(1.46)

(4
5°
)

MAX 3.00
(0.94)
13.08 ±0.20

10.08 ±0.20

1.27 ±0.10 1.47 ±0.10

0.80 ±0.10

+0.10
2.54 TYP 2.54 TYP 0.50 –0.05 2.40 ±0.20

10.00 ±0.20

Dimensions in Millimeters

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009

 FQB9N50C/FQI9N50C
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Definition of Terms
Datasheet Identification
Advance Information
Product Status Definition
Datasheet contains the design specifications for product development. Specifications
Formative / In Design
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later

Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to

No Identification Needed Full Production make changes at any time without notice to improve the design.

Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I40

©2009 Fairchild Semiconductor Corporation Rev. A, Jun 2009