Project 1

Due January 26, 2011

1 Preliminary Stuff
1.1 A Few Notes:
1. All variables and filenames must be named as presented below. Failure to do so will be result in loss
of points.

2. Please test your circuits with waveforms, prior to submission, a crossed wire here or there could cause
an error.

3. All group members must understand the entire project for interactive grading. Equal grades are
not guaranteed.

4. Get started early! This will take a surprising amount of time.

1.2 Rules for Groups:

1. Everyone must be in a group by Friday, January 14.

2. There will be NO group changes for this project after Wednesday, January 19.

3. Groups must be of size 2 unless there are an uneven number of students, in which case there may be
a group of size 3.

4. Individual projects will not be graded.

5. If there is a significant disparity in the contributions between group members it should become
apparent during interactive grading.

2 The Project
2.1 Equality, or not (20 pts)
• Inputs: X[3..0], Y[3..0] - Input numbers, in unsigned binary.

• Outputs: R[1..0] - The result code

– 00 - X = Y
– 01 - X > Y
– 10 - X < Y

• Filename: relation

Compare X and Y and determine the relationship between the two numbers. That is, is X =, <, > Y .

1
2.2 Carry Look Ahead Adder (40 pts)
• Inputs: X[7..0], Y[7..0] - 2’s complement numbers

• Outputs: Z[7..0] - 2’s complement result

• Filename: CLA-Adder

Implement a carry look ahead adder, presented in chapter 5.

2.3 Count Modulo 23 (40 pts)

• Inputs: CLK

• Outputs: CNT[4..0]

• Filename: CntMod23

Implement a count using D Flip-flops which counts on the rising edge of the clock. The count needs to be
modulo 23. Flip flops are presented in chapter 7.