T

CA555, CA555C, LM555C

DUC CT
Semiconductor
T E PRO PRODU
O L E U T E
OBS UBSTIT 5
L E S 7 5 5 December 1999 File Number 834.6
SSIB ICM
PO

Timers for Timing Delays and Oscillator Features

Applications in Commercial, Industrial • Accurate Timing From Microseconds Through Hours
and Military Equipment
• Astable and Monostable Operation
[ /Title The CA555 and CA555C are highly stable timers for use in
(CA55 precision timing and oscillator applications. As timers, these • Adjustable Duty Cycle
5, monolithic integrated circuits are capable of producing • Output Capable of Sourcing or Sinking up to 200mA
CA555 accurate time delays for periods ranging from microseconds • Output Capable of Driving TTL Devices
C, through hours. These devices are also useful for astable
• Normally ON and OFF Outputs
LM555 oscillator operation and can maintain an accurately
controlled free running frequency and duty cycle with only • High Temperature Stability . . . . . . . . . . . . . . . . 0.005%/oC
C) two external resistors and one capacitor.
/Sub- • Directly Interchangeable with SE555, NE555, MC1555,
The circuits of the CA555 and CA555C may be triggered by and MC1455
ject
the falling edge of the waveform signal, and the output of
(Tim- these circuits can source or sink up to a 200mA current or Applications
ers for drive TTL circuits.
Timing • Precision Timing
These types are direct replacements for industry types in
Delays packages with similar terminal arrangements e.g. SE555 • Sequential Timing
and and NE555, MC1555 and MC1455, respectively. The CA555 • Time Delay Generation
Oscilla- type circuits are intended for applications requiring premium • Pulse Generation
tor electrical performance. The CA555C type circuits are
• Pulse Detector
Appli- intended for applications requiring less stringent electrical
cations characteristics. • Pulse Width and Position Modulation
in Part Number Information Functional Block Diagram
Com-
PART NUMBER TEMP. PKG. V+ TRIGGER
mer- (BRAND) RANGE (oC) PACKAGE NO. CONTROL
8 VOLTAGE 5 2
cial,
CA0555E -55 to 125 8 Ld PDIP E8.3
Indus-
CA0555CE 0 to 70 8 Ld PDIP E8.3
trial

DISCHARGE OUTPUT
and LM555CN 0 to 70 8 Ld PDIP E8.3 TRIGGER
THRESHOLD

COMPAR
3
Mili- 6
tary
Pinout OUTPUT
CA555, CA555C, LM555C, (PDIP) THRESHOLD
Equip- TOP VIEW
COMPAR
7
ment)
RESET

GND 1 8 V+ FLIP-FLOP
/Author 4
TRIGGER 2 7 DISCHARGE
()
/Key- OUTPUT 3 6 THRESHOLD
1
words RESET 4 5 CONTROL
VOLTAGE GND
(Harris
Semi-
con-
ductor,
single,
timer,

1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
 CA555, CA555C, LM555C

Absolute Maximum Ratings Thermal Information

DC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A
Operating Conditions Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Temperature Range Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
CA555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CA555C, LM555C . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified

CA555 CA555C, LM555C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

DC Supply Voltage V+ 4.5 - 18 4.5 - 16 V

DC Supply Current (Low State) I+ V+ = 5V, RL = ∞ - 3 5 - 3 6 mA

(Note 2)
V+ = 15V, RL = ∞ - 10 12 - 10 15 mA

Threshold Voltage VTH - (2/3)V+ - - (2/3)V+ - V

Trigger Voltage V+ = 5V 1.45 1.67 1.9 - 1.67 - V

V+ = 15V 4.8 5 5.2 - 5 - V

Trigger Current - 0.5 - - 0.5 - µA

Threshold Current (Note 3) ITH - 0.1 0.25 - 0.1 0.25 µA

Reset Voltage 0.4 0.7 1.0 0.4 0.7 1.0 V

Reset Current - 0.1 - - 0.1 - mA

Control Voltage Level V+ = 5V 2.9 3.33 3.8 2.6 3.33 4 V

V+ = 15V 9.6 10 10.4 9 10 11 V

Output Voltage VOL V+ = 5V, ISINK = 5mA - - - - 0.25 0.35 V

Low State ISINK = 8mA - 0.1 0.25 - - - V

V+ = 15V, ISINK = 10mA - 0.1 0.15 - 0.1 0.25 V

ISINK = 50mA - 0.4 0.5 - 0.4 0.75 V

ISINK = 100mA - 2.0 2.2 - 2.0 2.5 V

ISINK = 200mA - 2.5 - - 2.5 - V

Output Voltage VOH V+ = 5V, ISOURCE = 100mA 3.0 3.3 - 2.75 3.3 - V

High State V+ = 15V, ISOURCE = 100mA 13.0 13.3 - 12.75 13.3 - V

ISOURCE = 200mA - 12.5 - - 12.5 - V

Timing Error (Monostable) R1, R2 = 1kΩ to 100kΩ, - 0.5 2 - 1 - %

C = 0.1µF
Frequency Drift with Temperature - 30 100 - 50 - ppm/oC
Tested at V+ = 5V, V+ = 15V
Drift with Supply Voltage - 0.05 0.2 - 0.1 - %/V

Output Rise Time tR - 100 - - 100 - ns

Output Fall Time tF - 100 - - 100 - ns

NOTES:
2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value.
3. The threshold current will determine the sum of the values of R1 and R2 to be used in Figure 4 (astable operation); the maximum total
R1 + R2 = 20MΩ.

2
 CA555, CA555C, LM555C

Schematic Diagram
THRESHOLD TRIGGER
V+
COMPARATOR COMPARATOR FLIP-FLOP OUTPUT
8

4.7K 830 4.7K 1K 5K 6.8K

D1 D2
Q10 Q16

Q3 Q4 Q19

Q20
OUTPUT
3.9K 3
7K
THRESHOLD
6 Q1 Q7

Q2 Q5 D3
4.7K D4

5K
10K
Q11 Q12 Q18
CONTROL
220
VOLTAGE Q21
Q9 Q13 Q17
5
Q15
2 5K 4.7K
TRIGGER Q14
RESET
100K
4 Q8
RESET
7
DISCHARGE Q6
1 DISCHARGE 100

V-

NOTE: Resistance values are in ohms.

Typical Applications
Reset Timer (Monostable Operation) V+
RESET 5V
Figure 1 shows the CA555 connected as a reset timer. In this
R1 680
mode of operation capacitor CT is initially held discharged by 4
a transistor on the integrated circuit. Upon closing the “start” 7 8
switch, or applying a negative trigger pulse to terminal 2, the EO
CA555 3
integral timer flip-flop is “set” and releases the short circuit 1N4001
6 5
across CT which drives the output voltage “high” (relay
1
energized). The action allows the voltage across the capacitor 2 10K
to increase exponentially with the constant t = R1CT. When RELAY
CT 4.7K COIL
the voltage across the capacitor equals 2/3 V+, the 0.01µF
680
comparator resets the flip-flop which in turn discharges the
S1
capacitor rapidly and drives the output to its low state. START

Since the charge rate and threshold level of the comparator

are both directly proportional to V+, the timing interval is
NOTE: All resistance values are in ohms.
relatively independent of supply voltage variations. Typically,
the timing varies only 0.05% for a 1V change in V+. FIGURE 1. RESET TIMER (MONOSTABLE OPERATION)

Applying a negative pulse simultaneously to the reset

terminal (4) and the trigger terminal (2) during the timing
cycle discharges CT and causes the timing cycle to restart.
Momentarily closing only the reset switch during the timing
interval discharges CT, but the timing cycle does not restart.

3
 CA555, CA555C, LM555C

Figure 2 shows the typical waveforms generated during this Repeat Cycle Timer (Astable Operation)
mode of operation, and Figure 3 gives the family of time Figure 4 shows the CA555 connected as a repeat cycle
delay curves with variations in R1 and CT. timer. In this mode of operation, the total period is a function
of both R1 and R2.
SWITCH S1 “OPEN”
3V
INPUT V+
VOLTAGE (TERMINAL 2) 5V
SWITCH S1 “CLOSED”
0 R1
4
3.3V
CAPACITOR 7 8
EO
VOLTAGE (TERMINALS 6, 7) 3
R2 CA555
0
tD 6 5 RELAY
1 COIL
2
5V

OUTPUT
VOLTAGE CT 0.01µF
(TERMINAL 3)
0

FIGURE 4. REPEAT CYCLE TIMER (ASTABLE OPERATION)

FIGURE 2. TYPICAL WAVEFORMS FOR RESET TIMER
T = 0.693 (R1 + 2R2) CT = t1 + t2
100 where t1 = 0.693 (R1 + R2) CT
TA = 25oC
V+ = 5V and t2 = 0.693 (R2) CT
10
the duty cycle is:
CAPACITANCE (µF)

R1 = 1kΩ
1 t1 R1 + R2
10kΩ ---------------- = ------------------------
100kΩ t 1 + t 2 R 1 + 2R 2
0.1 1MΩ
10MΩ
Typical waveforms generated during this mode of operation
0.01 are shown in Figure 5. Figure 6 gives the family of curves of
free running frequency with variations in the value of
(R1 + 2R2) and CT.
0.001
10-5 10-4 10-3 10-2 10-1 1 10
TIME DELAY(s)

FIGURE 3. TIME DELAY vs RESISTANCE AND CAPACITANCE

4
 CA555, CA555C, LM555C

t2
t1 100
TA = 25oC, V+ = 5V
5V

10

CAPACITANCE (µF)
R1 + 2R2 = 1kΩ
1 10kΩ
0 100kΩ
1MΩ
0.1 10MΩ
3.3V

0.01
1.7V

0.001
10-1 1 10 102 103 104 105
0
FREQUENCY (Hz)
Top Trace: Output voltage (2V/Div. and 0.5ms/Div.)
Bottom Trace: Capacitor voltage (1V/Div. and 0.5ms/Div.)
FIGURE 6. FREE RUNNING FREQUENCY OF REPEAT CYCLE
FIGURE 5. TYPICAL WAVEFORMS FOR REPEAT CYCLE TIMER
TIMER WITH VARIATION IN CAPACITANCE AND
RESISTANCE

Typical Performance Curves

MINIMUM PULSE WIDTH (ns)

150
10 TA = 125oC
9
SUPPLY CURRENT (mA)

TA = -55oC 8
100 25oC
7
0oC
6
50oC
25oC 5
50 70oC 4
125oC 3
2
1
0 0.1 0.2 0.3 0.4
MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE) 0 2.5 5 7.5 10 12.5 15
SUPPLY VOLTAGE (V)
NOTE: Where x is the decimal multiplier of the supply voltage.
FIGURE 7. MINIMUM PULSE WIDTH vs MINIMUM TRIGGER FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE
VOLTAGE
2.0 10.0
SUPPLY VOLTAGE - OUTPUT VOLTAGE (V)

TA = -55oC V+ = 5V
OUTPUT VOLTAGE - LOW STATE (V)

1.6 TA = -55oC
25oC
25oC
1.0 125oC
1.2
125oC

0.8
0.1

0.4
5V ≤ V+ ≤ 15V

0 0.01
1 10 100 1 10 100
SOURCE CURRENT (mA) SINK CURRENT (mA)

FIGURE 9. OUTPUT VOLTAGE DROP (HIGH STATE) vs FIGURE 10. OUTPUT VOLTAGE LOW STATE vs SINK
SOURCE CURRENT CURRENT

5
 CA555, CA555C, LM555C

Typical Performance Curves (Continued)

10.0 10.0
V+ = 10V V+ = 15V

OUTPUT VOLTAGE - LOW STATE (V)

OUTPUT VOLTAGE - LOW STATE (V)

-55oC
TA = -55oC

1.0 1.0
25oC
125oC
125oC 125oC
25oC 25oC
0.1 0.1 TA = -55oC

0.01 0.01
1 10 100 1 10 100
SINK CURRENT (mA) SINK CURRENT (mA)

FIGURE 11. OUTPUT VOLTAGE LOW STATE vs SINK FIGURE 12. OUTPUT VOLTAGE LOW STATE vs SINK
CURRENT CURRENT

1.100
TA = 25oC
NORMALIZED DELAY TIME

1.000
1.005
NORMALIZED DELAY TIME

0.990
0.995

0.980 0.985
0 2.5 5 7.5 10 12.5 15 17.5 -75 -50 -25 0 25 50 75 100 125

SUPPLY VOLTAGE (V) TEMPERATURE (oC)

FIGURE 13. DELAY TIME vs SUPPLY VOLTAGE FIGURE 14. DELAY TIME vs TEMPERATURE

300
PROPAGATION DELAY TIME (ns)

250

200
TA = -55oC

150

100 0 oC
25oC
50 70oC
125oC

0 0.1 0.2 0.3 0.4

MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE)

NOTE: Where x is the decimal multiplier of the supply voltage.

FIGURE 15. PROPAGATION DELAY TIME vs TRIGGER VOLTAGE