POLITEKNIK TUANKU SYED SIRAJUDDIN

E5163 – REKABENTER LITAR BERSEPADU

EXPERIMENT 3: NOR GATE

EXPERIMENT 3 :

TOPIC : NOR GATE

OBJECTIVE : At the end of this session, the students should be able:

- to use L-edit software.
- to draw stick diagram
- to draw CMOS layout used NOR gate.
-
EQUIPMENT : 1. L-Edit software
2. Multi Colour Pen (GREEN, PURPLE, BLUE,
BLACK, RED)

PROCEDURE 1. Draw a NOR gate with below specification. Split to 1 leg.

Pmos - 20 λ
Nmos - 14 λ

2. After the drawing is complete, Save your file : File>Save give

a file name.

3. Check your layout using Design Rule Check (DRC). Follow

this step :

Tools>DRC and click OK for run a design rule checker which

determines whether a design obeys a specific set of rules. Design
rule violations can be reported directly on the layout, in a text file
or both. If you get a message ‘No DRC errors found’ click OK.