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LabVIEW Simulation Module
Simulate dynamic systems including controllers & plants
Real-time implementation for rapid control prototyping or hardware-in-the-loop
simulation
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LabVIEW Simulation Module Benefits
Complete simulation and real-time implementation capability - stay in
one environment from design to test to implementation
LabVIEW user interface to change and observe parameters as
simulation or control system is running
Use any LabVIEW VI or programming structure inside or outside of
simulation loops:
± Integrated design and simulation, batch simulation
± DAQ, RIO, Vision, or CAN for I/O and feedback
Easily create parallel and multirate simulation or control loops
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LabVIEW Simulation Module Overview
Linear systems ± continuous and
discrete time
Nonlinear systems blocks and lookup
tables
Signal generation and graphing
Fixed-step, variable step, and stiff
solvers
Trimming and linearization
Model hierarchy
Integration with Formula node and
MathScript node (through subVI)
Integration with 3D picture control for
system visualization
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-ardware Options for LV Sim
Offline simulation ± desktop computers
Real-time simulation and control:
± PXI
± Desktop computers
± CompactRIO
± Compact FieldPoint
± Single board computers (SBC)
± 32 bit processors w/ LV Embedded (pioneer stage)
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Little or No Learning Curve for The Mathworks, Inc.
Simulink® Software Users
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LabVIEW is the original «
Little or No Learning Curve for The MathWorks, Inc. Simulink® Software
Users
LabVIEW The Simulink® software
Simulation Module environment
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LabVIEW Loop Structures
LabVIEW While Loop
LabVIEW Timed Loop
± precise timing
LabVIEW Simulation Loop
± precise timing + ODE solver
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Simulation Parameter Configuration
Interactive configuration
Programmatic
configuration
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LabVIEW Simulation Module Demo
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Debugging and Errors
Create indicator for error output of
Simulation Loop
Utilities>>Get Simulation Parameters,
create indicator
Execution highlighting
Breakpoints
Probes
Custom probes
Single-stepping
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Software Tip for LV Sim
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Simulation Icon Styles
Can change icon style of
blocks within simulation
loop or subsystem
± Static
± Dynamic
± Text Only
± Express
Right-click on block and
choose ³icon style´
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Simulation Timing Capability
Can slow down time to study fast dynamics in detail
(collision between two cars)
Can speed up time to study slow dynamics efficiently
(temperature control of large water tank)
Can tie simulation time to wall clock (choose auto
period)
Finish time can be infinite to allow user to adjust
dynamics or control gains as simulation is running
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Simulation Exercise I ± sw timing
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Simulation Exercise II ± hw timing
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Simulation Exercise III - hw timing w delay
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Ordinary Differential Equation (ODE) Solvers
ODE solvers approximate solution to
continuous time systems described
by differential equations
Considerations in choosing solver:
± Accuracy vs computational speed {
-igh-order ODE solvers more accurate {
Low-order ODE solvers are faster
± Fixed time step vs. variable time step { Õ {Õ
Variable time step are faster
Fixed time step recommended for real-time
implementation
± Stiff systems (transients vary more quickly than
problem solution)
dt is step size of ODE solver
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Solver Types:
Fixed step size:
± Runge-Kutta 1 (Euler)
± Runge-Kutta 2
± Runge-Kutta 3
± Runge-Kutta 4
Variable step size:
± Runge-Kutta 23
± Runge-Kutta 45
± BDF (moderately stiff systems)
± Adams-Moulton
± Rosenbrock (some stiff systems)
Discrete States Only (fixed time steps for discrete-time systems)
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Simulation Discontinuities
ODE solvers assume that signals and derivatives of
signals are continuous
Discontinuities in nonlinear and discrete systems are
accounted for by LV Sim
For other discontinuities, use Detect Zero Crossing
function or configure Integrator function to reset when
signal crosses zero
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÷ontinuous Linear Systems
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Discrete Linear Systems
Following discrete models supported:
± State space
± Transfer function
± Zero pole gain
Discrete Integrator
Discrete Derivative
Discrete Zero Order -old
Discrete First Order -old
Discrete Filter
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Nonlinear Systems and Lookup Tables
Backlash
Dead Zone
Friction
Quantizer
Rate Limiter
Relay
Saturation
Switch
Detect Zero ÷rossing
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Signal Arithmetic
Gain
± Reverse direction
Summation
± ÷hange signs
± Add or null inputs
± ÷hange shape
Multiplication
± ÷an add inputs
± ÷hange shape
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Exercise: Formula Node & Prog Structures for
Phase Plane Analysis
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LabVIEW for Design, Prototype and Deploy
LabVIEW conditional compiling
technology provides for:
± Model reuse
± Test reuse
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Demonstration: ÷ompactRIO demo with
LabVIEW Simulation Module and RIO I/O
Real-Time
FPGA
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Implementation ÷hoices
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