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8-bit bytes 3 consecutive bytes form a word (24-bits) Addresses are byte addresses Words are addressed by location of their lowest numbered byte Memory size = 32, 768 (2^15) bytes
PC
SW
Integers stored as 24-bit binary numbers 2s complement representation is used for negative values Characters stored using 8-bit ASCII codes
Addressing Mode:
Mode Direct Indexed Indication x=0 x=1 Target Address Calculation TA=address TA=address + (X)
Basic set of instructions, load and store registers (LDA, LDX, STA, STX,etc.), and arithmetic operations (ADD, SUB, MUL, DIV) Arithmetic operations involve register A and a word in memory, and the result is left in the register. Instruction COMP compares a value in A with a word in memory, and sets the condition code CC to indicate the result. Jump instructions test the setting of CC JSUB and RSUB instructions are used for subroutine linkage
Performed by transferring 1 byte at a time to or from the rightmost 8 bits of register A. Each device is assigned a unique 8-bit code Three I/O devices instructions:
Test device (TD): tests whether the addressed device is ready to send or receive a byte of data Read data (RD) Write data (WD)
SIC/XE
SIC is upwards compatible with SIC/XE. Memory arranged in bytes (Max = 220 bytes). Can do floating point arithmetic. Has more registers. Has additional addressing modes. Can do I/O in parallel with computation.
Registers
Mnemonic 3 4 5 6 Register B S T F Comment Base Register (for addressing) General Purpose Register General Purpose Register Floating point Accumalator (48-bits)
Data Formats
SIC/XE supports integers and characters in the same manner as SIC. Introduces new 48-bit floating point type.
1-bit sign bit 11-bit exponent 36-bit fraction
Instruction Formats
Number of addresses is larger. (220 as compared to 215). Some instructions do not require operands.
n i x b p e n i x b p e
Formats (contd)
n=1, i=0: The word at the target address is the address of the operand. n=0,i=1: The address is used as the operand. n=i: value at address is taken as operand. (backward compatibility with SIC when used in Format 3) x=0,1: enables/disables Indexed mode (as in SIC).
Formats (contd)
b=1,p=0: Implies Base Relative Mode . b=0,p=1: Implies Program Counter Relative Mode. e determines whether mode 3 or mode 4 is in use.
Addressing Modes
Base Relative: b=1, p=0
If b=p=0, then the address/disp field is taken as the address. Indexed addressing may be used with both these modes (x=0,1).
Instructions
Instructions to Load/Store new registers
LDB, STB, ADDF, SUBF, MULF, DIVF ADDR, SUBR, MULR, DIVR, RMO TIO, SIO, HIO
Register Instructions
I/O instructions