Silicon and Wafer Preparation

Objectives
After studying the material in this chapter, you will be able to: 1. Describe how raw silicon is refined into semiconductor grade silicon. 2. Explain the crystal structure and growth method for producing monocrystal silicon. 3. Discuss the major defects in silicon crystal. 4. Outline and describe the basic process steps for wafer preparation, starting from a silicon ingot and finishing with a wafer.

Semiconductor-Grade Silicon
Steps to Obtaining Semiconductor Grade Silicon (SGS) Step 1 Description of Process Produce metallurgical grade silicon (MGS) by heating silica with carbon Purify MG silicon through a chemical reaction to produce a silicon-bearing gas of trichlorosilane (SiHCl3) SiHCl3 and hydrogen react in a process called Siemens to obtain pure semiconductorgrade silicon (SGS) Reaction SiC (s) + SiO2 (s) Si (l) + SiO(g) + CO (g)

Si (s) + 3HCl (g) SiHCl3 (g) + H2 (g) + heat

2SiHCl3 (g) + 2H2 (g) 2Si (s) + 6HCl (g)

CVD reactor

SiHCl3

Polycrystalline silicon rod

Crystal Structure
Atomic Order of a Crystal Structure

Unit Cell in 3-D Structure

Unit cell

Miller Indices of Crystal Planes

Z Z Z

X (100)

X (110)

X (111)

The processing characteristics and some material properties of silicon wafers depend on its orientation. The <111> planes have the highest density of atoms on the surface, so crystals grow most easily on these planes and oxidation occurs at a higher pace when compared to other crystal planes. Traditionally, bipolar devices are fabricated in <111> oriented crystals whereas <100> materials are preferred for MOS devices.

Crystal defects
Point defects Dislocations Area/ planar defects Volume defects

Defects
Point defects are important in the kinetics of diffusion and oxidation. Moreover, to be electrically active, dopants must occupy substitutional sites in order to introduce an energy level in the bandgap. Any non-silicon atoms incorporated into the lattice at either a substitutional or interstitial site are considered point defects

(a) Vacancy defect

(b) Interstitial defect

(c) Frenkel defect

 Dislocation defects :these are of two types:line defect and edge defects :
line defects:
extra plane is added to the crystal lattice These are dynamic defects. That is, they can diffuse under applied stress, dissociate into two or more dislocations, or combine with other dislocations.

Edge Dislocations:
Occur during thermal stress on wafer processing or due to excess point defect condensation. These are generally undesirable, because they act as sinks for metallic impurities and alter diffusion profiles. It may also occur if the covelent radii of the substitutional impurity is less than or greater than the radius of Si . This may lead to either expansion or compression of the lattice and hence stress.

Area

or planar defects are twins and grain boundaries:

Twinning represents a change in the crystal orientation across a twin plane, such that a mirror image exists across that plane Grain boundaries are more disordered than twins and separate grains of single crystals in polycrystalline silicon Planar defects appear during crystal growth, and crystals having such defects are not considered usable for IC manufacture and are discarded

VOLUME DEFECT
Precipitates of impurity or dopant atoms constitute the fourth class of defects. The solubility of dopants varies with temperature, and so if an impurity is introduced at the maximum concentration allowed by its solubility, a supersaturated condition will exist upon cooling. The crystal achieves an equilibrium state by precipitating the impurity atoms in excess of the solubility level as a second phase. Precipitates are generally undesirable as they act as sites for dislocation generation. Dislocations result from the volume mismatch between the precipitate and the lattice, inducing a strain that is relieved by the formation of dislocations.

Crystal growing techniques

CZ Method Float zone method

CZ method
The Czochralski(CZ) process, which accounts for 80% to 90% of worldwide silicon consumption, consists of dipping a small single-crystal seed into molten silicon and slowly withdrawing the seed while rotating it simultaneously. The crucible is usually made of quartz or graphite with a fused silica lining. After the seed is dipped into the EGS melt, the crystal is pulled at a rate that minimizes defects and yields a constant ingot diameter.

Crystal growing theory

Growing crystal involves a phase change from solid,liquid or gas to crystalline phase. Here in CZ its liquid to solid monocomponent growth mechanism is involved. The speed of the growth is dependent upon the no. of sites on the face of the crystal and the specifics (thermal conductivities, thermal gradient at the interface etc) of the heat transfer at the interface. Two parameters decide the net solidification rate and impurity content. These are PULL RATE and growth rate

How PULL RATE effects:

The pull rate determines the net solidification rate . The pull rate influences the incorporation of impurities into the crystal and is a factor of defect generation. The condensation of thermal point defects(vacancies and interstitials ) into small dislocations loops occur as the crystal cools from the solidification temperature which is a function of pull rate.

How growth rate effects:

the growth rate effects the instantaneous solidification rate. It is dependent upon upon the temp. fluctuations near the interface. It can be lower or can exceed the net solidification rate as sometimes remelting can occur . If this remelting is not suppressed then it can lead to defects like swirls etc. It effects the defect structure and dopant distribution in a crystal on a microscopic scale.

 In large melts the convection forced by the rotation is often the secondary to the thermal gradient caused by the temperature gradient leading to the thermal convection being a random process and hence resulting in variation of thickness of the boundary layer with respect to time. This results in radial distribution of the thickness across the boundary surface. Pull rate also affects the shape of the crystal as are the melt radial temperature gradient and crystal surface cooling conditions.

The CZ growth apparatus also called a puller has following subsystems :

Furnace:crucible,susceptor(crucible support) and rotation mechanism,heating element and supply Crystal pulling mechanism: seed shaft or chain,rotation mecanism and seed chuck Ambient control:gas source, flow control, exhaust or vacuum system Control system: microprocessor,sensors and outputs.

Crystal puller and rotation mechanism

Crystal seed

Single crystal silicon

Molten polysilicon

Quartz crucible
Carbon heating element

Heat shield

Water jacket

Properties of the crucible(used to contain the melt)

It should be chemically unreactive with molten Si. High melting point,thermal stability and hardness Inexpensive and reusable. *unfortunately molten Si dissolves with almost all materials used for high temp. eg metallic compounds like TiC.If used they may lead to metallic impurities. SiC on the other hand may lead to defects and carbon though being electrically inactive may lead to carbon saturated compounds. Fused silica and silicon nitride are the options left and out of these silica is mostly used . Silica reacts with Si to release silicon monoxide as gas. However these materials when used may leave oxygen at the substitutional and interstitial sites of the crystal affecting the electrical properties of the material.

Properties of susceptor:
It also provides for better thermal conditions. Graphite is used for construction because of high temp properties and should be of high purity to prevent contamination from impurities.

Chamber properties:
Easily accesible: for maintanence and cleaning Airtight to prevent contamination Its design should not allow any part of the chamber to become so hot that its vapor pressure may become source of contamination Hottest parts should be water cooled .insulation between chamber walls and heater. Resistance or inductive heating is used to melt the charge.

Crystal pulling mechanism

Should have min. vibration and great precision to control two parametrs :pull rate and crystal rotation. Seed holder and pulling mechanism should be able to orient the crystal perpendicular to melt surface.

 Ambient control:The process should be carried out in vacuum or inert gas(helium or argon) to protect graphite from oxygen,to prevent the gas around to react with melt and to remove the CO. Control system:should be of closed loop type to control process parameters such as temperature ,crystal dia.,pull rate and rotation speed .

Silicon Ingot Grown by CZ Method

CZ Crystal Puller

Float Zone Method

In this a rod of cast poly silicon is held in a vertical position and rotated while a melted zone is slowly passed from the bottom of the rod to the top. The melted region is heated and moved through the rod starting from a seed crystal that initiates crystallization The impurities tend to segregate in the molten portion so that the solidifying silicon is purified. In contrast to CZ oxygen is not introduced as the Si is not held in an oxygen containing crucible. Although it is an expensive process and is used for smaller dia ingots , silicon produced by this method is free from oxygen and other impurities . Multiple passes of the molten zone can be used to produce resistivity above 10^4 ohm cm.

Float Zone Crystal Growth

Gas inlet (inert) Chuck Polycrystalline rod (silicon) RF Molten zone Traveling RF coil

Seed crystal Inert gas out

Chuck

Wafer Diameter Trends

300 mm

200 mm 150 mm 125 mm 100 mm 75 mm

12

Increase in Number of Chips on Larger Wafer Diameter

88 die 200-mm wafer

232 die 300-mm wafer

Silicon wafer preperation

Si is hard and brittle material. The suitable material for cutting and shaping it is industrial grade diamond ,although SiC and Aluminium oxide can also be used. Conversion of Silicon ingots into polished wafers normally requires 6 machining operations,2 chemical operations and one or two polishing operations.

SHAPING: the extreme top and bottom portions of the ingot are cut off that fail the resistivity and perfection evaluation. The cuttings are either sent to be recycled or can be used as MGS. SURFACE GRINDING:Defines the diameter of the material as ingots do have some extra material added. A rotating cutting tool makes multiple passes down the rotating ingot until the chosen dia is attained. The ingot surface is ground to produce a constant exact dia which may be 100,150 or 300 mm. GROUNDING: A crystallographic orientation flat is also grounded along the length of the ingot. The two types of flats are :Primary flat which is relative to a specific crystal direction and serves as a mechanical locator to position the wafer and to orient the IC device relative to the crystal. Secondary flats which serve to find the orientation and conductivity type.T he orientation flats serves as a useful reference plane for the various device processes . Correct orientation of the surface of the wafers with respect to the crystal planes is important for the successful epitaxial growth ,a process to be done later. SLICING: it helps in determining four wafer parameters :surface orientation, thickness,taper and bow. The ingot is then sliced using a large diameter stainless steel saw blade with industrial diamonds embedded into the inner dia. Cutting edge. The blade is moved relative to the stationery ingot. This will produce circular slices or wafers that are about 600 to 1000um thick. LAPPING OPERATION: it is performed under pressure using a mixture of aluminum oxide and glycerin in order to produce a wafer with flatness uniform to within 2 um. Ensures surface flatness for steps like photolithography. EDGE CONTOURING: where a radius is ground on the rim of the wafer. It develop fewer edge chips during device fabrication and aid in controlling the build up of phoresist at the wafer edge.

While slicing the wafers ,its surface and edges are heavily damaged being on the order of 10 um deep and can be removed by :
chemical etching: it involves Dipping and rotating the wafers(in batches of 10)in an tank containing an acid mixture consisting of nitric acid to oxidize the surface and hydrofluoric acid to dissolve the oxidized products. The etch rate depends on the surface orientation. The reaction is apparently dominated by the no of dangling bonds present on the surface.

Then the wafers undergo a no. of polishing steps to ensure a surface smoothness ,flatness and with minimal local slope surface on which the devices can be photoengraved. Along with this the surface should be contamination and damage free . It involves a polishing pad made of artificial fabric such as a polyester . wafers are mounted on a fixture ,pressed against the pad under high pressure and rotated relative to the pad. A mixture of polishing slurry and water ,dripped on to the pad does the polishing. Finally the wafer is subjected to CHEMICAL CLEANING to remove organic films ,heavy metalks and particulates. Commonly used are aqueous mixture of NH4OH-H2O2,HCLH2O2 and H2SO4-H2O2. all of the mixtures are efficient in remoning the metallic impurities but CL-H2O2 is best . This is then followed by a dip in hydroflouric acid to prevent the impurities that get added due to chemically grown oxide. Usually only one side of the wafer undergoes these steps while other undergoes only lapping to ensure flatness and parallelism.

Basic Process Steps for Wafer Preparation

Crystal Growth

Wafer Lapping and Edge Grind

Cleaning

Shaping

Etching

Inspection

Wafer Slicing

Polishing

Packaging

Lecture problems:
Discuss the effects of oxygen and carbon elements in the crystal growth. Different etching materials . Gettering treatment.

*reference : Book on VLSI Technology by SM Sze.

Good Luck