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. DE B. E./8. TECh. GREE EXAMINATION, NOVEMBER/DECEMBER 2OO7 Third Semester (Regulation2004) Computer Scienceand Engineering CS I2O2 _ DIGITAL PRINCIPLES AND SYSTEMS DESIGN (Common to Information Technology) (Commonto B.E. (Part-Time) SecondSemesterRegulation2005) Time : Three hours Maximum : 100 marks

Answer ALL questions.

PARTA-(10 x2=20 marks) 1. 2. What are error detecting codes?

Find the complementsfor the following functions

(b) 3. 4. 5. 6. 7. 8 9. 10.

Fr=(xy+y'z+*")x

Draw the circuit diagram for 3 bit parity generator' What are the drawbacks of K-Map method? What is logic synthesis in HDL? When an overflow condition wiil encounter in an accumulator register? What is gate level modeiing? What are the differencesbetween sequential and combinational logic? Draw the logic diagram for D-Type Latch. What are the assumptions made for pulse mode circuit?

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(a)

Ft=xY'+x'Y

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PARTB-(5x16=80marks)
11. (a)

Using Tabulation method simplify the Boolean function F (w,x, y, z) = Z (23, 4,6,7,LL,12,I3,I4) which has the don't care conditions

d(r,s,15).
Or (b) Simplify the Boolean function using Variable Entered Mapping method and implement using gates

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t 2 F (w,x,y,z)= (0, ,4,6,8,10,12,14).
72. (a) (i) (ii) Design a combinational circuit to convert gray code to BCD. Design a Full adder circuit u'ith a Decoder. (12) (.4)

Or (b) 13.

Design a 4b|t magnitude cornparatorto comparet\\-o-1bit numbers.

(b) 14. (a)

Explain the different t5'pes of ROXL

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Construct a full subtractor circuit and..vrite a HDL progTam module for the same.

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Or

+ + F (A,B,C,D)=AB',D+ A',C',D B'CD', AC',D.

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@.r Implement the Booleanfunction using 8 : 1 multipiexer

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(i)

Compare synchronouswith Asynchronouscounters.

(8) (8)

(ii)

Explain the behavioralModel with suitable example. Or

(b)

(i)

A positive edge triggered flip-flop has two inputs Dr and Dz and a control input that chooses between the two. Write an HDL (8) behavioral description of this flip-flop. Construct and explain 4 stageJohnsoncounter. (8)

(ii )

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15.

(a)

(i) (ii)

circuit. Explain the need for key debounce

(8)

What is the objective of state assignment in asynchronous circuit? Give hazard-free realization for the following Boolean functions F (A., B,C, D)=2 M (0,L,5,6,7,9, lI)
Or

(8)

(b)

An asynchronous sequential excitation and output function

circuit

is

described by the

following

+(ar+nr) 3 =(a,rar)n C=B

(i) (ii) (iii) Draw the iogic diagram of the circuit. Derive the transition table and output map.

(5) (6) (5)

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Describe the behavior of the circuit.