Microprocessor Instruction Set

Er. A.N Mishra

Data Transfer Croup

The data transfer instructions move data between registers or between memory and registers. Op code MOV MVI operand Rd,Rs R,Data(8-bit) Description Move Move Immediate

LDA Address (16-bit) Load Accumulator Directly from Memory STA Address(16-bit) Store Accumulator Directly in Memory LHLD Address( 16-bit ) Load H & L Registers Directly from Memory SHLD Address ( 16-bit) Store H & L Registers Directly in Memory LXI Rp,16 bit data Load Register Pair with Immediate data LDAX B pair or D pair Load Accumulator from Address in Register Pair STAX B pair or D pair Store Accumulator in Address in Register Pair XCHG Exchange H & L with D & E XTHL Exchange Top of Stack with H & L IN 8 bit(port Adress) Load accumulator from Input port Out 8 bit(port Adress) Send data byte from accumulator to output device X: the name of a data transfer instruction implies that it deals with a register pair (16-bits) R: 8085-8 bit register (A, B, c, D, E, H, L) M: memory registers (location) Rs: Register source (A, B, c, D, E, H, L) Rd: Register Destination (A, B, c, D, E, H, L) Rp: register Pair (B->BC,D->DE,H->HL,SP)

Note: Data Transfer Instruction Instruction not affect flags.

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Microprocessor Instruction Set

Er. A.N Mishra

Arithmetic Group
The arithmetic instructions add, subtract, increment, or decrement data in registers or memory. Op code operand Description Flag operation ADD R Add to Accumulator ALL ADI 8 bit data Add Immediate Data to Accumulator All ADC R Add to Accumulator Using Carry Flag ALL ACI 8 bit data Add Immediate data to Accumulator Using ALL Carry SUB R Subtract from Accumulator ALL SUI 8 bit data Subtract Immediate Data from Accumulator ALL SBB SBI INR DCR INX DCX DAD DAA R Subtract from Accumulator Using Borrow ALL (Carry) Flag 8 bit data Subtract Immediate from Accumulator Using ALL Borrow (Carry)Flag R Increment Specified Byte by One ALL except carry R Decrement Specified Byte by One ALL except carry Rp Increment Register Pair by One Affect no flag Rp Decrement Register Pair by One Affect no flag Rp Double Register Add; Add Content of Only carry Register Pair to H & L Register Pair flag Adjust the accumulator content in BCD Affect all this is only instr which use AC flag. flag
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Microprocessor Instruction Set

Er. A.N Mishra

Logical Group
This group performs logical (Boolean) operations on data in registers and memory and on condition flags. The logical AND, OR, and Exclusive OR instructions enable you to set specific bits in the accumulator ON or OFF.
Op code ANA operand R/M Description Logical AND with Accumulator Flag Affect all but set AC and Clear Carry flag Affect all but clear AC and Carry flag Only carry Only Carry Only carry Only carry No Afft flag Only carry Only carry

ANI ORA

8 bit data R/M

Logical AND with Accumulator Using Immediate Data Logical OR with Accumulator

ORI XRA XRI CMP CPI RLC RRC RAL RAR CMA CMC STC

8 bit data R/M 8 bit data R/M 8 bit data -

Logical OR with Accumulator Using Immediate Data Exclusive Logical OR with Accumulator Exclusive OR with Accumulator Using Immediate Data Compare with Accumulator Compare with Accumulator Using Immediate Data Rotate Accumulator Left Rotate Accumulator Right Rotate Left Through Carry Rotate Right Through Carry Complement Accumulator Complement Carry Flag Set Carry Flag

Q.N. Write a program to test D4 bit of memory 2056H is either 1 or 0. Q.N. Write a program to complement D5 bit of the memory 3057 and store the result to the 3058. 3

Microprocessor Instruction Set Compare Operation. If (A)<(Reg/Mem/Data): Carry flag is set and Zero flag is reset. If (A)=(Reg/Mem/Data): Carry flag is reset and Zero flag is set. If (A)>(Reg/Mem/Data): Carry flag is reset and Zero flag is reset. S Z X AC X P X CY

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Branch Group: The branching instructions alter normal sequential program flow, either unconditionally or conditionally. The unconditional branching instructions are as follows: JMP CALL RET Jump Call Return

Conditional branching instructions examine the status of one of four condition flags to determine whether the specified branch is to be executed. The conditions that may be specified are as follows: NZ Z NC C PO PE P M Not Zero (Z = 0) Zero (Z = 1) No Carry (C = 0) Carry (C = 1) Parity Odd (P = 0) Parity Even (P = 1) Plus (S = 0) Minus (S = 1)

Thus, the conditional branching instructions are specified as follows: Jumps Calls Returns 4

Microprocessor Instruction Set C INC JZ JNZ JP JM JPE JP0 CC CNC CZ CNZ CP CM CPE CPO RC RNC RZ RNZ RP RM RPE RPO (Carry) (No Carry) (Zero) (Not Zero) (Plus) (Minus) (Parity Even) (Parity Odd)

Er. A.N Mishra

Two other instructions can affect a branch by replacing the contents or the program counter: PCHL RST Move H & L to Program Counter Special Restart Instruction Used With Interrupts

These Branching instructions not affect the flag. Stack I/O, and Machine Control Instructions: The following instructions affect the Stack and/or Stack Pointer: PUSH POP XTHL SPHL Push Two bytes of Data onto the Stack Pop Two Bytes of Data off the Stack Exchange Top of Stack with H & L Move content of H & L to Stack Pointer

The Machine Control instructions are as follows: EI Enable Interrupt System DI Disable Interrupt System RIM SIM HLT Halt NOP No Operation