Hexadecimal numbers are used in microprocessors and

computer systems, Why?

•

Compact representation: Hexadecimal (base-16) is a more compact representation

than binary (base-2) for large binary numbers. In microprocessors, data is often
represented in binary, but converting it to hexadecimal makes it easier for humans
to read and work with..

•Readability: Hexadecimal is more human-friendly compared to binary. When

programming or debugging microprocessors, it's easier for humans to understand
and work with hexadecimal values. It's much simpler to read "0xFF" in hexadecimal
than its binary equivalent "11111111.“

•Address representation: Microprocessors use memory addresses to access data and

instructions. Since memory addresses are typically represented in binary,
hexadecimal provides a concise and readable way to display these addresses. This is
especially useful in assembly language programming and debugging.
•Bit manipulation: Hexadecimal is convenient when working with
individual bits or groups of bits in registers or memory locations.
Each hexadecimal digit corresponds to four bits, making it easy to
represent and manipulate individual bit positions.

•Memory dumps: During debugging or system analysis, memory

contents are often displayed in hexadecimal format. This helps
developers examine memory patterns and data structures
efficiently.

•Machine code representation: Microprocessors execute machine

code, which is a sequence of binary instructions. When
representing machine code, hexadecimal offers a compact and
clear representation that is still close to the underlying binary
instructions.
•Addressing modes and opcode representation: In
assembly language programming, hexadecimal is
commonly used to represent opcodes (operation codes)
and addressing modes, which define the instructions
executed by the microprocessor.

Overall, using hexadecimal numbers in microprocessors

strikes a balance between human readability and efficient
representation of binary data and instructions, making it a
widely adopted choice in the field of computer
architecture and programming.
Hexadecimal Numbers
The instruction set of the 8085 can be broadly
categorized into the following groups
Data Transfer Group:
MOV: Move data from the source to the destination register or
memory.
MVI: Move immediate data to a register or memory location.
LXI: Load immediate 16-bit data into a register pair.
LDA: Load accumulator from memory.
STA: Store accumulator in memory.
LHLD: Load H and L registers direct.
SHLD: Store H and L registers direct.
XCHG: Exchange the content of HL and DE register pairs.
LDAX: Load the accumulator from the memory address pointed
by BC or DE.
STAX: Store the accumulator in the memory address pointed by
BC or DE.
Data Transfer Group:
MOV: Move data from the source to the destination register or
memory.
MVI: Move immediate data to a register or memory location.
LXI: Load immediate 16-bit data into a register pair.
LDA: Load accumulator from memory.
STA: Store accumulator in memory.
LHLD: Load H and L registers direct.
SHLD: Store H and L registers direct.
XCHG: Exchange the content of HL and DE register pairs.
LDAX: Load the accumulator from the memory address pointed by
BC or DE.
STAX: Store the accumulator in the memory address pointed by BC
or DE.
Logical Group:
AND: Perform a bitwise AND operation between the accumulator and a register or
memory.
ORA: Perform a bitwise OR operation between the accumulator and a register or
memory.
XRA: Perform a bitwise XOR operation between the accumulator and a register or
memory.
CMA: Complement the accumulator (bitwise NOT).
RLC: Rotate accumulator left with carry.
RRC: Rotate accumulator right with carry.
RAL: Rotate accumulator left through carry.
RAR: Rotate accumulator right through carry.
ANI: Perform a bitwise AND operation between the accumulator and immediate
data.
ORI: Perform a bitwise OR operation between the accumulator and immediate
data.
XRI: Perform a bitwise XOR operation between the accumulator and immediate
data.
CPI: Compare the accumulator with immediate data.
Branching Group:
JMP: Unconditional jump to a specified memory address.
JNZ/JZ: Conditional jump if the Zero flag is not set/set.
JNC/JC: Conditional jump if the Carry flag is not set/set.
JPO/JPE: Conditional jump if the Parity flag is odd/even.
JP/JM: Conditional jump if the Sign flag is positive/negative.
CALL: Unconditional call to a subroutine at a specified memory
address.
CNZ/CZ: Conditional call if the Zero flag is not set/set.
CNC/CC: Conditional call if the Carry flag is not set/set.
CPO/CPE: Conditional call if the Parity flag is odd/even.
CP/Cm: Conditional call if the Sign flag is positive/negative.
RET: Return from a subroutine.
RNZ/RZ: Conditional return if the Zero flag is not set/set.
RNC/RC: Conditional return if the Carry flag is not set/set.
RPO/RPE: Conditional return if the Parity flag is odd/even.
RP/RM: Conditional return if the Sign flag is positive/negative.
Stack, I/O, and Machine Control Group:

PUSH: Push data onto the stack.

POP: Pop data from the stack.
XTHL: Exchange top of the stack with HL register pair.
SPHL: Load the stack pointer with HL.
PCHL: Load the program counter with HL.
EI/DI: Enable/Disable interrupts.
HLT: Halt the microprocessor.
RST: Call a specific interrupt service routine (ISR).
IN: Read data from an I/O port.
OUT: Write data to an I/O port.
 FORMAT OF THE INSTRUCTIONS
Data Transfer Instructions:
• MOV Rd, Rs
• MVI Rd, 8-bit data
• LXI Rp, 16-bit data
• LDA 16-bit address
• STA 16-bit address
• LHLD 16-bit address
• SHLD 16-bit address
• LDAX Rp
• STAX Rp
• In these instructions, Rd represents the destination register, Rs
represents the source register, and Rp represents the register pair
(BC, DE, or HL).
Arithmetic and Logical Instructions:
ADD R
ADC R
SUB R
SBB R
INR R
DCR R
INX Rp
DCX Rp
DAD Rp
CMP R
ANA R
ORA R
XRA R
 CMA
RLC
RRC
RAL
RAR
ANI 8-bit data
ORI 8-bit data
XRI 8-bit data
CPI 8-bit data
In these instructions, R represents the register or register pair on
which the operation is performed, and 8-bit data represents an
immediate 8-bit value.
Branching Instructions:
JMP 16-bit address
JNZ 16-bit address
JZ 16-bit address
JNC 16-bit address
JC 16-bit address
JPO 16-bit address
JPE 16-bit address
JP 16-bit address
JM 16-bit address
CALL 16-bit address
CNZ 16-bit address
CZ 16-bit address
CNC 16-bit address
CC 16-bit address
•CPO 16-bit address
•CPE 16-bit address
•CP 16-bit address
•CM 16-bit address
•RET
•RNZ
•RZ
•RNC
•RC
•RPO
•RPE
•RP
•RM
In these instructions, 16-bit address represents
a 16-bit memory address for branching or calling subroutines.
Stack, I/O, and Machine Control Instructions:
•PUSH Rp
•POP Rp
•XTHL
•SPHL
•PCHL
•EI
•DI
•HLT
•RST n
•IN 8-bit port number
•OUT 8-bit port number

In these instructions, Rp represents the register pair (BC, DE, or HL), n represents the
interrupt vector number (0 to 7), and
8-bit port number represents an 8-bit I/O port address.
Please note that 'R' in the instruction format represents different registers such as A, B, C,
D, E, H, L, and M (memory location pointed by HL).
Also, '16-bit address' represents a 16-bit memory address, which is typically expressed in
hexadecimal format (e.g., 0x2000).
The instructions of a microprocessor are composed of different
parts that provide information about the operation to be executed
and the operands involved. The typical parts of a microprocessor
instruction include:
Opcode: The opcode (operation code) is the most crucial part of
the instruction. It specifies the type of operation to be performed
by the microprocessor. The opcode is responsible for determining
whether the instruction is a data transfer, arithmetic, logical,
branching, or any other type of operation. It occupies the most
significant bits of the instruction word.
Operands: The operands are the data or memory locations on
which the operation specified by the opcode will be performed.
The number and size of operands depend on the type of
instruction. In some instructions, the operands are explicitly
provided in the instruction itself (immediate operands), while in
others, they are fetched from specific registers or memory
locations.
Example

Assume that the two numbers

to be added are stored in memory locations
2000H and 2001H, respectively.
;8085 Assembly Code to Add Two Numbers

ORG 1000H ; Starting address for the program

LDA 2000H ; Load Accumulator with the content of memory

location 2000H
MOV B, A ; Move the content of Accumulator to Register B

LDA 2001H ; Load Accumulator with the content of memory

location 2001H
ADD B ; Add the content of Register B to Accumulator
STA 2002H ; Store the result in memory location 2002H

HLT ; Halt the execution

END ; End of the program