HARIS JAVAID

PERSONAL INFORMATION DOB: May 15th ,1989 POB: Lahore Mob : 0321-4656790 E-Mail: harisjavaid212@yahoo.com PRESENT ADDRESS House No. M-181, Marghzar Colony, Multan Road, Lahore, Pakistan

Objectives
To be a skilled and technically sound engineer in the field of electronics especially Industrial Electronics and PLC. To develop new and innovative techniques for implementing the modern industrial PLCs and Protection embedding them in to current systems.

Academic Credentials
BS in Electrical Engineering U.E.T LAHORE ,PAKISTAN(2008-2012) HSSC Pre-Engineering Punjab College of Science, LAHORE (2006-2008) Secondary School Education Lahore Garrison Grammar School, LAHORE(2004-2006)

CGPA: 3.537
Marks: 969/1100(88%) Marks: 909/1050(87%)

Skills
Languages Technical Tools Operating system Software Packages : : : : C, C++, Assembly, VHDL, Verilog MATLAB, Proteus, PSpice, Orcade ,XILINX Windows XP / Vista, Redhat Linux 6.0 MS-Office, Photoshop, Flash, Photo-paint

Projects Automated Security System using MUX and DMUX (Digital Logic Design LAB ) Variable voltage power-supply with short-circuit protection (Semiconductor LAB) Sound amplifier implemented at transistor level (Analogue Electronics LAB) Temperature Sensor & Controller using Microcontroller (Control Systems LAB) Delivered a presentation on the Compression Technique using Vectors (Data StructureLAB) Experience
Century Paper & Board Paper Mills Limited, Lahore

Internee
I have taken one month practical experience in ELECTRICAL MAINTENANCE DEPARTMENT, where my knowledge regarding practical work and understanding of the different concepts has improved.

SENIOR DESIGN PROJECT

Dead time compensation in PWM Inverters Dead time is a serious matter regarding inverters which introduce harmonics at outputs of drives giving rise to pulsating torque in motors which could be disastrous. In our design we will try to minimize and compensate its effects.

ted by trial version, http://www.pdf-convert.com