Professional Documents
Culture Documents
8085 Architecture & 8085 Architecture & Its Assembly Language Programming
8085 Architecture & 8085 Architecture & Its Assembly Language Programming
Outline
8085EraandFeatures 8085
Blockdiagram(DataPath) BusStructure RegisterStructure g
8085MicroprocessorArchitecture
ReSeT6.5 INTR INTA RST5.5 RST7.5 TRAP SID SOD
InterruptControl Bus8Bit ACC tmp R Flag IDecode I Decode & M/C Encodin g
SerialI/OControl
MUX IR W B D H SP PC
Inc/Dec.ter / Addlatch
Z C E L
ALU
TimingandControl
AddBuff
Data/AddBuff
The8085BusStructure
A15 A0 AddressBus(16bit)
I/P O/P
D7 D0
DataBus(8bit) ControlBus(8bit)
8085BusStructure
Address Bus : Consists of 16 address lines: A0 A15 AddressBus:Consistsof16addresslines:A
Addresslocations:0000(hex) FFFF(hex) Canaccess64K(=216 )bytesofmemory, eachbytehas8bits ( ) y y, y
DataBus:Consistsof8datalines:D0 D7
O Operatesinbidirectionalmode t i bidi ti l d ThedatabitsaresentfromtheMPUtoI/O&viceversa Data range: 00 (hex) FF (hex) Datarange:00(hex) FF(hex)
ControlBus:
Consists of various lines carrying the control Consistsofvariouslinescarryingthecontrol signalssuchasread/writeenable,flagbits
8085Registers
Registers:
Sixgeneralpurpose8bitregisters:B,C,D,E,H,L Combinedasregisterpairstoperform16bit operations:BC,DE,HL Registersareprogrammable(load,move,etc.)
StackPointer(SP) ( ) Accumulator&FlagRegister
(Zero Sign Carry Parity AuxCarry) (Zero,Sign,Carry,Parity,AuxCarry)
B D H SP PC
C E L
ProgramCounter(PC)
C Containsthememoryaddress(16bits)ofthe i h dd (16 bi ) f h instructionthatwillbeexecutedinthenextstep.
Logicaloperation
and,or,xor,rotate,compare,complement
Copy/Mem/IOoperation
MVIR,8bit//loadimmediatedata MOVR1,R2//ExampleMOVB,A , // p , MOVRM//CopytoRfrom0(HLReg)Mem MOVMR//CopyfromRto0(HLReg)Mem LDA16bit//loadAfrom0(16bit) STA16bit//StoreAto0(16bit) STA 16 bit // Store A to 0(16bit) LDAXRp //loadAfrom0(Rp),Rp=RegPair STAXRp //StoreAto0(Rp) LXIRp 16bit//loadimmediatetoRp
ArithmeticOperation
ADDR //AddA=A+B.reg // ADI8bit//AddA=A+8bit ADD M ADDM// Add A=A + 0(HL) //AddA=A+0(HL) SUBR //SubA=AB.reg SUI8bit//SubA=A 8bit SUBM//SubA=A 0(HL) INRR//R=R+1 INR M INRM//0(HL)=0(HL)+1 // 0(H ) 0(H ) DCRR//R=R1 DCRM//0(HL)=0(HL)1 INXRp //Rp=Rp+1 DCXRp //Rp=Rp1
Branchoperations
JMP16bit,CALL16bit JZ16bit,JNZ16bit,JC16bit,JNC16bit RET
MachineControloperations
HLT NOP POP PUSH HLT,NOP,POP,PUSH
Assumption
RAM Memory is interfaced RAMMemoryisinterfaced Instructionsarestoredinmemory O OneI/Odisplayportisinterfacedtodisplay /O di l i i f d di l dataofACC
LAST: END:
8085KitisavailableinHWLab(CS422)
FirsttesttheprogramonSimulatorandthengo fortheHW SometimeKithaveDriver,IDEandAssembler