A New Contrast Enhancement Technique Implemented on FPGA for Real Time Image Pro cessing Download Citations Email

Print Rights And Permissions Content is outside your subscription Sign In:Full text access is unavailable with your individual subscription. If yo ur institution subscribes to IEEE Xplore, access may be available by signing in with your institutional credentials. Contact your librarian or informational pro fessional for more details. Forgot Username/Password? Athens/Shibboleth Sign In Already Purchased Purchase Now Ching-Hsi Lu ; Hong-Yang Hsu ; Lei Wang ; Dept. of Electr. Eng., Feng Chia Univ., Taichung, Taiwan This paper appears in: Intelligent Information Hiding and Multimedia Signal Pro cessing, 2009. IIH-MSP '09. Fifth International Conference on Issue Date : 12-14 Sept. 2009 On page(s): 542 Location: Kyoto Print ISBN: 978-1-4244-4717-6 INSPEC Accession Number: 10977349 Digital Object Identifier : 10.1109/IIH-MSP.2009.100 Date of Current Version : 17 November 2009 Abstract The technology for image contrast enhancement is improved evidently since the po pularity of consumer electronics in the last decade. Based on Histogram Equaliza tion (HE) method, this paper proposes a simple contrast enhancement scheme named Adaptively Increasing the Value of Histogram (AIVHE). It provides a convenient and effective mechanism to control the rate of contrast enhancement. AIVHE offer s a gradually increment by the mean brightness of the image to modify the origin al probability density function (PDF). This research proves that the method is s uitable to be implemented in FPGA hardware to provide the powerful ability for r eal time image processing to reach the demand for time consuming operations.