FT232BM Designers Guide

FT232BM Designers Guide Version 2.0

Introduction
Welcome to the FT232BM Designers Guide. The Designers Guide includes printouts of a number of FT232BM reference schematics and explanations of the key points of each schematic. These are intended to be used in conjunction with the FT232BM data sheet, the current version of which should also be downloaded from the FTDI web site. The schematic les are downloadable separately as a ZIP archive which contains the schematics both in OrCAD SDT 16-bit DOS format and in OrCAD Capture for Windows 32-bit format. The OrCAD SDT 16-bit DOS format schematics are readable by OrCAD SDT version 3.2 and above. These consist of les with the following extensions .sch = OrCAD 16-bit DOS binary schematic le .lib = OrCAD 16-bit DOS binary component library le .src = OrCAD DOS library source ( text ) le The OrCAD Capture for Windows schematics are readable by OrCAD Capture version 7.2 and above. These consist of a le with a .dsn extension.

Notes for Protel users

OrCAD 16-bit DOS schematics can be imported into Protel schematic capture for Windows. Before reading in the schematic ( .sch ) le, create a Protel library rst by reading in the OrCAD library source ( .src ) le and save it in Protel binary library format. Both OrCAD and Protel use the same default extensions for schematic and library les, so if you do not wish to overwrite the original OrCAD les, save the Protel versions to a different folder.

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 1 of 16

FB1 VCC VCC VCC

USB
R3 470R C7 0.1uF

VCC

Figure 1.0

CN1 CN-USB

FERRITE BEAD

1 2 3 4

C5 10nF

C4 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 5v MCU or Logic cct CTS# RTS# RXD TXD VCC-5v

C6 0.1uF

AVCC

VCC VCC VCC-IO TXD RXD RTS# CTS# DTR# DSR# DCD# RI#

6 3V3OUT USBDM USBDP 8 7

AGND

GND GND

29

9 17

DG232 Version 2.0

R6 5 RSTOUT# XTIN 27 1k5 TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST FT232BM SLEEP# 10 SLEEP# RSTOUT# POWERDN# RESET# GND RXLED# 1 2 31 11 12 PWRCTL 14 PWREN# VCC 4 15 16 R7 47k VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 10k 93C46/56/66 ( Optional ) 8 7 6 5

R4

27R

R5

27R

RSTOUT#

Y1 6MHz RESONATOR

DECOUPLING CAPS

VCC

FT232BM 5 volt Bus Powered Example Schematic ( 232-5VB )

Future Technology Devices Intl. Ltd. 2002/2003

FT232B APPLICATION SCHEMATIC

FT232BM Designers Guide

C3 10uF

C2 0.1uF

C1 0.1uF

Page 2 of 16

INTERFACING TO 5 V LOGIC - BUS POWERED ( <= 100mA ) APPLICATION

FT232BM Designers Guide

Figure 1.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a 5v MCU or other external logic. In this example, we assume that the total current of the design is <= 100mA ( low power ), and that the MCU / logic can detect USB suspend mode using either the SLEEP# or PWREN# pins of the FT232BM and put itself and any circuitry it is controlling into a low power state in order to meet the total USB suspend current requirement of 500uA or less. RSTOUT# is used to provide a power-on reset to the external logic in this example. If the MCU has its own power-on reset logic then there is usually no need to use RSTOUT# to reset the device and this connection and the 47k pull-down can be omitted. PWRCTL is tied to GND to tell the device to indicate a bus powered device in its USB descriptor. RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do ( tie CTS# of the FT232BM to GND ).

General Design Notes: SLEEP# goes inactive ( high ) at power-on and goes low during USB suspend. PWREN# is high on power-on and only goes low ( active ) after the device has been congured ( successfully enumerated ) by USB. During USB suspend PWREN# will go high the opposite polarity to SLEEP#. For a low power bus powered USB device , either SLEEP# or PWREN# can be used for power control, however for a high power bus powered USB device ( 100mA .. 500mA ) you must use PWREN# for power control as no USB device is allowed to draw more than 100mA from the bus until USB conguration is complete. RSTOUT# has no pull-down capability it drives to 3.3v when not in reset, and goes tri-state during power-on reset. If used to reset an external device, a pull-down resistor must be added to make it low during reset. When RTS/CTS hardware handshaking is enabled CTS# can be used to stop the FT232BM transmitting data to the MCU / external logic. When CTS# is active ( low ) the FT232BM will transmit any data in its internal buffers. On taking CTS# high, the FT232BM will stop transmitting data. Due to the asynchronous nature of the interface, there is a latency of 0 to 3 characters between taking CTS# high and data transmission stopping. The FT232BM drives RTS# high when the available buffer space inside the device drops below 32 bytes. This allows the MCU / logic to continue to send up to 30 characters to the FT232BM after RTS# goes high without causing buffer over-run. A suitable 3-pin ceramic resonator could be a Murata CSTCR6M00G15 or equivalent. See http:// www.murata.com/catalog/p63e.pdf for details If you prefer to use a 2 pin resonator or a crystal refer to Figures 4 and 5 of the FT232BM data sheet for details. A suitable ferrite bead could be a Steward MI0805K400R-00 or equivalent. This is also available from DigiKey as Part # 240-1035-1. For specications consult the Steward web site - http://www.steward.com

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 3 of 16

USB
R3 470R C6 0.1uF

VCC

VCC

VCC

CN1 CN-USB

Figure 2.0

1 2 3 4

R4

27R

R5

27R

C4 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 VCC TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST 29 9 17 FT232BM SLEEP# 10 SLEEP# POWERDN# RXLED# 1 2 31 GND GND 11 12 PWRCTL 14 PWREN# 4 15 16 5v MCU or Logic cct CTS# RTS# RXD TXD VCC-5v

C5 0.1uF

AVCC

AGND

DG232 Version 2.0

VCC VCC VCC-IO TXD RXD RTS# CTS# DTR# 5 RSTOUT# XTIN RI# DCD# DSR# 27 6 3V3OUT USBDM USBDP 8 7 GND VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 10k 93C46/56/66 ( Optional ) 8 7 6 5 VCC VCC EXTERNAL 5V POWER GND

R6 10k

R7 1k5

R8 15k

Y1 6MHz RESONATOR

DECOUPLING CAPS

VCC

FT232BM 5 volt Self Powered Example Schematic ( 232-5VS )

Future Technology Devices Intl. Ltd. 2002/2003

FT232B APPLICATION SCHEMATIC UPDATED 21st January 2003

FT232BM Designers Guide

C3 10uF

C2 0.1uF

C1 0.1uF

Page 4 of 16

INTERFACING TO 5 V LOGIC - SELF POWERED APPLICATION

FT232BM Designers Guide

Figure 2.0 is an example of a 5 volt, USB self powered design using the FT232BM connected to a 5v MCU or other external logic. A USB self power design has its own PSU and does not draw its power from the USB bus. In such a case, no special care need be taken to meet the USB suspend current ( 0.5mA ) as the device does not get its power from the USB port. In this case it is still useful to connect SLEEP# ( or PWREN# ) to the CPU as this will let the CPU know that the PC is in suspend mode and thus unable to communicate with the device. If the device requires to wake up the PC then the MCU should connect one of its IO Ports to the Ring Indicator pin ( RI# ). The default state of RI# should be high - strobing this low for a few milliseconds then taking it high again will cause a USB resume sequence thus requesting the PC to wake up. To use this feature, Remote Wake-Up must be enabled in the 93C46 EEPROM. PWRCTL is tied to VCC to tell the device to indicate a self powered device in its USB descriptor. RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do ( tie CTS# of the FT232BM to GND ). Self powered designs should NOT force current back into the Host PC ( or HUB ) via the USB Port when the said Host / Hub is powered down and the self powered device is still powered-up from its own PSU. This rule includes injecting current into the powered down Host / Hub via the 1k5 pull-up on USB D+. Failure to do this can result in unreliable operation in the eld. This is an integral part of the USB specication and applies to all USB Self Powered devices ( not just FT232BM peripherals ). In this design, the presence of power on the host/hub USB port is used to control the RESET# pin of the FT232BM. When the Host / Hub is powered up RSTOUT# pulls the top end of the 1k5 resistor on USB D+ to 3.3v nominal thus identifying the device as a full speed device to USB. When the Host / HUB powers down, the FT232BM is reset and RSTOUT# will go low thus preventing current being injected into the Host / Hub USB D+ line via the 1k5 resistor. General Design Notes See Previous Example

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

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FB1 VCC Q1 R3 470R IRLML6402 C8 0.1uF Soft Start Circuit C7 0.1uF VCC

USB

VCC

CN1 CN-USB

FERRITE BEAD

1 2 3 4

C5 10nF

C4 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 R7 1k 5v MCU or Logic cct CTS# RTS# RXD TXD VCC-5v

C6 0.1uF

VCC VCC VCC-IO TXD RXD RTS# CTS# DTR# DSR# DCD# RI#

AGND

GND GND

29

C3 10uF VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 10k 93C46/56/66 ( Optional ) 8 7 6 5

Figure 3.0 FT232BM 5 volt Bus Powered Example Schematic with Power Switching ( 232-5VSW )

Future Technology Devices Intl. Ltd. 2002/2003

7 USBDP R6 5 RSTOUT# XTIN 27 1k5 TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST 9 17 FT232BM SLEEP# 10 RXLED# 1 2 31 11 12 PWRCTL 14 PWREN# VCC 4 15 16 GND

DG232 Version 2.0

8 USBDM AVCC 6 3V3OUT

R4

27R

R5

27R

Y1 6MHz RESONATOR

DECOUPLING CAPS

VCC

FT232BM Designers Guide

C2 0.1uF

C1 0.1uF

Page 6 of 16

FT232B APPLICATION SCHEMATIC POWERED APPLICATION WITH POWER SWITCHING

FT232BM Designers Guide

Figure 3.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a 5v MCU or other external logic. In this design, the FT232BM controls the power to the auxiliary circuitry using PWEREN# to shut off power to this circuitry when 1. The FT232BM is in reset, OR 2. The FT232BM has not yet been congured ( successfully recognised and enumerated over USB ), OR 3. USB is in suspend / sleep mode. A P-Channel Logic Level MOSFET is used as a power switch to control the power to the auxiliary devices in this example we use a International Rectier part number IRLML6402. R7 and C8 form a soft start circuit which limits the current surge when the MOSFET turns on. Without this, there is a danger that the transient power surge of the MOSFET turning on will reset the FT232BM or the USB Host / Hub controller. The values used allow the attached circuitry to power up with a slew rate of ~ 12.5v per millisecond, in other words the output voltage will transitioning from GND to 5v in around 400uS. When using this circuit, enable the Pull-Down on Suspend option in the EEPROM. This will ensure minimum leakage current during sleep ( suspend ) mode by gently pulling down the UART interface pins of the FT232BM pins to GND during USB suspend. The auxiliary circuitry attached to the FT232BM device must have its own power-on-reset circuitry and should NOT use RESETO# to generate a reset for this circuitry. RESETO# does not generate a reset during USB sleep ( suspend ) when the auxiliary logic is powered-off, thus cannot be used as a reset in this case. A USB High-Power Bus Powered Device ( one that consumes more than 100mA and up to 500mA ) of current from the USB bus during normal operation must use this power control feature to remain compliant as the USB specication does not allow a USB peripheral to draw more than 100mA of current from the USB Bus until the device has been successfully enumerated. A USB High-Power Bus Powered Device cannot be plugged into a USB Bus-Powered Hub as these can only supply 100mA per USB port. The Power ( current ) consumption of the device is set in a eld in the 93C46 EEPROM attached to the FT232BM. A USB High-Power Bus Powered Device must use the 93C46 to inform the system of its power requirements. PWRCTL is tied to GND to tell the device to indicate a bus powered device in its USB descriptor. RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do ( tie CTS# of the FT232BM to GND ).

General Design Notes See Previous Examples

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 7 of 16

FB1 VCC LDO REGULATOR 3.3v R3 470R I G U3 C4 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 3.3v MCU or Logic cct CTS# RTS# RXD TXD VCC-3.3v C6 0.1uF C7 0.1uF O VCC-3.3V VCC VCC

USB

Figure 4.0

CN1 CN-USB

FERRITE BEAD

1 2 3 4

C5 10nF

VCC VCC VCC-IO TXD RXD RTS# CTS# DTR# DSR# DCD# RI#

AGND

GND GND

29

9 17

DG232 Version 2.0

8 USBDM USBDP 7 R6 5 RSTOUT# XTIN 27 1k5 AVCC 6 3V3OUT TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST FT232BM R7 47k VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 10k 93C46/56/66 ( Optional ) 8 7 6 5 RSTOUT# SLEEP# 10 SLEEP# POWERDN# RESET# GND RXLED# 1 2 31 11 12 PWRCTL 14 PWREN# VCC 4 15 16

R4

27R

R5

27R

RSTOUT#

Y1 6MHz RESONATOR

DECOUPLING CAPS

VCC

FT232BM 3.3 volt Bus Powered Example Schematic ( 232-3VB )

Future Technology Devices Intl. Ltd. 2002/2003

FT232B APPLICATION SCHEMATIC

FT232BM Designers Guide

C3 10uF

C2 0.1uF

C1 0.1uF

Page 8 of 16

INTERFACING TO 3.3 V LOGIC - BUS POWERED ( <= 100mA ) APPLICATION

FT232BM Designers Guide

Figure 4.0 is an example of a 3.3 volt, USB bus powered design using the FT232BM connected to a 3.3v MCU or other external logic. The main difference between this circuit and the 5 volt circuit of Figure 1.0 is that a 3.3 volt LDO regulator i.c. is used to provide a 3.3v supply to the auxiliary circuiry. VCC-IO is driven from the 3.3v LDO regulator i.c. in order to drive the UART interface from the FT232BM to the MCU / external logic at 3.3v level instead of 5v level. As the USB supply rail can drop to 4.4 volts or less under load, an LDO ( Low Dropout ) voltage regulator must be used in this instance. The 3.3v LDO voltage regulator must also have a low quiescent ( no load ) current in order to ensure that the USB suspend current requirement ( <= 500uA ) is met during USB suspend. In this example, we assume that the total current of the design is <= 100mA ( low power ), and that the MCU / logic can detect USB suspend mode using either the SLEEP# or PWREN# pins of the FT232BM and put itself and any circuitry it is controlling into a low power state in order to meet the total USB suspend current requirement of 500uA or less. RSTOUT# is used to provide a power-on reset to the external logic in this example. If the MCU has its own power-on reset logic then there is usually no need to use RSTOUT# to reset the device and this connection and the 47k pull-down can be omitted. Note : If RSTOUT# is used to reset an external device AND to pull-up the USB D+ line, its Vout high can be as low as 2.2v so it must be used to drive a TTL level reset input on the external device. PWRCTL is tied to GND to tell the device to indicate a bus powered device in its USB descriptor. RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do ( tie CTS# of the FT232BM to GND ).

General Design Notes See Previous Examples

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 9 of 16

USB
R3 470R C6 0.1uF

VCC

VCC

VCC3V

CN1 CN-USB

Figure 5.0

1 2 3 4

R4

27R

R5

27R

C4 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 3.3v MCU or Logic cct CTS# RTS# RXD TXD VCC-3v

C5 0.1uF

AVCC

R8 10k TXD RXD RTS# CTS# DTR# 5 RSTOUT# XTIN RI# DCD# DSR# 27 8 USBDM USBDP 7

AGND

GND GND

29

C3 10uF VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 93C46/56/66 ( Optional ) 8 7 6 5

C2 0.1uF

C1 0.1uF

9 17

DG232 Version 2.0

VCC VCC VCC-IO 6 3V3OUT TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST FT232BM SLEEP# 10 RXLED# 1 2 31 11 12 PWRCTL 14 PWREN# 4 15 16 POWEREN# GND VCC VCC3V EXTERNAL POWER VCC 3.3v VCC 5.0v GND 10k

R6 1k5

R7 15k

Y1 6MHz RESONATOR

DECOUPLING CAPS

FT232BM 3.3 volt Self Powered Example Schematic ( 232-3VS )

Future Technology Devices Intl. Ltd. 2002/2003

FT232B APPLICATION SCHEMATIC UPDATED 21st January 2003

VCC

FT232BM Designers Guide

Page 10 of 16

INTERFACING TO 3.3V LOGIC - SELF POWERED APPLICATION

FT232BM Designers Guide

Figure 5.0 is an example of a 3.3 volt, USB self powered design using the FT232BM connected to a 3.3v MCU or other external logic. A USB self power design has its own PSU and does not draw its power from the USB bus. In such a case, no special care need be taken to meet the USB suspend current ( 0.5mA ) as the device does not get its power from the USB port. The differences between this circuit and that of Figure 2.0 are minimal. See the notes in Figure 2 for the main details. In this case the internal PSU needs to supply 3.3 volts to the auxiliary circuitry and 5 volts to the FT232BM i.c. The VCCIO power line to the FT232BM is driven from the 3.3v supply in order to drive the auxiliary logic at the correct voltage level.

Important Note : In this design, the PWRCTL Pin ( Pin 14 ) of the FT232BM is tied high to indicate a self powered design. It is important to tie this to VCCIO ( 3.3v ) and NOT to VCC ( 5.0v ) otherwise the input protection diodes on this pin will conduct and try to pull VCCIO towards 5.0v As well as being undesirable, this may cause excessive current to be drawn by the FT232BM and the 3.3v logic attached to this device.

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 11 of 16

FB1 VCC Q1 VCC REG1 TC55RP3302

USB
G Vi IRLML6402 1 2 3 C10 0.1uF C6 0.1uF Soft Start Circuit C8 4.7uF R3 470R Vo

VCC

Figure 6.0

CN1 CN-USB

FERRITE BEAD

1 2 3 4

C4 10nF

C3 33nF 30 3 26 13 U1 25 24 23 22 21 20 19 18 R7 1k 3v MCU or Logic cct CTS# RTS# RXD TXD VCC-3v

C5 0.1uF

C9 0.1uF

AVCC

VCC VCC VCC-IO TXD RXD RTS# CTS# DTR# DSR# DCD# RI#

AGND

GND GND

29

C7 4.7uF VCC U2 1 2 3 4 CS SK DIN DOUT VCC NC NC GND R2 2k2 R1 10k 93C46/56/66 ( Optional ) 8 7 6 5

FT232BM 3.3 volt Switched Power Bus Powered Schematic ( 232-3VSW)

Future Technology Devices Intl. Ltd. 2002/2003

7 USBDP R6 5 RSTOUT# XTIN 27 1k5 TXDEN 28 XTOUT RESET# TXLED# 32 EECS EESK EEDATA TEST 9 17 FT232BM SLEEP# 10 RXLED# 1 2 31 11 12 PWRCTL 14 PWREN# VCC 4 15 16 GND

DG232 Version 2.0

6 3V3OUT USBDM 8

R4

27R

R5

27R

Y1 6MHz RESONATOR

DECOUPLING CAPS

VCC

FT232BM Designers Guide

C2 0.1uF

C1 0.1uF

Page 12 of 16

FT232B APPLICATION SCHEMATIC WITH POWER SWITCHING

INTERFACING TO 3.3 V LOGIC - BUS POWERED ( <= 250mA ) APPLICATION

FT232BM Designers Guide

Figure 6.0 is an example of a 3.3 volt, USB bus powered design with power switching using the FT232BM connected to a 3.3v MCU or other external logic. The circuit is essentially a combination of the schematics of Figure 3 and Figure 4. A 3.3 volt LDO regulator i.c. is used to provide a 3.3v VCCIO rail and switched 3.3v supply to the auxiliary circuiry via a IRLML6402 P-Channel MOSFET . In this example, we use a Telcom / MicroChip TC55RP3302 as the 3.3v LDO regulator. This has a maximum rated output current of 250mA. If a higher current is required, use an LD1117 / LM1117 series LDO regulator instead as these are rated to 800mA. The two are not pin compatible. R7 and C10 form a soft start circuit which helps prevent excesssive power switching transients when the MOSFET turns on. We would advise you to include these components as without them the current surge when the IRLML6402 MOSFET initially turns on can be capable of resetting the FT232BM or tripping the power sense circuitry in a USB hub.

General Design Notes See Previous Examples

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 13 of 16

FB1
VCC

USB
R5 470R
SKT1 DB9M

VCC

VCC

Figure 7.0

CN1 CN-USB

FERRITE BEAD

1 2 3 4
VCC

C10 10nF

VCC

C9 33nF

C11 0.1uF

30

SHIELD

3 26 13

U2
25
24
RXD TXD

AVCC

VCC VCC VCC-IO TXD RXD

10
R1 220R

6
3V3OUT USBDM RTS# CTS# DTR#
5

TX

D1 LED

D2 LED

RX

R6

27R

RI DTR CTS TXDATA RTS RXDATA DSR DCD

AGND

GND GND

29

VCC

9 17

DG232 Version 2.0

8
23
22
21
20
19
DCD# RI# DSR# DTR# CTS# RTS#
5 9 4 8 3 7 2 6 1

R7
7
USBDP
R2 220R
SHIELD

27R

R8
RSTOUT# XTIN RI#
18

DSR# DCD#

1k5
27

Y1 6MHz RESONATOR

TXDEN
U1

16
15
14
TXD DTR# RTS#
7 6 20 21
T1IN T2IN T3IN T4IN

28

XTOUT RESET# TXLED# PWRCTL

PWREN#

VCC

12

T1OUT T2OUT T3OUT T4OUT

2 3 1 28

TXDATA DTR RTS

32

EECS EESK EEDATA

VCC
SLEEP# VCC

RXLED#

11

DECOUPLING CAPS

SLEEP#

10

SLEEP#

CTS DSR DCD RXDATA RI

9 4 27 23 18

R1IN R2IN R3IN R4IN R5IN

R1OUT R2OUT R3OUT R4OUT R5OUT

8 5 26 22 19

CTS# DSR# DCD# RXD RI#

VCC

31

TEST
FT232BM
C5 0.1uF

25 24

SHDN# EN

13
12 14

V+ C1+ C1-

VC2+ C2-

17
15 16
10
11 GND VCC

C7 0.1uF

VCC

C4 10uF

C3 0.1uF

C1 0.1uF

C2 0.1uF

VCC

C6 0.1uF

C8 0.1uF

GND

U3

1 2 3 4

CS SK DIN DOUT

VCC NC NC GND

8 7 6 5

MAX213CAI MAX213CWI ADM213E SP213ECA

R4 2k2
R3 10k

93C46/56/66 ( Optional )
SP213EHCA

FT232BM 5v BUS Powered USB => RS232 Converter Example Schematic ( USB-232B )

Future Technology Devices Intl. Ltd. 2002/2003

FT232B APPLICATION SCHEMATIC

FT232BM Designers Guide

Page 14 of 16

USB <=> RS232 SERIAL CONVERTER ( 300 to 115k/460k baud )

FT232BM Designers Guide

Figure 7.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a TTL RS232 level converter i.c . For RS232 applications, the baud rate of the nished product is limited by the ac. driving characteristics of the level converter i.c. rather than that of the FT232BM. This example uses the popular 213 series of TTL to RS232 level converters. These devices have 4 transmitters and 5 receivers in a 28 LD SSOP package and feature an in-built voltage converter to convert the 5v ( nominal ) VCC to the +/- 9volts required by RS232. An important feature of these devices is the SHDN# pin which can power down the device to a low quiescent current during USB suspend mode The device used in this schematic is a Sipex SP213EHCA which is capable of RS232 communication at up to 500k baud. If a lower baud rate is acceptable, then several pin compatible alternatives are available such as Sipex SP213ECA , Maxim MAX213CAI and Analog Devices ADM213E which are good for communication at up to 115,200 baud. If a higher baud rate is desired, use a Maxim MAX3245CAI part which is capable of RS232 communication at rates of up to 1M baud. Note : the MAX3245 is not pin compatible with the 213 series devices, also its SHDN pin is active high so connect this to PWREN# instead of SLEEP#.

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

Page 15 of 16

FT232BM Designers Guide

Document Revision History

DG232B Version 1.0 Initial document created 05 August 2002 DG232B Version 1.1 Created 06 August 2002 Added USB-232B application DG232B Version 2.0 Created 19th May 2003 Corrected Pull Up Control Circuit for Self Powered Designs Corrected connection of PWRCTL in 3.3v Self Powered Designs Updated Schematic Drawings Added 3.3v Switched Bus Powered reference schematic

Disclaimer
Future Technology Devices International Limited , 2002 / 2003 Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology Devices International Ltd. will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in which the failure of the product might reasonably be expected to result in personal injury. The information in this document may be subject to change without notice.

Contact Information
Future Technology Devices Intl. Limited St. Georges Studios 93/97 St. Georges Road, Glasgow G3 6JA, United Kingdom. Tel : +44 ( 0 )141 353 2565 Fax : +44 ( 0 )141 353 2656 E-Mail ( Sales ) : sales@ftdichip.com E-Mail ( Support ) : support@ftdichip.com E-Mail ( General Enquiries ) : admin@ftdichip.com Web Site URL : http://www.ftdichip.com

Agents and Sales Representatives At the time of writing our Sales Network covers over 50 different countries world-wide. Please visit the Sales Network page of our Web Site site for the contact details our distributor(s) in your country.

DG232 Version 2.0

Future Technology Devices Intl. Ltd. 2002/2003

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