DBMS

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010. Fourth Semester Computer Science and Engineering CS2251 - DATABASE MANAGEMENT SYSTEMS (Common to Information Technology) (Regulation 2008) Time: Three hours Answer ALL Questions. PART A- (10 X 2= 20 marks) Maximum:100 marks

1. Explain the basic structure of a relational database with an example. 2. What are the functions of a DBA? 3. Give the usage of the rename operation with an example. 4. What do you mean by weak entity set? 5. What is normalization? 6. Write a note on functional dependencies. 7. What do you mean by a transaction? 8. Define the term ACID properties. 9. Describe flash memory. 10. List out the physical storage media.

PART B- (5 X 16 = 80 Marks)

11. (a) (i) Discuss the various disadvantages in the file system and explain how it can be overcome by the database system. (6 Marks) (ii) What are the different Data models present? Explain in detail. (10 Marks) (Or) (b) (i) Explain the Database system structure with a neat diagram. (10 Marks) (ii) Construct an ER diagram for an employee payroll system. (6 Marks)

12. (a) (i) Explain the use trigger with your own example. (8 Marks) (ii) Discuss the terms Distributed databases and client/ server databases. (8 Marks) (Or) (b) (i) What is a view? How can it be created? Explain with an example. (7 Marks) (ii) Discuss in detail the operators SELECT, PROJECT, UNION with suitable examples. (9 Marks)

13. (a) Explain 1NF, 2NF and 3NF with an example. (16 Marks) (Or) (b) Explain the Boyce- Codd normal form with an example. Also state how it differs from that of 3NF. (16 Marks)

14. (a) (i) How can you implement atomicity in transactions? Explain. (8 Marks) (ii) Describe the concept of serializability with suitable example. (8 Marks) (Or) (b) How concurrency is performed? Explain the protocol that is used to maintain the concurrency concept. (16 Marks)

15. (a) What is RAID? Explain it in detail. (16 Marks) (Or) (b) Mention the purpose of indexing. How this can be done by B+ tree? Explain. (16 Marks)

PQT
B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010. Fourth Semester Computer Science and Engineering MA2262- PROBABILITY AND QUEUEING THEORY (Regulation 2008) (Common to Information Technology) Time: Three hours Answer ALL Questions. PART A- (10 X 2= 20 marks) Maximum:100 marks

1. Obtain the mean for a Geometric random variable. 2. What is meant by memoryless property? Which continuous distribution follows this property? 3. Give a real life example each for positive correlation and negative correlation. 4. State central limit theorem for independent and identically distributed (iid) random variables. 5. Is a Poisson process a continuous time Markov chain? Justify your answer. 6. Consider the Markov chain consisting of the three states 0, 1, 2 and transition probability matrix P= |1/2 1/2 0 | |1/2 1/4 1/4| |0 1/3 2/3| it irreducible? Justify. 7. Suppose that customers arrive at a Poisson rate of one per every 12 minutes and that the service time is exponential at a rate of one service per 8 minutes. What is the average number of customers in the system? 8. Define M/M/2 queuing model. Why the notation M is used? 9. Distinguish between open and closed networks.

10. M/G/1 queuing system is markovian. Comment on this statement.

PART B- (5 X 16 = 80 Marks)

11. (a) (i) By calculating the moment generating function of Poisson distribution with parameter , prove that the mean and variance of the Poisson distribution are equal.

(ii) If the density function of X equals f(x) = {Ce-2x , 0 < x < 0 , x<0 , find c. What is P[X>2] ? (Or)

(b) (i) Describe the situations in which geometric distributions could be used. Obtain its moment generating function.

(ii) A coin having probability p of coming up heads is successively flipped until the rth head appears. Argue that X, the number of flips required will be n, n>= r with probability P[X = n] = (n-1) (r-1)pr qn-r n>=r

12. (a) (i) Suppose that X and Y are independent non negative continuous random variables having

densities fx(x) and fy(y) respectively. Compute P[X < Y].

(ii) The joint density of X and Y is given by f(x, y) = {1/2ye-xy , 0< x < , 0< y <2. 0 , otherwise Calculate the conditional density of X given Y = 1.

(Or)

(b) (i) If the correlation coefficient is 0, then can we conclude that they are independent? Justify your answer, through an example. What about the converse?

(ii) Let X and Y be independent random variables both uniformly distributed on (0, 1). Calculate the probability density of X + Y.

13. (a) (i) Let the Markov Chain consisting of the states 0, 1, 2, 3 have the transition probability matrix.

|0 0 1/2 1/2| |1 0 0 0 | |0 1 0 0 | |0 1 0 0 | Determine which states are transient and which are recurrent by defining transient and recurrent states.

(ii) Suppose that whether or not it rains today depends on previous weather condition through the last two days. Show how this system may be analyzed by using a Markov chain. How many states are needed? (Or)

(b) (i) Derive Chapman - Kolmogorov equations.

(ii) Three out of every four trucks on the road are followed by a car, while only one out of every five cars is followed by a truck. What fraction of vehicles on the road are trucks?

14. (a) Define birth and death process. Obtain its steady state probabilities. How it could be used to find the steady state solution for the M/M/1 model? Why is it called geometric? (Or)

(b) Calculate any four measures of effectiveness of M/M/1 queueing model.

15. (a) Derive Pollaczek- Khintchine formula. (Or)

(b) Explain how queuing theory could be used to study computer networks.

MM
B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010. Fourth Semester Computer Science and Engineering CS2252 - MICROPROCESSORS AND MICRO CONTROLLERS (Common to Information Technology) (Regulation 2008) Time: Three hours Answer ALL Questions. PART A- (10 X 2= 20 marks) Maximum:100 marks

1. Assume that the accumulator contains data types 82H and the instruction MOV C, A (4FH) is fetched. List the steps in encoding and executing the instruction. 2. What are the second bytes in the instruction IN and OUT of 8085 microprocessor? 3. Draw the 8086 flag register format.

4. List different types of 8086 hardware interrupts. 5. Compare closely coupled configuration with loosely coupled configuration. 6. Mention the need for co- processor in a microprocessor based system. 7. Can an input port and an output port have the same port address? Justify. 8. Why is each channel in DMA controller restricted to 16K bytes of data transfer? 9. With XTAL = 11.0592 MHz, what value should be loaded into TH1 to have 9600 baud rate? 10. How do you select the register bank in 8051 micro-controller?

PART B- (5 X 16 = 80 Marks)

11. (a) (i) Write an 8085 assembly language program with flowchart for the following: Six bytes are stored in memory locations starting at XX50H. Add all the data bytes. Use register B to save any carry generated while adding the data bytes. Store the sum at two consecutive memory locations, XX70H and XX71H. Data (H): A2, FA, DF, E5, 98, 8B. (8 Marks) (ii) Write a program to generate a continuous square wave with the period of 500 microseconds. Assume the system clock period is 325ns and use bit D0 to output the square wave. (8 Marks) (Or) (b) (i) Explain the following 8085 instructions with an example JP, JPO, CM, RPE, DAA, XCHG, SPHL and PCHL. (8 Marks) (ii) Draw the timing diagram for the instruction MVI A, 32h and OUT 01h. (8 Marks)

12. (a) (i) Draw the internal block diagram of 8086 microprocessor and explain. (8 Marks) (ii) Explain any eight assembler directives of 8086 microprocessor. (8 Marks) (Or) (b) (i) Give three examples for the following 8086 microprocessor instructions: String Instructions, Process Control Instruction, Program Execution Transfer Instructions and Bit manipulation Instructions. (12 Marks) (ii)How does one define and call macro parameters of 886 microprocessor? (4 Marks)

13. (a) (i) Draw the internal block diagram of 8087 Co- processor and explain it with 8087 control word and status word formats. (12 Marks) (ii) Give two examples for packed decimal data transfers and integer data transfers of an 8087 coprocessor. (4 Marks) (Or) (b) Draw the architecture of 8089 I/O co- processor and explain. (16 Marks)

14. (a) Draw the block diagram of 8279 keyboard/ Display controller and explain hoe to interface the Hex Key pad and 7- segment LEDs using 8279. (16 Marks) (Or) (b) (i) Draw the functional block diagram of 8254 timer and explain the different modes of operation. (8 Marks) (ii) Draw the block diagram of 8259A and explain how to program 8259A. (8 Marks)

15. (a) (i) Explain the memory structure of an 8051 Micro-controller. (8 Marks) (ii) How does one interface a 16 X 2 LCD Display using 8051 Micro-controller? (8 Marks) (Or) (b) (i) Explain the on- chip timer modes of an 8051 Micro-controller. (8 Marks) (ii) Explain how interface an 8- bit ADC with 8051 Micro-controller. (8 Marks

COA
B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010. Fourth Semester Computer Science and Engineeri CS2253 - COMPUTER ORGANIZATION AND ARCHITECTURE (Common to Information Technology)

(Regulation 2008) Time: Three hours Answer ALL Questions. PART A- (10 X 2= 20 marks) Maximum:100 marks

1. Distinguish between autoincrement and autodecrement addressing mode. 2. Compare RISC with CISC architecture. 3. Under what situations the micro program counter is not incremented after a new instruction is fetched from micro program memory? 4. What are the relative merits of horizontal and vertical micro instruction format? 5. What is pipelining and what are the advantages of pipelining? 6. List the key aspects in gaining the performance in pipelined systems. 7. How many memory chips are needed to construct 2M x 16 memory system using 512K x 8 static memory chips? 8. What is virtual memory and what are the benefits of virtual memory? 9. What is meant by bus arbitration? 10. Name and give the purpose of widely used bus standard.

PART B- (5 X 16 = 80 Marks)

11. (a) (i) Describe the role of system software to improve the performance of a computer. (8 Marks) (ii) Design a 4- bit adder/ subtracter circuit using full adders and explain its function. (8 Marks) (Or) (b) (i) What are the special registers in a typical computer? Explain their purposes in detail. (8 Marks) (ii) Design a 4- bit fast adder and explain its function in detail. (8 Marks)

12. (a) (i) Draw and explain the block diagram of a complete processor. (6 Marks) (ii) Briefly describe the design of a hardwired control unit. (10 Marks) (Or) (b) (i) Explain the basic organization of a microprogrammed control unit and the generation of control signals using microprogram. (12 Marks) (ii) What are the advantages and disadvantages of hardwired and microprogrammed control? (4 Marks)

13. (a) (i) Describe the role of cache memory in pipelined system. (8 Marks) (ii) Discuss the influence of pipelining on instruction set design. (8 Marks) (Or) (b) What is instruction hazard? Explain the methods for dealing with the instruction hazards. (16 Marks)

14. (a) (i) What are the different secondary storage devices? Elaborate on any one of the devices. (8 Marks) (ii) Explain how the virtual address is converted into real address in a paged virtual memory system. (8 Marks) (Or) (b) (i) Explain approaches for addressing multiple- module memory systems with suitable diagrams. (6 Marks) (ii) Briefly describe magnetic disk principles and also the organization and accessing of data on a disk. (10 Marks)

15. (a) (i) Describe the hardware mechanism for handling multiple interrupt requests. (8 Marks) (ii) What are handshaking signals? Explain the handshake control of data transfer during input and output operation. (8 Marks) (Or) (b) (i) What are the needs for input- output interface? Explain the functions of a typical 8- bit parallel interface in detail. (10 Marks)

(ii) Describe the USB architecture with the help of a neat diagram. (6

OS
M.C.A DEGREE EXAMINATION, JUNE/JULY 2009

SECOND SEMESTER

CA5155 OPERATING SYSTEMS

(REGULATION 2007)

Time: Three hours Maximum: 100 marks

Answer all questions.

PART A [10 X 2 = 20 marks]

1.What do you mean by graceful degradation in multiprocessor systems?

2.What is system call?

3.What are the various states of a process?

4.Why CPU scheduling is required?

5.List the three requirements that must be satisfied by critical-section problem.

6.Define deadlock.

7.What do you mean by swapping technique?

8.State the principle of locality.

9.What is the use of file control block?

10.What are the free space management techniques?

PART B [5 X 16 = 80 marks]

11.(a) Discuss about the mainframe system. (8)

(b) Explain the components of an operating system. (8)

Or

12.(a) Explain about the distributed systems. (8)

(b) Discuss the Operating System Services. (8)

13. Consider the following set of processes, with the length of the CPU burst time given in milliseconds. (16)

Process Burst time Priority P1 10 3 P2 1 1 P3 2 3 P4 1 4 P5 6 2

The process are assumed to have arrived in order P1, P2, P3, P4, P5, all at time 0. (a)Draw four Gantt charts illustrating the execution of these processes using FCFS, SJF, a nonpreemptive priority (a smaller priority number implies a higher priority), and RR (quantum = 1) scheduling.

(b)What is the turnaround time of each process for each of the scheduling algorithm in part (a)?

(c)What is the waiting time of each process for each of the scheduling algorithm in part (a)?

Or

14. (a) Compare long term, short term and medium term process schedulers. (8)

(b) Describe briefly about the Interprocess Communcation. (8)

15. (a) Explain the readers-writers problem using semaphores. (8)

(b) Explain the bankers algorithm for solving deadlock problem. (8)

Or

16. (a) Explain the scheme for detecting deadlock. (8)

(b) Discuss the various methods for deadlock recovery. (8)

17. (a) Explain the various contagious memory allocation strategies with suitable examples. (8)

(b) Discuss the concept of demand paging. (8)

Or

18. (a) Consider the page-reference string : 2 3 2 1 5 2 4 5 3 2 5 2. How many page faults occur for the following replacement algorithms, assuming three frames? (12)

(i) FIFO (ii) LRU (iii) Optimal

(b) Write a short note on segmentation. (4)

19. (a) Suppose that a disk drive has 5000 cylinders, numbered 0 to 4999. The drive is currently serving a request at cylinder 143 and the previous request was at cylinder 125. The queue of pending request is 86, 1470, 913, 1774, 948, 1509, 1022, 1750, 130. What is the total distance (in cylinders) to satisfy these requests using the following disk-scheduling algorithms? (8)

(i) SCAN (ii) LOOK

(b) Discuss briefly the schemes for defining the logical structure of a directory. (8)

Or

20. (a) Explain the various methods of allocating disc space. (8)

(b) Describe the components of a Linux system. (8)

QUESTION BANK

DBMS
UNIT I

PART A - Two Mark Questions

1. What is DBMS and whats the goal of it? 2. What are the advantages of DBMS? 3. What are the Disadvantages of DBMS? 4. What are the disadvantages of File Systems? 5. Define Entity, Entity Set, and extensions of entity set. Give one example for each. 6. Define and give examples to illustrate the four types of attributes in database. 7. Define relationship and participation.

8. Define mapping cardinality or cardinality ratio. 9. Explain the four types of mapping cardinality with example. 10. Define E-R diagram. 11. Define weak Entity set. Give an example and explain why it is weak entity set. 12. Define discriminator or partial key of a weak entity set. Give example. 13. Explain Referential Integrity. 14. Define Instances and schemas. 15. Define and explain the two types of Data Independence. 16. Define the type types of DML. 17. List out the functions of DBA. 18. What is the need for DBA? 19. Explain DML pre-compiler. 20. Define file manager and buffer manager. 21. Define Data Dictionary. 22. State the various processes of database. 23. What are the characteristics of database? 24. Define-metadata 25. Define data abstraction 26. What is data model? 27. What are the categories of data model? 28. Define entity, attributes and relationships 29. Define database state or snapshot? 30. What are the types of attributes in the ER model? 31. What are composite and simple attributes? 32. What are stored and derived attribute?

33. How are complex attributes represented? 34. Define value sets of attributes. 35. Define degree of relationship type 36. What is a role name? 37. What are the types of relationship constraints? 38. Define participation constraint. 39. What are the types of participation constraints? 40 Define a partial key. 41. Define specialization. 42. Define relational database schema 43. Define relational database state. 44. List any eight applications of DBMS. 45. Give the levels of data abstraction? 46. Define the terms 1) physical schema 2) logical schema. 47. What is conceptual schema? 48. What is storage manager? 49. What are the components of storage manager? 50. What is the purpose of storage manager? 51. List the data structures implemented by the storage manager. 52. What is a data dictionary? 53. What is an entity relationship model? 54. Define the terms i) Entity set ii) Relationship set 55. Define single valued and multivalued attributes.

56. Define null values. 57. Define the terms i) Key attribute ii) Value set 58. Define weak and strong entity sets? 59. What does the cardinality ratio specify? 60. Define the terms i) DDL ii) DML 61. List the disadvantages of relational database system.

PART B (16 MARK QUESTIONS)

1. Explain the architecture of DBMS with a neat block diagram 2. Explain ER model in detail 3. Explain the design issues of ER-model 4. Draw an ER diagram for a banking enterprise 5. Explain: Data models, Schemas, and Instances 6. Write about Entity types, Entity sets, Attributes, and keys. UNIT II

PART A - Two Mark Questions

1. Write short notes on relational model 2. Define tuple and attribute

3. Define the term relation. 4. Define tuple variable 5. Define the term Domain. 6. What is a candidate key? Illustrate with example. 7. What is a primary key? Illustrate with example. 8. What is a super key? Illustrate with example. 9. Define- relational algebra. 10. What is a SELECT operation? 11. What is a PROJECT operation? 12. Write short notes on tuple relational calculus. 13. Write short notes on domain relational calculus 14. Define query language? 15. Write short notes on Schema diagram. 16. What is foreign key? 17. What are the parts of SQL language? 18. What are the categories of SQL command? 19. What are the three classes of SQL expression? 20. Give the general form of SQL query? 21. What is the use of rename operation? 23. List the string operations supported by SQL? 24. List the set operations of SQL? 25. What is the use of Union and intersection operation? 26. What are aggregate functions? And list the aggregate functions supported by SQL? 27. What is the use of group by clause?

28. What is the use of sub queries? 29. What is view in SQL? How is it defined? 30. What is the use of with clause in SQL? 31. List the table modification commands in SQL? 32. List the SQL domain Types? 33. What is the use of integrity constraints? 34. Mention the 2 forms of integrity constraints in ER model? 35. What is trigger? 36. What are domain constraints? 37. What are referential integrity constraints? 38. What is assertion? Mention the forms available. 39. Give the syntax of assertion? 40. What is the need for triggers? 41. List the requirements needed to design a trigger. 42. Give the forms of triggers? 43. Name the various privileges in SQL? 44. Mention the various user privileges. 45. Give the limitations of SQL authorization. 46. List out the statements associated with a database transaction? 47. What is transaction? 48. What is a homogeneous distributed database? 49. What is a heterogeneous distributed database? 50. What are the two approaches to store relations in distributed database? 51. What are the two different schemes for fragmenting a relation? 52. What is horizontal fragmentation?

53. What is vertical fragmentation? 54. What are the various forms of data transparency? 55. Give the syntax for creating the table with composite primary key. 56. Write a query to display loan number, branch name where loan amount is between 500 and 1000 using comparison operators. 57. Find the names of all branches with customers who have an account in the bank and who live in the Harrison city using Equi-join. 58. Find the names of all branches with customers who have an account in the bank and who live in the Harrison city using Sub-Queries. 59. Select the rows from borrower such that the loan numbers are lesser than any loan number where the branch name is Downtown. 60. Define self-join and give an example query to illustrate self-join with a sample table. 61. What is a view and give an example query to create a view from an existing table. 62. Define Degree and Domain of a relation. 63. Define how a relation is defined mathematically. 64. List out the six fundamental operators and 4 additional operators in relational algebra. 65. Which operators are called as unary operators and explain why they are called so. 66. Which operators are called as binary operators and explain why they are called so. 67. Write a relational algebra expression to find those tuples pertaining to loans of more than 1200 made by the Perry ridge branch. 68. Explain the use of set difference operator and give an example to illustrate the same. 69. Explain the two conditions needed for the set difference operation (union

Operation) to be valid. 70. Explain with one example why the additional operators are separated from the fundamental operators? 71. Explain theta join. 72. Define how an expression can be expressed in tuple relational calculus and list out the notations used. 73. Write an expression to find the names of all customers who have a loan from the Perry ridge branch in tuple relational calculus. 74. Write an expression to find all customers who have an account at all branches located in Brooklyn in tuple relational calculus. 75. Write an expression to find all customers who have an account, a loan or both at the Perry ridge branch in domain relational calculus. 76. Define and give the general format used for generalized projection. Give one example expression to illustrate the same. 77. What is the use of outer join and list out the three types of outer join with the notations used in relational algebra? 78. Write a relational algebraic expression to delete all accounts at branches located in Brooklyn. 79. Write a relational algebraic expression to insert the information about Smith with his new account number A-157 taken at the Perry ridge branch with Rs.1200. 80. Write a relational algebraic expression to insert a gift amount of Rs. 200/- for all loan customers of the Perry ridge branch. 81. Write a relational algebraic expression to update by adding the balances more than 10000 with Rs.60/- interest and otherwise Rs. 50/- interest. 82. Define materialized views and explain the use of such views.

83. Define Distributed database systems. 84. What are the advantages of distributed system? 85. What is query processor? 86. Explain Client/Server. 87. What are the rules that have to be followed during fragmentation? 88. What are the failures in distributed DBMS? 89. Define relation schema. 90. Define degree of relation.

PART B (16 MARK QUESTIONS)

1. Explain the various relational algebra operations 2. Explain nested Queries with examples 3. Explain embedded SQL and dynamic SQL in detail 4. Explain the integrity constraints supported by SQL 5. Explain triggers with example. 6. Explain distributed Database in detail 7. Explain in detail the recovery techniques in distributed databases. 8. Write about Structured Query Language (SQL) commands. 9. Explain about the concept of Tuple Relational Calculus 10. Explain about the concept of Domain Relational Calculus.

UNIT III

PART A - Two Mark Questions

1. What is first normal form? 2. Define Boyce codd normal form 3. What is meant by functional dependencies? 4. What are the uses of functional dependencies? 5. Explain trivial dependency? 6. What are axioms? 7. What is meant by computing the closure of a set of functional dependency? 8. What is meant by normalization of data? 9. Define canonical cover? 10. List the properties of canonical cover. 11. What are the desirable properties of decomposition? 12. What is 2NF? 13. Define Functional Dependencies. 14. What are the main characteristics of functional dependencies? 15. Define Closure of Functional Dependency. 16. Define the three Armstrongs Axioms or rules of inference. 13. Define union, decomposition, and Pseudo-transitivity rules. 14. Define normalization of data and denormalization. 15. Explain shortly the four properties or objectives of normalization. 16. Define Partial Functional Dependency. 17 Define functional dependency. 18. State the inference rules of functional dependency.

19. What is normalization? 20. What is a prime attribute? 21. Define full functional dependency. 22. What is lossy decomposition? 23. What do you mean by lossy-join decomposition? 24. What is lossless-join decomposition? 25. What are the two problematic issues in the design of relational databases? 26. What do you mean by Determinant? 27. What is a trivial functional dependency? 28. Explain the terms reflectivity, augmentation and transitivity? 29. Define the terms self-determination, decomposition, union and composition. 30. What is transitive dependency? 31. Explain how to identify the functional dependencies of a relation using an example.

PART B (16 MARK QUESTIONS)

1. What is decomposition? Explain with the help of an example. 2. Explain the different normal forms in detail. 3. Explain the process of Functional Dependency. 4. What are the inference rules for functional dependencies? 5. Compare BCNF and 3NF with suitable example. 6. Explain First Normal form and second normal form with suitable example. 7. Explain the 4NF and 5NF with suitable example.

8. Explain the Domain-Key normal form (DKNF) with suitable example. 9. What is Denormalization? Explain with suitable example.

UNIT IV

PART A - Two Mark Questions 1. What is transaction? 2. What are the two statements regarding transaction? 3. What are the properties of transaction? 4. What is recovery management component? 5. When is a transaction rolled back? 6. What are the states of transaction? 7. What is a shadow copy scheme? 8. Give the reasons for allowing concurrency? 9. What is average response time? 10. What are the two types of serializability? 11. Define lock? 12. What are the different modes of lock? 13. Define deadlock? 14. Define the phases of two phase locking protocol 15. Define upgrade and downgrade? 16. What are the two methods for dealing deadlock problem? 17. What is a recovery scheme? 18. What are the two types of errors?

19. What are the storage types? 20. Define blocks? 21. What is meant by Physical blocks? 22. What is meant by buffer blocks? 23. What is meant by disk buffer? 24. What is meant by log-based recovery? 25. What are uncommitted modifications? 27. Define shadow paging. 28. Define page. 29. Differentiate strict two phase locking protocol and rigorous two phase locking protocol. 30. How the time stamps are implemented? 31. What are the time stamps associated with each data item? 32. Define transaction-processing systems. 33. Define read only transaction. 34. When does the transaction go into an active state and partially committed state? 35. What is called as committed state? 36. Define ACID property. 37. What is isolation of ACID properties? 38. Define cascading rollback. 39. What is called as a time stamp? 40. What is shared lock and Exclusive lock? 41. When does a deadlock occur? 42. What is meant by transaction rollback? 43. Write the reasons for using concurrent execution. 44. Define recoverable schedule.

45. What are the objectives & phases of concurrency control? 46. What are the types of locking protocols? 47. What are the problems that occur in transaction if they run concurrently? 48. What are the types of failures? 49. What are the transaction operations? 50. When does a transaction reach its commit point? 51. What are the properties of transaction? 52. Define consistent state. 53. When is a schedule said to be serial? 54. When is a schedule serializable? 55. Define precedence graph or serialization graph? 56. What is a lock? 57. What is a binary lock? 58. What are the fields present in a lock? 59. What are the locking operations of a shared/exclusive lock? 60. What are the phases in a locking transaction? 70. What are the values present in a timestamp algorithm? 71. What are the phases in concurrency control protocol?

PART B (16 MARK QUESTIONS)

1. Explain ACID in detail. 2. Explain serializability 3. Explain lock based protocols 4. Explain two phase locking in detail.

5. Explain log based recovery in detail. 6. Explain: Locking techniques for Concurrency Control 7. Explain the process of concurrency control based on timestamp ordering.

NIT V

PART A - Two Mark Questions

1. What are the main categories of storage hierarchy? Draw the storage device hierarchy according to their speed and their cost. 2. Give the measures of quality of a disk. 3. Compare sequential access devices versus random access devices with an example 4. What are the types of storage devices? 5. What are called jukebox systems? 6. What is called remapping of bad sectors? 7. Define access time. 8. Define seek time. 9. Define average seek time. 10. Define rotational latency time. 11. Define average latency time. 12. What is meant by data-transfer rate? 14. What are a block and a block number? 15. What are called journaling file systems? 16. What is the use of RAID? 17. Explain how reliability can be improved through redundancy? 18. What is called mirroring?

19. What is called mean time to repair? 20. What is called bit-level striping? 21. What is called block-level striping? 22. What are the two main goals of parallelism? 23. What are the factors to be taken into account when choosing a RAID level? 24. What is meant by software and hardware RAID systems? 25. Define hot swapping? 26. Which level of RAID is best? Why? 27. Distinguish between fixed length records and variable length records?

28. Explain the concept of variable length records. 30. What are the two types of blocks in the fixed length representation? Define them. 32. What is known as heap file organization? 33. What is known as sequential file organization? 34. What is hashing file organization? 35. What is known as clustering file organization? 36. What is an index? 37. What are the two types of ordered indices? 38. What are the types of indices? 39. What are the techniques to be evaluated for both ordered indexing and hashing? 40. What is known as a search key? 41. What is a primary index? 42. What are called index-sequential files?

43. What are the two types of indices? 44. What are called multilevel indices? 45. What are called secondary indices? 46. What are the disadvantages of index sequential files? 47. What is a B+-Tree index? 48. What is B-Tree? 49. What is hashing? 50. How do you create index in SQL? 51. Distinguish between static hashing and dynamic hashing? 52. What is a hash index? 53. What can be done to reduce the occurrences of bucket overflows in a hash file organization? 54. Differentiate open hashing and closed hashing (overflow chaining) 55. What is linear probing? 56. What is called query processing? 57. What are the steps involved in query processing? 58. What is called an evaluation primitive? 59. What is called a query evaluation plan? 60. What is called a query execution engine? 61. How do you measure the cost of query evaluation? 62. List out the operations involved in query processing 63. What are called as index scans? 64. What is called as external sorting? 65. Explain nested loop join? 66. What is meant by block nested loop join?

67. What is meant by hash join? 68. What is called as recursive partitioning? 69. What is called as an N-way merge? 70. What is known as fudge factor? 71. Define query optimization. 72. Define track. 74. What is the hardware address of a block? 75. Define block transfer time. 76. Define bulk transfer rate 77. What is data striping? 80. What is mirroring or shadowing? 81. What is bit level data striping? 82. What are the two techniques of implementing query optimization? 83. Define external sorting? 84. What are the phases of external sorting? 85. Define degree of merging?

PART B (16 MARK QUESTIONS)

1. Explain file organization in details. 2. Explain indexing and hashing 3. Explain B+ tree index in detail 4. Explain Query processing in detail. 5. Explain RAID levels in detail

6. Explain about secondary storage devices 7. Write about various operations that can be performed on files. 8. Explain the concept of parallelizing disk access using RAID technology. 9. Explain: Hashing Techniques 10. Explain the different types of single-level ordered indexes 11. Explain the basic algorithms for executing query operations 12. Explain the process of database tuning QUESTION BANK

MM
UNIT 1 - THE 8085 AND 8086 MICROPROCESSORS

PART-A

1. What is Microprocessor? Give the power supply & clock frequency of 8085 2. What are the functions of an accumulator? 3. List the 16 bit registers of 8085 microprocessor 4. List few applications of microprocessor-based system 5. List the allowed register pairs of 8085 6. Mention the purpose of SID and SOD lines 7. What is an Opcode? 8. What is the function of IO/M signal in the 8085? 9. What is an Operand? 10. How many operations are there in the instruction set of 8085 11. List out the five categories of the 8085 instructions. Give examples of the instructions for each group 12. Explain the difference between a JMP instruction and CALL instruction

13. . Explain the purpose of the I/O instructions IN and OUT. 14. What is the difference between the shift and rotate instructions? 15. How many address lines in a 4096 x 8 EPROM CHIP? 16. What are the control signals used for DMA operation 17. What is meant by Wait State? 18. List the four instructions which control the interrupt structure of the 8085 microprocessor. 19. What is meant by polling? 20. What is meant by interrupt? 21. Explain priority interrupts of 8085. 22. What is a microcomputer? 23. What is the signal classification of 8085 24. What are operations performed on data in 8085 25. Steps involved to fetch a byte in 8085 26. How many interrupts does 8085 have, mention them 27. Basic concepts in memory interfacing 28. Define instruction cycle, ma chine cycle and T-state 29. What is an instruction? 30. What is the use of ALE 31. How many machine cycles does 8085 have, mention them 32. Explain the signals HOLD, READY and SID 33. Mention the ca tegories of instruction and give two examples for each category 34. Explain LDA, STA and DAA instructions 35. Explain the different instruction formats with examples 36. What is the use of addressing modes, mention the different types 37. What is the use of bi-directional buffers?

38. Give the register organization of 8085 39. Define stack and explain stack related instructions 40. Why do we use XRA A instruction 41. Compare CALL and PUSH instruction 42. What is Microcontroller and Microco mputer 43. Define Flags 44. How does the microprocessor differentiate between data and instruction.

PART-B

1. Explain the arhitecture of microprocessors 8085. 2. Explain the pin diagram of 8085. 3. Explain the requirement of a program counter,stack pointer and status flags in the architecture of 8085 microprocessor. 4. Explain the memory mapped i/o addressing scheme. 5. Draw and explain the timing diagram of memory read cycle. 6. Draw and explain the timing diagram of memory write cycle with example. 7. Draw and explain the timing diagram of opcode fetch cycle. 8. Explain the direct addressing modes and indirect addressing modes of 8085 with example. 9. Assume that the accumulator contents data bytes 88 hand instruction MOV C, A 4FH is fetched. List the steps decoding and executing the instruction. 10. Draw the functional block diagram of 8085 microprocessor and explain. 11. Write a Program to Perform the following functions and verify the output steps: a. Load the number 5CH in register D b. Load the number 9E H in register C c. Increment the Contents of register C by one.

d. Add the contents of register C and D and Display the sum at output port1. 12. Write an assembly language program to find out the largest number from a given unordered array of 8 bit numbers, stored in the locations starting from a known address. 13. With suitable examples explain 8085 instruction set in detail. 14. With suitable examples explain 8085 addressing modes in detail. 15. Explain 8085 Stack in detail. 16. Write a 8085 ALP to generate a accurate time delay of 100ms. 17. Write 8085 assembly language program to SORT an array of 10 bytes in Descending order. 18. Explain 8085 stack in detail

UNIT 2 - 8086 SOFTWARE ASPECTS

PART-A

1. How do 8086 interrupts occur 2. What are the 8086 interrupt types 3. What is interrupt service routine 4. Define BIOS 5. Explain PUBLIC

6. Explain DUP 7. Compare Procedure & Macro 8. What is the purpose of segment registers in 8086? 9. Define pipelining? 10. Discuss the function of instruction queue in 8086? 11. What is the maximum memory size that can be addressed by 8086? 12. What is the function of the signal in 8086? 13. What are the predefined interrupts in 8086? 14. What are the different flag available in status register of 8086? 15. List the various addressing modes present in 8086? 16. How single stepping can be done in 8086? 17. State the significance of LOCK signal in 8086? 18. What are the functions of bus interface unit (BIU) in 8086? 19. What is the clock frequency of 8086? 20. What are the two modes of operations present in 8086? 21. Explain the process control instructions 22. Explain REPEAT-UNTIL statements 23. What is multiprogramming 24. Differentiate between absolute and linear select decoding? 25. What are the three classifications of 8086 interrupts? 26. What are the functions of status pins in 8086?

PART-B

1. Describe Intel 8086 Microprocessor Architecture

2. Describe any five addressing modes of 8086 with suitable examples. 3. Write a 8086 ALP to convert an 8 bit binary number into equivalent gray code. 4. Explain the function of all the pins of 8086 Processor. 5. Write a 8086 ALP to sort an array of ten bytes in ascending order. Add comments to your Program. 6. Explain the function of various flags of 8086 microprocessor. 7. Explain the function of unsigned multiplication and Division instructions in 8086 with suitable examples. 8. Describe the functional units present and their functions in BIU and EU of 8086. 9. Write 8086 assembly language program to perform the following a. To move a string of words from offset 1000h to offset 6000h. The Length of the string is 0Ch. b. To add an array of bytes. The array contains 50bytes.

UNIT 3 - MULTIPROCESSOR CONFIGURATIONS

PART-A

1. What are the configurations used for physical interconnections? 2. What is Closely Coupled Configuration? 3. What is Loosely Coupled Configuration 4. What is a data amplifier? 5. What are the different inter connection topologies? 6. Give the instruction set of 8087? 7. What are the different data types commonly used. 8. Write the advantages of loosely coupled system over tightly coupled systems?

9. Define Coprocessor. 10. Explain the different methods of data transfer possible between MPU and I/O. 11. What is the main use of I/O processor. 12. Difference between Loosely and Tightly Coupled Configuration 13. What is the need of Co-processors? Give an example. 14. What are the drawbacks of using tightly Coupled Configuration. 15. What are the major blocks available in 8089 architecture. 16. explain how CPU communicate with IOP. 17. What are the advantages of using 8087 Numeric Data Processor.

PART-B

1. Explain in detail about the different types of coprocessor configurations. 2. Explain briefly about loosely Coupled Configuration. 3. Explain briefly about tightly coupled configuration. 4. Explain in detail with an example about the various data types. 5. Describe in detail about the Architecture of 8089 I/O Processor. 6. Describe the different techniques in which how CPU can communicate with IOP. 7. Explain the difference between data processor and IO processor.

UNIT 4 - I/O INTERFACING

PART-A

1. What is the use of 8251 chip? 2. What are the different types of methods used for data transmission? 3. What are the various programmed data transfer methods? 4. What is synchronous data transfer? 5. What is asynchronous data transfer? 6. What are the functional types used in control words of 8251 7. What are the basic modes of operation of 8255? 8. Write the features of mode 0 in 8255? 9. What are the features used mode 1 in 8255? 10. What are the signals used in input control signal & output control signal? 11. What are the features used mode 2 in 8255? 12. What are the different types of write operations used in 8253? 13. What are the modes of operations used in 8253? 14. Give the different types of command words used in 8259a? 15. Give the operating modes of 8259a? 16. Define scan counter? 17. What is the output modes used in 8279? 18. What are the modes used in keyboard modes? 19. What are the modes used in display modes? 20. What is the use of modem control unit in 8251? 21. Give the register organization of 8257? 22. What is the function of DMA address register? 23. What is the use of terminal count register? 24. What is the function of mode set register in 8257? 25. Distinguish between the memories mapped I/O peripheral I/O?

26. List the operation modes of 8255 27. What is a control word? 28. What is the purpose of control word written to control register in 8255? 29. What is the size of ports in 8255? 30. What is interfacing? 31. What is memory mapping? 32. What is I/O mapping? 33. What is an USART? 34. What is the use of 8251 chip? 35. The 8279 is a programmable __________ interface. 36. List the major co mponents of the keyboard/Display interface 37. What is Key bouncing? 38. Define HRQ? 39. What is the use of stepper motor? 40. What is TXD? 41. What is RXD? 42. Draw the status word format for 8254. 43. What is meant by key bouncing? 44. Write the function of crossbar switch?

PART-B

1. With a neat block diagram, explain in detail the internal architecture of 8255 and its registers 2. Discuss how memory chips and I/O devices are interfaced to a microprocessor. 3. Explain the block diagram of the 8279 Keyboard/Display interface and its operations.

4. Draw a timing diagram to interface a 4K ROM and a 2K RAM consecutively with microprocessor 8085, starting with ROM interfacing at address 0000 H. Explain. 5. Discuss various Addressing modes of 8085 with suitable examples. 6. What are the various types of Data formats?Explain with examples. 7. Explain five interrupt inputs of 8085 with priority. 8. What are Hardware and Software Interrrupts?What is ISS? 9. Draw a diagram to interface a 6K ROM and a 2K RAM consecutively with microprocessor 8085, starting with ROM interfacing at address 8000 H. 10. What is Interrupt ?Explain enabling,disabling and masking of interrupts with examples.How to transfer data using interrupts. 11. Expailn how to use an RST instruction to implement a software breakpoint. 12. Explain an interrupt process and the difference between a maskable and non-maskable interrupt by using examples. 13. Interface a 10 or 12-bit D/A converter with an 8-bit microprocessor. 14. Design a circuit to interface an 8-bit D/A conveter with an 8-bit microprocessor and verify the analog output for a digital signal. 15. . Explain the block diagram of the 8155 I/O section and timer. 16. .Explain the function of Handshake signals.What is the difference between setting the 8155 I/O ports in ALT 1 and ALT 3. 17. Design a five-minute clock(timer using the 8254 and the interrupt technique. Display minutes and seconds. 18. Explain how the 8237 DMA controller transfers 64K bytes of data per channel with eight address lines. 19. Specify handshaking signals and their functions if port A of 8255 is set-up as input port in mode 1. 20. .explain mode 0 and mode 1 of 8253. 21. Explain terms synchronous,baud rate,parity,half and full duplex transmission. 22. Explain how data bits are transmitted in the asynchronous format,and calculate the the delay required between two successive bits for a given baud.

23. Explain the block diagram and the functions of each block of the 8251 USART (Programmable Communication Interface). 24. Write a short note on the following: a) machine cycle b) instruction cycle c) execute cycle d) Vectored interrupt 25. Interface a 8K RAM consecutively with microprocessor 8085, starting with ROM interfacing at address 8000 H. 26. Define Addresing modes,Data formats with examples. 27. . Describe a scheme to demultiplex the multiplexed AD0-AD7 bus of 8085CPU. 28. . Set up the 8255 I/O ports in the simple I/O and Bit Set/Reset(BSR) mode 29. . Explain . the process of the Direct Memory Acess(DMA) and the functions of various elements of the 8237. 30. Expain the procedure of interfacing the temperature monitoring system with 8085.

UNIT 5 MICROCONTROLLERS

PART-A

1. What is mean by microcontroller? 2. Explain DJNZ instructions of intel 8051 microcontroller? 3. State the function of RS1 and RS0 bits in the flag register of intel 8051 microcontroller? 4. Write a program using 8051 assembly language to change the date 55H stored in the lower byte of the data pointer register to AAH using rotate instruction. 5. Give the alternate functions for the port pins of port3?

6. Specify the single instruction, which clears the most significant bit of B 7. Explain the function of the pins PSEN and EA of 8051 8. Explain the 16-bit registers DPTR and SP of 8051 9. Name the special functions registers available in 8051. 10. Explain the register IE format of 8051 11. Compare Microprocessor and Microcontroller 12. Name the five interrupt sources of 8051? 13. List the features of 8051 microcontroller. 14. Name any four additional hardware features available in microcontrollers when compared to microprocessors. 15. List out the Hardware Resources available in 8051. 16. When 8051 is reset, all interrupts are disabled. How to enable these interrupts? 17. What is nested interrupts? 18. How will you double the baud rate in 8051? 19. Explain software and hardware methods to start and stop timers in 8051. 20. Give steps to program 8051 for serial data transfer. 21. Write short notes on interrupt priority. 22. Write the vector address and priority sequence of 8051 interrupts 23. Write a delay routine for 1 millisecond using timer 0 of 8051 for 12 MHz crystal frequency.

PART-B

1. Describe the architecture of 8051 with neat diagram. (16) 2. Discuss the peripheral interface of 8051. (8) 3. Explain the interrupt structure of 8051 microcontroller 4. Explain how interrupts are prioritized. (8)

5.What is the difference between the Microprocessorsand Microcontrollers?(8) 6.Explain the I/O port structure of 8051. (8) 7. Explain the different serial communication modes in 8051. (8) 8. Explain the memory structure of 8051. (8) 9. States various modes available for timer in 8051. (16) 10. Explain the functional pin diagram of 8051 Microcontroller. (16) QUESTION BANK

COA
UNIT 1 Part A( 2Marks)

1. What is meant by the stored program concept? 2. What are the basic functional units of a computer? 3. What is the use of buffer register? 4. Define memory access time. 5. Write the differences between RISC and CISC. 6. What is meant by MAR and MDR? 7. What is an interrupt? 8. Why data bus is bidirectional in most microprocessors? 9. What do you mean by multiprogramming or multitasking? 10. Give the basic performance equation. 11. What are the limitations of assembly language? 12. What are the two techniques used to increase the clock rate R? 13. What are big-endian and little-endian representations?

14. What is the information conveyed by addressing modes? 15. What are the different types of addressing modes available? 16. What is indirect addressing mode? 17. What is indexed addressing mode? 18. Define auto increment mode of addressing? 19. Define auto decrement mode of addressing? 20. What are condition code flags? 21. What is the use of assembler directive? 22. What is meant by straight line sequencing? 23. What is stack? 24. Which data structure is best supported using indirect addressing mode? 25. What are the differences between Stack and Queue? 26. What is byte addressable memory? 27. What is big endian and Little endian format? 28. Define clock rate? 29. What is the function of ALU? 30. Draw the full adder circuit using two half adders and give the truth table. 31. Why floating point number is more difficult to represent and process than integer? 32. What are the two approaches used to reduce delay in adders? 33. What is a carry look-ahead adder? 34. Discuss the principle behind the Booths algorithm? 35. How can we speed up the multiplication process? 36. What is bit pair recoding? Give an example. 37. What are the two methods of achieving the 2s complement? 38. What is the advantage of using Booth algorithm?

39. Write the algorithm for restoring division. 40. Write the algorithm for non restoring division. 41. Define IEEE floating point single and double precision standard. 42. When can you say that a number is normalized? 43. Explain about the special values in floating point numbers. 44. Write the Add/subtract rule for floating point numbers. 45. Write the multiply rule for floating point numbers. 46. What is the purpose of guard bits? 47. What are the ways to truncate the guard bits? 48. Define carry save addition (CSA) process. 49. What are generated and propagate function? 50. What is excess-127 format? 51. What is a ripple carry adder? 52. Draw the structure of 4-bit MSI ALU circuit block. 53. What are the various ways of representing signed integers in the system? 54. Give the booths recoding and bit pair recoding of the number 1000011100100101. 55. When performing signed division, the sign of the remainder should be the same as the sign of the dividend. Why?

PART B

Part B 1. Explain the basic functional units of a simple computer. (8) 2. Explain the basic I/O operations of modern processors. (8)

3. Explain various addressing modes found in modern processors (16) 4. Explain various assembler directives used in assembly language program (8) 5. What are stack and queues? Explain its use and give its differences (10) 6. What are the various types of ISAs possible? Discuss. (8) 7. Discuss the various issues to be considered while designing the ISA of a processor.(8) 8. Write the difference between CISC and RISC. 9. Discuss the principle of operation of carry-look ahead adders. (8) 10. Discuss the non-restoring division algorithm. Simulate the same for 23/5. (8) 11. Multiply the following pair of signed 2s complements numbers using bit pair recoded multiplier: Multiplicand = 110011 Multiplier = 101100. (8) 12. With a neat sketch, Explain in detail about logic design for fast adders. (16) 13. Describe how the floating-point numbers are represented and used in digital arithmetic operations. Give an example. (16) 14. Explain the representations of floating point numbers in detail. (6) 15. Design a multiplier that multiplies two 4-bit numbers. (6) 16. Give the block diagram of the hardware implementation of addition and subtraction of signed number and explain its operations. (10) 17. Explain the working of floating point adder and subtractor. (10)

UNIT II BASIC PROCESSING UNIT

Part A( 2Marks)

1. What are the limitations of super scalar device? 2. Define pipeline speedup. 3. What is a processor clock?

4. Write down the control sequence for Move (R1), R2. 5. What is the function of a TLB (translation look-aside buffer)? 6. What is the WMFC step needed when reading from or writing to the main memory? 7. Define register file. 8. Name the methods for generating the control signals. 9. Define hardwired control. 10. Discuss the principle of operation of a micro programmed control. 11. Differentiate micro programmed control from hardwired control. 12. Define parallelism in microinstruction. 13. What are the types of microinstructions available? 14. Differentiate horizontal microinstruction from vertical microinstruction. 15. What is MFC? 16. What is the principle of Nanoprogramming? 17. Write the various actions required to fetch a word from memory. 18. Write the control sequence for execution of the instruction Add(R3), R1. 19. Write the control sequence for an unconditional branch instruction.

Part B 1. Give the organization of typical hardwired control unit and explain the functions performed by the various blocks. (16) 2. With a neat block diagram, explain in detail about micro programmed control unit and explain its operations. (16) 3. Explain the execution of an instruction with diagram. (8) 4. Explain the multiple bus organization in detail. (8) 5. Explain the instruction cycle highlighting the sub-cycles and sequence of steps to be followed. (8)

6. Consider a processor is having single bus organization of the datapath inside a processor. Write the sequence of control steps required for each of the following instructions: a) Add the (immediate) number NUM to register R1 b) Add the contents of memory location NUM to register R1. c) Add the contents of the memory location whose address is at memory location NUM to register R1.

UNIT 3

PIPELINING

PART A

1. What is pipelining? 2. What are the major characteristics of a pipeline? 3. What is a pipeline hazard? 4. What is data hazard? 5. What is instruction or control hazard? 6. Define structural hazards. 7. What is side effect? 8. What do you mean by branch penalty? 9. What is branch folding? 10. What do you mean by delayed branching? 11. What are the two types of branch prediction techniques available? 12. What is the ideal speedup expected in a pipelined architecture with n stages. Justify your answer. 13. Draw the structure of two stage instruction pipeline.

14. What is RAW hazard? 15. What is WAW hazard? 16. What is the use of branch prediction technique? 17. What is the use of pipelining? 18. What are the characteristics of the MIPS Instruction Set Architecture (ISA) that facilitate pipelined execution?

PART B

1. Discuss the various hazards that might arise in a pipeline. What are the remedies commonly adopted to overcome/minimize these hazards. (16) 2. Explain in detail about instruction execution characteristics. (16) 3. Explain the function of a six segment pipeline showing the time it takes to process eight tasks. (10) 4. Highlight the solutions of instruction hazards. (6) 5. Define the terms "structural hazard", "control hazard", and "data hazard" in the context of pipelines. Which of these hazards is addressed by a hardware branch predictor (which guesses whether a branch will be taken or not)? For one of the other hazards, suggest a way, either in software or hardware, the effect of that hazard could be reduced. 6. The five stages of the simple MIPS pipeline we covered in class are: instruction fetch, instruction decode and register read, execute or calculate address, memory access, and register write. Describe the purpose of each of these stages.

7. Define the terms "structural hazard", "control hazard", and "data hazard" in the context of pipelines. Which of these hazards is addressed by a hardware branch predictor (which guesses whether a branch

will be taken or not)? For one of the other hazards, suggest a way, either in software or hardware, the effect of that hazard could be reduced.

8. Define the terms "spatial locality" and "temporal locality", and explain how caches are used to exploit them for a performance benefit. Be specific in the different ways that caches exploit these two phenomena.

UNIT IV MEMORY SYSTEM

Part A (2Marks)

1. Define Memory Access time for a computer system with two levels of caches. 2. How to construct an 8M * 32 memory using 512 K * 8 memory chips. 3. Write two advantages of MOS device. 4. List the factors that determine the storage device performance. 5. What will be the width of address and data buses for a 512K * 8 memory chip? 6. Define memory cycle time. 7. What is RAM? 8. What is cache memory? 9. Explain virtual memory. 10. List the various semiconductors RAMs? 11. What do you mean by static memories? 12. Define DRAMs. 13. Define DDR SDRAM. 14. What is ROM? 15. What is the mapping procedures adopted in the organizatio n of a cache Memory?

16. Give the format for main memory address using direct mapping function for 4096 blocks in main memory and 128 blocks in cache with 16 blocks per cache. 17. Give the format for main memory address using associative mapping function for 4096 blocks in main memory and 128 blocks in cache with 16 blocks per cache. 18. Give the format for main memory address using set associative mapping function for 4096 blocks in main memory and 128 blocks in cache with 16 blocks per cache. 19. Define Hit and Miss rate? 20. What are the enhancements used in the memory management? 21. What is meant by memory management unit? 22. What is meant by memory interleaving? 23. What do you mean by seek time? 24. What is disk controller? 25. What is RAID? 26. Define data stripping? 27. How the data is organized in the disk? 28. Define latency time. 29. What is the significance of TLB?

Part B

1. Discuss the various mapping techniques used in cache memories. (8) 2. A computer system has a main memory consisting of 16 M words. It also has a 32Kword cache organized in the block-set-associative manner, with 4 blocks per set and 128 words per block. a) format. b) 3. Explain the concept of virtual memory with any one virtual memory management technique. (8) 4. Give the basic cell of an associative memory and explain its operation. Show how associative memories can be constructed using this basic cell. (8) 5. Give the structure of semiconductor RAM memories. Explain the read and write operations in detail. (16) 6. Explain the organization of magnetic disks in detail. (8) 7. A digital computer has a memory unit of 64K*16 and a cache memory of 1K words. The cache uses direct mapping with a block size of four words. How many bits are there in the tag, index, block and word fields of the address format? How many blocks can the caches accommodate? (10) 8. Explain the concept of memory hierarchy. (6) 9. Define the terms "spatial locality" and "temporal locality", and explain how caches are used to exploit them for a performance benefit. Be specific in the different ways that caches exploit these two phenomena. 10. Suppose physical addresses are 32 bits wide. Suppose there is a cache containing 256K words of data (not including tag bits), and each cache block contains 4 words. For each of the following cache configurations, a. direct mapped b. 2-way set associative c. 4-way set associative d. fully associative ds of the main memory address

specify how the 32-bit address would be partitioned. For example, for a direct mapped cache, you would need to specify which bits are used to select the cache entry and which bits are used to compare against the tag stored in the cache entry. 11. Draw the implementation of the 2-way set associative version of the above cache, at the level of detail shown in figure 7.19 on page 574 of the text. Be sure to include the logic for selecting the desired word of the cache block. 12. Cache misses can be characterized as one of the following: compulsory misses, capacity misses, and conflict misses. Describe how each of these kinds of misses can be addressed in the hardware. 13. Suppose you own a computer that exhibits the following properties on the programs that you run: a) b) c) d) e) f) instructions

Suppose, also, that you have decided to purchase a new computer. For the budget allocated, you can either

(memory speed is the same as the old machine, though), or

machine but in which the cache is twice as large.

Assume, for the purposes of this problem, that the cache miss rate for the programs you run will drop by 40% with this larger cache (although this is generally not true in the real world). Which computer are you best off purchasing? Explain in detail, showing the relative performance of each choice.

14. Describe the number of bits required in each entry of a TLB that has the following characteristics: a) b) c) d) e) s direct-mapped

UNIT V I/O ORGANIZATION

Part A (2Marks)

1. What are the functions of I/O interface? 2. How does the processor handle an interrupt request? 3. What are the necessary operations needed to start an I/O operation using DMA? 4. What are the three types of channel usually found in large computers? 5. Why does a DMA have priority over the CPU when both request a memory transfer? 6. What is the advantage of using interrupt initiated data transfer? 7. Why do you need DMA? 8. What is the difference between subroutine and interrupt service routine? 9. What is the need for interrupt masks? 10. How does bus arbitration typically works? 11. How does a processor handle an interrupt?

12. Distinguish synchronous bus and asynchronous bus. 13. Why I/O devices cannot be directly be connected to the system bus? 14. What are the major functions of I/O system? 15. What is an I/O interface? 16. Write the factors considered in designing an I/O subsystem? 17. Explain Direct Memory Access. 18. Define DMA controller. 19. What is polling? 20. What is the need of Interrupt controller? 21. What is a priority interrupt? 22. Define bus. 23. Define synchronous bus. 24. Define asynchronous bus. 25. State the differences between memory mapped I/O and I/O mapped I/O. 26. Define interrupt. 27. Define exception. 28. What are the different methods used for handling the situation when multiple interrupts occurs? 29. What is a privileged instruction? 30. What is bus arbitration? 31. What is port? What are the types of port available? 32. What is a parallel port? 33. What is a serial port? 34. What is PCI bus? 35. What is SCSI?

36. Define USB.

Part B

1. Explain the functions to be performed by a typical I/O interface with a typical input output interface. (16) 2. Discuss the DMA driven data transfer technique. (8) 3. Discuss the operation of any two input devices (8) 4. Explain in detail about interrupt handling. (16) 5. Explain in detail about standard I/O interface. (16) 6. Describe the functions of SCSI with a neat diagram. (16) 7. What is the importance of I/O interface? Compare the features of SCSI and PCI interfaces. (8) 8. Write note on the following.

9. Explain the use of vectored interrupts in processes. Why is priority handling desired in interrupt controllers? How does the different priority scheme work? (8) QUESTION BANK

OS
UNIT I

PART A (2 MARKS)

What is meant by operating systems? Why is the Operating System viewed as a resource allocator & control program? What is the kernel? What are the three main purposes of an operating system? What are batch systems? What is the advantage of Multiprogramming? What are multiprocessor systems & give their advantages? What are the different types of multiprocessing? 9. What do you mean by system calls?

10. What is process control block? 11. What are schedulers? 12. What is co-operative process? 13. What are the use of job queues, ready queues and device queues? 14. State the advantage of multiprocessor system. 15. What is the main advantage of multiprogramming? 16. What is the use of inter process communication. 17. What is meant by context switch? 18. What is independent process? 19. What are the benefits OS co-operating processes? 20. What is meant by abstract view of system. 21. What is a process? 22. What is independent process?

23. What are the benefits OS co-operating processes? 24. How can a user program disturb the normal operation of the system? 25. What is a thread? 26. What are the benefits of multithreaded programming? 27. Compare user threads and kernel threads. 28. What is the use of fork and exec system calls? 29. Define thread cancellation & target thread. 30. What are the different ways in which a thread can be cancelled? 31. What are the various OS components? 32. How is the protection for memory provided? 33. What is a process state and mention the various states of a process?

PART B

Explain the various types of computer systems. Explain how protection is provided for the hardware resources by the operating system. What are the system components of an operating system and explain them? What are the various process scheduling concepts? Explain about inter process communication. List five services provided by an operating system. Explain how each provides convenience to the users. Explain also in which cases it would be impossible for user level programs to provide these services. Explain the types of system structure in detail. Explain in detail about virtual machines. 9. Difference between Hard Real time systems and Soft-RTS.

10. Describe the functions of OS and its services. 11. Explain in detail about Operating System Structures. 12. Explain the Types of System Calls in detail. 13. Explain System Programs in detail. 14. Give an overview about threads. 15. Explain in detail about the threading issues.

UNIT II PART A (2 MARKS)

Define CPU scheduling. What is preemptive and non preemptive scheduling? What is a Dispatcher? What is dispatch latency? What are the various scheduling criteria for CPU scheduling? Define throughput. What is turnaround time? Define race condition. What is critical section problem? 10. What are the requirements that a solution to the critical section problem must satisfy?

11. Define entry section and exit section. 12. Give two hardware instructions and their definitions which can be used for implementing mutual exclusion. 13. What is a semaphore? 14. Define Critical section. 15. What are the requirement that must required for Critical section algorithms. 16. What are the constraints in Dinning philosophers algorithm. 17. What is meant by mutual exclusion. 18. Declare the structure for monitors. 19. Declare the structure for Critical section. 20. List out two methods for synchronous and Asynchronous tasks. 21. Mention the classical problems to synchronization. 22. Define deadlock. 23. What is the sequence in which resources may be utilized? 24. What are conditions under which a deadlock situation may arise? 25. What is a resource-allocation graph? 26. Define request edge and assignment edge. 27. What are the methods for handling deadlocks? 28. Define deadlock prevention. 29. Define deadlock avoidance. 30. What are a safe state and an unsafe state? 31. What is bankers algorithm? 32. What are the conditions necessary to hold for deadlock occur? 33. Difference between Preemptive and Non-Premptive.

34. Define Turnaround time, waiting time, response time and throughput. 35. Queuing diagram for process scheduling.

PART B

1. 2.

Write about the various CPU scheduling algorithms. What is critical section problem and explain two process solutions and multiple process solutions?

3. Explain what semaphores are, their usage, implementation given to avoid busy waiting and binary semaphores. 4. Explain about critical regions and monitors

5. Consider the following set of processes, with the length of the CPU-burst time given in milliseconds: Process P1 P2 P3 P4 P5 Burst Time 10 1 2 1 5 Priority 3 1 3 4 2

The processes are assumed to have arrived in the order P1, P2, P3, P4, P5, all at time 0. a. Draw four Gantt charts illustrating the execution of these processes using FCFS, SJF, A non preemptive priority (a smaller priority number implies a higher priority), and RR (quantum = 1) scheduling. b. c. d. What is the turnaround time of each process for each of the scheduling algorithms in part a? What is the waiting time of each process for each of the scheduling algorithms in Part a? Which of the schedules in part a results in the minimal average waiting time (over all processes)?

6. Explain briefly about Readers/Writers problem in classical synchronization implement using critical section. 7. What is the use of monitors for resource allocation?

8. What is the advantage of having different time-quantum sizes at different levels in MFQ-Multilevel Feedback Queue based scheduling. 9. Consider the following snapshot of a system: Allocation ABCD 0012 1000 1354 0632 0014 Max AB C D 15 2 0 Available

Process AB C D P0 P1 P2 P3 P4

0012 1750 2356 0652 0656

Answer the following questions using the bankers algorithm: a. b. What is the content of the matrix Need? Is the system in a safe state? If a request from process P1 arrives for (0, 4, 2, 0), can the request be granted immediately?

10. Write detailed explanation about Multiprocessor scheduling and Real time scheduling. 11. Give a detailed description about deadlocks and its characterization. 12. Explain about the methods used to prevent deadlocks. 13. Discuss the methods of Deadlock detection and Recovery.

UNIT III

PART A (2 MARKS)

Define logical address and physical address. What is logical address space and physical address space? What is the main function of the memory-management unit? Define dynamic loading. Define dynamic linking. What are overlays? Define swapping. What are the common strategies to select a free hole from a set of available holes? What do you mean by best fit and worst fit? 10. What do you mean by first fit? 11. What is virtual memory? 12. What is Demand paging? 13. Define lazy swapper. 14. What is a pure demand paging? 15. Define effective access time. 16. Define secondary memory. 17. What is the basic approach of page replacement? 18. What are the various page replacement algorithms used for page replacement? 19. What are the major problems to implement demand paging? 20. What is a reference string? 21. What is a Page fault ?

22. Write about Thrashing. Exactly when it occurs with diagram. 23. Define TLB? With diagram. 24. What is meant by External and Internal Fragmentation? 25. Which algorithm is most effective for Page replacement Policy. 26. What are the concepts behind in Swapping and Paging.

PART B

1. 2. 3. 4.

Explain about contiguous memory allocation. Give the basic concepts about paging. Explain about the techniques for structuring the page table. Explain the basic concepts of segmentation

5. Given memory partitions of 100KB, 500KB, 200KB, 300KB, and 600KB (in order),how would each of the first-fit, best fit, worst fit algorithms place processes of 212KB,417KB,112KB, and 426KB(in order). Which algorithm makes the most efficient use of memory? 6. 7. Explain the various page replacement strategies. Consider the following page reference string:

1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6. How many page faults would occur for the following replacement algorithms, assuming one, two, three, four, five, six, or seven frames? Remember all frames are initially empty, so your first unique pages will all cost one fault each. LRU replacement FIFO replacement Optimal replacement

8. How many page faults occur for your algorithm for the following reference string, for four page frames? 1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2. a. What is the minimum number of page faults for an optimal page-replacement strategy for the reference string with four page frames? 9. What is meant by Virtual memory. Give some major benefits which are make applicable.

10. Discuss briefly about Paging with Segmentation in 32-bit architecture Intel80x86 Structure analysis. 11. Discuss about a) Swapping b) Paging c) Segmentation d) TLB hit/miss UNIT- IV

PART A (2 MARKS)

1. 2. 3. 4. 5. 6. 7. 8. 9.

List the various file attributes. What are the various file operations? What are the various file attributes? What is the information associated with an open file? What are the different accessing methods of a file? What is Directory? What are the operations that can be performed on a directory? What are the most common schemes for defining the logical structure of a directory? Define UFD and MFD.

10. What is a path name? 11. What are the various layers of a file system? 12. What are the structures used in file-system implementation? 13. What are the functions of virtual file system (VFS)?

14. What are the advantages of Contiguous allocation? 15. What are the drawbacks of contiguous allocation of disk space? 16. What are the advantages of Linked allocation? 17. What are the disadvantages of linked allocation? 18. What are the advantages of Indexed allocation? 19. How can the index blocks be implemented in the indexed allocation scheme? 20. How free-space is managed using bit vector implementation? 21. What is meant by Consistency Semantics? 22. What is DNS?

PART B

1. 2. 3. 4. 5.

What are files and explain the access methods for files? Explain the schemes for defining the logical structure of a directory. Write notes about the protection strategies provided for files Explain in detail about Linked allocation. Explain in detail about Indexed allocation.

6. 7. 8. 9.

Write notes about Log-Structured file system. What are the directory implementation techniques available? Explain in detail. Explain in detail about various ways of free space management. Explain in detail about Continuous allocation.

10. Write notes about file system implementation. 11. Explain in detail about file system mounting.

UNIT V

PART A (2 MARKS)

1. 2. 3. 4. 5. 6.

Define rotational latency and disk bandwidth. What are the various disk-scheduling algorithms? What is low-level formatting? What is the use of boot block? What is sector sparing? Define Seek time and Bandwidth.

7.Explain LDAP. 8.What is polling? 9.What is an interrupt? 10. What is DMA? 11. List the applications of I/O Interface. 12. Distinguish between blocking and non-blocking I/O. 13. What do you meant by double buffering? 14. Define caching. 15. Define spooling. 16. What are streams. 17. Distinguish between a STREAMS driver and a STREAMS module. 18. What is a low level formatting? 19. Define boot block. 20. What is RAID?

21. Distinguish bit-level striping and block-level striping. 22. List the levels of RAID. 23. Distinguish host attached storage and network attached storage.

PART B

1. 2. 3.

Write about the kernel I/O subsystem. Explain the various disk scheduling techniques Write notes about disk management.

4. Suppose that a disk drive has 5000 cylinders, numbered 0 to 4999. The drive is currently serving a request at cylinder 143, and the previous request was at cylinder 125. The queue of pending requests, in FIFO order, is 86, 1470, 913, 1774, 948, 1509, 1022, 1750, 130 Starting from the current head position, what is the total distance ((in cylinders) that the disk arm moves to satisfy all the pending requests, for each of the following disk scheduling a. FCFS b. SSTF c. SCAN d. LOOK e. C-SCAN

5. 6.

What is meant by RAID levels? Which level is used for what purpose? Analyze Disk arm movement reduced when/which one is effective for given

Queue=87, 170, 40, 150, 36, 72, 66, 15 Starting point of current head is 60.

7. 8. 9.

Explain in detail about stable storage and tertiary storage implementation. Write notes on disk attachment. Explain about swap-space management.

10. How does DMA increase system concurrency? How does it complicate the hardware design? 11. Write notes on STREAMS.

SQA
Anna University Examination May/June 2012 Important Questions

Common To IT41:Software Engineering and Quality Assurance IT1251A:Software Engineering and Quality Assurance 080250013:Software Engineering and Quality Assurance 142401:Software Engineering and Quality Assurance 10144IT406:Software Engineering and Quality Assurance

Unit I

1. Explain in detail about the Process Iteration. 2. Explain in detail about the software life cycle model with various phases

3. Explain in Detail About the RAD model and incremental model 4. Explain in detail about the Component based Software Engineering

Unit II

1. Explain in detail about the Software Prototyping? Explain the various techniques used in Software Prototyping 2. What is data modeling? Draw the ER diagram and Identify the data objects with attributes used in Employee Information systems. 3. Describe the structure of software requirements specification documents explaining clearly the standards to be followed 4. Explain Requirement Engineering process in detail

Unit III

1. Explain cohesion and coupling in with necessary diagrams. 2. Explain in detail the design concepts. 3. Explain the design steps of the transform mapping 4. How you do some effective modular design List out the design heuristics

Unit IV

1. Explain in detail about system testing 2. Explain the various types of black-box testing methods. 3. Explain in detail about the different integration testing approaches

4. Write a procedure to find the sum of Fibonacci series up to N. find cyclomatic complexity. Derive all possible test cases.

Unit V 1. What are the tasks in SCM process? Explain each of them in detail 2. Write notes on ISO 9000 quality standards 3. What are direct and indirect measures? Explain size-oriented metrics in detail. 4. Explain in detail about the process improvement