On-Chip integration of dipole antenna and VCO using standard BiCMOS technology for 10 GHz applications

Fayal Touati, Michel Pons

France Telecom R & D 28 Chemin du Vieux Chne - BP98 38243 MEYLAN cedex - FRANCE
faycal.touati@rd.francetelecom.com, micheljean.pons@rd.francetelecom.com

Abstract
The study of on-chip integration of a 10 GHz dipole antenna with a VCO using standard BiCMOS7 (0.25m) STm technology has been carried out. The antenna configuration, which has been chosen, is a folded dipole, which allows reducing the chip dimensions to 2.7 x 4.48 mm2. The first measurement results are in rather good agreement with the simulated results. For a RF power injected from VCO to the antenna of 7dBm (0.2mW), the EIRP of antenna is about 15dBm. Thus the estimated value of antenna isotropic gain is about 8 dBi. This result is consistent with simulation values of radiation efficiency of the order of 10%.

2. Dipole Antenna Design

2.1. Structure Description The antenna has been designed in BiCMOS7 STm technology. A 0.25 m bipolar-CMOS process has been used. The investigated antenna topology is a dipole structure. However, for this structure, the excitation is differential, which allows us to use active devices with differential output, and consequently avoid the common mode that needs a ground contact from the bottom of the chip, which is difficult to realize with a "standard" BiCMOS technology. The dipole is printed over the last aluminum metal layer having thickness of 2.5 m. The dipole configuration is shown in figure 1

1. Introduction
This study falls under the prospect for improvement of future wireless systems. The increase in the bit rate or in the range and the reduction of the power consumption of future multimedia wireless terminals need high performances for RF front-end components including antenna. Thus this element can be considered as an important part of the RF front-end and its characteristics have to be improved in the same way. Moreover a rather recent tendency is for the integration and for the miniaturization of these devices. For example a more and more frequent use of patch antennas or ceramic antennas can be noticed in RF interfaces. The objective of this work was to investigate the capabilities of microelectronic technologies (silicon technologies) to allow on-chip antennas implementation with acceptable performances. Obviously, the important limitations and constraints related to physical limits of silicon technologies should be obtained. However, potential advantages can be pointed out: direct adaptation to LNA/or PA (only if switch and/or duplexer are also integrated), no parasitic effects of chip bonding, less external components. According to the small length of these devices, these structures will be more particularly devoted to systems working at frequencies larger than those of wireless terminals of usual standards (as Bluetooth or Hiperlan).

Dipole Silicon oxide Epitaxial layer Silicon substrate

Figure 1: Dipole antenna configuration The substrate has the following characteristics; silicon substrate resistivity 15 .cm (6.66 S/m conductivity), thickness of 350 m, oxide layer thickness 9.2 m. An Epitaxial layer, which is highly doped silicon, of resistivity 0.6 .cm (167 S/m conductivity) and thickness of 0.9 m between the two previous layers, is used. There is no ground plane in the bottom of the chip. 2.2. Simulation Tools For the simulation, the two EM software tools; Fidelity, a 3D time domain solver and IE3D a 2D spectral domain solver have been used. In addition, the 3D EM simulator HFSS is used for comparison purposes. For substrate with losses, the most relevant parameter is the radiating efficiency defined as:
P = rad Pi

(1)

S11 (dB)

Where Prad is the radiated power, and Pi is the input power to the antenna ports, regardless of the matching level. The radiation efficiency () depends on the conductivity of the substrate material, and hence, the study of the efficiency relative to the conductivity, determines the required available substrate in standard technology. 2.3. Frequency-Dependent Characteristics For a free space half-wavelength dipole, the operating frequency at natural resonance is given by:
fo = c 2d

0 2 4 6 8 10 12 14 16 18 20 0 -5 -10 -15 -20

Freq (GHz)
Linear Folded

Figure 3: Dipole input return loss (2) In the case of silicon substrate (r = 12, h = 350m), the first resonance is about 10 GHz, for a simulated linear dipole of 3.4 mm length of each arm, corresponding to an effective permittivity of 2.25. To obtain the same operating frequency with the folded dipole, the total unfolded length is adjusted to 3.8 mm. It can be observed that folding the dipole structure does not significantly modify the resonance frequency. The folded dipole has an input return loss of 20 dB, which is almost the same as that of the linear dipole. The obtained input return loss allows very good impedance matching. 2.4. Radiation efficiency-Simulation results As in the case of passive components integration, losses in material are expected. They should clearly affect the radiation efficiency. The losses have two different sources; losses due to the metal conductivity (these losses are neglected) and losses in substrate volume due to the bad resistivity of the silicon in use. The simulated radiation efficiency for an integrated dipole operating around 10 GHz, is investigated. If the epitaxial layer is omitted in the simulation, an efficiency of about 53% is obtained. This result agrees well with HFSS simulation, where the obtained efficiency is about 58%. Obviously for better radiation efficiency, the silicon should be highly resistive. In a first approach, the epitaxial layer has not been taken into account in order to separate its effects from those induced by the silicon substrate conductivity. In a second simulation stage, considering now the effect of low resistivity epitaxial layer, the radiation efficiency is then drastically reduced to about 10 %. The dipole radiation pattern is shown in figure 4. The maximum gain is about 7.5 dBi, which is very low. This value is obtained taking into account the epitaxial layer. The antenna has a low directivity, the radiation pattern is quasi isotropic.

Where d is the size of the dipole and c is the light velocity. However, for a printed dipole, the operating , where eff is the frequency is changed by 1 eff effective permittivity of the substrate. Dipoles printed over different substrates have been investigated in order to determine the length of each arm in accordance with a half-wavelength dipole operating at the corresponding frequency. Figure 2 shows the variation of eff in terms of the ratio d , where h is the substrate thickness, for h different substrate material (i.e., different values of permittivity r).
3 2,5 2

r
1,2 2 4 6 8 10 12

eff

1 ,5 1 0,5 0 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1

h/d

Figure 2: Effective permittivity of a dipole In order to reduce the size of the dipole, while maintaining the operating frequency, the substrate thickness has to be increased. For the proposed design, the behaviour of a classical dipole printed on the last layer is firstly investigated. In addition, folding the dipole arms has reduced the size of the chip. In this case, the operating frequency is shifted, which can be adjusted by changing the dipole total length. The dipole input return loss is presented in figure 3, for both the case of a linear dipole and the case of a folded dipole.

0 2 4 6 8 10 12 14 16 18 20 0 Freq (GHz)

-5 dB(S11) -10 -15 -20

Self

Dipole

180 um 80 um 30 um Free

Figure 6: Coupling effects dipole-VCO inductor 3.2. VCO Design and measurements results The VCO-antenna circuit, which operates around 10GHz, uses bipolar SiGe transistors of BiCMOS7 STm technology. The VCO has a differential structure and differential output. For the resonant circuit of this device, two inductors are used to ensure the cancellation of the magnetic field effects caused by the antenna current as shown in figure 7.
I I

Figure 4: Dipole radiation pattern

3.

Dipole and VCO

3.1. Dipole and Resonant Circuit The chip consists of a folded dipole directly coupled to a Voltage Controlled Oscillator VCO. This configuration provides a self-generated signal to the antenna, and hence avoids any signal supply by probes. By this mean, the system is isolated from proximity effects introduced by any RF generator probe feed [2]. Figure 5 shows the schematic circuit diagram of the active and passive elements of the circuit. VCO

Self -Inductor

Figure 7: VCO structure The currents in each inductor are in the opposite directions and hence the antenna-induced current into the resonant circuit is cancelled. The first measurements on the VCO have been performed using a RF test prober and a 40 GHz vector network analyser Wiltron 37369. The results are given below. For a supply voltage of 2.5V the available output power delivered by the VCO to each dipole arm is 0.1 mW (-10 dBm). The frequency can be varied in the range 9.5 - 10 GHz. The factor of merit is evaluated to 184 dBc/Hz.mW.

L/2 Antenna Resonant-circuit L/2 Buffer

VCO Figure 5: schematic circuit diagram Nearby the dipole, the self-inductance of the resonant circuit of the VCO is integrated on the same metal layer [3]. The study takes into account the coupling effects between these two elements. To minimize these effects, a minimal distance between the dipole and the external inductor is set. Figure 6 shows the variation of the return loss as a function of . As can be observed, at a distance of about 200 m the coupling effect between the dipole and the inductor is significantly reduced.

3.3. Integrated dipole measurements results

with

VCO

First

The used chip shown in figure 8, has dimension of 2.7 x 4.48 mm2
Dipole antenna I antenna H ] cancellation I VCO

This study of on-chip antenna integration will continue in particular with an antenna-VCO circuit working at 20 GHz. A potential improvement of on-chip antennas performances is expected from the study of energy losses due to capacitive coupling into high conductive layers (epitaxial layer and silicon substrate) allowing a better understanding of mechanisms and improved design.

5. Acknowledgement
Pin-access

Figure 8: Integrated dipole with VCO The VCO signal is directly applied to the dipole. The total RF power is injected into antenna is 0.2 mW (-7dBm). There are no RF input/output access points on the chip; all pin-access are static: DC power supply and DC bias. This configuration avoids the parasitic effects and measurement problems related to probe-feed and RF connections as mentioned before. The first measurements on the antennas have been performed using a calibrated double ridged broad-band horn antenna (Schwarzbeck BBHA 9120) and a spectrum analyser (R&S FSEK 30). In the frequency band 9.5 9.9 GHz the measured values of E.I.R.P (Equivalent Isotropic Radiated Power) range from 14.5 dBm to 16dBm. Considering the RF power injected into antenna(-7dBm), the estimated antenna isotropic gain, which can be deduced from the measurements, are in the range of values 7.4 dBi, 9dBi. This result is in rather good agreement with the simulated value of gain 7.5 dBi.

The authors would like to thank Frdric Lemaire (ST Microelectronics) for BiCMOS VCO design and for very fruitful discussions, Hani Ghali (Ain Shams Univ.), for his help in HFSS verifications and Philippe Geoffroy (France Telecom R&D) for his efficient technical assistance.

6.

References

[1] Constantine A. Balanis, "Antenna theory analysis and design" (second edition), John Wiley and Sons, Inc.1997. [2] Kihong Kim; Hyun Yoon; O, K.K., "On-chip wireless interconnection with integrated antennas". Electron Devices Meeting, 2000. IEDM Technical Digest. International, 2000. Page(s): 485-488. [3] Behzad Razavi, "RF Microelectronics", Prentice Hall Engineering and Emerging Technologies Series. Theodore S. Rappaport, Series Editor 1998.

4. Conclusions

The on-chip integration of a 10 Ghz dipole antenna with VCO has been performed using BiCMOS7 (0.25m) STm technology. Antenna simulation results allowed to precise several points. The directivity of antenna is very weak, i.e. the radiation pattern is quasi isotropic. The radiation efficiency values of integrated dipole are drastically reduced to about 10% compared to those of a free-space dipole. This effect is probably related to losses due to silicon substrate and to low resistivity epitaxial layer. First measurements results show the correct operation of the VCO coupled with the antenna. The RF power injected from VCO to the antenna is 7dBm (0.2mW). In these conditions the measured value of antenna isotropic gain is about 8 dBi. This result is in rather good agreement with the simulated results.

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