Simatic S7 300 Manual

SIMATIC S7-300 SIMATIC S7-300 CPU 31xC and CPU 31x, Technical Specifications
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Preface

Guide to the S7-300
documentation

1
Operating and display
elements

2
Communication

3
Memory concept

4
Cycle and reaction times

5
General technical data

6
Technical data of CPU 31xC

7
Technical data of CPU 31x

8
Appendix

A
SIMATIC
S7-300
CPU 31xC and CPU 31x,
Technical Specifications
Manual
12/2006
A5E00105475-07
This manual is part of the documentation package
with order number: 6ES7398-8FA10-8BA0

Safety Guidelines
This manual contains notices you have to observe in order to ensure your personal safety, as well as to prevent
damage to property. The notices referring to your personal safety are highlighted in the manual by a safety alert
symbol, notices referring only to property damage have no safety alert symbol. These notices shown below are
graded according to the degree of danger.

Danger
indicates that death or severe personal injury will result if proper precautions are not taken.

Warning
indicates that death or severe personal injury may result if proper precautions are not taken.

Caution
with a safety alert symbol, indicates that minor personal injury can result if proper precautions are not taken.
Caution
without a safety alert symbol, indicates that property damage can result if proper precautions are not taken.
Notice
indicates that an unintended result or situation can occur if the corresponding information is not taken into
account.
If more than one degree of danger is present, the warning notice representing the highest degree of danger will
be used. A notice warning of injury to persons with a safety alert symbol may also include a warning relating to
property damage.
Qualified Personnel
The device/system may only be set up and used in conjunction with this documentation. Commissioning and
operation of a device/system may only be performed by qualified personnel. Within the context of the safety notes
in this documentation qualified persons are defined as persons who are authorized to commission, ground and
label devices, systems and circuits in accordance with established safety practices and standards.
Prescribed Usage
Note the following:

Warning
This device may only be used for the applications described in the catalog or the technical description and only in
connection with devices or components from other manufacturers which have been approved or recommended by
Siemens. Correct, reliable operation of the product requires proper transport, storage, positioning and assembly
as well as careful operation and maintenance.
Trademarks
All names identified by are registered trademarks of the Siemens AG. The remaining trademarks in this
publication may be trademarks whose use by third parties for their own purposes could violate the rights of the
owner.
Disclaimer of Liability
We have reviewed the contents of this publication to ensure consistency with the hardware and software
described. Since variance cannot be precluded entirely, we cannot guarantee full consistency. However, the
information in this publication is reviewed regularly and any necessary corrections are included in subsequent
editions.

Siemens AG
Automation and Drives
Postfach 48 48
90437 NRNBERG
GERMANY
Order No.: A5E00105475-07
01/2007
Copyright Siemens AG 2006.
Technical data subject to change

CPU 31xC and CPU 31x, Technical Specifications
Manual, 12/2006 , A5E00105475-07 iii
Preface
Purpose of the Manual
This manual contains essential information:
about installation
about communication
about the memory concept
about cycle and response times
about CPU technical data.
You will then learn the points to consider when upgrading to one of the CPUs discussed in
this manual.
Required basic knowledge
To understand this manual, you require a general knowledge of automation engineering.
You will also need a knowledge of STEP 7 basic software.
Area of application
Table 1 Scope of this manual
as of version CPU Convention:
CPU designations:
Order number
Firmware
CPU 312C 6ES7312-5BE03-0AB0 V2.6
CPU 313C 6ES7313-5BF03-0AB0 V2.6
CPU 313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
CPU 313C-2 DP 6ES7313-6CF03-0AB0 V2.6
CPU 314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
CPU 314C-2 DP
CPU 31xC
6ES7314-6CG03-0AB0 V2.6
CPU 312 6ES7312-1AE13-0AB0 V2.6
CPU 314 6ES7314-1AG13-0AB0 V2.6
CPU 315-2 DP 6ES7315-2AG10-0AB0 V2.6
CPU 315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
CPU 317-2 DP 6ES7317-2AJ10-0AB0 V2.5
CPU 317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
CPU 319-3 PN/DP
CPU 31x
6ES7318-3EL00-0AB0 V2.5

Preface

iv Manual, 12/2006 , A5E00105475-07
Note
There are a number of features that are specific to the F-CPUs within the S7 range. For
further details, please refer to the product information:
http://support.automation.siemens.com/WW/view/en/11669702/133300

Note
For new modules, or modules of a more recent version, we reserve the right to include a
Product Information containing latest information.

Changes in comparison to the previous version
Compared to the previous version of this manual CPU31xC and CPU31x, Technical Data,
with the footnote number: A5E00105474-06, Release 01/2006, the following changes apply:
Isochronous mode on PROFIBUS DP for CPU 315-2 PN/DP, CPU 317-2 PN/DP and
CPU 319-3 PN/DP.
Configurable process image for CPU 315-2 PN/DP, CPU 317-2 PN/DP and
CPU 319-3 PN/DP.
Expansion of block-related messages for all CPUs (SFC105 to SFC108)
Activating/deactivating PROFINET IO devices on PROFINET CPUs (expansion SFC12)
Extended diagnostics for PROFINET CPUs
Support of maintenance events at the PROFINET CPUs
Minimum update time of 250 s at PROFINET IO devices operating on CPU 319
Web server functionality for PROFINET CPUs
Time synchronization over DP
Time synchronization by way of Ethernet (NTP) at PROFINET CPUs
Increase of the number of entries in the diagnostics buffer to 500 for all PROFINET CPUs
Firmware update on the net
OUC expansion (UDP and ISO-on-TCP) for all PROFINET CPUs
Watchdog interrupt time > 500 s can be configured (for OB35) at CPU 319-3 PN/DP
CPU reset to factor settings
Measuring sensor for diagnostic repeater, for DP CPUs (SFC 103)
I&M data of the CPU (plant and location ID, for example)
Included product information on memory expansion (A5E00830173-01) in the manual
Approvals
See Technical Data > Standards and Certifications.
Preface

Manual, 12/2006 , A5E00105475-07 v
CE Label
Coding for Australia (C-tick)
Standards
Documentation classification
The documentation listed below is part of the S7-300 documentation package.
This is also available on the Internet at:
http://support.automation.siemens.com/WW/view/en/ plus the relevant article ID.

Name of manual Description
YOU ARE READING the Manual
Article ID: 12996906

Operation and display elements,
communication, memory concept, cycle and
response times, technical specifications
Operating Instructions
S7-300, CPU 31xC and CPU 31x: Installation

Configuration, installation, wiring, addressing,
commissioning, maintenance and the test
functions, diagnostics and troubleshooting.
System Manual
PROFINET System Description

Basic information concerning PROFINET:
Network components, data exchange and
communication, PROFINET IO, Component
Based Automation, sample application
PROFINET IO and Component Based
Automation
Programming Manual
From PROFIBUS DP to PROFINET IO

Guideline for the migration from PROFIBUS DP
to PROFINET I/O.
Manual
CPU 31xC: Technological functions
CD with examples

Description of the individual technological
functions Positioning, Counting. PtP
connection, rules
The CD contains examples of the technological
functions
Manual
S7-300 Automation System: Module data
Article ID: 8859629

Descriptions of functions and technical
specifications of signal modules, power supply
modules and interface modules
Instruction List
CPU 31xC and CPU 31x

List of operation repertoire of CPU and its
execution times. List of executable blocks.
Preface

vi Manual, 12/2006 , A5E00105475-07
Name of manual Description
Getting Started
The following Getting Started editions are available
as a collective volume:
S7-300 Getting Started Collection
PROFINET Getting Started Collection

The Getting Started guides use a specific
example to take you through the various
commissioning steps required to obtain a fully
functional application.
In addition to the S7-300 documentation package, you will need to refer to the following
descriptions:

Name of the manual Description
Reference Manual
System software for S7-300/400 system and
standard functions
Article ID: 1214574

This manual, which consists of 2 volumes (1
and 2), provides a comprehensive overview of
the OBs, SFCs, SFBs, IEC functions,
diagnostics data, system status list (SSL), and
events associated with the S7-300 and S7-400
CPU operating systems. This manual is part of
the STEP 7 reference information. A description
is also available in the online help for STEP 7.
Manual
Programming with STEP 7

This manual provides a comprehensive
overview of programming with STEP 7. This
manual is part of the STEP 7 basic information.
A description is also available in the online help
for STEP 7.
Manual
SIMATIC NET: Twisted Pair and Fiber-Optic
Networks
Article ID: 8763736

Description of Industrial Ethernet networks,
network configuration, components, installation
guidelines for networked automation systems in
buildings, etc.
Configuration Manual
Component Based Automation: Configure
SIMATIC iMap plants

Description of the SIMATIC iMap configuration
software
Component Based Automation: SIMATIC iMap
STEP 7 AddOn, create PROFINET components

Descriptions and instructions for creating
PROFINET components with STEP 7 and for
using SIMATIC devices in Component Based
Automation
Manual
Isochronous mode

Description of the system property "Isochronous
mode"
Manual
SIMATIC communication
Article ID: 1254686

Basics, services, networks, communication
functions, connecting PGs/OPs, engineering
and configuring in STEP 7.
Preface

Manual, 12/2006 , A5E00105475-07 vii
Recycling and Disposal
The devices described in this manual can be recycled, due to their ecologically compatible
components. For environment-friendly recycling and disposal of your old equipment, contact
a certified disposal facility for electronic scrap.
Contact
See Product Information Technical Support, Contact and Training.
This product information is also available on the Internet at:
http://www.siemens.com/automation/service
Once there, please search for the article with the number 19293011.
Training
SIMATIC Technical Support
Service & support on the Internet
Preface

viii Manual, 12/2006 , A5E00105475-07

Manual, 12/2006 , A5E00105475-07 ix
Table of contents
Preface...................................................................................................................................................... iii
1 Guide to the S7-300 documentation ....................................................................................................... 1-1
2 Operating and display elements ............................................................................................................. 2-1
2.1 Operating and display elements: CPU 31xC............................................................................. 2-1
2.1.1 Operating and display elements: CPU 31xC............................................................................. 2-1
2.1.2 Status and error indicators: CPU 31xC...................................................................................... 2-4
2.2 Operating and display elements: CPU 31x................................................................................ 2-5
2.2.1 Operating and display elements: CPU 312, 314, 315-2 DP: ..................................................... 2-5
2.2.2 Operating and display elements: CPU 317-2 DP ...................................................................... 2-7
2.2.3 Operating and display elements: CPU 31x-2 PN/DP ................................................................ 2-9
2.2.4 Operating and display elements: CPU 319-3 PN/DP .............................................................. 2-11
2.2.5 Status and error displays of CPU 31x...................................................................................... 2-13
3 Communication....................................................................................................................................... 3-1
3.1 Interfaces ................................................................................................................................... 3-1
3.1.1 Multi-Point Interface (MPI) ......................................................................................................... 3-1
3.1.2 PROFIBUS DP........................................................................................................................... 3-3
3.1.3 PROFINET (PN)......................................................................................................................... 3-5
3.1.4 Point to Point (PtP) .................................................................................................................... 3-8
3.2 Communication services............................................................................................................ 3-9
3.2.1 Overview of communication services ........................................................................................ 3-9
3.2.2 PG communication................................................................................................................... 3-10
3.2.3 OP communication................................................................................................................... 3-11
3.2.4 Data exchanged by means of S7 basic communication.......................................................... 3-11
3.2.5 S7 communication ................................................................................................................... 3-12
3.2.6 Global data communication (MPI only).................................................................................... 3-13
3.2.7 Routing..................................................................................................................................... 3-14
3.2.8 Point-to-point connection ......................................................................................................... 3-18
3.2.9 Data consistency...................................................................................................................... 3-19
3.2.10 Communication by means of PROFINET................................................................................ 3-20
3.2.10.1 PROFINET IO System............................................................................................................. 3-23
3.2.10.2 Blocks for PROFINET IO......................................................................................................... 3-25
3.2.10.3 Open communication via Industrial Ethernet ........................................................................... 3-27
3.2.10.4 SNMP Communication Service................................................................................................ 3-30
3.3 Web Server .............................................................................................................................. 3-30
3.3.1 Language settings.................................................................................................................... 3-32
3.3.2 Web pages............................................................................................................................... 3-35
3.3.2.1 Start page with general CPU information ................................................................................ 3-35
3.3.2.2 Identification............................................................................................................................. 3-37
3.3.2.3 Diagnostics buffer .................................................................................................................... 3-38
3.3.2.4 Alarms...................................................................................................................................... 3-40
3.3.2.5 PROFINET............................................................................................................................... 3-42
3.3.2.6 Variable status ......................................................................................................................... 3-44
3.3.2.7 Variable tables ......................................................................................................................... 3-45
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x Manual, 12/2006 , A5E00105475-07
3.4 S7 connections......................................................................................................................... 3-48
3.4.1 S7 connection as communication path .................................................................................... 3-48
3.4.2 Assignment of S7 connections................................................................................................. 3-49
3.4.3 Distribution and availability of S7 connection resources.......................................................... 3-50
3.4.4 Connection resources for routing............................................................................................. 3-52
3.5 DPV1........................................................................................................................................ 3-53
4 Memory concept ..................................................................................................................................... 4-1
4.1 Memory areas and retentivity..................................................................................................... 4-1
4.1.1 CPU memory areas.................................................................................................................... 4-1
4.1.2 Retentivity of load memory, system memory and RAM............................................................. 4-2
4.1.3 Retentivity of memory objects.................................................................................................... 4-4
4.1.4 Address areas of system memory ............................................................................................. 4-6
4.1.5 Properties of the SIMATIC Micro Memory Card ........................................................................ 4-9
4.2 Memory functions..................................................................................................................... 4-11
4.2.1 General: Memory functions...................................................................................................... 4-11
4.2.2 Load user program from SIMATIC Micro Memory Card to the CPU ....................................... 4-12
4.2.3 Handling with modules............................................................................................................. 4-13
4.2.3.1 Download of new blocks or delta downloads........................................................................... 4-13
4.2.3.2 Uploading blocks...................................................................................................................... 4-13
4.2.3.3 Deleting blocks......................................................................................................................... 4-13
4.2.3.4 Compressing blocks................................................................................................................. 4-14
4.2.3.5 Promming (RAM to ROM) ........................................................................................................ 4-14
4.2.4 CPU memory reset and restart ................................................................................................ 4-14
4.2.5 Recipes .................................................................................................................................... 4-15
4.2.6 Measured value log files .......................................................................................................... 4-16
4.2.7 Backup of project data to SIMATIC Micro Memory Card......................................................... 4-18
5 Cycle and reaction times......................................................................................................................... 5-1
5.1 Overview .................................................................................................................................... 5-1
5.2 Cycle time................................................................................................................................... 5-2
5.2.1 Overview .................................................................................................................................... 5-2
5.2.2 Calculating the cycle time .......................................................................................................... 5-5
5.2.3 Different cycle times................................................................................................................... 5-8
5.2.4 Communication load .................................................................................................................. 5-9
5.2.5 Cycle time extension as a result of testing and commissioning functions............................... 5-11
5.2.6 Cycle extension through Component Based Automation (CBA) ............................................. 5-11
5.3 Response time ......................................................................................................................... 5-14
5.3.1 Overview .................................................................................................................................. 5-14
5.3.2 Shortest response time ............................................................................................................ 5-16
5.3.3 Longest response time............................................................................................................. 5-17
5.3.4 Reducing the response time with direct I/O access................................................................. 5-18
5.4 Calculating method for calculating the cycle/response time.................................................... 5-19
5.5 Interrupt response time ............................................................................................................ 5-21
5.5.1 Overview .................................................................................................................................. 5-21
5.5.2 Reproducibility of Time-Delay and Watchdog Interrupts ......................................................... 5-23
5.6 Sample calculations ................................................................................................................. 5-23
5.6.1 Example of cycle time calculation............................................................................................ 5-23
5.6.2 Sample of response time calculation ....................................................................................... 5-24
5.6.3 Example of interrupt response time calculation....................................................................... 5-26
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Manual, 12/2006 , A5E00105475-07 xi
6 General technical data............................................................................................................................ 6-1
6.1 Standards and approvals........................................................................................................... 6-1
6.2 Electromagnetic compatibility .................................................................................................... 6-5
6.3 Transportation and storage conditions for modules................................................................... 6-7
6.4 Mechanical and climatic environmental conditions for S7-300 operation.................................. 6-7
6.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage
of S7-300.................................................................................................................................... 6-9
6.6 Rated voltages of S7-300 ........................................................................................................ 6-10
7 Technical data of CPU 31xC................................................................................................................... 7-1
7.1 General technical data............................................................................................................... 7-1
7.1.1 Dimensions of CPU 31xC.......................................................................................................... 7-1
7.1.2 Technical data of the Micro Memory Card................................................................................. 7-2
7.2 CPU 312C.................................................................................................................................. 7-3
7.3 CPU 313C.................................................................................................................................. 7-9
7.4 CPU 313C-2 PtP and CPU 313C-2 DP................................................................................... 7-15
7.5 CPU 314C-2 PtP and CPU 314C-2 DP................................................................................... 7-22
7.6 Technical data of the integrated I/O......................................................................................... 7-30
7.6.1 Arrangement and usage of integrated I/Os.............................................................................. 7-30
7.6.2 Analog I/O................................................................................................................................ 7-36
7.6.3 Parameterization...................................................................................................................... 7-42
7.6.4 Interrupts.................................................................................................................................. 7-47
7.6.5 Diagnostics............................................................................................................................... 7-48
7.6.6 Digital inputs............................................................................................................................. 7-49
7.6.7 Digital outputs .......................................................................................................................... 7-51
7.6.8 Analog inputs ........................................................................................................................... 7-53
7.6.9 Analog outputs ......................................................................................................................... 7-55
8 Technical data of CPU 31x ..................................................................................................................... 8-1
8.1 General technical data............................................................................................................... 8-1
8.1.1 Dimensions of CPU 31x............................................................................................................. 8-1
8.1.2 Technical data of the SIMATIC Micro Memory Card................................................................. 8-2
8.2 CPU 312..................................................................................................................................... 8-3
8.3 CPU 314..................................................................................................................................... 8-9
8.4 CPU 315-2 DP ......................................................................................................................... 8-14
8.5 CPU 315-2 PN/DP................................................................................................................... 8-21
8.6 CPU 317-2 DP ......................................................................................................................... 8-30
8.7 CPU 317-2 PN/DP................................................................................................................... 8-38
8.8 CPU 319-3 PN/DP................................................................................................................... 8-47
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xii Manual, 12/2006 , A5E00105475-07
A Appendix.................................................................................................................................................A-1
A.1 Information about upgrading to a CPU 31xC or CPU 31x .........................................................A-1
A.1.1 Scope .........................................................................................................................................A-1
A.1.2 Changed behavior of certain SFCs............................................................................................A-3
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP....................................A-4
A.1.4 Runtimes that change while the program is running..................................................................A-5
A.1.5 Converting the diagnostic addresses of DP slaves ...................................................................A-5
A.1.6 Reusing existing hardware configurations .................................................................................A-6
A.1.7 Replacing a CPU 31xC/31x .......................................................................................................A-6
A.1.8 Using consistent data areas in the process image of a DP slave system.................................A-7
A.1.9 Load memory concept for the CPU 31xC/31x ...........................................................................A-8
A.1.10 PG/OP functions ........................................................................................................................A-8
A.1.11 Routing for the CPU 31xC/31x as an intelligent slave...............................................................A-8
A.1.12 Changed retentive behavior of CPUs with firmware V2.0.12 or higher .....................................A-9
A.1.13 FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP, a CPU
317 or a CPU 319-3 PN/DP.......................................................................................................A-9
A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET interface ...........A-10
Glossary ..................................................................................................................................... Glossary-1
Index................................................................................................................................................ Index-1
Tables
Table 1 Scope of this manual..................................................................................................................... iii
Table 1-1 Ambient influence on the automation system (AS).................................................................... 1-1
Table 1-2 Galvanic isolation....................................................................................................................... 1-1
Table 1-3 Communication between sensors/actuators and the PLC......................................................... 1-2
Table 1-4 The use of local and distributed I/O........................................................................................... 1-2
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs).................... 1-2
Table 1-6 CPU performance ...................................................................................................................... 1-2
Table 1-7 Communication .......................................................................................................................... 1-3
Table 1-8 Software..................................................................................................................................... 1-3
Table 1-9 Supplementary features............................................................................................................. 1-3
Table 2-1 Mode selector switch settings .................................................................................................... 2-3
Table 2-2 Differences of the CPUs 31xC................................................................................................... 2-3
Table 2-5 Mode selector switch settings .................................................................................................. 2-10
Table 2-6 Mode selector switch settings .................................................................................................. 2-12
Table 2-7 General status and error displays of the CPU 31x .................................................................. 2-13
Table 2-8 Bus error displays of CPU 31x................................................................................................. 2-13
Table 3-1 Operating modes for CPUs with two DP interfaces ................................................................... 3-3
Table 3-2 Communication services of the CPUs ....................................................................................... 3-9
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Manual, 12/2006 , A5E00105475-07 xiii
Table 3-3 Client and server in S7 communication, using connections with unilateral / bilateral
configuration............................................................................................................................. 3-12
Table 3-4 GD resources of the CPUs ...................................................................................................... 3-13
Table 3-5 Number of routing connections for DP CPUs .......................................................................... 3-15
Table 3-6 System and standard functions which are new or have to be replaced .................................. 3-25
Table 3-7 System and standard functions in PROFIBUS DP which can be emulated in PROFINET
IO functions.............................................................................................................................. 3-26
Table 3-8 OBs in PROFINET IO and PROFIBUS DP.............................................................................. 3-26
Table 3-9 Distribution of connections....................................................................................................... 3-50
Table 3-10 Availability of connection resources......................................................................................... 3-51
Table 3-11 Number of routing connection resources (for DP/PN CPUs)................................................... 3-52
Table 3-12 Interrupt blocks with DPV1 functionality .................................................................................. 3-54
Table 3-13 System function blocks with DPV1 functionality ...................................................................... 3-55
Table 4-1 Retentivity of the work memory.................................................................................................. 4-3
Table 4-2 Retentivity behavior of memory objects (applies to all CPUs with DP/MPI-SS)........................ 4-4
Table 4-3 Retentive behavior of DBs for CPUs with firmware >= V2.0.12 ................................................ 4-5
Table 4-4 Address areas of system memory ............................................................................................. 4-6
Table 5-1 Cyclic program processing......................................................................................................... 5-3
Table 5-2 Formula for calculating the process image (PI) transfer time.................................................... 5-5
Table 5-3 CPU 31xC: Data for calculating the process image (PI) transfer time....................................... 5-5
Table 5-4 CPU 31x: Data for calculating the process image (PI) transfer time ......................................... 5-6
Table 5-5 Extending the user program processing time ............................................................................ 5-6
Table 5-6 Operating system processing time at the scan cycle check point ............................................. 5-7
Table 5-7 Extended cycle time due to nested interrupts............................................................................ 5-7
Table 5-8 Cycle time extension as a result of errors.................................................................................. 5-8
Table 5-9 Cycle time extension as a result of testing and commissioning functions............................... 5-11
Table 5-10 Formula: Shortest response time............................................................................................. 5-16
Table 5-11 Formula: Longest response time ............................................................................................. 5-18
Table 5-12 Calculating the response time.................................................................................................. 5-20
Table 5-13 Process and diagnostic interrupt response times.................................................................... 5-21
Table 5-14 Process and diagnostic interrupt response times.................................................................... 5-22
Table 6-1 Use in industrial environments................................................................................................... 6-4
Table 7-1 Available SIMATIC Micro Memory Cards .................................................................................. 7-2
Table 7-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card............................. 7-2
Table 7-3 Technical data of CPU 312C ..................................................................................................... 7-3
Table 7-4 Technical data of CPU 313C ..................................................................................................... 7-9
Table 7-5 Technical data for CPU 313C-2 PtP/ CPU 313C-2 DP............................................................ 7-15
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xiv Manual, 12/2006 , A5E00105475-07
Table 7-6 Technical data of CPU 314C-2 PtP and CPU 314C-2 DP....................................................... 7-22
Table 7-7 Parameters of standard DI ....................................................................................................... 7-42
Table 7-8 Parameters of the interrupt inputs............................................................................................ 7-42
Table 7-9 Parameters of standard AI ....................................................................................................... 7-44
Table 7-10 Parameters of standard AO..................................................................................................... 7-45
Table 7-11 Start information for OB40, relating to the interrupt inputs of the integrated I/O..................... 7-48
Table 7-12 Technical data of digital inputs................................................................................................. 7-49
Table 7-13 Technical data of digital outputs .............................................................................................. 7-51
Table 7-14 Technical data of analog inputs ............................................................................................... 7-53
Table 7-15 Technical data of analog outputs............................................................................................. 7-55
Table 8-1 Available SIMATIC Micro Memory Cards .................................................................................. 8-2
Table 8-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card............................. 8-3
Table 8-3 Technical data for the CPU 312................................................................................................. 8-3
Table 8-4 Technical data for the CPU 314................................................................................................. 8-9
Table 8-5 Technical data for the CPU 315-2 DP...................................................................................... 8-14
Table 8-6 Technical data for the CPU 315-2 PN/DP................................................................................ 8-21
Table 8-7 Technical data for the CPU 317-2 DP...................................................................................... 8-30
Table A-1 Consistent data .......................................................................................................................... A-7

Manual, 12/2006 , A5E00105475-07 1-1
Guide to the S7-300 documentation
1
Overview
There you find a guide leading you through the S7-300 documentation.
Selecting and configuring
Table 1-1 Ambient influence on the automation system (AS)
Information on.. is available in ...
What provisions do I have to make for AS installation
space?
S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Configuring - Component dimensions
Installation: Mounting - Installing the mounting rail
How do environmental conditions influence the AS? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Appendix
Table 1-2 Galvanic isolation
Which modules can I use if electrical isolation is required
between sensors/actuators?
Hardware and Installation: Configuring Electrical
assembly, protective measures and grounding
Module Data Manual
Under what conditions do I have to isolate the modules
electrically?
How do I wire that?
CPU 31xC and CPU 31x operating instructions: Installation:
Wiring
Under which conditions do I have to isolate stations
electrically?
How do I wire that?
Installation Configuring Configuring subnets

1-2 Manual, 12/2006 , A5E00105475-07
Table 1-3 Communication between sensors/actuators and the PLC
Which module is suitable for my sensor/actuator? For CPU: CPU 31xC and CPU 31x Manual, Technical Data
For signal modules: Reference manual of your signal
module
How many sensors/actuators can I connect to the module? For CPU: CPU 31xC and CPU 31x Manual, technical data
of signal modules: Reference manual of your signal module
To connect my sensors/actuators to the PLC, how do I wire
the front connector ?
Installation: Wiring Wiring the front connector
When do I need expansion modules (EM) and how do I
connect them?
Hardware and Installation: Configuring Distribution of
modules to several racks
How to mount modules on racks / mounting rails S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Assembly Installing modules on the mounting
rail
Table 1-4 The use of local and distributed I/O
Which range of modules do I want to use? For local I/O and expansion devices: Module Data reference
manual
For distributed I/O and PROFIBUS DP: Manual of the
relevant I/O device
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs)
Which rack / mounting rail is most suitable for my
application?
Hardware and Installation: Configuring
Which interface modules (IM) do I need to connect the EMs
to the CU?
What is the right power supply (PS) for my application? S7-300, CPU 31xC and CPU 31x operating instructions:
Table 1-6 CPU performance
Which memory concept is best suited to my application? CPU 31xC and CPU 31x Manual, Technical Data
How do I insert and remove Micro Memory Cards? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Commissioning Commissioning modules
Removing / inserting a Micro Memory Card (MMC)
Which CPU meets my demands on performance? S7-300 instruction list: CPU 31xC and CPU 31x
Length of the CPU response / execution times CPU 31xC and CPU 31x Manual, Technical Data
Which technological functions are implemented? Technological Functions Manual
How can I use these technological functions? Technological Functions Manual


Manual, 12/2006 , A5E00105475-07 1-3
Table 1-7 Communication
Which principles do I have to take into account? Communication with SIMATIC Manual
PROFINET System Manual, System Description
Options and resources of the CPU CPU 31xC and CPU 31x Manual, Technical Data
How to use communication processors (CPs) to optimize
communication
CP Manual
Which type of communication network is best suited to my
application?
Hardware and Installation: Configuring Configuring
subnets
How to network the various components S7-300, CPU 31xC and CPU 31x Operating Instructions:
subnets
What to take into account when configuring PROFINET
networks
SIMATIC NET Manual, Twisted-Pair and Fiber Optic
Networks (6GK1970-1BA10-0AA0) Network Configuration
Installation and Commissioning
Table 1-8 Software
Software requirements of my S7-300 system CPU 31xC and CPU 31x Manual, Technical Data
Technical Data
Table 1-9 Supplementary features
How to implement monitor and modify functions
(Human Machine Interface)
For text-based displays: The relevant Manual
For Operator Panels: The relevant Manual
For WinCC: The relevant Manual
How to integrate process control modules For PCS7: The relevant Manual
What options are offered by redundant and fail-safe
systems?
S7-400H Manual Redundant Systems
Fail-Safe Systems Manual
Information to be observed when migrating from PROFIBUS
DP to PROFINET IO
Programming Manual: From PROFIBUS DP to PROFINET
IO


1-4 Manual, 12/2006 , A5E00105475-07

Manual, 12/2006 , A5E00105475-07 2-1
Operating and display elements
2
2.1 Operating and display elements: CPU 31xC
2.1.1 Operating and display elements: CPU 31xC
Operating and display elements of CPU 31xC
1 2
3
4
5
6
7
STOP
RUN
FRCE
DC5V
SF
MRES
STOP
RUN
X1
X11 X12
X2
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S

Number Designation
Status and error displays
Slot for the SIMATIC Micro Memory Card incl. the ejector
Connections of the integrated I/O.
Power supply connection
2. Interface X2 (PtP or DP)
1. Interface X1 (MPI)
Mode selector switch
2-2 Manual, 12/2006 , A5E00105475-07
The figure below illustrates the integrated digital and analog I/Os of the CPU with open front
covers.
RUN
STOP
MRES
SF
BF
DC5V
FRCE
RUN
X11 X12
2
2 1 3
1 2 3
STOP

Number Designation
Analog I/Os
each with 8 digital inputs
each with 8 digital outputs
Slot for the SIMATIC Micro Memory Card
Memory module is a SIMATIC Micro Memory Card. You can use an MMC as a load memory
and as a portable data carrier.

Note
These CPUs do not have an integrated load memory and thus require a SIMATIC Micro
Memory Card for operation.

Manual, 12/2006 , A5E00105475-07 2-3
Use the mode selector switch to set the CPU operating mode.
Table 2-1 Mode selector switch settings
Position Meaning Description
RUN RUN mode The CPU executes the user program.
STOP STOP mode The CPU does not execute a user program.
MRES CPU memory
reset
Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode selector
switch requires a specific sequence of operation.
Reference
CPU operating modes: STEP 7 Online Help.
Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x,
Commissioning, Commissioning Modules, CPU Memory Reset by means of Mode
Selector Switch
Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC
and CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the
help of Status and Error LEDs

Each CPU is equipped with a double-pole power supply socket. The connector with screw
terminals is inserted into this socket when the CPU is delivered.
Differences between the CPUs
Table 2-2 Differences of the CPUs 31xC
Element CPU
312C
CPU
313C
CPU
313C-2 DP
CPU
313C-2 PtP
CPU
314C-2 DP
CPU
314C-2 PtP
9-pole DP
interface (X2)
X X
15-pole PtP
interface (X2)
X X
Digital inputs 10 24 16 16 24 24
Digital outputs 6 16 16 16 16 16
Analog inputs 4 + 1 4 + 1 4 + 1
Analog outputs 2 2 2
Technological
functions
2 counte
rs
3 counte
rs
3 counters 3 counters 4 counters
1 channel for
positioning
4 counters
1 channel for
positioning

2-4 Manual, 12/2006 , A5E00105475-07
2.1.2 Status and error indicators: CPU 31xC

LED designation Color Meaning
SF Red Hardware or software error
BF (for CPUs with DP
interface only)
Red Bus error
DC5V Green 5-V power for CPU and S7-300 bus is OK
FRCE Yellow Force job is active
RUN Green CPU in RUN
The LED flashes during STARTUP at a rate of 2 Hz, and in HOLD
state at 0.5 Hz.
STOP Yellow CPU in STOP and HOLD or STARTUP
The LED flashes at 0.5 Hz when the CPU requests a memory reset,
and during the reset at 2 Hz.
Reference
Selector Switch
and CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the
help of Status and Error LEDs
2.2 Operating and display elements: CPU 31x
Manual, 12/2006 , A5E00105475-07 2-5
2.2.1 Operating and display elements: CPU 312, 314, 315-2 DP:
X1 X2
1
2
3
4
5
6
FRCE
MRES
STOP
RUN
STOP
RUN
DC5V
BF
SF
C
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Number Designation
2. Interface X2 (only for CPU 315-2 DP)
1. Interface X1 (MPI)

Note
2-6 Manual, 12/2006 , A5E00105475-07
The mode selector switch is used to set the CPU operating mode.
MRES CPU memory reset Mode selector switch position with pushbutton function for CPU
memory reset. A CPU memory reset by means of mode
selector switch requires a specific sequence of operation.
Reference
Selector Switch
and
CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of
Status and Error LEDs
Each CPU is equipped with a 2-pole power supply socket. The connector with screw
Manual, 12/2006 , A5E00105475-07 2-7
2.2.2 Operating and display elements: CPU 317-2 DP
1 2 3
4
5
6
7
STOP
RUN
FRCE
DC5V
SF
BF2
BF1
MRES
STOP
RUN
X1 X2
C
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Number Description
Bus error indicators
1. Interface X1 (MPI/DP)
2. Interface X2 (DP)

Note
2-8 Manual, 12/2006 , A5E00105475-07
Use the mode selector switch to set the CPU operating mode.
memory reset. A CPU memory reset by means of mode
selector switch requires a specific sequence of operation.
Reference
Selector Switch
and
Manual, 12/2006 , A5E00105475-07 2-9
2.2.3 Operating and display elements: CPU 31x-2 PN/DP
1 2 3
4
5
6
7
8
BF2
X2
MAC-ADD.:
X1-X2-X3
X4-X5-X6
RX /
TX
LlNK
X1
STOP
RUN
FRCE
DC5V
SF BF1
MRES
STOP
RUN
C
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Number Description
Status display of 2nd interface (X2)
2. Interface X2 (PN)
2-10 Manual, 12/2006 , A5E00105475-07

Note

You can use the mode selector switch to set the current operating mode of the CPU.
Reference
Selector Switch
and
Manual, 12/2006 , A5E00105475-07 2-11
2.2.4 Operating and display elements: CPU 319-3 PN/DP
1 2 3
4
8
BF2
X3
MAC-ADD.:
X1-X2-X3
X4-X5-X6
X1
STOP
RUN
FRCE
DC5V
SF BF1
MRES
STOP
RUN
BF3
X2
5
6
9
7
10
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Number Designation
3. Interface X3 (PN)
Green LED (LED designation: LINK)
Yellow LED (LED designation: RX/TX)
2. Interface X2 (DP)
2-12 Manual, 12/2006 , A5E00105475-07

Note

You can use the mode selector switch to set the current operating mode of the CPU.
Reference
Selector Switch
and
Manual, 12/2006 , A5E00105475-07 2-13
2.2.5 Status and error displays of CPU 31x
General status and error displays
Table 2-7 General status and error displays of the CPU 31x
LED designation Color Meaning
SF red Hardware or software error.
DC5V green 5-V power for the CPU and the S7-300 bus
FRCE yellow LED is lit: Active force job
LED flashes at 2 Hz: Node flash test function (only CPUs with
firmware V2.2.0 or higher)
RUN green CPU in RUN
The LED flashes during STARTUP at a rate of 2 Hz, and in HOLD
state at 0.5 Hz.
STOP yellow CPU in STOP, or HOLD, or STARTUP
The LED flashes at 0.5 Hz when the CPU requests a memory reset,
and during the reset at 2 Hz.
Status displays for the interfaces X1, X2 and X3
Table 2-8 Bus error displays of CPU 31x
CPU LED designation Color Meaning
315-2 DP BF red Bus error at DP interface (X2)
BF1: red Bus error at interface 1 (X1) 317-2 DP
BF2: red Bus error at interface 2 (X2)
LINK green Connection at interface 2 (X2) is active
31x-2 PN/DP
RX/TX yellow Receive / Transmit data at interface 2 (X2)
LINK
1
green Connection at interface 3 (X3) is active
319-3 PN/DP
RX/TX
1
yellow Receive / transmit data at interface 3 (X3)
1
In the case of the CPU 319-3 PN/DP are located directly at the RJ45 socket (LEDs are not
labeled!)
2-14 Manual, 12/2006 , A5E00105475-07
Reference
Selector Switch
and

Manual, 12/2006 , A5E00105475-07 3-1
Communication
3
3.1 Interfaces
3.1.1 Multi-Point Interface (MPI)
Availability
All the CPUs described here are equipped with an MPI interface
A CPU equipped with an MPI/DP interface is configured and supplied as
MPI interface.
Properties
The MPI (Multi-Point Interface) represents the CPU interface for PG/OP connections, or for
communication on an MPI subnet.
The default transmission rate of all CPUs is 187.5 kbps. You can also set 19.2 kbps for
communication with an S7-200. The
315-2 PN/DP, 317-2 and 319-3 PN/DP CPUs support transmission rates to 12 Mbps.
The CPU automatically broadcasts its bus configuration via the MPI interface (the
transmission rate, for example). A PG, for example, can thus receive the correct parameters
and automatically connect to a MPI subnet.

Note
You may only connect PGs to an MPI subnet which is in RUN.
Other stations (for example, OP, TP, ...) should not be connected to the MPI subnet while
the system is in RUN. Otherwise, transferred data might be corrupted as a result of
interference, or global data packages may be lost.

Communication
3.1 Interfaces
3-2 Manual, 12/2006 , A5E00105475-07
Time synchronization
The CPU's MPI interface supports time synchronization. The CPU can be programmed for
operation as time master (with default synchronization intervals) or time slave.
Default setting: No time synchronization
The synchronization mode is set in the "Clock" tab of the CPU or interface properties dialog
box in HW Config.
When operated as time slave, the CPU receives a synchronization message frame from one
time master and sets its internal time accordingly.
When operated as time master, the CPU broadcasts time synchronization message frames
at programmed synchronization intervals at the MPI interface to other node stations of the
MPI subnet. Time synchronization is initiated immediately when you set the CPU time by
way of PG or SFC.
Time synchronization at the MPI interface is also available at:
At the DP Interface
At the PROFINET Interface
In the AS of the central configuration

Note
The CPU may only be operated as time slave at one of these interfaces.

Example 1
A CPU operating as time slave on the DP interface can only operate as time master on the
MPI interface and/or within the AS.
Example 2
The CPU time is synchronized by a time server by way of PROFINET interface; this CPU
can only be operated as time master at the DP / MPI
interface or within the AS.
Devices capable of MPI communication
PG/PC
OP/TP
S7-300 / S7-400 with MPI interface
S7-200 (only at 19.2 kbps)
Communication
3.1 Interfaces
Manual, 12/2006 , A5E00105475-07 3-3
3.1.2 PROFIBUS DP
Availability
CPUs with the "DP" have at least one DP interface.
The 315-2 PN/DP and 317-2 PN/DP CPUs feature an integrated MPI/DP interface.
The 317-2 DP and 319-3 PN/DP CPUs feature an MPI/DP interface plus an additional DP
interface. The factory setting of the CPU's MPI/DP interface is MPI mode. You need to set
DP mode in STEP 7 if you want to use the DP interface.
Operating modes for CPUs with two DP interfaces
Table 3-1 Operating modes for CPUs with two DP interfaces
MPI/DP interface PROFIBUS DP interface
MPI
DP master
DP slave
1)

not configured
DP master
DP slave
1)

1)
simultaneous operation of the DP slave on both interfaces is excluded
Properties
The PROFIBUS DP interface is mainly used to connect distributed I/O. PROFIBUS DP
allows you to create large subnets, for example.
The PROFIBUS DP interface can be set for operation in master or slave mode, and supports
transmission rates up to 12 Mbps.
The CPU broadcasts its bus parameters (transmission rate, for example) via the PROFIBUS
DP interface when master mode is set. This functionality automatically provides the correct
parameters for online operation of a programming device, for example. In your configuration
you can specify to disable bus parameter broadcasting.

Note
(for DP interface in slave mode only)
When you disable the "Test, Commissioning, Routing" check box in the DP interface
properties dialog box in STEP 7, the transmission rate settings of the master automatically
override corresponding user-specific settings. This disables the routing function at this
interface.

Communication
3.1 Interfaces
3-4 Manual, 12/2006 , A5E00105475-07
The CPU's DP interface supports time synchronization. The CPU can be programmed for
operation as time master (at corresponding synchronization intervals) or time slave.
The synchronization mode is set in the "Clock" tab of the interface properties dialog box in
HW Config.
When operated as time master on the DP interface, the CPU broadcasts time
synchronization message frames at programmed synchronization intervals to other node
stations of the PROFIBUS DP subnet. Time synchronization is initiated immediately when
you set the CPU time by way of PG or SFC.
Time synchronization at the DP interface is also available at:
At the MPI Interface

Note
Example 1
Example 2
Devices capable of PROFIBUS DP communication
PG/PC
OP/TP
DP slaves
DP master
Actuators/Sensors
S7-300/S7-400 with PROFIBUS DP interface
Reference
Further information on PROFIBUS: http://www.profibus.com
Communication
3.1 Interfaces
Manual, 12/2006 , A5E00105475-07 3-5
3.1.3 PROFINET (PN)
Availability
CPUs with a "PN" name suffix are equipped with a PROFINET interface.
Connecting to Industrial Ethernet
You can use the integrated PROFINET interface of the CPU to establish a connection to
Industrial Ethernet.
The integrated PROFINET interface of the CPU can be configured via MPI or PROFINET
interface.
Time Synchronization using PROFINET
The CPU can be operated on the PROFINET interface as time client based on NTP
(Network Time Protocol).
Default setting: No time synchronization based on NTP
Set the "Time synchronization based on NTP" option to synchronize the CPU on PROFINET.
This option is available in the "Time synchronization" properties of the PROFINET interface.
Also enter the IP addresses of the NTP server and a synchronization interval.
Information on suitable NTP servers and on NTP is available, for example, at contribution ID:
17990844.
In addition to the PROFINET interface, the system also supports time synchronization on the
MPI or DP interface. The CPU clock may only be synchronized by a time master or server.
Example
The time of CPU 319-3 PN/DP is synchronized by a time server on PROFINET over NTP.
This configuration only allows operation of the CPU as time master on the DP and/or MPI
interface within the AS.

Note
The PROFINET interface cannot be operated as time server, that is, the CPU cannot
synchronize any other clocks on PROFINET.

Communication
3.1 Interfaces
3-6 Manual, 12/2006 , A5E00105475-07
Devices capable of PROFINET (PN) communication
PROFINET IO devices (for example, interface module IM 151-3 PN in an ET 200S)
PROFINET CBA components
S7-300 / S7-400 with PROFINET interface (for example, CPU 317-2 PN/DP or CP 343-1)
Active network components (a switch, for example)
PG/PC with Ethernet card
IE/PB Link
Properties of the PROFINET interface

Properties
IEEE standard 802.3
Connector design RJ45
Transmission speed 100 Mbps max.
Media Twisted Pair Cat5 (100BASE-TX)

Note
Networking PROFINET components
The use of switches, rather than hubs, for networking PROFINET components brings about
a substantial improvement in decoupling bus traffic, and improves runtime performance
under higher bus load. PROFINET CBA with cyclic PROFINET interconnections requires the
use of switches in order to maintain compliance with performance specifications. Full duplex
mode at 100 Mbps is mandatory for cyclic PROFINET interconnections.
PROFINET IO also requires the use of switches and 100 Mbps full duplex mode.

Addressing ports
Each port of a PROFINET interface requires a separate diagnostics address. Programming
the addresses in HW Config.
For further information, refer to the PROFINET System Description System Manual.
Diagnostics messages (error and maintenance information) for reporting problems detected
in the user program can be enabled at OB 82 (enable set in HW Config) and evaluated, for
example, by calling SFB 54. The system also supports extended diagnostics by providing
diverse data records read by calling SFB 52 and SSLs (System Status Lists) which you can
read by calling SFC 51.
Diagnostics is also supported in STEP 7 (for example, communications diagnostics, network
connection, Ethernet statistics, IP parameters etc.).
Communication
3.1 Interfaces
Manual, 12/2006 , A5E00105475-07 3-7
Send clock and update time
A 319-3 PN/DP CPU operating as IO controller supports send clocks of 250 s, 500 s or
1 ms.
Controllers and devices can be operated on a PROFINET IO subnet at a synchronized send
clock. A higher send clock of a controller is adapted appropriately for devices which do not
support this rate. That is, you could operate devices both at a send clock of 250 s and 1 ms
on a 319-3 PN/DP CPU (IO controller) which operates at a send clock of 250 s.
You can program the update time of devices within a relatively wide range. This again
depends on the send clock. Update times you can program for a 319-3 PN/DP CPU:

Send
clock
Update time
250 s 250 s to 128 ms
500 s 500 s to 256 ms
1 ms 1 ms to 512 ms
The minimum update time is determined by the number of IO devices used, by the volume of
configured user data, and by the time slice for PROFINET IO communication. STEP 7
automatically makes allowances for these dependencies in your system configuration.
Reference
For instructions on how to configure the integrated PROFINET interface, refer to S7-300,
CPU 31xC and CPU 31x operating instructions (Setup).
For further information on PROFINET, refer to PROFINET System Description System
Manual.
For detailed information on Ethernet networks, network configuration and network
components refer to the SIMATIC NET Manual: Twisted-Pair and Fiber Optic Networks ,
available under article ID 8763736 at http://support.automation.siemens.com.
Component Based Automation, Commissioning Systems - Tutorial,
Further information about PROFINET: http://www.profinet.com
See also
PROFINET IO System (Page 3-23)
Communication
3.1 Interfaces
3-8 Manual, 12/2006 , A5E00105475-07
3.1.4 Point to Point (PtP)
Availability
CPUs with the "PtP" name suffix have at least one PtP interface.
Features
Using the PtP interface of your CPU, you can connect external devices with serial interface.
You can operate such a system at transmission rates up to 19.2 kbps in full duplex mode
(RS 422), and up to 38.4 kbps in half duplex mode (RS 485).
Transmission rate
Half duplex: 38.4 kbps
Full duplex: 19.2 kbps
Drivers
PtP communication drivers installed in those CPUs:
ASCII drivers
3964(R) Protocol
RK 512 (CPU 314C-2 PtP only)
Devices capable of PtP communication
Devices equipped with a serial port, for example, barcode readers, printers, etc.
Reference
CPU 31xC: Technological functions manual
Communication
3.2 Communication services
Manual, 12/2006 , A5E00105475-07 3-9
3.2.1 Overview of communication services
Selecting the communication service

You need to decide on a communication service, based on functionality requirements. Your
choice of communication service will have no effect on:
the functionality available,
whether an S7 connection is required or not, and
the time of connecting.
The user interface can vary considerably (SFC, SFB, ...), and is also determined by the
hardware used (SIMATIC CPU, PC, ...).
Overview of communication services
The table below provides an overview of communication services offered by the CPUs.
Table 3-2 Communication services of the CPUs
Communication service Functionality Time at which the S7
connection is established ...
via MPI via DP via
PtP
via
PN
PG communication Commissioning, test,
diagnostics
From the PG, starting when
the service is being used
X X X
OP communication Monitor and modify Via OP at POWER ON X X X
S7 basic communication Data exchange Is programmed at the blocks
(SFC parameters)
X X
S7 communication Data exchange in server
and client mode:
Configuration of
communication required.
Via active partner at POWER
ON.
Only in
server
mode
Only in
server
mode
X
Global data
communication
Cyclic data exchange (for
example, flag bits)
Does not require an S7
connection
X
Routing PG functions
(only for CPUs with
DP or PROFINET
interface)
For example testing,
diagnostics on other
networks also
From the PG, starting when
the service is being used
X X X
Point-to-point connection Data exchange via serial
interface
connection
X
PROFIBUS DP Data exchange between
master and slave
connection
X
PROFINET CBA Data exchange by means
of component based
communication
connection
X
Communication
3-10 Manual, 12/2006 , A5E00105475-07
Communication service Functionality Time at which the S7
connection is established ...
via MPI via DP via
PtP
via
PN
PROFINET IO Data exchange between IO
controllers and the IO
devices
connection
X
Web Server Diagnostics Does not require an S7
connection
X
SNMP
(Simple Network
Management Protocol)
Standard protocol for
network diagnostics and
configuration
connection
X
Open communication via
TCP/IP
Data exchange via
Industrial Ethernet with
TCP/IP protocol (by means
of loadable FBs)
connection, is handled in the
user program by means of
loadable FBs
X
Open communication by
means of ISO on TCP
Data exchange via
ISO-on-TCP protocol (by
means of loadable FBs)
loadable FBs
X
Open communication by
means of UDP
Data exchange via
UDP protocol (by means of
loadable FBs)
loadable FBs
X
See also
Distribution and availability of S7 connection resources (Page 3-50)
Connection resources for routing (Page 3-52)
3.2.2 PG communication
Features
PG communication is used to exchange data between engineering stations (PG, PC, for
example) and SIMATIC modules which are capable of communication. This service is
available for MPI, PROFIBUS and Industrial Ethernet subnets. Transition between subnets is
also supported.
PG communication provides the functions needed to download / upload programs and
configuration data, to run tests and to evaluate diagnostic information. These functions are
integrated in the operating system of
SIMATIC S7 modules.
A CPU can maintain several simultaneous online connections to one or multiple PGs.
Communication
Manual, 12/2006 , A5E00105475-07 3-11
3.2.3 OP communication
Features
OP communication is used to exchange data between operator stations (OP, TP, for
example) and SIMATIC modules which are capable of communication. This service is
available for MPI, PROFIBUS and Industrial Ethernet subnets.
OP communication provides functions you require for monitoring and modifying. These
functions are integrated in the operating system of SIMATIC S7 modules. A CPU can
maintain several simultaneous connections to one or several OPs.
3.2.4 Data exchanged by means of S7 basic communication
Properties
S7-based communication is used to exchange data between S7 CPUs and the
communication-capable SIMATIC modules within an S7 station (acknowledged data
exchange). Data are exchanged across non-configured S7 connections. The service is
available via MPI subnet, or within the station to function modules (FM).
S7-based communication provides the functions you require for data exchange. These
functions are integrated into the CPU operating system. The user can utilize this service by
means of "System function" (SFC) user interface.
Reference
Further Information
on SFCs, refer to Instruction list.
For further information refer to STEP 7 Online Help or System and Standard Functions
reference manual.
on communication are found in the Communication with SIMATIC Manual.
Communication
3-12 Manual, 12/2006 , A5E00105475-07
3.2.5 S7 communication
Properties
A CPU can always operate in server or client mode in S7 communication: We distinguish
between
communication with unilateral configuration (for PUT/GET only)
communication with bilateral configuration (for USEND, URCV, BSEND, BRCV, PUT,
GET)
However, the functionality depends on the CPU. A CP is therefore required in certain
situations.
Table 3-3 Client and server in S7 communication, using connections with unilateral / bilateral
configuration
CPU Use in server mode for
connections with unilateral
configuration
Use in server mode for
connections with bilateral
configuration
Use as client
31xC >= V1.0.0 Generally possible on
MPI/DP interface without
configuration of user
interface
Only possible with CP
and loadable FBs.
and loadable FBs.
31x >= V2.0.0 Generally possible on
MPI/DP interface without
configuration of user
interface
and loadable FBs.
and loadable FBs.
31x >= V2.2.0 Generally possible on
MPI/DP/PN interface
without configuration of user
interface
Possible on
PROFINET interface
with loadable FBs
or
with CP and loadable
FBs.
Possible on
PROFINET interface
with loadable FBs
or
with CP and loadable
FBs.
The user interface is implemented using standard function modules (FBs) from the standard
library of STEP 7, under communication blocks.
Reference
For further information on communication, refer to the Communication with SIMATIC
manual.
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3.2.6 Global data communication (MPI only)
Properties
Global data communication is used for cyclic exchange of global data via MPI subnets (for
example, I, Q, M) between SIMATIC S7 CPUs (data exchange without acknowledgement).
One CPU broadcasts its data to all other CPUs on the MPI subnet. This function is
integrated in the CPU operating system.
Reduction ratio
The reduction ratio specifies the cyclic intervals for GD communication. You can set the
reduction ratio when you configure global data communication in STEP 7. For example, if
you set a reduction ratio of 7, global data are transferred only with every 7th cycle. This
reduces CPU load.
Send and receive conditions
Conditions which should be satisfied for GD communication:
For the transmitter of a GD packet:
Reduction ratiotransmitter x cycle timetransmitter 60 ms
For the receiver of a GD packet:
Reduction ratioreceiver x cycle timereceiver
< reduction ratiotransmitter x cycle timetransmitter
A GD packet may be lost if you do not adhere to these conditions. The reasons being:
the performance of the "smallest" CPU in the GD circuit
asynchronous transmitting / receiving of global data at the stations
When setting in STEP 7: Transmit after each CPU cycle, and the CPU has a short scan
cycle time (< 60 ms), the operating system might overwrite a GD packet of the CPU before it
is transmitted. The loss of global data is indicated in the status box of a GD circuit, if you set
this function in your STEP 7 configuration.
GD resources of the CPUs
Table 3-4 GD resources of the CPUs
Parameters CPU 31xC, 312, 314 CPU 315-2 DP, 315-2
PN/DP, 317-2 DP, 317-2
PN/DP, 319-3 PN/DP
Number of GD circuits per CPU Max. 4 Max. 8
GD packets transmitted per GD circuit Max. 1 Max. 1
GD packets transmitted by all GD circuits Max. 4 Max. 8
GD packets received per GD circuit Max. 1 Max. 1
GD packets received by all GD circuits Max. 4 Max. 8
Data length per GD packet max. 22 bytes max. 22 bytes
Consistency max. 22 bytes max. 22 bytes
Min. reduction ratio (default) 1 (8) 1 (8)
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3.2.7 Routing
Properties
STEP 7 V5.1 + SP4 or higher allows you to access your S7 stations on all subnets with your
PG/PC, for example, to
download user programs
download a hardware configuration, or
perform debugging and diagnostic functions.

Note
If you use your CPU as I-slave, the routing function is only possible when the
DP interface is switched to active IN STEP 7, set the Test, Commission Routing check
box on the properties dialog of the DP interface. For detailed information, refer to the
Programming with STEP 7 manual, or directly to the STEP 7 Online Help

Routing network nodes: MPI - DP
Gateways between subnets are routed in a SIMATIC station that is equipped with interfaces
to the respective subnets. The figure below shows CPU 1 (DP master) acting as router for
subnets 1 and 2.
PG
S7-300
CPU 1 (DP-Master)
S7-300
CPU 2 (DP-Slave)
Subnet 1 (MPl, for example)
Subnet 2 (PROFlBUS DP, for example)

The figure below shows the MPI access to PROFINET via PROFIBUS CPU 1 (315-2 DP, for
example) is the router for subnet 1 and 2;
CPU 2 is the router for subnet 2 and 3.
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Routing network nodes: MPI - DP - PROFINET
CPU 1
(315-2 DP, for
example)
Subnet 3 (PROFlNET) Subnet 2 (PROFlBUS)
DP
(Master)
Subnet 1 (MPl)
MPl/DP
(slave active)
CPU 2
(317-2 PN/DP)
CPU 3
(317-2 PN/DP)
PN PN
PG
MPl

Number of connections for routing
The CPUs with DP interface provide a different number of connections for the routing
function:
Table 3-5 Number of routing connections for DP CPUs
CPU As of firmware version Number of connections for routing
31xC, CPU 31x 2.0.0 Max. 4
317-2 DP 2.1.0 Max. 8
31x-2 PN/DP 2.2.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24
DP slave (active): Max. 14

Interface X2 configured as:
PROFINET: Max. 24
319-3 PN/DP 2.4.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24

DP master Max. 24

PROFINET: Max. 48
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Requirements
The station modules are "capable of routing" (CPUs or CPs).
The network configuration does not exceed project limits.
The modules have loaded the configuration data containing the latest "knowledge" of the
entire network configuration of the project.
Reason: All modules participating in the network transition must receive the routing
information defining the paths to other subnets.
In your network configuration, the PG/PC you want to use to establish a connection via
network node must be assigned to the network it is physically connected to.
The CPU must set to master mode, or
If the CPU is set to operate in slave mode, the Test, Commissioning, Routing functionality
must be enabled by setting the check box in STEP 7, in the
DP interface for DP slave properties dialog box.
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Routing: Example of a TeleService application
The figure below shows the example of an application for remote maintenance of an S7
station using a PG. The connection to other subnets is here established via modem
connection.
The lower section of the figure shows how to configure this in STEP 7.
PG
PG
DP Master
(31xC-2DP, for example)
DP slave
(31xC-2DP, for
example)
Modem
Subnet 1
(MPl, for example)
Subnet 2
(PROFlBUS DP, for example)
Subnet 1
(MPl, for example)
Subnet 2
(PROFlBUS DP, for example)
TeleService
adapter
DP Master
(CPU 31xC-2DP, for
example)
DP slave
(CPU 31xC-2DP, for
example)
Modem
Configuration in STEP 7
Real structure

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Reference
Further information
on configuring in STEP 7 is found in the Configuring Hardware and Connections in
STEP 7 manual
of a basic nature is contained in the Communication with SIMATIC Manual.
about the TeleService adapter is available under article ID 20983182 on the Internet URL
http://support.automation.siemens.com.
on SFCs, refer to Instruction list.
For further information refer to STEP 7 Online Help or System and Standard Functions
reference manual.
on communication are found in the Communication with SIMATIC Manual.
3.2.8 Point-to-point connection
Properties
PtP communication enables you to exchange data via serial port. PtP communication can be
used to interconnect automation devices, computers or communication-capable systems of
external suppliers. The function also allows adaptation to the protocol of the communication
partner.
Reference
Further Information
on SFCs are found in the Instruction list.
For detailed information, refer to the STEP 7 Online Help , or to the System and Standard
Functions Reference Manual.
on communication is found in the Communication with SIMATIC Manual.
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3.2.9 Data consistency
Features
A data area is consistent if it can be read or written to from the operating system as a
consistent block. Data exchanged collectively between the stations should belong together
and originate from a single processing cycle, that is, be consistent. If the user program
contains a programmed communication function, for example, access to shared data with X-
SEND/ XRCV, access to that data area can be coordinated by means of the "BUSY"
parameter itself.
With PUT/GET functions
For S7 communication functions, such as PUT/GET or write / read via OP communication,
which do not require a block in the user program on the CPU (operating in server mode),
allowances must be made in the program for the extent of the data consistency. The
PUT/GET functions for S7 communication, or for reading/writing variables via OP
communication, are executed at the CPU's scan cycle checkpoint. To save a defined
process alarm response time, the communication variables are copied in blocks of up to 64
bytes (CPU 317, CPU 319: 160 bytes) to / from work memory at the scan cycle checkpoint of
the operating system. Data consistency is not guaranteed for larger data areas.

Note
If a defined data deficiency is required, the defined communication variables in the user
program of the CPU may be no larger than 64 bytes (for CPU 317, CPU 319: 160 bytes.)

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3.2.10 Communication by means of PROFINET
What is PROFINET?
Within the framework of Totally Integrated Automation (TIA), PROFINET represents a
consequent enhancement of:
PROFIBUS DP, the established fieldbus and
Industrial Ethernet, the communication bus for the cell level
Experience gained from both systems was and is being integrated into PROFINET.
PROFINET is an Ethernet-based automation standard of PROFIBUS International
(previously PROFIBUS Users Organization e.V.), and defines a multi-vendor communication,
automation, and engineering model.
Objectives in PROFINET
The objectives in PROFINET are:
Open Ethernet Standard for automation based on Industrial Ethernet.
Although Industrial Ethernet and Standard Ethernet components can be used together,
the Industrial Ethernet devices are more sturdy and therefore better suited for industrial
environments (temperature, immunity to interference, etc.)
Use of TCP/IP and IT standards
Automation with real-time Ethernet
Total integration of field bus systems
Implementing PROFINET in SIMATIC
We have integrated PROFINET as follows:
Communication between field devices is implemented in SIMATIC by way of PROFINET
IO.
Communication between controllers which operate as components in distributed systems
are implemented
in SIMATIC by means of PROFINET CBA (Component Based Automation).
Installation engineering and network components are available in SIMATIC NET.
Established IT standards from the Office environment (e.g., SNMP=Simple Network
Management Protocol for network parameter assignment and diagnosis) are used for
remote maintenance and network diagnostics.
Documentation from PROFIBUS International on the Internet
Numerous texts on the subject of PROFINET are available from the URL
"http://www.profinet.com" from PROFIBUS International (formerly PROFIBUS Nutzer-
Organisation, PNO)
Further information is available on the Internet at: http://www.siemens.com\profinet\
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What is PROFINET IO?
Within the framework of PROFINET, PROFINET IO is a communication concept for the
implementation of modular, distributed applications.
PROFINET IO allows you to create automation solutions, which are familiar to you from
PROFIBUS.
That is, you have the same application view in STEP 7, regardless of whether you configure
PROFINET or PROFIBUS devices.
What is PROFINET CBA (Component Based Automation)?
Within the framework of PROFINET, PROFINET CBA is an automation concept for the
implementation of applications with distributed intelligence.
PROFINET CBA lets you create distributed automation solutions, based on default
components and partial solutions.
Component Based Automation allows you to use complete technological modules as
standardized components in large systems.
The components are also created in an engineering tool which may differ from vendor to
vendor. Components of SIMATIC devices are created, for example, with STEP 7.
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Extent of PROFINET CBA and PROFINET IO
PROFINET IO and CBA represent two different views of automation devices on Industrial
Ethernet.
lO data view Component view
One cable, lT standards, standard applications
protocols, controller, etc.
- Distributed l/Os
- Usual lO view in STEP 7
(PROFlNET Component Description) (Generic Station Description)
- Distributed intelligence
- Plant-wide engineering
GSD PCD
PROFlNET
PROFlNET CBA PROFlNETlO

Figure 3-1 Extent of PROFINET IO and Component Based Automation
Component Based Automation divides the entire system into various functions. These
functions are configured and programmed.
PROFINET IO provides you with a view of the system that is very similar to the view
obtained in PROFIBUS. You continue to configure and program the individual automation
devices.
Reference
Further Information
on PROFINET IO and PROFINET CBA is available in the PROFINET system
specification.
For differences and similarities between PROFIBUS DP and PROFINET IO, refer to the
From PROFIBUS DP to PROFINET IO programming manual.
For further information about PROFINET CBA, refer to the documentation on
SIMATIC iMap and Component Based Automation.
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3.2.10.1 PROFINET IO System
Functions of PROFINET IO
The following graphic shows the new functions in PROFINET IO
PC
PC
PC
PC
PC PG/PC
PC
PC
lE/PB Link
PN lO
P1
P2
P3
P4
P5
P6
P7
CPU 319-3
PN/DP
P1
lM 154-8
CPU
P1
P2
P3
PG
PB
lE
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
2
3
4
5 6
1
7
8
Switch 1 Switch 2
Company network
PROFlBUS
lndustrial Ethernet
lO
Controllers
DP master
lO
Controllers
DP master
PN
PN
ET 200
(DP slave)
ET 200
(DP slave)
lO device lO device
lO device lO device
Router
PN PN
PN PN

The graphic shows Examples of connection paths
The connection of company
network and field level
You can access devices at the field level from PCs in your company network
Example:
PC - Switch 1 - Router - Switch 2 - CPU 319-3 PN/DP .
Connections between the
automation system and field
level
You can, of course, also access other areas on the Industrial Ethernet from a PG at the
field level.
Example:
PG - integrated switch IM 154-8 CPU - Switch 2 - integrated switch IO device ET
200S - on IO device: ET 200S .
The IO controller of the CPU
IM 154-8 CPU directly
controls devices on the
Industrial Ethernet and
PROFIBUS.
At this point, you can see the extended IO feature between the IO controller and IO
device(s) on the Industrial Ethernet:
The IM 154-8 CPU is operated as IO controller for the IO devices ET 200S and
ET 200S
The IM 154-8 CPU is also the IO controller for
ET 200 (DP slave) by way of IE/PB Link.
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The CPU 319-3 PN/DP can
be operated as IO controller or
DP master
Here you can see that a CPU can be both the IO controller for an IO device and the DP
master for a DP slave:
The 319-3 PN/DP CPU is operated as IO controller for the IO devices
ET 200S and ET 200 S
The CPU 319-3 PN/DP is the DP master for a DP slave . The
DP slave is assigned locally to the CPU and is not visible on the Industrial
Ethernet.
Reference
Further Information
about PROFINET can be found in the programming manual From PROFIBUS DP to
PROFINET IO
This manual also provides a clear overview of the new PROFINET blocks and system
status lists.
See also
PROFINET (PN) (Page 3-5)
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3.2.10.2 Blocks for PROFINET IO
Content of this section
This section covers:
Blocks designed for use with PROFINET
Blocks designed for use with PROFIBUS DP
Blocks designed for use with PROFINET IO and PROFIBUS DP
Compatibility of the new blocks
New blocks were implemented for PROFINET IO, as PROFINET is capable of handling
larger quantity frameworks. The new blocks are also used for PROFIBUS.
Comparison of the system and standard functions of PROFINET IO and PROFIBUS DP
For CPUs with integrated PROFINET interface, the table below provides an overview of:
System and standard functions for SIMATIC which you will have to upgrade for migration
from PROFIBUS DP to PROFINET IO.
New system and standard functions
Table 3-6 System and standard functions which are new or have to be replaced
Blocks PROFINET IO PROFIBUS DP
SFC12 (deactivation and
activation of DP slaves/IO
devices)
Yes
CPU S7-300: FW V2.4 or
higher:
Yes
SFC13 (reading diagnostics
data from a DP slave)
No
Replaced by:
Event-driven: SFB 54
Status-driven: SFB 52
Yes
SFC58/59 (write/read record in
I/O)
No
Replaced by: SFB 53/SFB 52
Yes
already replaced by SFB53/52
in DPV1
SFB 52/53 (read/write record) Yes Yes
SFB 54 (evaluate interrupt) Yes Yes
SFC102 (read predefined
parameters - S7-300 CPU only)
No
Replaced by: SFB81
Yes for S7-300
SFB81 (read predefined
parameters)
Yes Yes
SFC5 (query start address of a
module)
No (replaced with: SFC70) Yes
SFC70 (query start address of a
module)
Yes Yes
SFC49 (query the slot at a
logical address)
No
Replaced by: SFC71
Yes
SFC71 (query the slot at a
logical address)
Yes Yes
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The table below provides an overview of SIMATIC system and standard functions which
must be emulated by other functions when migrating from PROFIBUS DP to PROFINET IO.
Table 3-7 System and standard functions in PROFIBUS DP which can be emulated in PROFINET
IO functions
SFC55 (write dynamic
parameters)
No
Emulate using SFB53
Yes
SFC56 (write predefined
parameters)
No
Emulate using SFB81 and
SFB53
Yes
SFC57 (assign module
parameters)
No
Emulate using SFB81 and
SFB53
Yes
SIMATIC system and standard functions not supported in PROFINET IO:
SFC7 (trigger hardware interrupt on DP master)
SFC11 (synchronize groups of DP slaves)
SFC72 (read data from communication partner within local S7 station)
SFC73 (write data to communication partner within local S7 station)
SFC74 (cancel communication with partner within local S7 station)
SFC103 (determine the bus topology in a DP master system)
Comparison of the organization blocks of PROFINET IO and PROFIBUS DP
The table below shows the changes to OB83 and OB86 in PROFINET IO compared to
PROFIBUS DP.
Table 3-8 OBs in PROFINET IO and PROFIBUS DP
OB83 (hot swapping of
modules/submodules)
Also supported on S7-300, new
error information
S7-300 does not support this
function
Slaves integrated via the GSD
file report the removal/insertion
of modules/submodules during
operation in the form of a
diagnostics interrupt and thus
via OB82.
S7 slaves report a station failure
and call OB86 when an
insertion/removal interrupt is
generated.
OB86 (rack failure) New error information Unchanged
Detailed information
For detailed information about the blocks, refer to the System Software for S7-300/400
System and Standard Functions Reference Manual.
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3.2.10.3 Open communication via Industrial Ethernet
Requirements
STEP 7 V5.3 + Servicepack 1 or higher
Functionality
The CPUs with integrated PROFINET interface as of firmware V2.3.0 or V2.4.0 support the
functionality of open communication by means of Industrial Ethernet (abbreviated: open IE
communication)
Following services are available for open IE communication:
Connection oriented protocols
TCP according to RFC 793, connection type B#16#01, firmware V2.3.0 and higher
TCP according to RFC 793, connection type B#16#11, firmware V2.4.0 and higher
ISO on TCP according to RFC 1006, as of firmware V2.4.0
Connectionless protocols
UDP according to RFC 768, as of firmware V2.4.0
Features of the communication protocols
The following distinctions are made between protocol types in data communication:
Connection oriented protocols:
Prior to data transmission these establish a (logical) connection to the communication
partner and close this again, if necessary, after transmission is completed. Connection
oriented protocols are used when security in especially important in data transmission. A
physical cable can generally accommodate several logical connections.
For the FBs to open communication by means of Industrial Ethernet, the following
connection oriented protocols are supported:
TCP according to RFC 793 (connection types B#16#01 and B#16#11)
ISO on TCP according to RFC 1006 (connection type B#16#12)
Connectionless protocols:
These operate without a connection. There is also no establishing or terminating a
connection to remote partner. Wireless protocols transmit data to the remote partner
without any acknowledgement; data transfer is, therefore, not secure.
The FBs for open communication over Industrial Ethernet support the following wireless
protocol:
UDP according to RFC 768 (connection type B#16#13)
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How to use open IE communication
To allow data to be exchanged with other communication partners, STEP 7 provides the
following FBs and UDTs under "Communication Blocks" in the "Standard Library":
Connection oriented protocols: TCP, ISO-on-TCP
FB 63 "TSEND" for sending data
FB 64 "TRCV" for receiving data
FB 65 "TCON", for connecting
FB 66 "TDISCON", for disconnecting
UDT 65 "TCON_PAR" with the data structure for the configuration of the connection
Connectionless protocol: UDP
FB 67 "TUSEND" for sending data
FB 68 "TURCV" for receiving data
FB 65 "TCON" for establishing the local communication access point
FB 66 "TDISCON" for resolving the local communication access point
UDT 65 "TCON_PAR" with the data structure for configuring the local communication
access point
UDT 66 "TCON_ADR" with the data structure of the address parameters of the remote
partner
Data blocks for the configuration of the connection
Data blocks for configuring TCP and ISO-on-TCP connections.
To configure your connection, you need to create a DB that contains the data structure of
UDT 65 "TCON_PAR." This data structure contains all parameters you need to establish
the connection. You need to create such a data structure for each connection, and you
can also organize it in a global DB.
The CONNECT parameter of the FB65 "TCON" contains a reference to the address of
the corresponding connection description (for example, P#DB100.DBX0.0, byte 64).
Data blocks for the configuration the local UDP communication access point
To assign parameters for the local communication access point, create a DB containing
the data structure from the UDT 65 "TCON_PAR" This data structure contains the
required parameters you need to establish the connection between the user program and
the communication level of the operating system
The CONNECT parameter of the FB 65 "TCON" contains a reference to the address of
the corresponding connection description (e.g., P#DB100.DBX0.0 Byte 64).

Note
Setting up the connection description (UDT 65)
Declare the communication interface at the "local_device_id" parameter in UDT65
"TCON_PAR". Example, B#16#03: communication via integrated IE interface of CPU
319-3 PN/DP.
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Establishing a connection for communication
Use with TCP and ISO on TCP
Both communication partners call FB 65 "TCON" to establish the connection. In your
connection configuration, you define which communication partner activates the
connection, and which communication partner responds to the request with a passive
connection. To determine the number of possible connections, refer to your CPU's
technical specifications.
The CPU automatically monitors and holds the active connection.
If the connection is broken, for example by line interruption or by the remote
communication partner, the active partner tries to reestablish the connection. You do not
have to call FB 65 "TCON" again.
FB 66 "TDISCON" disconnects the CPU from a communication partner, as does STOP
mode. To reestablish the connection to have to call FB65 "TCON" again.
Use with UDP
Both communication partners call FB 65 "TCON" to set up their local communication
access point. This establishes a connection between the user program and operating
system's communication level No connection is established to the remote partner.
The local access point is used to send and receive UDP telegrams.
Disconnecting
Use with TCP and ISO on TCP
FB 66 "TDISCON" disconnects the communication connection between CPU and
communication partner.
Use with UDP
FB 66 "TDISCON" disconnects the local communication access point, i.e., the connection
between user program and communication level of operating system is interrupted.
Options for interrupting the communication connection
Events causing interruptions of communication:
You program the cancellation of connections at FB 66 "TDISCON."
The CPU goes from RUN to STOP.
At POWER OFF / POWER ON
Reference
For detailed information on the blocks described earlier, refer to the STEP 7 Online Help.
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3.2.10.4 SNMP Communication Service
Availability
The SNMP communication service is available for CPUs with integrated PROFINET
interface and Firmware 2.3.0 or higher.
Properties
SNMP (Simple Network Management Protocol) is a standard protocol for TCP/IP networks.
Reference
For further information on the SNMP communication service and diagnostics with SNMP,
refer to the PROFINET Operating Instructions and to the S7-300 CPU 31xC and CPU 31x,
Hardware Installation Manual.
3.3 Web Server
Introduction
The web server allows you to monitor your CPU on the Internet or on the Intranet of your
company. This functionality supports remote analysis and diagnostics.
Messages and status information are visualized on HTML pages.
Web browser
You need a web browser to access the HTML pages of the CPU.
Web browsers which are suitable for communication with the CPU:
Internet Explorer (version 6.0 and higher)
Mozilla Firefox (V1.5 and higher)
Opera (version 9.0 and higher)
Netscape Navigator (version 8.1 and higher)
Reading information via the web server
The web server can be used to read the following information from the CPU:
Start page with general CPU information
Identification information
Content of the diagnostic buffer
Messages (without acknowledgment option)
Information on PROFINET
Variable status
Variable tables
The next pages describe the HTML pages and corresponding declarations in detail.
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Display languages
You can select two out of five languages for the visualization of messages and diagnostics
information. See also the chapter "Language settings".
German
English
French
Spanish
Italian
Web access to the CPU by way of PG/PC
Proceed as follows to access the web server:
1. Connect the client (PG/PC) to the CPU via the PROFINET interface.
2. Open the web browser (for example, Internet Explorer).
Enter the IP address of the CPU in the "Address" field of the web browser in the format
http://a.b.c.d (example: http://192.168.3.141).
The start page of the CPU opens. From the start page you can navigate to further
information.
Web access to the CPU by way of HMI devices and PDA
The web server supports the Windows Terminal Service. In addition to operations with PGs
and PCs, this functionality also supports the integration of thin client solutions for mobile
devices (PDA, MOBIC T8, for example) and of rugged local stations (SIMATIC MP370 with
ThinClient/MP option, for example) on a Windows CE platform.
Proceed as follows to access the web server:
1. Interconnect the client (HMI, PDA) with the CPU via PROFINET interface.
2. Open the web browser (for example, Internet Explorer).
Enter the IP address of the CPU in the "Address" field of the web browser in the format
http://a.b.c.d/basic (example: http://192.168.3.141/basic).
The start page of the CPU opens. From the start page you can navigate to further
information.
HMIs operating with Windows CE operating system V 5.x or earlier process CPU information
in a browser specially developed for Windows CE. This browser visualizes information in a
less complex form. However, this simple form is not covered in detail in the pictures shown
below.
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Activating the Web Server
The web server deactivated in the basic configuration in HW Config. Activate the web server
by selecting "CPU -> Object Properties -> Web" in HW Config. See also the chapter
"Language settings".

Note
You can also use the web server without SIMATIC Micro Memory Card. The CPU must have
been assigned an IP address for server operation. The web server visualizes the message
buffer contents in hexadecimal code. The start page, the identification and PROFINET
information as well as the status of variables are output in plain text.

Security
The web server by itself does not provide any security. Protect your web-compliant CPUs
against unauthorized access by means of a firewall.
Refresh status and printing of screen contents
The web server outputs static information to its screen. Update the screen contents as usual
with Internet pages.
Data output to the printer, however, always return the actual CPU information. The
information output to the printer may therefore be more up to date than the screen contents.
Filter settings do not influence the print data. The program always outputs the entire content
of the message buffer to the printer.
3.3.1 Language settings
Introduction
The web server returns information in the following languages:
German (Germany)
English (United States)
French (France)
Italian (Italy)
Spanish (traditional)
Requirements for multilingual output of text
Language settings to be made in STEP 7 in order to ensure proper output of data in the
selected language:
Set the regional language for the display devices in SIMATIC Manager
Set the regional web language in the properties dialog of the CPU
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Set the regional language for the display devices in SIMATIC Manager
Select the regional language for the display devices in SIMATIC Manager:
Options > Language for display devices

Figure 3-2 Example of the selection of a language for display devices
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Set the regional web language
Select up to two web languages from the languages installed for the display devices.
Open the CPU properties dialog box:
Activate the "Activate web server on this module" check box
Select up to two web languages.

Figure 3-3 Example of the web server language selection

Note
The program displays messages and diagnostics information in hexadecimal code if you
activate a web server without selecting a language.

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3.3.2 Web pages
3.3.2.1 Start page with general CPU information
Going online to the web server
You log on to the web server by entering the IP address of the configured CPU in the
address bar of the web browser (example: http: //192.168.1.158). The connection opens with
the "Intro" page.
Introduction
The screenshot below shows the first page (Intro) called by the web server.

Figure 3-4 Intro
Click the ENTER link to go to the web server pages.

Note
Skipping the Intro web page
Set the "Skip Intro" check box in order to skip the Intro. The web server will now directly
open its start page. You can undo the "Skip intro" setting by clicking the "Intro" link on the
start page.

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Start page
The start page returns information as shown in the picture below.
2
1

Figure 3-5 General Information
The CPU image with LEDs returns the actual CPU status at the time of data request.
"General"
This group returns information about the CPU running the web server to which you are
currently logged on.
"Status"
This info field returns CPU status information which is valid when requested.
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3.3.2.2 Identification
Technical data
The identification web page returns technical data of the CPU.
1
2
3

Figure 3-6 Identification
"Identification"
The "Identification" info field contains the plant and location ID, and the serial number.
"Order number"
The "Order number" info field returns the order numbers of hardware and software.
"Version"
This field returns the hardware, firmware and bootloader versions.
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3.3.2.3 Diagnostics buffer
Diagnostics buffer
The browser returns the content of the diagnostics buffer on the diagnostics buffer web
page.
1
2
3

Figure 3-7 Diagnostics buffer
Requirements
The web server is activated, languages are set, and the project is compiled and downloaded
in STEP 7.
"Diagnostics buffer entries 1 to 100"
The diagnostics buffer can save up to 500 messages. Select an buffer input interval from the
list box. Each interval comprises 100 entries.
The program only displays the last 10 buffer entries in RUN for reasons of performance.
"Events"
The "Events" info fields returns the diagnostics event and the corresponding date and time
stamp.
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"Details"
This field outputs detailed information about a selected event.
Select the corresponding event from the "Events" info field.
Configuration
Configuration procedure:
1. Select the "Object properties" dialog box from the shortcut menu of the corresponding
CPU.
2. Select the "Web" tab, and then activate the "Activate web server on this module" check
box.
3. Select up to two languages you want to use to display plain text messages.
4. Save and compile the project and download the configuration data to the CPU.
Special features when changing languages
You can change the language, for example, from German to English, by clicking the object in
the upper right corner. If you select a language you have not configured the program returns
a hexadecimal code instead of plain text information.
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3.3.2.4 Alarms
Alarms
The browser returns the content of the message buffer on the Alarms web page.
The alarms cannot be acknowledged on the web server.
1
3
2
lnfo: cooler temperature is at 80C
Raw material tank 3 low limit reached
The cooler temperature has reached 80C
Cooling water tank level HH reached
Sensor KK 143 faulty

Figure 3-8 Alarms
Requirements
The message texts were configured in the user-specific languages. For information about the
configuration of message texts, refer to STEP 7 and to the Internet address
http://support.automation.siemens.com/WW/view/en/23872245
"Filter"
This functionality allows you to select specific information from this page.
Use the list box to view only the entries of the selected parameter. Enter the value of the
selected parameter in the input box and then click "Filter".
To view all alarms with "incoming" status, for example:
1. Select the "Status" parameter from the list box.
2. Enter the "incoming" text in the input box.
3. Click "Filter".
The filter criteria are also retained when you update a page.
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"Alarms"
Alarms of the CPU are displayed in the info field in chronological order, including the date
and time.
The message text parameter is an entry which contains the message texts configured for the
corresponding fault definitions.
Sorting
You can also view the parameters in ascending or descending order. Click in the column
header of one of the parameters.
Message number
Date
Time
Message Text
State
Acknowledgment
The messages are returned in chronological order when you click the "Date" entry. Incoming
and outgoing events are output at the Status parameter.
"Message number details"
You can view detailed message information in this info field. Select the corresponding
message from the info field .
the upper right corner. If you select a language or corresponding message texts you have
not configured the program returns a hexadecimal code instead of plain text information.
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3.3.2.5 PROFINET
PROFINET
The"Parameters" tab of this web page contain a summary of information about the
integrated PROFINET interface of the CPU.
2
3
4
1

Figure 3-9 Parameters of the integrated PROFINET interface
"Network connection"
This page returns information for the identification of the integrated PROFINET interface of
the corresponding CPU.
"IP parameters"
Information about the configured IP address and number of the subnet in which the
corresponding CPU is networked.
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"Physical properties"
Information available in the "Physical properties" info field:
Port number
Link status
Settings
Mode

Note
Updating data
The data you see in the browser are not updated automatically. You can view the actual
data by updating the view in the HTML browser at regular intervals (Update button).

Information about the quality of data transfers is available in the "Statistics" tab.
2
3
4
1

Figure 3-10 Data transfer identifiers
"Data packets since"
Returns the time at which the first data packet was sent or received.
"Sent data packets"
You can evaluate the quality of data transmission on the send line based on the identifiers
returned in this info field.
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"Data packets received"
You can evaluate the quality of data transmission on the receiving line based on the
identifiers returned in this info field.
3.3.2.6 Variable status
Variable status
The browser outputs the variable status on the web page of the same name. You can
monitor the status of up to 50 variables.
1 2 3

Figure 3-11 Variable status
"Address"
Enter the address of the operand of which you want to monitor the response in the "Address"
text box. Invalid addresses entered are displayed in red font.
"Display format"
Select the display format of a variable using the drop-down list. The program indicates the
variable in hex code if it does not support the selected display format.
"Value"
Outputs the value of the corresponding operand in the selected format.
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the upper right corner. The German mnemonics differ compared to other languages. The
syntax of operands you enter may be invalid for this reason when you change languages.
For example, ABxy instead of QBxy. The browser outputs a faulty syntax in red font.
3.3.2.7 Variable tables
Variable tables
The browser returns the content of the variable tables on the web page of the same name.
You can monitor up to 200 variables in each variable table.
1
2 3 4 5

Figure 3-12 Variable tables
Selection
Select one of the configured variable tables from this drop-down list box.
"Name" and "Address"
This info field returns the operand's name and address.
"Format"
Select the display format of the corresponding operand using the drop-down list boxes. The
drop-down list box outputs a selection of all valid display formats.
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"Value"
This column shows the values in the corresponding display format.
"Comment"
The program outputs the comment you configured in order to highlight the meaning of an
operand.
Configuring variable tables for the web server
The web server lets you monitor up to 50 variable tables with maximum 200 variables. As
CPU memory is shared by messages and variables, the actually available number of
variable tables may be reduced.
Example: There is sufficient memory space for 400 configured messages and 50 variable
tables with 100 variables (including the symbol names, however, without symbol comment).
The web browser only outputs partial variable tables if memory capacity is exceeded due to
the number of configured messages and variables. You counteract this negative effect by
reducing memory requirements for your messages and system comments. You should also
use only one language to display information.
You should also minimize the number of variables in the variable tables as the web server is
more likely to return the full tables, and in order to accelerate updates.
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Creating a variable table for the web server
1. Generate a variable table in STEP 7.
2. Open the properties dialog box of the variable table, and then enter the "VATtoWEB"
identifier into the "family" field.

3. Save and compile the project and download the configuration data to the CPU.
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3.4 S7 connections
3.4.1 S7 connection as communication path
An S7 connection is established when S7 modules communicate with one another. This S7
connection is the communication path.

Note
S7 connections are not required for global data communication, point-to-point connection,
communication by way of PROFIBUS DP, PROFINET CBA, PROFINET IO, TCP/IP, ISO on
TCP, UDP, SNMP and web server.

Every communication link requires S7 connection resources on the CPU for the entire
duration of this connection.
Each S7 CPU provides a specific number of S7 connection resources which are used by
various communication services such as PG/OP communication, S7 communication or S7
basic communication.
Connection points
An S7 connection between modules with communication capability is established between
connection points. The S7 connection always has two connection points: The active and
passive connection points:
The active connection point is assigned to the module that establishes the S7 connection.
The passive connection point is assigned to the module that accepts the S7 connection.
Any module that is capable of communication can thus act as an S7 connection point. The
active communication always occupies one S7 connection at the the connection point on the
relevant module.
Transition point
If you use the routing functionality, the S7 connection between two modules capable of
communication is established across a number of subnets. These subnets are
interconnected via a network transition. The module that implements this network transition
is known as a router. The router is thus the point through which an S7 connection passes.
Any CPU with a DP or PN interface can be the router for an S7 connection. You can
establish a certain maximum number of routing connections. This does not limit the quantity
framework of S7 connections.
See also
Connection resources for routing (Page 3-52)
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3.4 S7 connections
Manual, 12/2006 , A5E00105475-07 3-49
3.4.2 Assignment of S7 connections
There are several ways to allocate S7 connections on a communication-capable module:
Reservation during configuration
Assigning connections in the program
Allocating connections during commissioning, testing and diagnostics routines
Allocating connection resources to HMI services
Reservation during configuration
One connection resource each is automatically reserved on the CPU for PG and OP
communication. Whenever you need more connection resources (for example, when
connecting several OPs), configure this increase in the CPU properties dialog box in
STEP 7.
Connections must also be configured (using NetPro) for the use of S7 communication. For
this purpose, connection resources have to be available, which are not allocated to PG/OP
or other connections. The required S7 connections are then permanently allocated for S7
communication when the configuration is uploaded to the CPU.
Assigning connections in the program
In S7 basic communication, and in open Industrial Ethernet communication with TCP/IP, the
user program establishes the connection. The CPU operating system initiates the
connection. S7 basic communication uses the corresponding S7 connections. The open IE
communication does not use any S7 connections. The maximum number of eight
connections also applies to this type of communication.
Using connections for commissioning, testing and diagnostics
An active online function on the engineering station (PG/PC with STEP 7) occupies S7
connections for PG communication:
An S7 connection resource for PG communication which was reserved in your CPU
hardware configuration is assigned to the engineering station, that is, it only needs to be
allocated.
If all reserved S7 connection resources for PG communication are allocated, the
operating system automatically assigns a free S7 connection resource which has not yet
been reserved. If no more connection resources are available, the engineering station
cannot go online to the CPU.
Allocating connection resources to HMI services
An online function on the HMI station (OP/TP/... with WinCC) is used for assigning S7
connection resources for the OP communication:
An S7 connection resource for OP communication you have reserved in your CPU
hardware configuration is therefore assigned to the OCM station engineering station, that
is, it only needs to be allocated.
If all reserved S7 connection resources for OP communication are allocated, the
operating system automatically assigns a free S7 connection resource which has not yet
been reserved. If no more connection resources are available, the OCM station cannot go
online to the CPU.
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Time sequence for allocation of S7 connection resources
When you program your project in STEP 7, the system generates parameter assignment
blocks which are read by the modules in the startup phase. This allows the module's
operating system to reserve or allocate the relevant S7 connection resources. That is, for
instance, OPs cannot access a reserved S7 connection resource for PG communication.
The CPU's S7 connection resources which were not reserved can be used freely. These S7
connection resources are allocated in the order they are requested.
Example
If there is only one free S7 connection left on the CPU, you can still connect a PG to the bus.
The PG can then communicate with the CPU. The S7 connection is only used, however,
when the PG is communicating with the CPU. If you connect an OP to the bus while the PG
is not communicating, the OP can establish a connection to the CPU. Since an OP maintains
its communication link at all times, in contrast to the PG, you cannot subsequently establish
another connection via the PG.
See also
Open communication via Industrial Ethernet (Page 3-27)
3.4.3 Distribution and availability of S7 connection resources
Distribution of connection resources
Table 3-9 Distribution of connections
Communication service Distribution
PG communication
OP communication
S7 basic communication
In order to avoid allocation of connection resources being dependent only on
the chronological sequence in which various communication services are
requested, connection resources can be reserved for these services.
For PG and OP communication respectively, at least one connection
resource is reserved by default.
In the table below, and in the technical data of the CPUs, you can find the
configurable S7 connection resources and the default configuration for each
CPU. You "redistribute connection resources by setting the relevant CPU
parameters in STEP 7.
S7 communication
Other communication resources (e.g. via
CP 343-1, with a data length of
> 240 bytes)
Available connection resources that are not specially reserved for a service
(PG/OP communication ,
S7 basis communication) are used for this.
Routing PG functions
(only for CPUs with DP/PN interface)
The CPUs provide a certain number of connection resources for routing.
These connections are available in addition to the connection resources.
The subsection below shows the number of connection resources.
Global data communication
Point-to-point connection
This communication service requires no S7 connection resources.
PROFIBUS DP This communication service requires no S7 connection resources.
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Manual, 12/2006 , A5E00105475-07 3-51
Communication service Distribution
PROFINET CBA This communication service requires no S7 connection resources.
PROFINET IO This communication service requires no S7 connection resources.
Web server This communication service rewires no S7 connection resources.
Open communication by means of TCP/IP
Open communication by means of ISO on
TCP
Open communication by means of UDP
This communication service requires no S7 connection resources.
Independently of the S7 connections, a total of 8 own resources are available
for connections or local access points (UDP) for TCP/IP, ISO on TCP, UDP.
SNMP This communication service requires no S7 connection resources.
Availability of connection resources
Table 3-10 Availability of connection resources
Reserved for CPU Total number
connection
resources
PG
communication
OP communication S7 basic
communication
Free
S7 connections
312C 6 1 to 5, default 1 1 to 5, default 1 0 to 2, default 0
313C
313C-2 PtP
313C-2 DP
8 1 to 7, default 1 1 to 7, default 1 0 to 4, default 0
314C-2 PtP
314C-2 DP
12 1 to 11, default
1
1 to 11, default 1 0 to 8, default 0
312 6 1 to 5, default 1 1 to 5, default 1 0 to 2, default 0
314 12 1 to 11, default
1
315-2 DP
315-2 PN/DP
16 1 to 15, default
1
317-2 DP
317-2 PN/DP
32 1 to 31, default
1
319-3 PN/DP 32 1 to 31, default
1
Displays all non-
reserved S7
connection resources
as free connection
resources.

Note
When using a CPU 315-2 PN/DP, you can configure up to 14 connection resources for S7
communication in NetPro: These connections are then reserved. For CPU 317-2 PN/DP and
CPU 319-3 PN/DP, you can configure a maximum of 16 connection resources for S7
communication in NetPro.

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3.4 S7 connections
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3.4.4 Connection resources for routing
Number of connection resources for routing
The CPUs with DP interface provide a different number of connection resources for the
routing function:
Table 3-11 Number of routing connection resources (for DP/PN CPUs)
CPU As of firmware version Number of connections for routing
31xC, CPU 31x 2.0.0 Max. 4
317-2 DP 2.1.0 Max. 8
31x-2 PN/DP 2.2.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24

PROFINET: Max. 24
319-3 PN/DP 2.4.0 Interface X1 configured as:
MPI: Max. 10
DP master Max. 24

DP master Max. 24

PROFINET: Max. 48
Example of a CPU 314C-2 DP
The CPU 314C-2 DP provides 12 connection resources (refer to Table 4-11):
Reserve two connection resources for PG communication.
Reserve three connection resources for OP communication.
Reserve one connection resource for S7-based communication.
This leaves six connection resources available for other communication service, e.g. S7
communication, OP communication, etc.
In addition 4 routing connections via the CPU are possible.
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Manual, 12/2006 , A5E00105475-07 3-53
Example for a CPU 317-2 PN/DP / CPU 319-3 PN/DP
The CPU 317-2 PN/DP and CPU 319-3 PN/DP provide you with 32 connection resources
(refer to Table 3-11):
Reserve four connection resources for PG communication.
Reserve six connection resources for OP communication.
Reserve two connection resources for S7-based communication.
In NetPro you configure eight S7 connection resources for S7 communication via the
integrated PROFINET interface
This leaves 12 S7 connections available for arbitrary communication services, e.g., S7
communication, OP communication, etc.
However, only a maximum of 16 connection ressources for S7 communication at the
integrated PN interface can be configured in NetPro.
In addition, there are another 24 routing connections available for the CPU 317-2 PN/DP,
and another 48 routing connections for the CPU 319-3 PN/DP, which do not affect the
aforementioned S7 connections.
However, take the interface-specific maximum numbers into account (refer to Table 3-12).
3.5 DPV1
New automation and process engineering tasks require the range of functions performed by
the existing DP protocol to be extended. In addition to cyclical communication functions,
acyclical access to non-S7 field devices is another important requirement of our customers,
and was implemented in the standard EN 50170. In the past, acyclical access was only
possible with S7 slaves. The distributed I/O standard EN 50170 has been further developed.
All the changes concerning new DPV1 functions are included in IEC 61158/ EN 50170,
volume 2, PROFIBUS.
Definition DPV1
The term DPV1 is defined as a functional extension of the acyclical services (to include new
interrupts, for example) provided by the DP protocol.
Availability
All CPUs with DP interface(s) and serving as DP masters feature the enhanced DPV1
functionality.

Note
If you want to use the CPU as an intelligent slave, remember that it does not have DPV1
functionality.

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Requirement for using the DPV1 functionality with DP slaves
For DPV1 slaves from other vendors, you will need a GSD file conforming to EN 50170,
revision 3 or later.
Extended functions of DPV1
Use of any DPV1 slaves from external vendors (in addition to the existing DPV0 and S7
slaves, of course).
Selective handling of DPV1-specific interrupt events by new interrupt blocks.
Reading/writing SFBs that conform to standards to the data record (although this can only
be used for centralized modules).
User-friendly SFB for reading diagnostics.
Interrupt blocks with DPV1 functionality
Table 3-12 Interrupt blocks with DPV1 functionality
OB Functionality
OB 40 Process interrupt
OB 55 Status interrupt
OB 56 Update interrupt
OB 57 Vendor-specific interrupt
OB 82 Diagnostic interrupt

Note
You can now also use organizational blocks OB40 and OB82 for DPV1 interrupts.

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System blocks with DPV1 functionality
Table 3-13 System function blocks with DPV1 functionality
SFB Functionality
SFB 52 Read data record from DP slave/IO device or centralized module
SFB 53 Write data record to DP slave/IO device or centralized module
SFB 54 Read additional alarm information from a DP slave/IO device or a centralized
module in the relevant OB
SFB 75 Send alarm to the DP master

Note
You can also use SFB 52 to SFB 54 for centralized I/O modules. SFB 52 to SFB 54 can also
be used for PROFINET IO.

Reference
For further information on the blocks mentioned earlier, refer to the reference manual
System Software for S7-300/400: System and Standard Software, or directly to the STEP
7Online Help.
See also
PROFIBUS DP (Page 3-3)
Communication
3.5 DPV1
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Manual, 12/2006 , A5E00105475-07 4-1
Memory concept
4
4.1 Memory areas and retentivity
4.1.1 CPU memory areas
The three memory areas of your CPU:
CPU
Load memory
(located on SlMATlC Micro
Memory Card)
System memory
Work memory
C
a
r
d
M
e
m
o
r
y
M
i
c
r
o
S
l
M
A
T
l
C
S
l
E
M
E
N
S

Load memory
The load memory is located on the SIMATIC Micro Memory Card. The size of the load
memory corresponds exactly to the size of the SIMATIC Micro Memory Card. It is used to
store code blocks, data blocks and system data (configuration, connections, module
parameters, etc.). Blocks that are not identified as process-relevant. You can also store all
the configuration data for your project on the SIMATIC Micro Memory Card.

Note
You must have inserted a SIMATIC Micro Memory Card into the CPU to enable the
download of user programs and operation of the CPU.

Memory concept
4-2 Manual, 12/2006 , A5E00105475-07
System memory
The RAM system memory is integrated in the CPU and cannot be expanded.
It contains
the address areas for address area memory bits, timers and counters
the process image of the I/Os
local data
Work memory
The work memory is integrated in the CPU and cannot be extended. It is used to run the
code and process user program data. Programs only run in the work memory and system
memory.
4.1.2 Retentivity of load memory, system memory and RAM
Your CPU is equipped with a service-free retentive memory, i.e., its operation does not
require a buffer battery. Data is kept in retentive memory across POWER OFF and
restart (warm start).
Retentive data in load memory
Your program in load memory is always retentive: It is stored on the SIMATIC Micro Memory
Card, where it is protected against power failure or CPU memory restart
Retentive data in system memory
In your configuration (Properties of CPU, Retentivity tab), specify which part of memory bits,
timers and counters should be kept retentive and which of them are to be initialized with "0"
on restart (warm restart).
The diagnostics buffer, MPI address (and transmission rate) and operating hour counter data
are generally written to the retentive memory area on the CPU. Retentivity of the MPI
address and baud rate ensures that your CPU can continue to communicate, even after a
power loss, memory reset or loss of communication parameters (e.g. due to removal of the
SIMATIC Micro Memory Card or deletion of communication parameters).
Memory concept
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Retentive data in work memory
Therefore, the contents of retentive DBs are always retentive at restart and POWER
ON/OFF. Retentive data blocks can be uploaded to the work memory in accordance with the
maximum limit allowed by the work memory.
In the case of CPU versions V2.0.12 and higher, non-retentive DBs are also supported. Non-
retentive DBs are initialized from the load memory with their initial values whenever a restart
is performed or when the power is switched off and then on again. Non-retentive data blocks
and code blocks can be loaded in accordance with the maximum work memory limit.
Table 4-1 Retentivity of the work memory
CPUs Length of the non-volatile work memory for retentive data blocks
CPU 312 32 KB
CPU 313, 314 64 KB
CPU 315 128 KB
CPU 317 256 KB
CPU 319 700 KB
See also
Properties of the SIMATIC Micro Memory Card (Page 4-9)
Memory concept
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4.1.3 Retentivity of memory objects
Retentive behavior of memory objects
The table below shows the retentive behavior of memory objects during specific operating
state transitions.
Table 4-2 Retentivity behavior of memory objects (applies to all CPUs with DP/MPI-SS)
Memory object Operating state transition
POWER ON /
POWER OFF
STOP RUN CPU memory
reset
User program/data (load memory) X X X
Retentive behavior of DBs for CPUs with
firmware < V2.0.12

X

X

Retentive behavior of DBs for CPUs with
firmware >= V2.0.12
Can be set in the properties of the
DBs in STEP 7 V5.2 + SP1 or
higher.

Flag bits, timers and counters configured as
retentive data
X X
Diagnostics buffers, operating hour counters X
1
X X
MPI address, transmission rate
(or also DP address, transmission rate of the
MPI/DP interface of CPU 315-2 PN/DP and
CPU 317 and CPU 319, if these are configured
as DP nodes).
X X X
x = retentive; = not retentive
1
Only the last 100 entries are retained in the diagnostics buffer after POWER OFF / POWER
ON.
Retentive behavior of a DB for CPUs with firmware < V2.0.12
For these CPUs, the contents of the DBs are always retentive at POWER ON/OFF or STOP-
RUN.
Memory concept
Manual, 12/2006 , A5E00105475-07 4-5
Retentive behavior of a DB for CPUs with firmware >= V2.0.12
These CPUs support the generation of data blocks with "NON-Retain" (not retentive)
property.
Data blocks assigned the "NON-Retain" property are initialized with their start values when
power is cycled off and on and and when the CPU goes from STOP to RUN.
You have two options of assigning the "NON-Retain" property to a DB:
STEP 7, V5.2 + SP1 or higher: Activate the NON-Retain function in the DB properties
SFC 82 " Crea_DBL" (generation of a DB in load memory): Set bit 2 = "1" at the ATTRIB
parameter
Table 4-3 Retentive behavior of DBs for CPUs with firmware >= V2.0.12
At POWER ON/OFF or restart (warm start) of the CPU, the DB should
receive the initial values
(non-retentive DB)
retain the actual values (retentive DB)
Reason:
At POWER ON/OFF and restart (STOP-RUN) of
the CPU, the actual values of the DB are non-
retentive. The DB receives the start values from
load memory.
Reason:
At POWER OFF/ON and restart (STOP-RUN) of
the CPU, the actual values of the DB are retained.
Requirement in STEP 7:
The "Non-Retain" check box is activated in
the DB properties.
or
a non-retentive DB was generated using
SFC 82 "CREA_DBL" and the
corresponding block attribute (ATTRIB ->
NON_RETAIN bit).
Requirement in STEP 7:
The "Non-Retain" check box is deactivated in
the DB properties.
or
a retentive DB was generated using SFC 82
"CREA_DBL".
Retentivity of the work memory

CPUs Length of the non-volatile work memory for retentive data blocks
CPU 312 32 KB
CPU 313, 314 64 KB
315 128 KB
317 256 KB
319 700 KB
The remainder of work memory is available for code blocks or for non-retentive DBs.
Memory concept
4-6 Manual, 12/2006 , A5E00105475-07
4.1.4 Address areas of system memory
The system memory of the S7 CPUs is organized in address areas (refer to the table below).
In a corresponding operation of your user program, you address data directly in the relevant
address area.
Address areas of system memory
Table 4-4 Address areas of system memory
Address areas Description
Process image of inputs At every start of an OB1 cycle, the CPU reads the values at the
input of the input modules and saves them the process image of
inputs.
Process image of outputs During its cycle, the program calculates the values for the outputs
and writes these to the process image of outputs. At the end of
the OB1 cycle, the CPU writes the calculated output values to the
output modules.
Bit memory This area provides memory for saving the intermediate results of
a program calculation.
Timers Timers are available in this area.
Counters Counters are available in this area.
Local data Temporary data in a code block (OB, FB, FC) is saved to this
memory area while the block is being edited.
Data blocks See Recipes and measurement value logs
Reference
The address areas of your CPU are listed in the Instruction list for CPUs 31xC and 31x.
Memory concept
Manual, 12/2006 , A5E00105475-07 4-7
I/O process image
When the user program addresses the input (I) and output (O) address areas, it does not
query the signal states of digital signal modules. Instead, it rather accesses a memory area
in CPU system memory. This particular memory area is the process image.
The process image is organized in two sections: The process image of inputs, and the
process image of outputs.
Advantages of the process image
Process image access, compared to direct I/O access, offers the advantage that a consistent
image of process signals is made available to the CPU during cyclic program execution.
When the signal status at an input module changes during program execution, the signal
status in the process image is maintained until the image is updated in the next cycle.
Moreover, since the process image is stored in CPU system memory, access is significantly
faster than direct access to the signal modules.
Process image update
The operating system updates the process image periodically. The figure below shows the
sequence of this operation within a cycle.
Startup program
User program
Startup
C
y
c
l
e

t
i
m
e
Write the process image of outputs
to the modules.
Read inputs from the modules and
update data in the process image of
inputs.
User program execution
(OB1 and all blocks called therein).
ZKP (BeSy)
PAE
PAA

Configurable process image of the CPUs
STEP 7 lets you define a user-specific size of the I/O process image between 0 to 2048 for
the following CPUs:

CPU Firmware
CPU 315-2 PN/DP V2.5 or higher
CPU 317-2 DP V2.5 or higher
Memory concept
4-8 Manual, 12/2006 , A5E00105475-07
Note the information below:

Note
Currently, the dynamic setting of the process image only affects its update at the scan cycle
control point. That is, the process image of inputs is only updated up to the set PII size with
the corresponding values of the peripheral input modules existing within this address area, or
the values of the process image of outputs up to the set PIO size are written to the peripheral
output modules existing within this address area.
This set size of the process image is ignored with respect to STEP 7 commands used to
access the process image (for example U I100.0, L EW200, = Q20.0, T AD150, or
corresponding indirect addressing commands also). However, up to the maximum size of the
process image (that is, up to I/O byte 2047), these commands do not return any
synchronous access errors, but rather access the permanently available internal memory
area of the process image.
The same applies to the use of actual parameters of block calls from the I/O area (area of
the process image).
Particularly if these process image limits were changed, you should check to which extent
your user program accesses the process image in the area between the set and the
maximum process image size. If access to this area continues the user program may not
detect changes at the inputs of the I/O module, or actually fails to write output data to the
output module and does not generate an error message.
You should also note that certain CPs may only be addressed outside of the process image.

Local data
Local data store:
the temporary variables of code blocks
the start information of the OBs
transfer parameters
intermediate results
Temporary Variables
When you create blocks, you can declare temporary variables (TEMP) which are only
available during block execution and then overwritten again. These local data have fixed
length in each OB. Local data must be initialized prior to the first read access. Each OB also
requires 20 bytes of local data for its start information. Local data access is faster compared
to access to data in DBs.
The CPU is equipped with memory for storing temporary variables (local data) of currently
executed blocks. The size of this memory area depends on the CPU. It is distributed in
partitions of equal size to the priority classes. Each priority class has its own local data area.

Memory concept
Manual, 12/2006 , A5E00105475-07 4-9

Caution
All temporary variables (TEMP) of an OB and its nested blocks are stored in local data.
When using complex nesting levels for block processing, you may cause an overflow in the
local data area.
The CPUs will change to STOP mode if you exceed the permissible length of local data for a
priority class.
Make allowances for local data space required for synchronous error OBs. This is assigned
to the respective triggering priority class.

See also
Retentivity of load memory, system memory and RAM (Page 4-2)
4.1.5 Properties of the SIMATIC Micro Memory Card
The SIMATIC Micro Memory Card as memory module for the CPU
The memory module used on your CPU is a SIMATIC Micro Memory Card. You can use
MMCs as load memory or as portable data volume.

Note
The CPU requires the SIMATIC Micro Memory Card for operation.

What is stored on the SIMATIC Micro Memory Card
The following data can be stored on the SIMATIC Micro Memory Card:
User program, i.e., all blocks (OBs, FCs, FCs, DBs) and system data
Archives and recipes
Configuration data (STEP 7 projects)
Data for operating system update and backup

Note
You can either store user and configuration data or the operating system on the SIMATIC
Micro Memory Card.

Memory concept
4-10 Manual, 12/2006 , A5E00105475-07
Properties of a SIMATIC Micro Memory Card
The SIMATIC Micro Memory Card ensures maintenance-free and retentive operation of
these CPUs.

Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it is
being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card on your PG, or format the card in the CPU. Never remove a SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU is
in STOP state, and when the PG is not writing to the card. When the CPU is in STOP mode
and you cannot not determine whether or not a PG is writing to the card (e.g., load/delete
block), disconnect the communication lines.

SIMATIC Micro Memory Card copy protection
Your SIMATIC Micro Memory Card has an internal serial number that implements an MMC
copy protection. You can read this serial number from the SSL partial list 011CH index 8
using SFC 51 "RDSYSST." If the reference and actual serial number of your SIMATIC Micro
Memory Card are not the same, program a STOP command in a know-how-protected
module, for example.
Useful life of a SIMATIC Micro Memory Card
The life of an SIMATIC Micro Memory Card depends mainly on the following factors:
1. The number of delete or programming operations,
2. External influences such as ambient temperature.
At ambient temperatures up to 60 C, a maximum of 100,000 delete/write operations can be
performed on a SIMATIC Micro Memory Card.

Caution
To prevent data losses, do not exceed this maximum of delete/write operations.

Reference
Additional information:
on the SSL parts list, refer to the CPU 31xC and CPU 31x Instruction List, or to the
S7-300/400 System Software, System and Standard Functions Reference Manual.
on resetting the CPU, refer to the Operating Instructions CPU 31xC and CPU31x,
Selector Switch
Memory concept
4.2 Memory functions
Manual, 12/2006 , A5E00105475-07 4-11
See also
Operating and display elements: CPU 31xC (Page 2-1)
Operating and display elements: CPU 312, 314, 315-2 DP: (Page 2-5)
Operating and display elements: CPU 317-2 DP (Page 2-7)
Operating and display elements: CPU 31x-2 PN/DP (Page 2-9)
Operating and display elements: CPU 319-3 PN/DP (Page 2-11)
4.2.1 General: Memory functions
Memory functions
Memory functions are used to generate, modify or delete entire user programs or specific
blocks. You can also ensure that your project data are retained by archiving these. If you
created a new user program, use a PG/PC to download the complete program to the
SIMATIC Micro Memory Card.
Memory concept
4-12 Manual, 12/2006 , A5E00105475-07
4.2.2 Load user program from SIMATIC Micro Memory Card to the CPU
User program download
The entire user program data are downloaded from your PG/PC to the CPU by means of the
SIMATIC Micro Memory Card. The previous content of the Micro Memory Card is deleted in
the process. Blocks use the load memory area as specified under "Load memory
requirements" in "General block properties".
The figure shows the load and work memory of the CPU
C
a
r
d

M
e
m
o
r
y

M
i
c
r
o

Process-relevant
parts of logic and
data blocks 1
plus configurati-
on data
Programming device
Stored on the hard
disk drive
Logic blocks
Data blocks
System data blocks System data blocks
Logic blocks
Data blocks
Comments
lcons
Load memory Work memory
S
l
M
A
T
l
C
S
l
E
M
E
N
S

1
: If not all of the work memory area is retentive, the retentive area is indicated in STEP 7
module status as retentive memory. You cannot run the program until all the blocks are
downloaded.

Note
This function is only permitted when the CPU is in STOP mode. Load memory is cleared if
the load operation could not be completed due to power loss or illegal block data.

Memory concept
Manual, 12/2006 , A5E00105475-07 4-13
4.2.3 Handling with modules
4.2.3.1 Download of new blocks or delta downloads
There are two ways to download additional user blocks or download deltas:
Download of blocks: You already created a user program and downloaded it to the CPU
via the SIMATIC Micro Memory Card. You then want to add new blocks to the user
program. In this case you do not need to reload the entire user program to the MCC.
Instead you only need to download the new blocks to the SIMATIC Micro Memory Card
(this reduces the download times for highly complex programs.)
Delta download: In this case, you only download the deltas in the blocks of your user
program. In the next step, perform a delta download of the user program, or only of the
changed blocks to the SIMATIC Micro Memory Card, using the PG/PC.

Warning
The delta down of block / user programs overwrites all data stored under the same name
on the SIMATIC Micro Memory Card.

The data of dynamic blocks are transferred to RAM and activated after the block is
downloaded.
4.2.3.2 Uploading blocks
Uploading blocks
Unlike download operations, an upload operation is the transfer of specific blocks or a
complete user program from the CPU to the PG/PC. The block content is here identical with
that of the last download to the CPU. Dynamic DBs form the exception, because their actual
values are transferred. An upload of blocks or of the user program from the CPU in STEP 7
does not influence CPU memory.
4.2.3.3 Deleting blocks
Deleting blocks
When you delete a block, it is deleted from load memory. In STEP 7, you can also delete
blocks with the user program (DBs also with SFC 23 "DEL_DB"). RAM used by this block is
released.
Memory concept
4-14 Manual, 12/2006 , A5E00105475-07
4.2.3.4 Compressing blocks
Compressing blocks
When data are compressed, gaps which have developed between memory objects in load
memory/RAM as a result of load/delete operations will be eliminated. This releases free
memory in a continuous block. Data compression is possible when the CPU is in RUN or in
STOP.
4.2.3.5 Promming (RAM to ROM)
Promming (RAM to ROM)
When writing the RAM content to ROM, the actual values of the DBs are transferred from
RAM to load memory to form the start values for the DBs.

Note
This function is only permitted when the CPU is in STOP mode. Load memory is cleared if
the function could not be completed due to power loss.
4.2.4 CPU memory reset and restart
CPU memory reset
After the insertion/removal of a Micro Memory Card, a CPU memory reset restores defined
conditions for CPU restart (warm start). A CPU memory reset rebuilds the CPU's memory
management. Blocks in load memory are retained. All dynamic runtime blocks are
transferred once again from load memory to work memory, in particular to initialize the data
blocks in work memory (restore initial values).
Restart (warm start)
All retentive DBs retain their actual value (non-retentive DBs are also supported by CPUs
with firmware >= V2.0.12. Non-retentive DBs receive their initial values).
The values of all retentive M, C, T are retained.
All non-retentive user data are initialized:
M, C, T, I, O with "0"
All run levels are initialized.
The process images are deleted.
Reference
Also refer to CPU memory reset by means mode selector switch in the section
Commissioning in the CPU 31xC and CPU 31x Operating Instructions.
Memory concept
Manual, 12/2006 , A5E00105475-07 4-15
4.2.5 Recipes
Introduction
A recipe represents a collection of user data. You can implement a simple recipe concept
using static DBs. In this case, the recipes should have the same structure (length). One DB
should exist per recipe.
Processing sequence
Recipe is written to load memory:
The various data records of recipes are created as static DBs in STEP 7 and then
downloaded to the CPU. Therefore, recipes only use load memory, rather than work
memory.
Working with recipe data:
SFC83 "READ_DBL" is called in the user program to copy the data record of a current
recipe from the DB in load memory to a static DB that is located in work memory. As a
result, the work memory only has to accommodate the data of one record. The user
program can now access data of the current recipe. The figure below shows how to
handle recipe data:
:
(CPU)
SFC 83 READ_DBL
SFC 84 WRlT_DBL
Work memory
Load memory
Recipe 1
Recipe n
Recipe 2
actual
recipe
(SlMATlC Micro Memory Card)

Saving a modified recipe:
The data of new or modified recipe data records generated during program execution can
be written to load memory. To do this, call SFC 84 "WRIT_DBL" in the user program. The
data written to load memory are portable and retentive on CPU memory reset. You can
backup modified records (recipes) by uploading and saving these in a single block to the
PG/PC.

Note
Active system functions SFC82 to 84 (active access to the SIMATIC Micro Memory Card)
have a distinct influence on PG functions (for example, block status, variable status,
download block, upload, open.) This typically reduces performance (compared to passive
system functions) by the factor 10.

Memory concept
4-16 Manual, 12/2006 , A5E00105475-07

Note
To prevent data losses, do not exceed this maximum of delete/write operations. Also
refer to the SIMATIC Micro Memory Card (MMC) section in the "Structure and
Communication Connections of a CPU" chapter.

Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it
is being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU
is in STOP state, and when the PG is not writing to the card. When the CPU is in STOP
mode and you cannot not determine whether or not a PG is writing to the card (e.g.,
load/delete block), disconnect the communication lines.
4.2.6 Measured value log files
Introduction
Measured values are generated when the CPU executes the user program. These values
are to be logged and analyzed.
Processing sequence
Acquisition of measured values:
The CPU writes all measured values to a DB (for alternating backup mode in several
DBs) which is located in work memory.
Measured value logging:
Before the data volume can exceed work memory capacity, you should call
SFC 84 "WRIT_DBL" in the user program to swap measured values from the DB to load
memory. The figure below shows how to handle measured value log files:
Work memory
(CPU)
(SlMATlC Micro Memory Card)
:
SFC82 CREA_DBL
Load memory
Measured value 1
Measured value 2
Measured
value n
actual
measured values
SFC84 WRlT_DBL

You can call SFC 82 "CREA_DBL" in the user program to generate new (additional) static
DBs in load memory which do not require work memory space.
Memory concept
Manual, 12/2006 , A5E00105475-07 4-17
Reference
For detailed information on SFC 82, refer to the System Software for S7-300/400, System
and Standard Functions Reference Manual, or directly to the STEP 7 Online Help.

Note
SFC 82 is terminated and an error message is generated if a DB already exists under the
same number in load memory and/or work memory.

The data written to load memory are portable and retentive on CPU memory reset.
Evaluation of measured values:
Measured value DBs saved to load memory can be uploaded and evaluated by other
communication partners (PG, PC, for example).

Note
Active system functions SFC82 to 84 (active access to the SIMATIC Micro Memory Card)
have a distinct influence on PG functions (for example, block status, variable status,
download block, upload, open.) This typically reduces performance (compared to passive
system functions) by the factor 10.

Note
For CPUs with firmware V2.0.12 or higher, you can also generate non-retentive DBs
using SFC 82 (parameter ATTRIB -> NON_RETAIN bit.)

Note
To prevent data losses, do not exceed this maximum of delete/write operations. For
further information, refer to the Technical Data of the SIMATIC Micro Memory in the
General Technical Data of your CPU.

Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it
is being accessed by a write operation. In this case, you may have to delete the SIMATIC
Micro Memory Card in RUN mode. Always remove it when power is off, or when the CPU
is in STOP state, and when the PG is not writing to the card. When the CPU is in STOP
mode and you cannot not determine whether or not a PG is writing to the card (e.g.,
load/delete block), disconnect the communication lines.

Memory concept
4-18 Manual, 12/2006 , A5E00105475-07
4.2.7 Backup of project data to SIMATIC Micro Memory Card
Function principles
Using the Save project to Memory Card and Fetch project from Memory Card functions, you
can save all project data to a SIMATIC Micro Memory Card, and retrieve these at a later
time. For this operation, the SIMATIC Micro Memory Card can be located in a CPU or in the
MMC adapter of a PG or PC.
Project data is compressed before it is saved to a SIMATIC Micro Memory Card, and
uncompressed on retrieval.

Note
In addition to project data, you may also have to store your user data on the MMC. You
should therefore first verify SIMATIC Micro Memory Card memory space.
A message warns you of insufficient memory capacity on your SIMATIC Micro Memory Card.

The volume of project data to be saved corresponds with the size of the project's archive file.

Note
For technical reasons, you can only transfer the entire contents (user program and project
data) using the Save project to memory card action.

Manual, 12/2006 , A5E00105475-07 5-1
5
5.1 Overview
Overview
This section contains detailed information about the following topics:
Cycle time
Reaction time
Interrupt response time
Sample calculations
Reference: Cycle time
You can view the cycle time of your user program on the PG. For further information, refer to
the STEP 7 Online Help, or to the Configuring Hardware and Connections in STEP 7 Manual
Reference: Execution time
can be found in the S7-300 Instruction List for CPUs 31xC and 31x. This tabular list contains
the execution times for all
STEP 7 instructions the relevant CPU can execute,
the SFCs / SFBs integrated in the CPUs,
the IEC functions which can be called in STEP 7.
5.2 Cycle time
5-2 Manual, 12/2006 , A5E00105475-07
5.2 Cycle time
5.2.1 Overview
Introduction
This section explains what we mean by the term "cycle time", what it consists of, and how
you can calculate it.
Meaning of the term cycle time
The cycle time represents the time that an operating system needs to execute a program,
that is, one OB 1 cycle, including all program sections and system activities interrupting this
cycle. This time is monitored.
Time slice model
Cyclic program processing, and therefore user program execution, is based on time shares.
To clarify these processes, let us assume that every time share has a length of precisely
1 ms.
Process image
During cyclic program processing, the CPU requires a consistent image of the process
signals. To ensure this, the process signals are read/written prior to program execution.
Subsequently, the CPU does not address input (I) and output (O) address areas directly at
the signal modules, but rather accesses the system memory area containing the I/O process
image.
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-3
Sequence of cyclic program processing
The table and figure below show the phases in cyclic program processing.
Table 5-1 Cyclic program processing
Step Sequence
1 The operating system initiates cycle time monitoring.
2 The CPU copies the values of the process image of outputs to the output modules.
3 The CPU reads the status at the inputs of the input modules and then updates the
process image of inputs.
4 The CPU processes the user program in time shares and executes program instructions.
5 At the end of a cycle, the operating system executes queued tasks, for example, loading
and deleting blocks.
6 The CPU then returns to the start of the cycle, and restarts cycle time monitoring.
1
6
2
3
4
5
PlO: Process lmage of Outputs
Pll: Process lmage of lnputs
SCC: Scan cycle check point
OpSys: Operating system
Operating system
User program
Communication
Time slices (each 1 ms)
Time slices (each 1 ms)
Process image of outputs
(PlO)
Process image of inputs
(Pll)
User program
Scan cycle check point (CCP)
Operating system (OpSys)
C
y
c
l
e

t
i
m
e

In contrast to S7-400 CPUs, the S7-300 CPUs data only allow data access from an OP / TP
(monitor and modify functions) at the scan cycle check point (Data consistency, see the
Technical Data). Processing of the user program is not interrupted by the monitor and modify
functions.
5.2 Cycle time
5-4 Manual, 12/2006 , A5E00105475-07
Extending the cycle time
Always make allowances for the extension of the cycle time of a user program due to:
Time-based interrupt processing
Process interrupt processing
Diagnostics and error processing
Communication with PGs, Operator Panels (OPs) and connected CPs (for example,
Ethernet, PROFIBUS DP)
Testing and commissioning such as status/controlling of variables or block status
functions.
Transfer and deletion of blocks, compressing user program memory
Write/read access to the Micro Memory Card, using SFC 82 to 84 in the user program
S7 communication via integrated PROFINET interface
PROFINET CBA communication by means of the PROFINET interface (system load,
SFC call, updating on the cycle control point)
PROFINET IO communication via PROFINET interface (system load)
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-5
5.2.2 Calculating the cycle time
Introduction
The cycle time is derived from the sum of the following influencing factors.
Process image update
The table below shows the time a CPU requires to update the process image (process
image transfer time). The times specified might be prolonged as a result of interrupts or CPU
communication. The process image transfer time is calculated as follows:
Table 5-2 Formula for calculating the process image (PI) transfer time
The transfer time of the process image is calculated as follows:
Base load K + number of bytes in PI in module rack 0 x (A)
+ number of bytes in PI in module rack 1 to 3 x (B)
+ number of words in PI via DP x (D)
+ number of words in PI via PROFINET x (P)
= Transfer time for the process image

Table 5-3 CPU 31xC: Data for calculating the process image (PI) transfer time
Const. Compo-
nents
CPU 312C CPU 313C CPU 313C-2 DP CPU 313C-2 PtP CPU 314C-2 DP CPU 314C-2 PtP
C Base load 150 s 100 s 100 s 100 s
A Per byte
in the
rack 0
37 s 35 s 37 s 37 s
B per byte
in module
racks 1 to
3 *
- 43 s 47 s 47 s
D
(DP
only)
Per word
in the DP
area for
the
integrated
DP
interface
- - 1 s - 1 s -
* + 60 s per rack
5.2 Cycle time
5-6 Manual, 12/2006 , A5E00105475-07
Table 5-4 CPU 31x: Data for calculating the process image (PI) transfer time
Const. Components CPU 312 CPU 314 CPU 315 CPU 317 CPU 319
K Base load 150 s 100 s 100 s 50 s 2 s
A Per byte in Rack 0 37 s 35 s 37 s 15 s 15 s
B Per byte in module
Racks 1 to 3
- 43 s* 47 s* 25 s* 22 s**
D
(DP only)
Per word in the DP
area for the
integrated DP
interface
- - 2.5 s 2.5 s 2.5 s
P
(PROFIN
ET only)
per WORD in the
PROFINET area
for the integrated
PROFINET
interface
- - 46 s 46 s 2.5 s
* + 60 s per rack
** + 21 s per rack
Extending the user program processing time
In addition to actually working through the user program, your CPU's operating system also
runs a number of processes in parallel
(such as timer management for the core operating system). These processes extend the
processing time of the user program. The table below lists the multiplication factors required
to calculate your user program processing time.
Table 5-5 Extending the user program processing time
CPU Factor
312C 1.06
313C 1.10
313C-2DP 1.10
313C-PtP 1.06
314C-2DP 1.10
314C-2PtP 1.09
312 1.06
314 1.10
315 1.10
317 1.07
319 1.05
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-7
Operating system processing time at the scan cycle check point
The table below shows the operating system processing time at the scan cycle checkpoint of
the CPUs. These times are calculated without taking into consideration times for:
Testing and commissioning routines, e.g. status/controlling of variables or block status
functions
Transfer and deletion of blocks, compressing user program memory
Communication
Writing, reading of the SIMATIC Micro Memory Card with SFC 82 to 84
Table 5-6 Operating system processing time at the scan cycle check point
CPU Cycle control at the scan cycle check point (CCP)
312C 500 s
313C 500 s
313C-2 500 s
314C-2 500 s
312 500 s
314 500 s
315 500 s
317 150 s
319 77 s

Extension of the cycle time as a result of nested interrupts
Enabled interrupts also extend cycle time. Details are found in the table below.
Table 5-7 Extended cycle time due to nested interrupts
Interrupt type Process
interrupt
Diagnostic
Interrupt
Time-of-day
interrupt
Delay interrupt Watchdog
interrupt
312C 700 s 700 s 600 s 400 s 250 s
313C 500 s 600 s 400 s 300 s 150 s
313C-2 500 s 600 s 400 s 300 s 150 s
314C-2 500 s 600 s 400 s 300 s 150 s
312 700 s 700 s 600 s 400 s 250 s
314 500 s 600 s 400 s 300 s 150 s
315 500 s 600 s 400 s 300 s 150 s
317 190 s 240 s 200 s 150 s 90 s
319 72 s 87 s 39 s 26 s 10 s
The program runtime at interrupt level must be added to this time extension.
5.2 Cycle time
5-8 Manual, 12/2006 , A5E00105475-07
Extension of the cycle time due to error
Table 5-8 Cycle time extension as a result of errors
Type of error Programming errors I/O access errors
312C 600 s 600 s
313C 400 s 400 s
313C2 400 s 400 s
314C-2 400 s 400 s
312 600 s 600 s
314 400 s 400 s
315 400 s 400 s
317 100 s 100 s
319 19 s 23 s
The interrupt OB processing time must be added to this extended time. The times required
for multiple nested interrupt/error OBs are added accordingly.
5.2.3 Different cycle times
Overview
The cycle time (Tcyc) length is not the same in every cycle. The figure below shows different
cycle times Tcyc1 and Tcyc2. Tcyc2 is longer than Tcyc1, because the cyclically executed OB1 is
interrupted by a time-of-day interrupt OB (here: OB 10).
OB1 CCP
CCP OB1
OB10
OB1
Tcyc 2 Tcyc 1
Current cycle
Upda-
ting
PlO
Upda-
ting
PlO
Upda-
ting
PlO
Upda-
ting
Pll
Upda-
ting
Pll
Upda-
ting
Pll
Next cycle Cycle after next

Block processing times may fluctuate
Fluctuation of the block processing time (e.g. OB 1) may also be a factor causing cycle time
fluctuation, due to:
conditional instructions,
conditional block calls,
different program paths,
loops etc.
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-9
Maximum cycle time
In STEP 7 you can modify the default maximum cycle time. OB80 is called on when this time
expires. In this block you can specify the CPUs response to this timeout error. The CPU
switches to STOP mode if OB80 does not exist in its memory.
5.2.4 Communication load
Configured communication load for PG/OP communication, S7 communication and PROFINET CBA
The CPU operating system continuously provides a specified percentage of total CPU
processing performance (time-sharing technology) for communication tasks. Processing
performance not required for communication is made available to other processes. In HW
Config, you can specify a communication load value between 5% and 50%. Default value is
20%.
You can use the following formula for calculating the cycle time extension factor:

100 / (100 configured communication load in %)

Time slice (1 ms)
Operating system
User program
Communications
Share can be configured
between 5% and 50%
lnterruption
of user program

Example: 20 % communication load
In your hardware configuration, you have specified a communication load of 20 %. The
calculated cycle time is 10 ms. Using the above formula, the cycle time is extended by the
factor 1.25.
Example: 50 % communication load
In your hardware configuration, you have specified a communication load of 50%. The
calculated cycle time is 10 ms. Using the above formula, the cycle time is extended by the
factor 2.
5.2 Cycle time
5-10 Manual, 12/2006 , A5E00105475-07
Physical cycle time depending on communication load
The figure below describes the non-linear dependency of the physical cycle time on
communication load. In our sample we have chosen a cycle time of 10 ms.
30 ms
25 ms
20 ms
15 ms
10 ms
5 ms
10 % 20 % 30 % 40 %
50 %
5 %
60 %
0 %
Cycle time
Communication load
The communication load can
be defined in this area

Influence on the physical cycle time
From the statistical viewpoint, asynchronous eventssuch as interruptsoccur more
frequently within the OB1 cycle when the cycle time is extended as a result of
communication load. This further extends the OB1 cycle. This extension depends on the
number of events that occur per OB1 cycle and the time required to process these events.

Note
Change the value of the "communication load" parameter to check the effects on the cycle
time at system runtime. You must consider the communication load when you set the
maximum cycle time, otherwise timing errors may occur.

Tips
Use the default setting wherever possible.
Increase this value only if the CPU is used primarily for communications and if the user
program is not time critical.
In all other situations you should only reduce this value.
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-11
5.2.5 Cycle time extension as a result of testing and commissioning functions
Runtimes
The runtimes of the testing and commissioning functions are operating system runtimes, so
they are the same for every CPU. Initially, there is no difference between process mode and
testing mode. How the cycle time is extended as a result of active testing and commissioning
functions is shown in the table below.
Table 5-9 Cycle time extension as a result of testing and commissioning functions
Function CPU 31xC/ CPU 31x
Status variable 50 s for each variable
Control variable 50 s for each variable
Block status 200 s for each monitored line
Configuration during parameter assignment
For process operation, the maximum permissible cycle load by communication is not
specified in "Cycle load by communication", but rather in "Maximum permitted increase of
cycle time as a result of testing functions during process operation". Thus, the configured
time is monitored absolutely in process mode and data acquisition is stopped if a timeout
occurs. This is how STEP 7 stops data requests in loops before a loop ends, for example.
When running in Testing mode, the complete loop is executed in every cycle. This can
significantly increase cycle time.
5.2.6 Cycle extension through Component Based Automation (CBA)
By default, the operating system of your CPU updates the PROFINET interface as well as
the DP interconnections at the cycle control point. However, if you deactivated these
automatic updates during configuration (e.g. to obtain improved capabilities of influencing the
time behavior of the CPU), you must perform the update manually. This is done by calling
SFCs 112 to 114 at the appropriate times.
Reference
Information about SFC 112 to 114 is available in the STEP 7 Online Help.
Extending the OB1 cycle time
The OB1 cycle is extended by
Increasing the number of PROFINET interconnections,
Increasing the number of remote partners,
Increasing the data volume and
Incrasing the transfer frequency

5.2 Cycle time
5-12 Manual, 12/2006 , A5E00105475-07

Note
The use of CBA with cyclical PROFINET interconnections requires the use of switches to
maintain the performance data. 100-Mbit full-duplex operation is mandatory with cyclical
PROFINET interconnections.

The following graphic shows the configuration that was used for the measurements.
lndustrial Ethernet
PROFlBUS
HMl/OPC
...
...
PROFlBUS device 16
(as DP slave)
PROFlNET
remote
node 32
PROFlBUS device 1
(as DP slave)
PROFlNET
remote
node 1
Number of observed
interconnections
in SlMATlC iMAP
or OPC: 200
PROFlNET device with
proxy functionality
(CPU 31x PN/DP)
Quantity: 16
Quantity: 32

The upper graphic displays
Incoming/outgoing remote connections
Quantity for CPU 315 and CPU 317 Quantity for CPU 319
Cyclical interconnection via Ethernet 200, scan cycle rate: Intervals of 10
ms
300, scan cycle rate: Intervals of 10
ms
Acyclic interconnection via Ethernet 100, scan cycle rate: Intervals of
500 ms
100, scan cycle rate: Intervals of 200
ms
Interconnections from the PROFINET device
with proxy functionality to the PROFIBUS
devices
16 x 4 16 x 4
Interconnections of PROFIBUS devices
among each other
16 x 6 16 x 6
5.2 Cycle time
Manual, 12/2006 , A5E00105475-07 5-13
Additional marginal conditions
The maximum cycle load through communication in the measurement is 20 %.
The lower graphic shows that the OB1 cycle is influenced by increasing the cyclical
PROFINET interconnections to remote partners at PROFINET:
0 40 80 120 160 200
0
1000
2000
3000
4000
5000
6000
7000
8000
CPU 315: OB1 cycle with 5 remote PROFlNET partners
Dependency of the OB1 cycle on the umber of interconnections
Cycle time in s
Number of cyclical CBA interconnections

Base load through PROFIBUS devices
The 16 PROFIBUS devices with their interconnections among each other generate an
additional base load of up to 1.0 ms.
Tips and notes
The upper graphic already includes the use of uniform values for the transfer frequency of all
interconnections to a partner.
The performance can drop by up to 50 % if the values are distributed to different
frequency levels.
The use of data structures and arrays in an interconnection instead of many single
interconnections with simple data structures increases the performance.
5.3 Response time
5-14 Manual, 12/2006 , A5E00105475-07
5.3 Response time
5.3.1 Overview
Definition of response time
The response time is the time between the detection of an input signal and the change of a
linked output signal.
Fluctuation width
The physical response time lies between the shortest and the longest response time. You
must always reckon with the longest response time when configuring your system.
The shortest and longest response times are shown below, to give you an idea of the
fluctuation width of the response time.
Factors
The response time depends on the cycle time and following factors:
Delay of the inputs and outputs of signal modules or integrated I/O.
Additional update times for PROFINET IO
additional DP cycle times on PROFIBUS DP
Execution in the user program
Reference
The delay times are located in the technical data of the signal modules (Module data
Manual).
Update times for PROFINET IO
If you configured your PROFINET IO system in STEP 7, STEP 7 calculates the update time
for PROFINET IO. You can then view the PROFINET IO update times on your PG.
5.3 Response time
Manual, 12/2006 , A5E00105475-07 5-15
DP cycle times in the PROFIBUS DP network
If you have configured your PROFIBUS DP master system in STEP 7, STEP 7 calculates the
typical DP cycle time to be expected. You can then view the DP cycle time of your
configuration on the PG.
The figure below gives you an overview of the DP cycle time. In this example, let us assume
that the data of each DP slave has an average length of 4 bytes.
17 ms
7 ms
6 ms
5 ms
4 ms
3 ms
2 ms
1 ms
1 2 4 8 16 32 64
Bus cycle time
min.
slave interval
Number of DP slaves;
max. number depending on CPU
Baud rate: 12 Mbps
Baud rate 1.5 Mbps

With multi-master operation on a PROFIBUS DP network, you must make allowances for the
DP cycle time at each master. That is, you will have to calculate the times for each master
separately and then add up the results.
5.3 Response time
5-16 Manual, 12/2006 , A5E00105475-07
5.3.2 Shortest response time
Conditions for the shortest response time
The figure below shows the conditions under which the shortest response time is reached.
Delay of inputs
lmmediately before reading in the Pll, the status of
the monitored input changes. This change of the input
signal is still included in the Pll.
The change of the input signal is processed by
the application program.
The response of the user program to the change
of the input signal is issued to the outputs.
Delay of outputs
R
e
s
p
o
n
s
e

t
i
m
e
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO

Calculation
The (shortest) response time is the sum of:
Table 5-10 Formula: Shortest response time
1 x process image transfer time for the inputs
+ 1 x process image transfer time for the outputs
+ 1 x program processing time
+ 1 operating system processing time at the SCC
+ I/O delay
= Shortest response time
The result is equivalent to the sum of the cycle time plus the I/O delay times.
See also
Overview (Page 5-14)
5.3 Response time
Manual, 12/2006 , A5E00105475-07 5-17
5.3.3 Longest response time
Conditions for the longest response time
The figure below shows the conditions under which the longest response time is reached.
R
e
s
p
o
n
s
e

t
i
m
e
While reading in the Pll, the status of the monitored
input changes. This change of the input signal is not
included in the Pll any longer.
The change of the input signal is included in the Pll.
The change of the input signal is processed by the
application program.
The response of the user program to the change
of the input signal is issued to the outputs.
Delay of inputs +
Twice the update time for PROFlNET lO, or
twice the DP cycle time on the PROFlBUS DP
(depending on whether PROFlNET lO or
PROFlBUS DP is being used).
Delay of inputs +
Twice the update time for PROFlNET lO, or
twice the DP cycle time on the PROFlBUS DP
(depending on whether PROFlNET lO or
PROFlBUS DP is being used).
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO
Pll
User program
CCP (OS)
PlO

5.3 Response time
5-18 Manual, 12/2006 , A5E00105475-07
Calculation
The (longest) response time is the sum of:
Table 5-11 Formula: Longest response time
2 x process image transfer time for the inputs
+ 2 x process image transfer time for the outputs
+ 2 x program processing time
+ 2 operating system processing time
+ 4 x PROFINET IO update time (only if PROFINET IO is used.)
+ 4 x DP cycle time on PROFIBUS DP (only if PROFIBUS DP is used.)
+ I/O delay
= Longest response time
Equivalent to the sum of 2 x the cycle time + I/O delay time + 4 x times the PROFINET IO
update time or 4 x times the DP cycle time on PROFIBUS DP
See also
Overview (Page 5-14)
5.3.4 Reducing the response time with direct I/O access
Reducing the response time
You can reach faster response times with direct access to the I/O in your user program, e.g.
with
L PIB or
T PQW
you can partially avoid the response times described above.

Note
You can also achieve fast response times by using process interrupts.

See also
Shortest response time (Page 5-16)
Longest response time (Page 5-17)
5.4 Calculating method for calculating the cycle/response time
Manual, 12/2006 , A5E00105475-07 5-19
Introduction
This section gives you an overview of how to calculate the cycle/response time.
Cycle time
1. Determine the user program runtime with the help of the Instruction list.
2. Multiply the calculated value by the CPU-specific factor from the table Extension of user
program processing time.
3. Calculate and add the process image transfer time. Corresponding guide values are
found in table Data for calculating process image transfer time.
4. Add the processing time at the scan cycle checkpoint. Corresponding guide values are
found in the table Operating system processing time at the scan cycle checkpoint.
5. Include the extensions as a result of testing and commissioning functions as well as
cyclical PROFINET interconnections in your calculation. These values are found in the
table Cycle time extension due to testing and commissioning functions.
The final result is the cycle time.
Extension of the cycle time as a result of interrupts and communication load
1. Multiply the cycle time by the following factor:
100 / (100 configured communication load in %)
2. Calculate the runtime of interrupt processing program sections with the help of the
instruction list. Add the corresponding value from the table below.
3. Multiply both values by the CPU-specific extension factor of the user program processing
time.
4. Add the value of the interrupt-processing program sequences to the theoretical cycle
time, multiplied by the number of triggering (or expected) interrupt events within the cycle
time.
The result is an approximation of the physical cycle time. Note down the result.
See also
Cycle extension through Component Based Automation (CBA) (Page 5-11)
5-20 Manual, 12/2006 , A5E00105475-07
Response time
Table 5-12 Calculating the response time
Shortest response time Longest response time
- Multiply the physical cycle time by factor 2.
Now add I/O delay. Now add the I/O delay plus the DP cycle times on
PROFIBUS-DP or the PROFINET IO update
times.
The result is the shortest response time. The result is the longest response time.
See also
Longest response time (Page 5-17)
Shortest response time (Page 5-16)
Calculating the cycle time (Page 5-5)
Cycle extension through Component Based Automation (CBA) (Page 5-11)
5.5 Interrupt response time
Manual, 12/2006 , A5E00105475-07 5-21
5.5.1 Overview
Definition of interrupt response time
The interrupt response time is the time that expires between the first occurrence of an
interrupt signal and the call of the first interrupt OB instruction. Generally valid: Higher-
priority interrupts take priority. This means that the interrupt response time is increased by
the program processing time of the higher-priority interrupt OBs and the interrupt OBs of
equal priority which have not yet been executed (queued).
Process/diagnostic interrupt response times of the CPUs
Table 5-13 Process and diagnostic interrupt response times
Process interrupt response times Diagnostic interrupt response
times
CPU External
min.
External
max.
Integrated I/O
max.
Min. Max.
CPU 312 0.5 ms 0.8 ms - 0.5 ms 1.0 ms
CPU 312C 0.5 ms 0.8 ms 0.6 ms 0.5 ms 1,0 ms
CPU 313C 0.4 ms 0.6 ms 0.5 ms 0.4 ms 1.0 ms
CPU 313C-2 0.4 ms 0,7 ms 0.5 ms 0.4 ms 1.0 ms
CPU 314 0.4 ms 0.7 ms - 0.4 ms 1.0 ms
CPU 314C-2 0.4 ms 0.7 ms 0.5 ms 0.4 ms 1.0 ms
CPU 315-2 DP
CPU 315-2 PN/DP
0.4 ms 0.7 ms - 0.4 ms 1.0 ms
CPU 317-2 DP
CPU 317-2 PN/DP
0.2 ms 0.3 ms - 0.2 ms 0.3 ms
CPU 319-3 PN/DP 0.06 ms 0.10 ms - 0.09 ms 0.12 ms
5-22 Manual, 12/2006 , A5E00105475-07
Calculation
The formula below show how you can calculate the minimum and maximum interrupt
response times.
Table 5-14 Process and diagnostic interrupt response times
Calculation of the minimum and maximum interrupt reaction time
Minimum interrupt reaction time of the CPU
+ Minimum interrupt reaction time of the
signal modules
+ PROFINET IO update time (only if
PROFINET IO is used.)
+ DP cycle time on PROFIBUS DP (only if
PROFIBUS DP is used.)
= Quickest interrupt reaction time
Maximum interrupt reaction time of the CPU
+ Maximum interrupt reaction time of the signal
modules
+ 2 x PROFINET IO update time (only if PROFINET
IO is used.)
+ 2 x DP cycle time on PROFIBUS DP (only if
PROFIBUS DP is used.)
The maximum interrupt reaction time is longer when
the communication functions are active. The extra
time is calculated using the following formula:
tv: 200 s + 1000 s x n%
n = Setting of the cycle load as a result of
communication
Signal modules
The process interrupt response time of signal modules is determined by the following factors:
Digital input modules
Process interrupt response time = internal interrupt preparation time + input delay
You will find these times in the data sheet for the respective digital input module.
Analog input modules
Process interrupt response time = internal interrupt preparation time + input delay
The internal interrupt preparation time for analog input modules can be neglected. The
conversion times can be found in the data sheet for the individual analog input modules.
The diagnostic interrupt response time of signal modules is equivalent to the period that
expires between the time a signal module detects a diagnostic event and the time this signal
module triggers the diagnostic interrupt. This short time can be neglected.
Process interrupt processing
Process interrupt processing begins after process interrupt OB40 is called. Higher-priority
interrupts stop process interrupt processing. Direct I/O access is executed during runtime of
the instruction. After process interrupt processing has terminated, cyclic program execution
continues or further interrupt OBs of equal or lower priority are called and processed.
See also
Overview (Page 5-1)
5.6 Sample calculations
Manual, 12/2006 , A5E00105475-07 5-23
5.5.2 Reproducibility of Time-Delay and Watchdog Interrupts
Definition of "Reproducibility"
Delay interrupt:
The period that expires between the call of the first instruction in the interrupt OB and the
programmed time of interrupt.
Watchdog interrupt:
The fluctuation width of the interval between two successive calls, measured between the
respective initial instructions of the interrupt OBs.
Reproducibility
The following times apply for the CPUs described in this manual, with the exception of CPU
319
Delay interrupt: +/- 200 s
Watchdog interrupt: +/- 200 s
The following times apply in the case of CPU 319:
Delay interrupt: +/- 140 s
Watchdog interrupt: +/- 88 s
These times only apply if the interrupt can actually be executed at this time and if not
interrupted, for example, by higher-priority interrupts or queued interrupts of equal priority.
5.6.1 Example of cycle time calculation
Design
You have configured an S7300 and equipped it with following modules in rack "0":
a CPU 314C-2
2 digital input modules SM 321; DI 32 x 24 VDC (4 bytes each in the PI)
2 digital output modules SM 322; DO 32 x 24 VDC/0.5 A (4 bytes each in the PI)
User Program
According to the Instruction List, the user program runtime is 5 ms. There is no active
communication.
5-24 Manual, 12/2006 , A5E00105475-07
Calculating the cycle time
The cycle time for the example results from the following times:
User program execution time:
approx. 5 ms x CPU-specific factor 1.10 = approx. 5.5 ms
Process image transfer time
Process image of inputs: 100 s + 8 Byte x 37 s = approx. 0.4 ms
Process image of outputs: 100 s + 8 Byte x 37 s = approx. 0.4 ms
Operating system runtime at scan cycle checkpoint:
Approx. 0.5 ms
Cycle time = 5.5 ms + 0.4 ms + 0.4 ms + 0.5 ms = 6.8 ms.
Calculation of the actual cycle time
There is no active communication.
There is no interrupt handling.
Hence, the physical cycle time is 6 ms.
Calculating the longest response time
Longest response time:
6.8 ms x 2 = 13.6 ms.
I/O delay can be neglected.
Neither PROFIBUS DP, nor PROFINET IO are being used, so you do not have to make
allowances for any DP cycle times on PROFIBUS DP or for PROFINET IO update times.
There is no interrupt handling.
5.6.2 Sample of response time calculation
Design
You have configured an S7300 and equipped it with the following modules in two racks:
a CPU 314C-2
Configuring the cycle load as a result of communication: 40 %
4 digital input modules SM 321; DI 32 x 24 VDC (4 bytes each in the PI)
3 digital output modules SM 322; DO 16 x 24 VDC/0.5 A (2 bytes each in the PI)
2 analog input modules SM 331; AI 8 x 12-bit (not in the PI)
2 analog output modules SM 332; AO 4 x 12 bit (not in the PI)
Manual, 12/2006 , A5E00105475-07 5-25
User Program
According to the instruction list, the user program runtime is 10.0 ms.
Calculating the cycle time
The cycle time for the example results from the following times:
User program execution time:
approx. 10 ms x CPU-specific factor 1.10 = approx. 11 ms
Process image transfer time
Process image of inputs: 100 s + 16 bytes x 37 s = approx. 0.7 ms
Process image of outputs: 100 s + 6 bytes x 37 s = approx. 0.3 ms
Operating system runtime at scan cycle checkpoint:
Approx. 0.5 ms
The sum of the listed times is equivalent to the cycle time:
Cycle time = 11.0 ms + 0.7 ms + 0.3 ms + 0.5 ms = 12.5 ms.
Calculation of the actual cycle time
Under consideration of communication load:
12.5 ms x 100 / (100-40) = 20.8 ms.
Thus, under consideration of time-sharing factors, the actual cycle time is 21 ms.
Calculation of the longest response time
Longest response time = 21 ms x 2 = 42 ms.
I/O delay
The maximum delay of the input digital module SM 321; DI 32 x 24 VDC is 4.8 ms per
channel.
The output delay of the digital output module SM 322; DO 16 x 24 VDC/0.5 A can be
neglected.
The analog input module SM 331; AI 8 x 12 bit was configured for an interference
suppression at 50 Hz. The result is a conversion time of 22 ms per channel. With the
eight active channels, the result is a cycle time of 176 ms for the analog input module.
The analog output module SM 332; AO 4 x 12-bit was programmed for the measuring
range of 0 ... 10 V. This gives a conversion time of 0.8 ms per channel. Since 4
channels are active, the result is a cycle time of 3.2 ms. A settling time of 0.1 ms for a
resistive load must be added to this value. The result is a response time of 3.3 ms for
an analog output.
Response times plus I/O delay:
Case 1: An output channel of the digital output module is set when a signal is received
at the digital input. The result is a response time of:
Response time = 42 ms + 4.8 ms = 46.8 ms.
Case 2: An analog value is fetched, and an analog value is output. The result is a
response time of:
Longest response time = 42 ms + 176 ms + 3.3 ms = 221.3 ms.
5-26 Manual, 12/2006 , A5E00105475-07
5.6.3 Example of interrupt response time calculation
Design
You have assembled an S7-300, consisting of one CPU 314C-2 and four digital modules in
the CPU rack. One of the digital input modules is an SM 321; DI 16 x 24 VDC; with
process/diagnostic interrupt function.
You have enabled only the process interrupt in your CPU and SM parameter configuration.
You decided not to use time-controlled processing, diagnostics or error handling. You have
configured a 20% communication load on the cycle.
You have configured a delay of 0.5 ms for the inputs of the DI module.
No activities are required at the scan cycle checkpoint.
Calculation
In this example, the process interrupt response time is based on following time factors:
Process interrupt response time of CPU 314C-2: Approx. 0.7 ms
Extension by communication according to the formula:
200 s + 1000 s x 20 % = 400 s = 0.4 ms
Process interrupt response time of SM 321; DI 16 x 24 VDC:
Internal interrupt preparation time: 0.25 ms
Input delay: 0.5 ms
The process interrupt response time is equivalent to the sum of the listed time factors:
Process interrupt response time = 0.7 ms + 0.4 ms + 0.25 ms + 0.5 ms = approx. 1.85 ms.
This calculated process interrupt response time expires between the time a signal is
received at the digital input and the call of the first instruction in OB40.

Manual, 12/2006 , A5E00105475-07 6-1
6
6.1 Standards and approvals
Introduction
Contents of general technical data:
standards and test values satisfied by modules of the S7-300 automation system
test criteria of S7-300 modules.
CE Label

The S7-300 automation system satisfies requirements and safety-related objectives
according to EC Directives listed below, and conforms with the harmonized European
standards (EN) for programmable controllers announced in the Official Journals of the
European Community:
73/23/EEC "Electrical Equipment Designed for Use within Certain Voltage Limits" (Low-
Voltage Directive)
89/336/EEC "Electromagnetic Compatibility" (EMC Directive)
94/9/EC "Equipment and protective systems intended for use in potentially explosive
atmospheres" (Explosion Protection Directive)
The EC declaration of conformity is held on file available to competent authorities at:
Siemens Aktiengesellschaft
Automation & Drives
A&D AS RD ST PLC
PO Box 1963
D-92209 Amberg
6-2 Manual, 12/2006 , A5E00105475-07
UL approval

Underwriters Laboratories Inc. complying with
UL 508 (Industrial Control Equipment)
CSA approval

Canadian Standards Association to
C22.2 No. 142 (Process Control Equipment)
or

CSA C22.2 No. 142 (Process Control Equipment)
or
HAZ. LOC.

UL 1604 (Hazardous Location)
CSA-213 (Hazardous Location)
APPROVED for use in
Class I, Division 2, Group A, B, C, D Tx;
Class I, Zone 2, Group IIC Tx
Manual, 12/2006 , A5E00105475-07 6-3
Note
Currently valid approvals can be found on the rating plate of the relevant module.

FM approval

Factory Mutual Research (FM) to
Approval Standard Class Number 3611, 3600, 3810
APPROVED for use in Class I, Division 2, Group A, B, C, D Tx;

to EN 60079-15:2003 (Electrical apparatus for potentially explosive atmospheres; Type of
protection "n")
II 3 G EEx nA II Parts 4..6
Tick-mark for Australia

The S7-300 automation system satisfies requirements of standards to
AS/NZS 2064 (Class A).
IEC 61131
The S7-300 automation system satisfies requirements and criteria to
IEC 61131-2 (Programmable Controllers, Part 2: Equipment requirements and tests).
6-4 Manual, 12/2006 , A5E00105475-07
Marine approval
Classification societies:
ABS (American Bureau of Shipping)
BV (Bureau Veritas)
DNV (Det Norske Veritas)
GL (Germanischer Lloyd)
LRS (Lloyds Register of Shipping)
Class NK (Nippon Kaiji Kyokai)
Use in industrial environments
SIMATIC products are designed for industrial applications.
Table 6-1 Use in industrial environments
Field of
application
Noise emission requirements Noise immunity requirements
Industry EN 61000-6-4: 2001 EN 61000-6-2: 2001
Use in residential areas
To operate an S7-300 in a residential area, it's RF emission must comply with Limit Value
Class B to EN 55011.
The following measures are recommended to ensure the interference complies with limit
value class B:
S7-300 installation in grounded switch cabinets / cubicles
Use of noise filters in the supply lines

Warning
Personal injury and damage to property may occur.
In potentially explosive environments, there is a risk of injury or damage if you disconnect
any connectors while the S7-300 is in operation.
Always isolate the S7-300 operated in such areas before you disconnect and connectors.

6.2 Electromagnetic compatibility
Manual, 12/2006 , A5E00105475-07 6-5
Definition
Electromagnetic compatibility (EMC) is the ability of an electrical installation to function
satisfactorily in its electromagnetic environment without interfering with that environment.
The S7-300 modules also satisfy requirements of EMC legislation for the European domestic
market. Compliance of the S7-300 system with specifications and directives on electric
design is prerequisite.
Pulseshaped disturbance
The table below shows the EMC compatibility of S7 modules in areas subject to pulse-
shaped disturbance.

Pulse-shaped disturbance Test voltage corresponds with degree
of severity
Electrostatic discharge
to IEC 61000-4-2
Air discharge: 8 kV
Contact discharge 4 kV
3
2
Burst pulses (high-speed
transient disturbance)
to IEC 61000-4-4.
2 kV (power supply lines)
2 kV (signal lines > 3 m)
1 kV (signal lines < 3 m)
3
3
High-energy single pulse (surge) to IEC 61000-4-5
External protective circuit required
(refer to S7-300 Automation System, Hardware and Installation, Chapter
"Lightning and overvoltage protection")
asymmetric coupling 2 kV (power supply lines)
DC with protective elements
2 kV (signal/ data line only > 3 m),
with protective elements as required
symmetric coupling 1 kV (power supply lines) DC with
protective elements

3
Additional measures
When connecting an S7-300 system to the public network, always ensure compliance with
Limit Value Class B to EN 55022.
6-6 Manual, 12/2006 , A5E00105475-07
Sinusoidal disturbance
The table below shows the EMC compatibility of S7-300 modules in areas subject to
sinusoidal disturbance.

Sinusoidal disturbance Test values corresponds with
degree of severity
RF radiation
(electromagnetic fields)
to IEC 61000-4-3
10 V/m, with 80% amplitude modulation of
1 kHz in the 80 MHz to 1000 MHz range
10 V/m, with 50% pulse modulation at
900 MHz

3
RF conductance on cables
and cable shielding
to IEC 61000-4-6
Test voltage 10 V, with 80% amplitude
modulation of 1 kHz in the 9 MHz to 80 MHz
range

3
Emission of radio interference
Electromagnetic interference to EN 55011: Limit Class A, Group 1 (measured at a distance
of 10 m.)

Frequency Noise emission
30 MHz to 230 MHz < 40 dB (V/m)Q
230 MHz to 1000 MHz < 47 dB (V/m)Q

Noise emission via AC mains to EN 55011: Limit value class A, Group 1.

0.15 MHz to 0.5 MHz < 79 dB (V/m)Q
< 66 dB (V/m)M
0.5 MHz to 5 MHz < 73 dB (V/m)Q
< 60 dB (V/m)M
< 60 dB (V/m)M
6.3 Transportation and storage conditions for modules
Manual, 12/2006 , A5E00105475-07 6-7
Introduction
The shipping and storage conditions of S7-300 modules surpass requirements to IEC 61131-
2. The data below apply to modules shipped or put on shelf in their original packing.
The modules are compliant with climatic conditions to IEC 60721-3-3, Class 3K7 (storage),
and with IEC 60721-3-2, Class 2K4 (shipping.)
Mechanical conditions are compliant with IEC 60721-3-2, Class 2M2.
Shipping and storage conditions for modules

Type of condition Permissible range
Free fall (in shipping package) 1 m
Temperature - 40 C to + 70 C
Barometric pressure 1080 hPa to 660 hPa (corresponds with an altitude
of -1000 m to 3500 m)
Relative humidity 10% to 95%, no condensation
Sinusoidal oscillation to
IEC 60068-2-6
5 Hz to 9 Hz: 3.5 mm
9 Hz to 150 Hz: 9.8 m/s
2

Shock to IEC 60068-2-29 250 m/s
2
, 6 ms, 1000 shocks
6.4 Mechanical and climatic environmental conditions for S7-300 operation
Operating conditions
S7-300 systems are designed for stationary use in weather-proof locations. The operating
conditions surpass requirements to DIN IEC 60721-3-3.
Class 3M3 (mechanical requirements)
Class 3K3 (climatic requirements)
Use with additional measures
The S7-300 may not be used under the conditions outlined below without taking additional
measures:
at locations with a high degree of ionizing radiation
in aggressive environments caused, for example, by
the development of dust
corrosive vapors or gases
strong electric or magnetic fields
in installations requiring special monitoring, for example
elevators
electrical plants in potentially hazardous areas
An additional measure could be an installation of the S7-300 in a cabinet or housing.
6-8 Manual, 12/2006 , A5E00105475-07
Mechanical environmental conditions
The table below shows the mechanical environmental conditions in the form of sinusoidal
oscillations.

Frequency band Continuous Infrequently
10 Hz f 58 Hz 0.0375 mm amplitude 0.75 mm amplitude
58 Hz f 150 Hz 0.5 g constant acceleration 1 g constant acceleration

Reducing vibrations
If your S7-300 modules are exposed to severe shock or vibration, take appropriate measures
to reduce acceleration or the amplitude.
We recommend the installation of the S7-300 on damping materials (for example, rubber-
bonded-to-metal mounting.)
Test of mechanical environmental conditions
The table below provides important information with respect to the type and scope of the test
of ambient mechanical conditions.

Condition tested Test Standard Comment
Vibration Vibration test to IEC
60068-2-6 (sinusoidal)
Type of oscillation: Frequency sweeps with a rate of change of 1
octave/minute.
10 Hz f 58 Hz, constant amplitude 0.075 mm
58 Hz f 150 Hz, constant acceleration 1 g
Duration of oscillation: 10 frequency sweeps per axis at each of three
vertically aligned axes
Shock Shock, tested to
IEC 60068-2-27
Type of shock: half-sine
Severity of shock: 15 g peak value, 11 ms duration
Direction of shock: 3 shocks in each direction (+/-) at each of three
Continuous shock Shock, tested to
IEC 60068-2-29
Shock direction: 1000 shocks in each direction (+/-) at each of three
6.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage of S7-300
Manual, 12/2006 , A5E00105475-07 6-9
Climatic environmental conditions
The S7-300 may be operated on following environmental conditions:

Environmental conditions Permissible range Comments
Temperature:
horizontal mounting position:
vertical mounting position:

0C to 60C
0C to 40C

Relative humidity 10 % to 95 % No condensation, corresponds to relative
humidity (RH) Class 2 to IEC 61131, Part 2
Barometric pressure 1080 hPa to 795 hPa Corresponds with an altitude of -1000 m to
2000 m
Concentration of pollutants SO2: < 0.5 ppm;
RH < 60 %, no condensation
H2S: < 0.1 ppm;
Test: 10 ppm; 4 days

Test: 1 ppm; 4 days
6.5 Specification of dielectric tests, protection class, degree of protection,
and rated voltage of S7-300
Test voltage
Proof of dielectric strength must be provided in the type test at a test voltage to IEC 61131-2:

Circuits with rated voltage Ve to other circuits
or ground.
Test voltage
< 50 V 500 VDC
< 150 V 2500 VDC
< 250 V 4000 VDC
Protection class
Protection class I to IEC 60536, i.e., a protective conductor must be connected to the
mounting rail!
Protection against the ingress of foreign matter and water
Degree of protection IP 20 to IEC 60529, i.e., protection against contact with standard
probes.
No protection against the ingress of water.
6.6 Rated voltages of S7-300
6-10 Manual, 12/2006 , A5E00105475-07
Rated operating voltages
The S7-300 modules operate at different rated voltages. The table shows the rated voltages
and corresponding tolerances.

Rated voltages Tolerance
24 VDC 20.4 VDC to 28.8 VDC
120 VAC 93 VAC to 132 VAC

Manual, 12/2006 , A5E00105475-07 7-1
7
7.1 General technical data
7.1.1 Dimensions of CPU 31xC
Each CPU features the same height and depth, only the width dimensions differ.
Height: 125 mm
Depth: 115 mm, or 180 mm with opened front cover.
Width of CPU

CPU Width
CPU 312C 80 mm
CPU 313C 120 mm
CPU 313C-2 PtP 120 mm
CPU 313C-2 DP 120 mm
CPU 314C-2 PtP 120 mm
CPU 314C-2 DP 120 mm
7-2 Manual, 12/2006 , A5E00105475-07
7.1.2 Technical data of the Micro Memory Card
Plug-in SIMATIC Micro Memory Cards
The following memory modules are available:
Table 7-1 Available SIMATIC Micro Memory Cards
Type Order number Required for a firmware update via
SIMATIC Micro Memory Card
Micro Memory Card 64 KB 6ES7 953-8LFxx-0AA0
Micro Memory Card 128 KB 6ES7 953-8LGxx-0AA0
Micro Memory Card 512 KB 6ES7 953-8LJxx-0AA0
Micro Memory Card 2 MB 6ES7 953-8LLxx-0AA0 Minimum requirement for CPUs without DP
interface
Micro Memory Card 4 MB 6ES7 953-8LMxx-0AA0 Minimum requirement for CPUs without DP
interface (except CPU 319)
Micro Memory Card 8 MB
1)
6ES7 953-8LPxx-0AA0 Minimum requirements for the CPU 319
1
If you plug in the CPU 312C or CPU 312, you cannot use this SIMATIC Micro Memory
Card.
Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Number of blocks that can be stored on the SIMATIC Micro Memory Card depends on the
capacity of the SIMATIC Micro Memory Card being used The maximum number of blocks
that can be loaded is therefore limited by the capacity of your SIMATIC Micro Memory Card
(including blocks generated with the "CREATE DB" SFC)
Table 7-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Size of SIMATIC Micro Memory Card Maximum number of blocks that can be loaded
64 KB 768
128 KB 1024
512 KB
2 MB
4 MB
8 MB
Here the maximum number of blocks that can be loaded for the
specific CPU is less than the number of blocks that can be stored on
the SIMATIC Micro Memory Card.
Refer to the corresponding specifications of a specific CPU to
determine the maximum number of blocks that can be loaded.

7.2 CPU 312C
Manual, 12/2006 , A5E00105475-07 7-3
7.2 CPU 312C
Technical data
Table 7-3 Technical data of CPU 312C
Technical data
CPU and version
Order no. [MLFB] 6ES7 312-5BE03-0AB0
Hardware version 01
Firmware version V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7 V 5.1 + SP
3 or later)
Memory
Work memory
Integrated 32 KB
Expandable No
Load memory Pluggable by means of Micro Memory Card
(max. 4 MB)
Data storage life on the Micro Memory Card
(following final programming)
At least 10 years
Buffering Guaranteed by Micro Memory Card
(maintenance-free)
Execution times
Processing times of
Bit operations Min. 0.2 s
Word instructions Min. 0.4 s
Fixed-point arithmetic Min. 5 s
Floating-point arithmetic Min. 6 s
Timers/counters and their retentive address areas
S7 counters 128
Retentivity Configurable
Default From C 0 to C 7
Counting range 0 to 999
IEC Counters Yes
Type SFB
Number Unlimited (limited only by work memory size)
S7 timers 128
Default Not retentive
Timer range 10 ms to 9990 s
IEC timers Yes
Type SFB
7.2 CPU 312C
7-4 Manual, 12/2006 , A5E00105475-07
Technical data
Data areas and their retentive address areas
Bit memory 128 bytes
Preset retentive address areas MB0 to MB15
Clock flag bits 8 (1 memory byte)
Data blocks Max. 511
(in the 1 to 511 range of numbers)
Size Max. 16 KB
Non-retain support (configurable retentivity) Yes
Local data per priority class Max. 256 bytes
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
Micro Memory Card.
OBs See the Instruction List
Size Max. 16 KB
Number of free-cycle OBs 1 (OB 1)
Number of time-of-day interrupt OBs 1 (OB 10)
Number of time-delay interrupt OBs 1 (OB 20)
Number of watchdog interrupts 1 (OB 35)
Number of process interrupt OBs 1 (OB 40)
Number of startup OBs 1 (OB 100)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87)
Number of synchronous error OBs 2 (OB 121, 122)
Nesting depth
Per priority class 8
Additional within an error OB 4
FBs
Number, max. 1024
Size Max. 16 KB
FCs
Number, max. 1024
Size Max. 16 KB
Address areas (I/O)
Total I/O address area
Inputs 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing)
I/O process image
Inputs 128 bytes
Outputs 128 bytes
7.2 CPU 312C
Manual, 12/2006 , A5E00105475-07 7-5
Technical data
Digital channels
Integrated channels (DI) 10
Integrated channels (DO) 6
Inputs 266
Outputs 262
Inputs, central 266
Outputs, central 262
Analog channels
Integrated channels (AI) None
Integrated channels (AO) None
Inputs 64
Outputs 64
Inputs, central 64
Outputs, central 64
Removal
Racks Max. 1
Modules per rack Max. 8
Number of DP masters
Integrated None
Via CP 4
Operable function modules and communication
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 4
Time
Clock Yes (SW clock)
Buffered No
Accuracy Deviation per day < 15 s
Behavior of the realtime clock after POWER
ON
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Operating hours counter 1
Number 0
Value range 2
31
hours
(if SFC 101 is used)
Granularity 1 hour
Retentive Yes; must be manually restarted after every
restart
Time synchronization Yes
In the AS Master
On MPI Master/slave
7.2 CPU 312C
7-6 Manual, 12/2006 , A5E00105475-07
Technical data
S7 message functions
Number of stations that can be logged on for
signaling functions
Max. 6
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
Simultaneously enabled interrupt S blocks Max. 20
Test and startup functions
Status/control variables Yes
Variable Inputs, outputs, memory bits, DBs, timers,
counters
Number of variables
Of those as status variable
Of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Variable Inputs, outputs
Number of variables Max. 10
Block status Yes
Single-step Yes
Breakpoint 2
Diagnostics buffer Yes
Number of entries (not configurable) Max. 100
Communication functions
PG/OP communication Yes
Global data communication Yes
Number of GD circuits 4
Number of GD packets
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Length of GD packets
Consistent data
Max. 22 bytes
22 bytes
S7 basic communication Yes
User data per job
Consistent data
Max. 76 bytes
76 bytes (for X_SEND or X_RCV)
64 bytes (for X_PUT or X_GET as the server)
S7 communication
As server Yes
User data per job
Consistent data
Max. 180 bytes (with PUT/GET)
64 bytes
S5-compatible communication Yes (via CP and loadable FCs)
Number of connections Max. 6
7.2 CPU 312C
Manual, 12/2006 , A5E00105475-07 7-7
Technical data
Can be used for

PG communication
Reserved (default)
Configurable
Max. 5
1
From 1 to 5
OP communication
Reserved (default)
Configurable
Max. 5
1
From 1 to 5
S7-based communication
Reserved (default)
Configurable
Max. 2
0
From 0 to 2
Routing No
Interfaces
1st interface
Type of interface Integrated RS485 interface
Physics RS 485
Electrically isolated No
Interface power supply
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
Point-to-point connection No
MPI
Services
Routing No
S7 communication
As server
As client

Yes
No
Transmission rates Max. 187.5 kbps
Programming
Programming language LAD/FBD/STL
Instruction set See the Instruction List
Nesting levels 8
System functions (SFC) See the Instruction List
System function blocks (SFB) See the Instruction List
User program protection Yes
Integrated I/O
Default addresses of the integrated
Digital inputs
Digital outputs

124.0 to 125.1
124.0 to 124.5
7.2 CPU 312C
7-8 Manual, 12/2006 , A5E00105475-07
Technical data
Integrated functions
Counters 2 channels (see the Manual Technological
Functions)
Frequency counters 2 channels, max. 10 kHz (see the Manual
Technological Functions)
Cycle duration measurement 2 channels (see the Manual Technological
Functions)
Pulse outputs 2 channels for pulse width modulation, max. 2.5
kHz (see the Manual Technological Functions)
Controlled positioning No
Integrated "Controlling" SFB No
Dimensions
Mounting dimensions W x H x D (mm) 80 x 125 x 130
Weight 409 g
Voltages and currents
Power supply (rated value) 24 VDC
Permissible range 20.4 V to 28.8 V
Current consumption (no-load operation) Typically 60 mA
Inrush current Typically 11 A
Power consumption (nominal value) 500 mA
I
2
t 0.7 A
2
s
External fusing of power supply lines
(recommended)
LS switch Type C min. 2 A,
LS switch Type B min. 4 A
Power loss Typically 6 W
Reference
In Chapter Specifications of the integrated I/O you can find
Under Digital inputs of CPUs 31xC and Digital outputs of CPUs 31xC the technical data
of integrated I/Os.
the block diagrams of the integrated I/Os under Arrangement and usage of integrated
I/Os.
7.3 CPU 313C
Manual, 12/2006 , A5E00105475-07 7-9
7.3 CPU 313C
Technical data
Table 7-4 Technical data of CPU 313C
Technical data
CPU and version
Order no. [MLFB] 6ES7 313-5BF03-0AB0
Hardware version 01
(please use previous CPU for STEP 7 V 5.1 + SP
3 or later)
Memory
Work memory
Integrated 64 KB
Expandable No
Load memory Pluggable by means of Micro Memory Card (max.
8 MB)
At least 10 years
(maintenance-free)
Execution times
Processing times of
S7 counters 256
IEC Counters Yes
Type SFB
S7 timers 256
7.3 CPU 313C
7-10 Manual, 12/2006 , A5E00105475-07
Technical data
IEC timers
Yes
Type SFB
Size Max. 16 KB
Non-retain support (configurable retentivity) Yes
Blocks
Micro Memory Card.
Size Max. 16 KB
Nesting depth
FBs
Number, max. 1024
Size Max. 16 KB
FCs
Number, max. 1024
Size Max. 16 KB
Address areas (I/O)
7.3 CPU 313C
Manual, 12/2006 , A5E00105475-07 7-11
Technical data
I/O process image
Inputs 128 bytes
Outputs 128 bytes
Digital channels
Integrated channels (DI) 24
Integrated channels (DO) 16
Inputs 1016
Outputs 1008
Inputs, central 1016
Analog channels
Integrated channels (AI) 4+1
Integrated channels (AO) 2
Inputs 253
Outputs 250
Inputs, central 253
Removal
Racks Max. 4
Modules per rack Max. 8; max. 7 in rack 3
Integrated None
Via CP 4
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 6
Time
Clock Yes (HW clock)
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of
40 C)
Behavior of the clock on expiration of the
buffered period
Number 0
Range of values 2
31
hours
Granularity 1 hour
restart
7.3 CPU 313C
7-12 Manual, 12/2006 , A5E00105475-07
Technical data
In the AS Master
On MPI Master/slave
signaling functions
Max. 8
communication)
counters
Number of variables
of those as status variable
of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Block status Yes
Single-step Yes
Breakpoint 2
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Consistent data
Max. 22 bytes
22 bytes
User data per job
Consistent data
Max. 76 bytes
S7 communication
As server Yes
As client Yes (via CP and loadable FBs)
User data per job
Consistent data
64 bytes
7.3 CPU 313C
Manual, 12/2006 , A5E00105475-07 7-13
Technical data
Can be used for
PG communication
Reserved (default)
Configurable
Max. 7
1
From 1 to 7
OP communication
Reserved (default)
Configurable
Max. 7
1
From 1 to 7
Reserved (default)
Configurable
Max. 4
0
From 0 to 4
Routing No
Interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
PtP communication No
MPI
Services
Routing No
S7 communication
As server
As client

Yes
No (but with CP and loadable FB)
Programming
Nesting levels 8
7.3 CPU 313C
7-14 Manual, 12/2006 , A5E00105475-07
Technical data
Integrated I/O
Digital inputs
Digital outputs
Analog inputs
Analog outputs

124.0 to 126.7
124.0 to 125.7
752 to 761
752 to 755
Counters 3 channels (see the Manual Technological
Functions)
Frequency counters 3 channels up to max. 30 kHz (see the
Technological Functions manual)
Cycle duration measurement 3 channels (see the Manual Technological
Functions)
Pulse outputs 3 channels pulse-width modulation up to max.
2.5 kHz (see Technological Functions manual)
Integrated "Controlling" SFB PID controller (see the manual Technological
Functions)
Dimensions
Weight 660 g
Power consumption (nominal value) 700 mA
I
2
t 0.7 A
2
s
(recommended)
LS switch Type C min. 2 A,
LS switch Type B min. 4 A,
Reference
The specifications of integrated I/O under Digital inputs of CPUs 31xC, Digital outputs of
CPUs 31xC, Analog inputs of CPUs 31xC and Analog outputs of CPUs 31xC.
I/Os.
7.4 CPU 313C-2 PtP and CPU 313C-2 DP
Manual, 12/2006 , A5E00105475-07 7-15
Technical data
Table 7-5 Technical data for CPU 313C-2 PtP/ CPU 313C-2 DP
Technical data
CPU 313C-2 PtP CPU 313C-2 DP
CPU and version CPU 313C-2 PtP CPU 313C-2 DP
Order no. [MLFB] 6ES7 313-6BF03-0AB0 6ES7 313-6CF03-0AB0
Hardware version 01 01
Firmware version V2.6 V2.6
Associated programming package STEP 7 V 5.2 + SP 1 + HSP or
higher
(please use previous CPU for STEP
7 V 5.1 + SP 3 or later)
STEP 7 V 5.2 + SP 1 + HSP or higher
(please use previous CPU for STEP 7
V 5.1 + SP 3 or later)
Memory CPU 313C-2 PtP CPU 313C-2 DP
Work memory
Integrated 64 Kbytes
Expandable No
Load memory Pluggable by means of Micro Memory Card (max. 8 MB)
Data storage life on the
Micro Memory Card
At least 10 years
Buffering Guaranteed by Micro Memory Card (maintenance-free)
Execution times CPU 313C-2 PtP CPU 313C-2 DP
Processing times of
Bit operations min. 0.1 s
Word instructions min. 0.2 s
Fixed-point arithmetic min. 2 s
Floating-point arithmetic min. 3 s
Timers/counters and their retentive
address areas
S7 counters 256
IEC Counters Yes
Type SFB
Number unlimited (limited only by work memory size)
S7 timers 256
default Not retentive
7-16 Manual, 12/2006 , A5E00105475-07
Technical data
IEC timers Yes
Type SFB
Data areas and their retentive address
areas
Size max. 16 KB
Non-retain support (configurable
retentive address areas)
Yes
Local data per priority class max. 510 bytes
Blocks CPU 313C-2 PtP CPU 313C-2 DP
The maximum number of blocks that can be loaded may be reduced if you
are using another Micro Memory Card.
OBs see the Instruction List
Size max. 16 KB
Number of DPV1 interrupt OBs - 3 (OB 55, 56, 57)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87) 5 (OB 80, 82, 85, 86, 87)
Nesting depth
FBs
Number, max. 1024
Size max. 16 KB
FCs
Number, max. 1024
Size max. 16 KB
Manual, 12/2006 , A5E00105475-07 7-17
Technical data
Address areas (I/O)
Inputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Distributed
Inputs
Outputs

none
none

1006 bytes
1006 bytes
I/O process image
Inputs 128 bytes 128 bytes
Outputs 128 bytes 128 bytes
Digital channels
Integrated channels (DI) 16 16
Integrated channels (DO) 16 16
Inputs 1008 8064
Outputs 1008 8064
Inputs, central 1008 1008
Outputs, central 1008 1008
Analog channels
Integrated channels None None
Integrated channels None None
Inputs 248 503
Outputs 248 503
Removal CPU 313C-2 PtP CPU 313C-2 DP
Racks Max. 4
Modules per rack max. 8; max. 7 in rack 3
Integrated No 1
Via CP 4 4
Operable function modules and
communication processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 6
Time CPU 313C-2 PtP CPU 313C-2 DP
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of 40 C)
Behavior of the clock on expiration of
the buffered period
The clock keeps running, continuing at the time-of-day it had when power was
switched off.
7-18 Manual, 12/2006 , A5E00105475-07
Technical data
Number 0
Range of values 2
31
hours
Granularity 1 hour
Retentive Yes; must be manually restarted after every restart
In the AS Master
On MPI Master/slave
On DP - Master/slave
(only time slave if DP slave)
S7 message functions CPU 313C-2 PtP CPU 313C-2 DP
Number of stations that can log in for
signaling functions (e.g. OS)
Max. 8
(depends on the number of connections configured for PG / OP and S7 basic
communication)
Simultaneously enabled interrupt S
blocks
Max. 20
Test and startup functions CPU 313C-2 PtP CPU 313C-2 DP
Variable Inputs, outputs, memory bits, DBs, timers, counters
Number of variables
Max. 30
Max. 30
Max. 14
Force Yes
Block status Yes
Single-step Yes
Breakpoint 2
Communication functions CPU 313C-2 PtP CPU 313C-2 DP
Global Data Communication Yes
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Consistent data
max. 22 bytes
22 bytes
Manual, 12/2006 , A5E00105475-07 7-19
Technical data
Yes (server)
User data per job
Consistent data
max. 76 bytes
S7 communication
As server Yes
User data per job
Consistent data
max. 180 bytes (with PUT/GET)
64 bytes
can be used for
PG communication
Reserved (default)
Configurable
Max. 7
1
from 1 to 7
OP communication
Reserved (default)
Configurable
max. 7
1
from 1 to 7
Reserved (default)
Configurable
Max. 4
0
From 0 to 4
Routing No Max. 4
Interfaces CPU 313C-2 PtP CPU 313C-2 DP
1st interface
Physics RS 485
electrically isolated No
Interface power supply (15 to 30 VDC) Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
MPI
Services
Routing No Yes
S7 communication
As server
As client

Yes
No (but via CP and loadable FBs)
7-20 Manual, 12/2006 , A5E00105475-07
Technical data
2nd interface
Type of interface Integrated RS422/RS485 interface Integrated RS485 interface
Physics RS 422/485 RS 485
Electrically isolated Yes Yes
Interface power supply (15 to 30 VDC) No Max. 200 mA
Number of connections None 8
Functionality
MPI No No
PROFIBUS DP No Yes
Point-to-point connection Yes No
DP master
Number of connections 8
Services
Routing Yes
Global data communication No
S7 basic communication Yes (only I blocks)
S7 communication Yes (only server; configured unilateral
connection)
Constant bus cycle time No
Isochronous mode No
SYNC/FREEZE Yes
Enable/disable DP slaves Yes
DPV1 Yes
Transmission rates Up to 12 Mbaud
Number of DP slaves per station Max. 32
Address area Max. 1 KB I / 1 KB O
User data per DP slave max. 244 bytes I / 244 bytes O
DP slave
Services
Routing Yes (only if interface is active)
S7 basic communication No
connection)
Direct data exchange Yes
Automatic baud rate search Yes (only if interface is passive)
Intermediate memory 244 bytes I / 244 bytes O
Address areas Max. 32, with max. 32 bytes each
DPV1 No
Manual, 12/2006 , A5E00105475-07 7-21
Technical data
GSD file The latest GSD file is available at:
http://automation.siemens.com/csi/gsd
Transmission rates 38.4 Kbaud half duplex
19.2 Kbaud full duplex

Cable length Max. 1200 m
User program can control the interface Yes
The interface can trigger a break or an
interrupt in the user program
Yes (message with break ID)
Protocol driver 3964(R); ASCII
Programming CPU 313C-2 PtP CPU 313C-2 DP
Instruction set see the Instruction List
Nesting levels 8
System functions (SFC) see the Instruction List
System function blocks (SFB) see the Instruction List
Integrated I/O CPU 313C-2 PtP CPU 313C-2 DP
Digital inputs
Digital outputs

124.0 to 125.7
124.0 to 125.7
Counters 3 channels (see the Technological Functions manual)
Frequency counters 3 channels up to max. 30 kHz (see the Technological Functions manual)
Cycle duration measurement 3 channels (see the Manual Technological Functions)
Pulse outputs 3 channels pulse-width modulation up to max. 2.5 kHz (see the manual
Integrated "Controlling" SFB PID controller (see the manual Technological Functions)
Dimensions CPU 313C-2 PtP CPU 313C-2 DP
Weight approx. 566 g
Voltages and currents CPU 313C-2 PtP CPU 313C-2 DP
Inrush current Typically. 11 A
Power consumption (nominal value) 700 mA 900 mA
I
2
t 0.7 A
2
s
(recommended)
LS switch type B: min. 4 A, type C: min. 2 A
7-22 Manual, 12/2006 , A5E00105475-07
Reference
under Digital inputs of CPUs 31xC and Digital outputs of CPUs 31xC the technical data of
integrated I/Os.
I/Os.

Technical Data
Table 7-6 Technical data of CPU 314C-2 PtP and CPU 314C-2 DP
Technical data
CPU and version CPU 314C-2 PtP CPU 314C-2 DP
Order no. [MLFB] 6ES7 314-6BG03-0AB0 6ES7 314-6CG03-0AB0
Hardware version 01 01
Firmware version V2.6 V2.6
STEP 7 V 5.2 + SP 1 + HSP or higher
Memory CPU 314C-2 PtP CPU 314C-2 DP
Work memory
Integrated 96 KB
Expandable No
Capacity of retentive memory for
retentive data blocks
64 KB
Load memory Pluggable by means of SIMATIC Micro Memory Card (max. 8 Mbytes)
Data storage life on the MMC
At least 10 years
Buffering Guaranteed by SIMATIC MMC (maintenance-free)
Execution times CPU 314C-2 PtP CPU 314C-2 DP
Processing times of
Manual, 12/2006 , A5E00105475-07 7-23
Technical data
Timers/counters and their retentive
address areas
S7 counters 256
Default from C 0 to C 7
IEC Counters Yes
Type SFB
S7 timers 256
IEC timers Yes
Type SFB
Data areas and their retentive address
areas
Size max. 16 KB
Non-retain support (configurable
retentive address areas)
Yes
Blocks CPU 314C-2 PtP CPU 314C-2 DP
The maximum number of blocks that can be loaded may be reduced if you are
using another MMC.
Size max. 16 KB
Number of time-of-day interrupt
OBs
1 (OB 10)
Number of DPV1 interrupt OBs - 3 (OB 55, 56, 57)
Number of asynchronous error OBs 4 (OB 80, 82, 85, 87) 5 (OB 80, 82, 85, 86, 87)
7-24 Manual, 12/2006 , A5E00105475-07
Technical data
Nesting depth
FBs
Number, max. 1024
Size max. 16 KB
FCs
Number, max. 1024
Size max. 16 KB
Address areas (I/O) CPU 314C-2 PtP CPU 314C-2 DP
Inputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Outputs 1024 bytes (user-specific addressing) 1024 bytes (user-specific addressing)
Distributed
Inputs
Outputs

none
none

979 bytes
986 bytes
I/O process image
Inputs 128 bytes 128 bytes
Outputs 128 bytes 128 bytes
Digital channels
Integrated channels (DI) 24 24
Integrated channels (DO) 16 16
Inputs 1016 7856
Outputs 1008 7904
Analog channels
Integrated channels (AI) 4 + 1 4 + 1
Integrated channels (AO) 2 2
Inputs 253 494
Outputs 250 495
Removal CPU 314C-2 PtP CPU 314C-2 DP
Racks Max. 4
Modules per rack max. 8; max. 7 in rack 3
Integrated No 1
Via CP 4 4
Manual, 12/2006 , A5E00105475-07 7-25
Technical data
Operable function modules and
communication processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
Time CPU 314C-2 PtP CPU 314C-2 DP
Buffered Yes
Buffered period Typically 6 weeks (at an ambient temperature of 40 C)
Behavior of the clock on expiration
of the buffered period
The clock keeps running, continuing at the time-of-day it had when power was
switched off.
Number 0
Value range 2
31
hours
Granularity 1 hour
Retentive Yes; must be manually restarted after every restart
In the AS Master
On MPI Master/slave
On DP - Master/slave
S7 message functions CPU 314C-2 PtP CPU 314C-2 DP
Number of stations that can log in for
signaling functions (e.g. OS)
Max. 12
(depends on the number of connections configured for PG / OP and S7 basic
communication)
Simultaneously enabled interrupt S
blocks
Max. 40
Test and startup functions CPU 314C-2 PtP CPU 314C-2 DP
Variable Inputs, outputs, memory bits, DBs, timers, counters
Number of variables
of those as status variable
of those as control variable
Max. 30
Max. 30
Max. 14
Force Yes
Block status Yes
Single-step Yes
Breakpoint 2
7-26 Manual, 12/2006 , A5E00105475-07
Technical data
Diagnostics buffer
Yes
Communication functions CPU 314C-2 PtP CPU 314C-2 DP
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Consistent data
max. 22 bytes
22 bytes
User data per job
Consistent data
max. 76 bytes
S7 communication
As server Yes
User data per job
Consistent data
64 bytes
can be used for
PG communication
Reserved (default)
Configurable
Max. 11
1
from 1 to 11
OP communication
Reserved (default)
Configurable
Max. 11
1
from 1 to 11
Reserved (default)
Configurable
Max. 8
0
from 0 to 8
Routing No Max. 4
Interfaces CPU 314C-2 PtP CPU 314C-2 DP
1st interface
Physics RS 485
electrically isolated No
Manual, 12/2006 , A5E00105475-07 7-27
Technical data
Functionality

MPI Yes
PROFIBUS DP No
MPI
Services
Routing No Yes
S7 communication
As server
As client

Yes
Transmission rates max. 187.5 kbps
2nd interface CPU 314C-2 PtP CPU 314C-2 DP
Type of interface Integrated RS422/RS485 interface Integrated RS485 interface
Physics RS 422/485 RS 485
electrically isolated Yes Yes
Interface power supply (15 to 30 VDC) No Max. 200 mA
Number of connections None 12
Functionality
MPI No No
PROFIBUS DP No Yes
Point-to-point connection Yes No
DP master
Services
Routing Yes
connection)
Constant bus cycle time Yes
Isochronous mode No
SYNC/FREEZE Yes
DPV1 Yes
Number of DP slaves per station Max. 32
7-28 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave

Services
connection)
DPV1 No
http://www.automation.siemens.com/csi
/gsd
Transmission rates 38.4 Kbaud half duplex
19.2 Kbaud full duplex

Cable length Max. 1200 m
User program can control the
interface
Yes
The interface can trigger a break or
an interrupt in the user program
Yes (message with break ID)
Protocol driver 3964 (R); ASCII and RK512
Programming CPU 314C-2 PtP CPU 314C-2 DP
Instruction set see the Instruction List
Nesting levels 8
System functions (SFC) see the Instruction List
System function blocks (SFB) see the Instruction List
Integrated I/O CPU 314C-2 PtP CPU 314C-2 DP
Digital inputs
Digital outputs
Analog inputs
Analog outputs

124.0 to 126.7
124.0 to 125.7
752 to 761
752 to 755
Manual, 12/2006 , A5E00105475-07 7-29
Technical data

Counters 4 channels (see the Manual Technological Functions)
Frequency counters 4 channels, max. 60 kHz (see the Manual Technological Functions)
Cycle duration measurement 4 channels (see the Manual Technological Functions)
Pulse outputs 4 channels for pulse width modulation, max. 2.5 kHz (see the Manual
Controlled positioning 1 channel (see the Manual Technological Functions)
Integrated "Controlling" SFB PID controller (see the manual Technological Functions)
Dimensions CPU 314C-2 PtP CPU 314C-2 DP
Weight approx. 676 g
Voltages and currents CPU 314C-2 PtP CPU 314C-2 DP
Current consumption (no-load
operation)
Typically 150 mA
Power consumption (nominal value) 800 mA 1000 mA
I
2
t 0.7 A
2
s
(recommended)
LS switch type C min. 2 A,
LS switch type B min. 4 A
7.6 Technical data of the integrated I/O
7-30 Manual, 12/2006 , A5E00105475-07
7.6.1 Arrangement and usage of integrated I/Os
Introduction
Integrated I/Os of CPUs 31xC can be used for technological functions or as standard I/O.
The figures below illustrate possible usage of I/Os integrated in the CPUs.
Reference
Further information on integrated I/O is found in the Manual Technical Functions.
CPU 312C: Pin-out of the integrated DI/DO (connector X11)
Cn Counter n
A, B Sensor signals
Vn Comparator n
X Pin can be used, provided it is not in use by technological functions
HW gate Gate control
Latch Save counter value
Standard
lnterrupt
input
Counting
1
2
3
4
5
6
8
7
9
10
11
12
13
14
16
15
17
18
20
19
X11
DI
DI
DI
DI+0.1
DI+0.2
DI+0.3
DI+0.4
DI+0.5
DI+0.6
DI+0.7
X
X
X
X
X
X
X
X
Z0 (A)
Z0 (B)
Z0 (HW-Tor)
Z1 (A)
Z1 (B)
Z1 (HW-Tor)
Latch 0
Latch 1
V0
V1
DI+0.0
DI+1.1
DO+0.0
DO+0.1
DO+0.2
DO+0.3
DO+0.4
DO+0.5
DI+1. 0
DI
DI
DI
DI
DI
DI
DI
X
X
DO
DO
DO
DO
DO
DO
2 M
1L+
1 M

Manual, 12/2006 , A5E00105475-07 7-31
Block diagram of the integrated digital I/O
6
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
1L+
1M
2M
20
19
18
17
16
15
14
13
12
11
10
9
8
7
5
4
3
2
1

7-32 Manual, 12/2006 , A5E00105475-07
CPU 313C, CPU 313C-2 DP/PtP, CPU 314C-2 DP/PtP: DI/DO (connectors X11 and X12)
10
11
12
13
14
16
15
17
18
20
19
1) Standard
Dl
Standard
DO
lnterrupt
input
Positio-
ning
X11 of CPU 313C-2 PtP/DP
X12 of CPU 314C-2 PtP/DP
digital analog
Counting Counting
Cn Counter n
A, B Sensor signals
HW gate Gate control
Latch Save counter value
Vn Comparator n
Probe 0 Probe 0
Bero 0 Reference point switch 0
R+, R- Direction signal
Rapid Rapid speed
Creep Creep speed
CONV_EN Power unit enable
CONV_DlR Direction signal (only with control mode "voltage
or current from 0 mA to 10 mA and direction signal")
X Pin can be used, provided it is not in use by technological functions
1) only CPU 314C-2
Positioning
1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
V0
V1
V2
V3 1)
Z0 (A)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Z0 (B)
Z0 (HW-Tor)
Z1 (A)
Z1(B)
Z1 (HW-Tor)
Z2 (A)
Z2 (B)
Z2 (HW-Tor)
Z3 (A)
Z3 (B)
Z3 (HW-Tor)
Z0 (Latch)
Z1 (Latch)
Z2 (Latch)
Z3 (Latch)
A 0
B 0
N 0
Tast 0
Bero 0
1)
1)
1
2
3
4
5
6
8
7
9
DI+0.1
DI+0.2
DI+0.3
DI+0.4
DI+0.5
DI+0.6
DI+0.7
DI+0.0
DO+0.1
DO+0.2
DO+0.3
DO+0.4
DO+0.5
DO+0.6
DO+0.7
DO+0.0
1L+ 2L+ 21
22
23
24
25
26
28
27
29
30
31
32
33
34
36
35
37
38
40
39
CONV_EN
R+
Eil
R-
Schleich
DI+1.1
DI+1.2
DI+1.3
DI+1.4
DI+1.5
DI+1.6
DI+1.7
DI+1. 0
DO+1.1
DO+1.2
DO+1.3
DO+1.4
DO+1.
DO+1.6
DO+1.7
DO+1. 0
2M
3L+
1M 3M
CONV_DIR
5

Reference
Details are found in the Manual Technical Functions under Counting, Frequency
Measurement and Pulse Width Modulation
Manual, 12/2006 , A5E00105475-07 7-33
Block diagram of integrated digital I/O of CPUs 313C/313C-2/314C-2
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
3L+
2M
1M
1L+
3M
2L+
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

7-34 Manual, 12/2006 , A5E00105475-07
CPU 313C/314C-2: Pin-out of the integrated AI/AO and DI (connector X11)
Manipulated
value 0
Standard Positioning Standard Dl lnterrupt input
1) only CPU 314C-2
19
20
18
17
15
16
14
13
12
11
10
9
7
8
6
5
4
3
2
1
39
40
38
37
35
36
34
33
32
31
30
22
21
24
23
26
25
28
27
29
AO (Ch1)
AO (Ch0)
PT 100 (Ch4)
Al (Ch3)
Al (Ch2)
Al (Ch1)
Al (Ch0)
V
l
C
V
l
C
V
l
C
V
l
C
V
V
A
A
PEWx+0
PEWx+2
PEWx+4
PEWx+6
PEWx+8
PAWx+0
PAWx+2
M
Dl+2.3
Dl+2.4
Dl+2.5
Dl+2.0
Dl+2.1
Dl+2.2
Dl+2.6
Dl+2.7
4M
ANA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1)
X11

Manual, 12/2006 , A5E00105475-07 7-35
Block diagram of integrated digital/analog I/O of CPUs 313C/314C-2
4M
0
1
C
P
U

i
n
t
e
r
f
a
c
e

m
o
d
u
l
e
Controller
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Al0
Al
Al/A0 8D l
Al
Al
Al
A0
A0
Al
CH0
CH1
CH2
CH3
CH0
CH1
PT100
U
U
l
l
Al2
Al1
A
V
A
V
A
V
Al3
A
V
Al4
R
AO
AO
M
ANA
V
A
V
A

Simultaneous usage of technological functions and standard I/O
Technological functions and standard I/O can be used simultaneously with appropriate
hardware. For example, you can use all digital inputs not used for counting functions as
standard DI.
Read access to inputs used by technological functions is possible. Write access to outputs
used by technological functions is not possible.
See also
CPU 312C (Page 7-3)
CPU 313C (Page 7-9)
CPU 313C-2 PtP and CPU 313C-2 DP (Page 7-15)
CPU 314C-2 PtP and CPU 314C-2 DP (Page 7-22)
7-36 Manual, 12/2006 , A5E00105475-07
7.6.2 Analog I/O
Abbreviations used in the figures below

M Ground connection
Mx+ Measuring line "+" (positive), for channel x
Mx- Measuring line "-" (negative), for channel x
MANA Analog-measuring-circuit reference potential
AIXU Voltage input "+" for channel x
AIXI Current input "+" for channel x
AIXC Common current and voltage input "-" for channel x
AIX Analog input channel x
Wiring of the current/voltage inputs
The figure below shows the wiring diagram of the current/voltage inputs operated with 2-/4-
wire measuring transducers.
M2-
M2+
-
+
+24V
20
ANA M M
10
9
8
c
l
u
2 Al
2 Al
2 Al
Al
0
:

Al
1
:

Al
2
:

Al
3
:
We recommend that you use a jumper to interconnect AlxC with MANA.
2-wire
transducer
Pin 2 to 4
Pin 5 to 7
Pin 8 to 10
Pin 11 to 13

Figure 7-1 Connection of a 2-wire measuring transducer to an analog current/voltage input of
CPU 313C/314C-2

Manual, 12/2006 , A5E00105475-07 7-37
4-wire
transducer
Short-circuit unused input channels
and interconnect AlxC with MANA.
lf using a 4-wire transducer, we recommend that you
interconnect AlxC with MANA.
:Pin 2 to 4
:Pin 5 to 7
:Pin 8 to 10
:Pin 11 to 13
Al 2
Al 2
Al 2
Al 3
Al 3
Al 3
u
l
c
u
l
c
L+
8
9
10
11
12
13
M
ANA
20
M
M2+
M2-
M+
M-
M
Al
Al
Al
Al
0
1
2
3

Figure 7-2 Connection of a 4-wire measuring transducer to an analog current/voltage input of
CPU 313C/314C-2
Measurement principle
31xC CPUs use the measurement principle of actual value encoding. Here, they operate
with a sampling rate of 1 kHz. That is, a new value is available at the peripheral input word
register once every millisecond. This value can then be read via user program (e.g., L PEW).
The "previous" value is read again if access times are shorter than 1 ms.
7-38 Manual, 12/2006 , A5E00105475-07
Integrated hardware low-pass filter
An integrated low-pass filter attenuates analog input signals of channel 0 to 3. They are
attenuated according to the trend in the figure below.

<10 %
<1%
Attenuation
Attenuation
High-level
Attenuation
lnput frequency
lnternal
signal level
lnvalid
input frequency
50 Hz 200 Hz
63 %
400 Hz
100 %

Figure 7-3 Low-pass characteristics of the integrated filter

Note
The maximum frequency of the input signal is 400 Hz.

Manual, 12/2006 , A5E00105475-07 7-39
Input filters (software filter)
The current / voltage inputs have a software filter for the input signals which can be
programmed with STEP 7. It filters the configured interference frequency (50/60 Hz) and
multiples thereof.
The selected interference suppression also determines the integration time.
At an interference suppression of 50 Hz the software filter forms the average based on the
last 20 measurements and saves the result as a measurement value.
You can suppress interference frequencies (50 Hz or 60 Hz) according to the parameters set
in STEP 7. A setting of 400 Hz will not suppress interference.
An integrated low-pass filter attenuates analog input signals of channel 0 to 3.
Selection in STEP 7:
(software filter)
50-Hz parameterization
(mean value filter)
(mean value filter)
Analog-to-
digital converter
Hardware low-pass filter
(RC element)
Al
x

Figure 7-4 Principle of interference suppression with STEP 7

7-40 Manual, 12/2006 , A5E00105475-07
In the two graphics below we illustrate how the 50 Hz and 60 Hz interference suppression
work

1 averaged measured value
Example of 50 Hz interference frequency suppression (integration time corresponds to 20 ms)
2ndCycle
1stCycle
Value Value Value Value Value
ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms
20 19
...
3 2 1
20 19
...
3 2 1
1,05 ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms 1,05 ms

Figure 7-5 50 Hz interference suppression

Manual, 12/2006 , A5E00105475-07 7-41
Example of 60 Hz interference frequency suppression (integration time corresponds to 16,7 ms)
2nd Cycle
1stCycle
1,05 ms 1,05 ms 1,05 ms 1,05 ms
17 16
...
3 2 1
17 16
...
3 2 1
1,05 ms
1,05 ms 1,05 ms 1,05 ms 1,05 ms 1,05 ms

Figure 7-6 60 Hz interference suppression

Note
If the interference frequency is not 50/60 Hz or a multiple thereof, the input signal must be
filtered externally,
In this case, 400 Hz frequency suppression must be configured for the respective input. This
is equivalent to a "Deactivation" of the software filter.

Inputs not connected
The three inputs of a current/voltage analog output channel that is not connected should be
bypasses and connected to MANA (pin 20 of the front connector). This ensures maximum
interference resistance for these analog inputs.
Outputs not connected
In order to disconnect unused analog outputs from power, you must disable and leave them
open during parameter assignment with STEP 7.
Reference
For further information (visualization and processing of analog values, for example), refer to
Chapter 4 of the Module Data Manual.
7-42 Manual, 12/2006 , A5E00105475-07
7.6.3 Parameterization
Introduction
You configure the integrated I/O of CPU 31xC with STEP 7. Always make these settings
when the CPU is in STOP. The generated parameters are downloaded from the PG to the
S7-300 and written to CPU memory .
You can also choose to change the parameters at SFC 55 in the user program (see the
Reference Manual System and Standard Functions). Refer to the structure of record 1 for
the respective parameters.
Parameters of standard DI
The table below gives you an overview of the parameters for standard digital inputs.
Table 7-7 Parameters of standard DI
Parameters Value range Default Range of efficiency
Input delay (ms) 0.1/0.5/3/15 3 Channel group
The table below gives you an overview of the parameters when using digital inputs as
interrupt inputs.
Table 7-8 Parameters of the interrupt inputs
Parameters Range of values Default setting Efficiency range
Interrupt input Disabled /
positive edge
De-activated digital input
Interrupt input Disabled/
negative edge
Deactivated Digital input
lnterrupt input Dl +0.1
Byte 1
Byte 2
Byte 3 reserved
Byte 0
Bit No.
Bit No.
Bit No.
0: Deactivated
1: Rising edge
Default setting: 0

Manual, 12/2006 , A5E00105475-07 7-43
Byte 5
Byte 6
Byte 7 reserved
Byte 4
Bit No.
Bit No.
Bit No.
0: Deactivated
1: Falling edge
Default setting: 0
0
7 0
0 7
7

Byte 8
Byte 9
7 0
7 0
lnput delay Dl +0.0 to Dl +0.3
reserved
Bit-Nr.
Bit-Nr.
00
B
: 3,0 ms
01
B
: 0,1 ms
10
B
: 0,5 ms
11
B
: 15,0 ms
Default setting: 00B

Figure 7-7 Structure of record 1 for standard DI and interrupt inputs (length of 10 bytes)
Parameters of standard DO
There are no parameters for standard digital outputs.
7-44 Manual, 12/2006 , A5E00105475-07
Parameters of standard AI
The table below gives you an overview of the parameters for standard analog inputs.
Table 7-9 Parameters of standard AI
Integration time (ms)
Interference suppression
(Hz)
(channel 0 to 3)
2.5/16.6/20
400/60/50
20
50
Channel
Channel
Measurement range
(channel 0 to 3)
deactivated/
+/- 20 mA/
0 ... 20 mA/
4 ... 20 mA/
+/- 10 V/
0 ... 10 V
+/- 10 V Channel
Type of measurement
(channel 0 to 3)
deactivated/
U voltage/
I current
U voltage Channel
Unit of measurement
(channel 4)
Celsius/Fahrenheit/
Kelvin
Celsius Channel
Measurement range
(Pt 100 input; channel 4)
deactivated/
Pt 100/600
600 Channel
Type of measurement
(Pt 100 input; channel 4)
deactivated/
Resistance/
Thermal resistance
Resistance Channel
Reference
See also Chapter 4.3 in the Module Data Reference Manual.
Manual, 12/2006 , A5E00105475-07 7-45
Parameters of standard AO
The table below gives you an overview of standard analog output parameters (see also
Chapter 4.3 in the Module Data Reference Manual).
Table 7-10 Parameters of standard AO
Output range
(channel 0 to 1)
Deactivated/
+/- 20 mA/
0 ... 20 mA/
4 ... 20 mA/
+/- 10 V/
0 ... 10 V
+/- 10 V Channel
Type of output
(channel 0 to 1)
Deactivated/
U voltage/
I current
U voltage Channel

0
0 7
7
0 7
0 7
Bit
Bit
Bit
Parasitic frequency suppression integration time of channel Al 3
Measurement type of channel Al 0 (settings see byte 6)
Measuring range of channel Al 0 (settings see byte 6)
reserved
Unit of measure
reserved
00
B
: Celsius
01
B
: Fahrenheit
10
B
: Kelvin
Default setting: 00
B
00
B
: 2,5 ms, 400 Hz
01
B
: 16,6 ms, 60 Hz
10
B
: 20,0 ms, 50 Hz
Default setting: 10
B
reserved
Measurement type of channel Al 1 (settings see byte 6)
Measuring range of channel Al 1 (settings see byte 6)
Bit
Byte 4
Byte 3
Byte 2:
Byte 1
Byte 0

7-46 Manual, 12/2006 , A5E00105475-07
Byte 5
Byte 6
Byte 7
Bytes 8 to 10:
Range of measurement channel Al 2 (see byte 6 for settings)
Type of measurement channel Al 2 (see byte 6 for settings)
Range of measurement channel Al 3
0H: deactivated
2H: 0 ... 20 mA
3H: 4 ... 20 mA
4H: +/- 20 mA
8H: 0 ... 10 V
9H: +/- 10 V
Default setting: 9H
0H: deactivated
1H: Voltage V
2H: Current l
3H: Current l
Default setting: 1H
Type of measurement channel Al 3
Range of measurement channel Al 4
Type of measurement channel Al 4
0H: deactivated
2H: 600 Ohm
6H: Pt 100
Default setting: 2H
0H: deactivated
6H: Resistance
15H: Thermoresistor
Default setting: 6H
reserved
7
7
7
0
0
0

7
7
0
0
Bit.-Nr.
Bit.-Nr.
Output range of channel AO 0
(setting see byte 12)
(setting see byte 12)
0
H
: deactivated
1
H
: V voltage
3
H
: l current
Default setting: 1
H
0
H
: deactivated
2
H
: 0 ... 20 mA
3
H
: 4 ... 20 mA
4
H
: +/- 20 mA
8
H
: 0 ... 10 V
9
H
: +/- 10 V
Default setting: 9
H
Byte 11
Byte 12

Figure 7-8 Structure of record 1 for standard AI/AO (length of 13 bytes)
Parameter for technological functions
The parameters for the respective function are found in the Manual Technological Functions.
Manual, 12/2006 , A5E00105475-07 7-47
7.6.4 Interrupts
Interrupt inputs
All digital inputs of the on-board I/O of CPUs 31xC can be used as interrupt inputs.
You can specify interrupt behavior for each individual input in your parameter declaration.
Options are:
no interrupt
Interrupt at the positive edge
Interrupt at the negative edge
Interrupt at the positive and negative edge

Note
Every channel will hold one event if the rate of incoming interrupts exceeds the handling
capacity of OB40. Further events (interrupts) will be lost, without diagnostics or explicit
message.

7-48 Manual, 12/2006 , A5E00105475-07
Start information for OB40
The table below shows the relevant temporary variables (TEMP) of OB40 for the interrupt
inputs of 31xC CPUs. A description of process interrupt OB 40 is found in the Reference
Manual System and Standard Functions.
Table 7-11 Start information for OB40, relating to the interrupt inputs of the integrated I/O
Byte Variables Data type Description
6/7 OB40_MDL_ADDR WORD B#16#7C Address of the interrupt-
triggering module (here: default
addresses of the digital inputs)
8 on OB40_POINT_ADDR DWORD see the figure
below
Displaying the interrupt-
triggering integrated inputs

Reserved
PRAL from l124.0
PRAL from l124.7
PRAL from l125.0
PRAL from l125.7
PRAL from l126.0
PRAL from l126.7
Bit No.
23 31

30 29 28 27 26 25 24 15 16 8 7 6 5 4 3 2 1

Figure 7-9 Displaying the statuses of CPU 31xC interrupt inputs
PRAL: process interrupt
The inputs are assigned default addresses.
7.6.5 Diagnostics
Standard I/O
Diagnostic data is not available for integrated I/O which is operated as standard I/O (see also
the Reference Manual Module Data).
Technological functions
Diagnostics options for the respective technological function are found in the Manual
Technological Functions.
Manual, 12/2006 , A5E00105475-07 7-49
7.6.6 Digital inputs
Introduction
This section provides the specifications for the digital inputs of CPUs 31xC.
The table includes the following CPUs:
under CPU 313C-2, the CPU 313C-2 DP and CPU 313C-2 PtP
Technical data
Table 7-12 Technical data of digital inputs
Technical data
CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Module-specific data CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Number of inputs 10 24 16 24
Number of these inputs which can be used
for technological functions
8 12 12 16
Cable length
Unshielded For standard DI: Max. 600 m
For technological functions: No
For standard DI: Max. 1.000 m
For technological function at max. counting frequency
Shielded
100 m 100 m 100 m 50 m
Voltage, currents, potentials CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Rated load voltage L+ 24 VDC
Polarity reversal protection Yes
Number of inputs which can be controlled
simultaneously

Horizontal assembly
Up to 40 C
Up to 60 C

10
5

24
12

16
8

24
12
Vertical assembly
Up to 40C

5

12

8

12
Electrical isolation
Between channels and the backplane bus Yes
Between the channels No
Permitted potential difference
Between different circuits 75 VDC / 60 VAC
Insulation test voltage 600 VDC
Current consumption
On load voltage L+ (no-load) Max. 70 mA Max. 70 mA Max. 70 mA
7-50 Manual, 12/2006 , A5E00105475-07
Technical data
Status, interrupts, diagnostics
Status display green LED per channel
Interrupts Yes, if the corresponding channel is configured as interrupt input
For using technological functions, please refer to the Technological
Functions Manual.
Diagnostics functions no diagnostics when operated as standard I/O
Functions Manual.
Data for the selection of an encoder for
standard DI
Input voltage
Rated value 24 VDC
For signal "1" 15 V to 30 V
For signal "0" -3 V to 5 V
Input current
For signal "1" Typically 9 mA
Delay of standard inputs
Configurable Yes (0.1 / 0.5 / 3 / 15 ms)

You can reconfigure the input delay of the standard inputs during program
runtime. Please note that your newly set filter time may only take effect
after the previously set filter time has expired.
Rated value 3 ms
For using technological functions:
"Minimum pulse width/ minimum pause
between pulses at maximum counting
frequency"
48 s 16 s 16 s 8 s
Input characteristics curve to IEC 1131, type 1
Connection of 2wire BEROs Supported
Permitted quiescent current Max. 1.5 mA

Manual, 12/2006 , A5E00105475-07 7-51
7.6.7 Digital outputs
Introduction
This chapter contains the specifications for the digital outputs of CPUs 31xC.
Fast digital outputs
Technological functions use fast digital outputs.
Technical data
Table 7-13 Technical data of digital outputs
Technical data
Module-specific data CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Number of outputs 6 16 16 16
2 4 4 4 Of those are fast outputs
Caution:
You cannot connect the high-speed outputs of your CPU in parallel.
Cable length
Unshielded Max. 600 m
Shielded Max. 1,000 m
Voltage, currents, potentials CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Polarity reversal protection No
Total current of outputs (per group)

Max. 2.0 A Max. 3.0 A Max. 3.0 A Max. 3.0 A
Horizontal assembly
Up to 40C
Up to 60 C
Vertical assembly
Up to 40C
No Yes Yes Yes Between the channels
In groups of
8 8 8
Between different circuits 75 VDC / 60 VAC
Insulation test voltage 600 V DC
7-52 Manual, 12/2006 , A5E00105475-07
Technical data
Current consumption
with load voltage L+ Max. 50 mA Max. 100 mA Max. 100 mA Max. 100 mA
Status, interrupts, diagnostics CPU 312C CPU 313C CPU 313C-2 CPU 314C-2
Status display green LED per channel
Interrupts no interrupts when operated as standard I/O
Functions Manual.
Diagnostics functions no diagnostics when operated as standard I/O
Functions Manual.
Data for the selection of an actuator for
standard DI
Output voltage
For signal "1" Min. L+ (-0.8 V)
Output current
For signal "1"
Rated value
Permissible range
0.5 A
5 mA to 0.6 A
For signal "0" (residual current) Max. 0.5 mA
Load impedance range 48 to 4 k
Lamp load Max. 5 W
Parallel connection of 2 outputs
for redundant load control Supported
for performance increase Not possible
Controlling of digital inputs Supported
Switching frequency
under resistive load Max. 100 Hz
For inductive load to IEC 947-5, DC13 Max. 0.5 Hz
under lamp load Max. 100 Hz
fast outputs under resistive load Max. 2.5 kHz
Inductive breaking voltage limited internally to Typically (L+) - 48 V
Short-circuit protection of the output Yes, electronic
Response threshold Typically 1 A

Manual, 12/2006 , A5E00105475-07 7-53
7.6.8 Analog inputs
Introduction
This chapter contains the specifications for analog outputs of CPUs 31xC.
CPU 313C
CPU 314C-2 DP
CPU 314C-2 PtP
Technical data
Table 7-14 Technical data of analog inputs
Technical data
Module-specific data
Number of inputs 4 channels with current/voltage input
1 channel with resistance input
Cable length
Shielded Max. 100 m
Voltage, currents, potentials
Resistance input
No-load voltage Typically 2.5 V
Measurement current Typically 1.8 mA to 3.3 mA
Between the channels No
Between inputs (AIC) and MANA (UCM) 8.0 VDC
between MANA and Minternal (UISO) 75 VDC / 60 VAC
Insulation test voltage 600 V DC
Generation of analog values
Measurement principle Actual value encoding (successive
approximation)
Integration time/conversion time/resolution (per channel)
Configurable Yes
Integration time in ms 2.5 / 16.6 / 20
Permitted input frequency Max. 400 Hz
Resolution (including overshoot range) 11 bits + signed bit
Suppression of interference frequency f1 400 / 60 / 50 Hz
Time constant of the input filter 0:38 ms
Basic processing time 1 ms
7-54 Manual, 12/2006 , A5E00105475-07
Technical data
Noise suppression, error limits
Interference voltage suppression for f = nx (f1 1 %), (f1 = interference
frequency), n = 1.2

Commonmode interference (UCM < 1.0 V) > 40 dB
Feedback interference (peak value of the interference < rated value of
the input range)
> 30 dB
Crosstalk between the inputs > 60 dB
Operational error limits (across the temperature range, in relation to input
range)

Voltage/current < 1%
Resistance < 5%
Basic error limit (operational limit at 25 C, in relation to input range)
Voltage / current
Linearity error during measurement of current and voltage
(related to input range)
< 0.7%
0.06%
Resistance
Linearity error during resistance measurement
(related to input range)
< 3%
0.2%
Temperature error (in relation to input range) 0.006 %/K
Repeat accuracy (in transient state at 25 C, in relation to input range) 0.06 %
Interrupts no interrupts when operated as standard
I/O
Diagnostics functions no diagnostics when operated as
standard I/O
For using technological functions, please
refer to the Technological Functions
Manual.
Encoder selection data
Input ranges (rated value)/input resistance
Voltage 10 V/100 k
0 V to 10 V/100 k
Current 20 mA/50
0 mA to 20 mA/50
4 mA to 20 mA/50
Resistance 0 to 600 /10 M
Resistance thermometer Pt 100/10 M
Permitted continuous input voltage (destruction limit)
For voltage inputs Max. 30 V
For current inputs Max. 2.5 V
Permitted continuous input current (destruction limit)
For voltage inputs Max. 0.5 mA;
For current inputs Max. 50 mA, continuous
Manual, 12/2006 , A5E00105475-07 7-55
Technical data
Connection of signal generators

For voltage measurement supported
For current measurement
as 2-wire measuring transducer
as 4-wire measuring transducer

Possible, with external power supply
supported
for measuring resistance
with 2-conductor terminal

with 3-wire connection
with 4-wire connection

Possible, without compensation of
cable resistance
Not possible
Not possible
Linearization of the characteristics trend By software
For resistance thermometers Pt 100
Temperature compensation No
Technical unit for temperature measurement Degrees Celsius/Fahrenheit/Kelvin
7.6.9 Analog outputs
Introduction
This chapter contains the specifications for digital outputs of CPUs 31xC.
CPU 313C
CPU 314C-2 DP
CPU 314C-2 PtP
Technical data
Table 7-15 Technical data of analog outputs
Technical data
Module-specific data
Number of outputs 2
Cable length
shielded Max. 200 m
Voltage, currents, potentials
Polarity reversal protection Yes
between channels and the backplane bus Yes
between the channels No
Permissible potential difference
between MANA and Minternal (UISO) 75 VDC / 60 VAC
7-56 Manual, 12/2006 , A5E00105475-07
Technical data
Isolation test voltage 600 VDC
Generation of analog values
Resolution (including overshoot range) 11 bits + signed bit
Conversion time (per channel) 1 ms
Settling time
with resistive load 0.6 ms
With capacitive load 1.0 ms
With inductive load 0.5 ms
Noise suppression, error limits
Crosstalk between the outputs > 60 dB
Operational error limits (across the temperature range, in relation to output
range)

Voltage / current 1%
Basic error limit (operational limit at 25 C, in relation to output range)
Voltage / current 0.7%
Temperature error (in relation to output range) 0.01 %/K
Linearity error (in relation to output range) 0.15%
Repeat accuracy (in transient state at 25 C, in relation to output range) 0.06%
Output ripple; bandwidth 0 to 50 kHz (in relation to output range) 0.1%
Interrupts no interrupts when operated as standard
I/O
Manual.
Diagnostics functions no diagnostics when operated as
standard I/O
Manual.
Actuator selection data
Output range (rated values)
Voltage 10 V
0 V to 10 V
Current 20 mA
0 mA to 20 mA
4 mA to 20 mA
Load resistance (within output rating)
For voltage outputs
Capacitive load
min. 1 k
Max. 0.1 F
For current outputs
Inductive load
Max. 300
0.1 mH
Voltage output
Short-circuit protection Yes
Short-circuit current Typically 55 mA
Manual, 12/2006 , A5E00105475-07 7-57
Technical data
Current output
No-load voltage Typically 17 V
Destruction limit for externally applied voltages/currents
Voltage measured between the outputs and MANA Max. 16 V
Current Max. 50 mA, continuous
Connection of actuators
For voltage outputs
2-wire connection

4-wire connection (measuring line)

Possible, without compensation of
cable resistance
Not possible
For current outputs
2-wire connection

supported

7-58 Manual, 12/2006 , A5E00105475-07

Manual, 12/2006 , A5E00105475-07 8-1
8
8.1.1 Dimensions of CPU 31x

Each CPU features the same height and depth, only the width dimensions differ.
Height: 125 mm
Depth: 115 mm, or 180 mm with opened front cover.
x
1
2
5
65 115

Figure 8-1 Dimensions of CPU 31x
8-2 Manual, 12/2006 , A5E00105475-07
Width of CPU

CPU Width (x)
CPU 312 40 mm
CPU 314 40 mm
CPU 315-2 DP 40 mm
CPU 315-2 PN/DP 80 mm
CPU 317-2 DP 80 mm
CPU 317-2 PN/DP 80 mm
CPU 319 120 mm
8.1.2 Technical data of the SIMATIC Micro Memory Card
Plug-in SIMATIC Micro Memory Cards
The following memory modules are available:
Table 8-1 Available SIMATIC Micro Memory Cards
Type Order number Required for a firmware update via
Micro Memory Card 64 KB 6ES7 953-8LFxx-0AA0
Micro Memory Card 128 KB 6ES7 953-8LGxx-0AA0
Micro Memory Card 512 KB 6ES7 953-8LJxx-0AA0
Micro Memory Card 2 MB 6ES7 953-8LLxx-0AA0 Minimum requirement for CPUs without DP
interface
Micro Memory Card 4 MB 6ES7 953-8LMxx-0AA0 Minimum requirement for CPUs without DP
interface (except CPU 319)
Micro Memory Card 8 MB
1)
6ES7 953-8LPxx-0AA0 Minimum requirements for the CPU 319
1
If you plug in the CPU 312C or CPU 312, you cannot use this SIMATIC Micro Memory
Card.
8.2 CPU 312
Manual, 12/2006 , A5E00105475-07 8-3
Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Number of blocks that can be stored on the SIMATIC Micro Memory Card depends on the
capacity of the SIMATIC Micro Memory Card being used The maximum number of blocks
that can be loaded is therefore limited by the capacity of your SIMATIC Micro Memory Card
(including blocks generated with the "CREATE DB" SFC)
Table 8-2 Maximum number of loadable blocks on the SIMATIC Micro Memory Card
Size of SIMATIC Micro Memory Card Maximum number of blocks that can be loaded
64 KB 768
128 KB 1024
512 KB
2 MB
4 MB
8 MB
Here the maximum number of blocks that can be loaded for the
specific CPU is less than the number of blocks that can be stored on
the SIMATIC Micro Memory Card.
Refer to the corresponding specifications of a specific CPU to
determine the maximum number of blocks that can be loaded.
8.2 CPU 312
Technical data
Table 8-3 Technical data for the CPU 312
Technical data
CPU and version
Order no. [MLFB] 6ES7312-1AE13-0AB0
Hardware version 01
Memory
Work memory
Integrated 32 KB
Expandable No
(max. 4 MB)
At least 10 years
(maintenance-free)
Execution times
Processing times of
8.2 CPU 312
8-4 Manual, 12/2006 , A5E00105475-07
Technical data
S7 counters 128
Default From C0 to C7
IEC Counters Yes
Type SFB
S7 timers 128
IEC timers Yes
Type SFB
Retentivity Yes
Preset retentive address areas MB 0 to MB 15
Data blocks 511
Size 16 KB
Non-retain support (configurable retentive
address areas)
Yes
Blocks
Micro Memory Card.
Size Max. 16 KB
8.2 CPU 312
Manual, 12/2006 , A5E00105475-07 8-5
Technical data
Nesting depth

FBs
Number, max. 1024
Size Max. 16 KB
FCs
Number, max. 1024
Size Max. 16 KB
Address areas (I/O)
I/O process image
Inputs 128 bytes
Outputs 128 bytes
Digital channels
Inputs Max. 256
Outputs Max. 256
Inputs, central Max. 256
Outputs, central Max. 256
Analog channels
Inputs Max. 64
Outputs Max. 64
Removal
Racks Max. 1
Modules per rack Max. 8
Integrated None
Via CP 4
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 4
Time
8.2 CPU 312
8-6 Manual, 12/2006 , A5E00105475-07
Technical data
Clock
Yes (SW clock)
Buffered No
ON
Number 0
Range of values 2
31

Granularity 1 hour
restart
In the AS Master
On MPI Master/slave
signaling functions
6
communication)
counters
Number of variables
30
30
14
Force Yes
Block status Yes
Single-step Yes
Breakpoint 2
8.2 CPU 312
Manual, 12/2006 , A5E00105475-07 8-7
Technical data
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Consistent data
Max. 22 bytes
22 bytes
User data per job
Consistent data
Max. 76 bytes
S7 communication
As server Yes
User data per job
Consistent data
64 bytes
can be used for
PG communication
Reserved (default)
Configurable
Max. 5
1
from 1 to 5
OP communication
Reserved (default)
Configurable
Max. 5
1
from 1 to 5
Reserved (default)
Configurable
Max. 2
0
from 0 to 2
Routing No
Interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
8.2 CPU 312
8-8 Manual, 12/2006 , A5E00105475-07
Technical data
MPI

Services
Routing No
S7 communication
As server
As client

Yes
No
Transmission rates 187.5 kbps
Programming
Nesting levels 8
Dimensions
Weight 270 g
Inrush current Typically 2.5 A
Power consumption (nominal value) 0.6 A
I
2
t 0.5 A
2
s
(recommended)
min. 2 A
Power loss Typically 2.5 W

8.3 CPU 314
Manual, 12/2006 , A5E00105475-07 8-9
8.3 CPU 314
Technical data for the CPU 314
Table 8-4 Technical data for the CPU 314
Technical data
CPU and version
Order no. [MLFB] 6ES7314-1AG13-0AB0
Hardware version 01
Memory
Work memory
Integrated 96 KB
Expandable No
Capacity of the retentive memory for retentive
data blocks
64 KB
(max. 8 MB)
At least 10 years
(maintenance-free)
Execution times
Processing times of
Fixed-point arithmetic Min. 2.0 s
S7 counters 256
IEC counters Yes
Type SFB
S7 timers 256
IEC timers Yes
Type SFB
8.3 CPU 314
8-10 Manual, 12/2006 , A5E00105475-07
Technical data
Retentivity Yes
Data blocks
Number 511
Size 16 KB
Non-retentive Yes
Local data per priority class Max. 510
Blocks
Micro Memory Card.
Size 16 KB
Nesting depth
FBs See the Instruction List
Number, max. 1024
Size 16 KB
FCs See the Instruction List
Number, max. 1024
Size 16 KB
Address areas (I/O)
8.3 CPU 314
Manual, 12/2006 , A5E00105475-07 8-11
Technical data
I/O process image

Inputs 128 bytes
Outputs 128 bytes
Digital channels
Inputs Max. 1024
Outputs Max. 1024
Analog channels
Inputs Max. 256
Outputs Max. 256
Removal
Racks Max. 4
Modules per rack 8
Integrated None
via CP 4
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
Time
Buffered Yes
40C)
buffered period
Accuracy Deviation per day: < 10 s
Number 0
Range of values 2
31
hours
Granularity 1 hour
Retentive yes; must be manually restarted after every
restart
In the AS Master
On MPI Master/slave
8.3 CPU 314
8-12 Manual, 12/2006 , A5E00105475-07
Technical data
Number of stations that can log in for signaling
functions (e.g. OS)
12
communication)
counters
Number of variables
30
30
14
Force Yes
Variable Inputs/outputs
Block status Yes
Single-step Yes
Breakpoint 2
Sending stations
Receiving stations
Max. 4
Max. 4
Max. 4
Consistent data
Max. 22 bytes
22 bytes
User data per job
Consistent data
Max. 76 bytes
S7 communication Yes
As server Yes
as client Yes (via CP and loadable FBs)
User data per job
Consistent data
Max. 180 (for PUT/GET)
64 bytes
8.3 CPU 314
Manual, 12/2006 , A5E00105475-07 8-13
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 11
1
1 to 11
OP communication
Reserved (default)
Configurable
Max. 11
1
1 to 11
Reserved (default)
Configurable
Max. 8
0
0 to 8
Routing No
Interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
MPI
Services
Routing No
S7 communication
As server
As client
Yes
Yes
Programming
Nesting levels 8
Dimensions
Weight 280 g
8.4 CPU 315-2 DP
8-14 Manual, 12/2006 , A5E00105475-07
Technical data
I
2
t 0.5 A
2
s
(recommended)
min. 2 A
8.4 CPU 315-2 DP
Technical data
Table 8-5 Technical data for the CPU 315-2 DP
Technical data
CPU and version
Order no. [MLFB] 6ES7315-2AG10-0AB0
Hardware version 05
Memory
Work memory
Integrated 128 KB
Expandable No
data blocks
128 KB
(max. 8 MB)
At least 10 years
(maintenance-free)
Execution times
Processing times of
Fixed-point arithmetic Min. 2.0 s
8.4 CPU 315-2 DP
Manual, 12/2006 , A5E00105475-07 8-15
Technical data
S7 counters 256
IEC Counters Yes
Type SFB
S7 timers 256
IEC timers Yes
Type SFB
Retentivity Yes
Data blocks
Number 1023
Size 16 KB
address areas)
Yes
Local data capacity Max. 1024 bytes per execution level/510 bytes
per block
Blocks
Micro Memory Card.
Size 16 KB
Number of DPV1 interrupt OBs 3 (OB 55, 56, 57)
Number of asynchronous error OBs 5 (OB 80, 82, 85, 86, 87)
8.4 CPU 315-2 DP
8-16 Manual, 12/2006 , A5E00105475-07
Technical data
Nesting depth
FBs See the instruction list
Number, max. 1024
Size 16 KB
FCs See the instruction list
Number, max. 1024
Size 16 KB
Address areas (I/O)
Distributed
Inputs
Outputs

2048 bytes
2048 bytes
Process image
Inputs 128
Outputs 128
Digital channels
Inputs Max. 16384
Outputs Max. 16384
Analog channels
Inputs Max. 1024
Outputs Max. 1024
Removal
Racks Max. 4
Modules per rack 8
Integrated 1
Via CP 4
processors

FM Max. 8
CP (PtP) Max. 8
CP (LAN) Max. 10
8.4 CPU 315-2 DP
Manual, 12/2006 , A5E00105475-07 8-17
Technical data
Time
Buffered Yes
40C)
buffered period
Number 0
Value range 2
31
hours
Granularity 1 hour
restart
In the AS Master
On MPI Master/slave
On DP Master/slave
Number of stations that can log in for signaling
functions (e.g. OS)
16
communication)
Simultaneously enabled interrupt S blocks 40
counters
Number of variables
30
30
14
Force
Block status Yes
Single-step Yes
Breakpoint 2
8.4 CPU 315-2 DP
8-18 Manual, 12/2006 , A5E00105475-07
Technical data
Sending stations
Receiving stations
Max. 8
Max. 8
Max. 8
Consistent data
Max. 22 bytes
22 bytes
User data per job
Consistent data
Max. 76 bytes
As server Yes
User data per job
Consistent data
64 byte (as the server)
can be used for
PG communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
OP communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
Reserved (default)
Configurable
Max. 12
0
0 to 12
Routing Yes (max. 4)
Interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
Max. 200 mA
Functionality
MPI Yes
PROFIBUS DP No
8.4 CPU 315-2 DP
Manual, 12/2006 , A5E00105475-07 8-19
Technical data
MPI

Services
Routing Yes
S7 communication
As server
As client
Yes
Yes
2nd interface
Physics RS 485
Electrically isolated Yes
Functionality
MPI No
PROFIBUS DP Yes
DP master
Services
Routing Yes
connection)
Isochronous mode No
SYNC/FREEZE Yes
DPV1 Yes
Enable/disable DP slave Yes
Transmission speed Up to 12 Mbaud
Number of DP slaves per station 124
Address area Max. 2 KB I / max. 2 KB 0
User data per DP slave Max. 244 byte I / Max. 244 byte 0
8.4 CPU 315-2 DP
8-20 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave

Services
connection)
DPV1 No
http://www.automation.siemens.com/csi/gsd
Programming
Instruction set See the instruction list
Nesting levels 8
System functions (SFC) See the instruction list
System function blocks (SFB) See the instruction list
Dimensions
Weight 290 g
I
2
t 0.5 A
2
s
(recommended)
min. 2 A

8.5 CPU 315-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-21
8.5 CPU 315-2 PN/DP
Technical data
Table 8-6 Technical data for the CPU 315-2 PN/DP
Technical data
CPU and version
Order no. [MLFB] 6ES7315-2EH13-0AB0
Hardware version 01
Firmware version V 2.5
Memory
Work memory
Work memory 256 KB
Expandable No
data blocks
128 KB
(max. 8 MB)
(maintenance-free)
At least 10 years
Execution times
Processing times of
Bit operations 0.1 s
Word instructions 0.2 s
Fixed-point arithmetic 2 s
Floating-point arithmetic 3 s
S7 counters 256
IEC counters Yes
Type SFB
Number Unlimited
(limited only by work memory)
S7 timers 256
8.5 CPU 315-2 PN/DP
8-22 Manual, 12/2006 , A5E00105475-07
Technical data
IEC timers
Yes
Type SFB
Number Unlimited
Preset retentive address areas From MB0 to MB15
Data blocks
Number 1023
Size 16 KB
address areas)
Yes
Local data per priority class Max. 1024 bytes per execution level/510 bytes
per block
Blocks
Micro Memory Card.
Size 16 KB
Number of watchdog interrupts 1 (OB35)
Number of process interrupt OBs 1 (OB61)
Number of asynchronous error OBs 6 (OB 80, 82, 83, 85, 86, 87)
(OB 83 for PROFINET IO)
Nesting depth
Number, max. 1024
Size 16 KB
8.5 CPU 315-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-23
Technical data
FCs
See the Instruction List
Number, max. 1024
Size 16 KB
Address areas (I/O)
Distributed
Inputs
Outputs

2048 bytes (user-specific addressing)
2048 bytes (user-specific addressing)
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

128 bytes
128 bytes
Number of process image partitions 1
Digital channels
Inputs max. 16384
Outputs max. 16384
Inputs, central max. 1024
Outputs, central max. 1024
Analog channels
Inputs max. 1024
Outputs max. 1024
Removal
Racks max. 4
Modules per rack 8
Integrated 1
Via CP 4
Operable function modules and communication processors
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
8.5 CPU 315-2 PN/DP
8-24 Manual, 12/2006 , A5E00105475-07
Technical data
Time
Clock Yes (hardware clock)
Factory setting DT#1994-01-01-00:00:00
Buffered Yes
40 C)
buffered period
ON
The clock continues running after POWER OFF.
Precision Deviation per day: < 10 s
Number 0
Range of values 2
31
hours
Granularity 1 hour
Retentive Yes; must be restarted after every restart
In the AS Master/slave
On MPI Master/slave
On DP Master/slave
On Ethernet over NTP Yes (as client)
signaling functions
16
communication)
counters
Number of variables
30
Max. 30
Max. 14
Force
Number of variables max. 10
Block status Yes
Single-step Yes
Breakpoint 2
8.5 CPU 315-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-25
Technical data
Diagnostics buffer
Yes
Number of entries (not configurable) max. 500
POWER OFF / POWER ON The last 100 entries are retentive
Open IE communication
Number of connections / access points, total 8
TCP/IP Yes (via integrated PROFINET interface and
loadable FBs)
Maximum number of connections 8
Data length for connection type 01H, max. 1460 bytes
ISO on TCP Yes (via integrated PROFINET interface and
loadable FBs)
Data length, max. 8192 bytes
UDP Yes (via integrated PROFINET interface and
loadable FBs)
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Consistent data
max. 22 bytes
22 bytes
User data per job
Consistent data
max. 76 bytes
76 bytes
As server Yes
As client Yes (via integrated PN interface and loadable
FBs, or even via CP and loadable FBs)
User data per job
Consistent data
See the STEP 7 Online Help, Common
parameters of SFBs/FBs and SFC/FC of the S7
communication)
8.5 CPU 315-2 PN/DP
8-26 Manual, 12/2006 , A5E00105475-07
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
OP communication
Reserved (default)
Configurable
Max. 15
1
1 to 15
Reserved (default)
Configurable
Max. 14
0
0 to 14
Routing
Interface X1 configured as
MPI
DP master
DP slave (active)
Interface X2 configured as PROFINET
Yes

Max. 10
Max. 24
Max. 14
Max. 24
CBA
Reference setting for CPU communication 50%
Number of remote interconnecting partners 32
Number of master/slave functions 30
Total of all master/slave connections 1000
Data length of all incoming
master/slave connections, max.
4000 bytes
Data length of all outgoing
4000 bytes
Number of device-internal and PROFIBUS
interconnections
500
Data length of the device-internal and PROFIBUS
interconnections, max.
4000 bytes
Data length per connection, max. 1400 bytes
Remote interconnections with acyclical
transmission

Scan rate: Scan interval, min. 500 ms
Number of incoming interconnections 100
Number of outgoing interconnections 100
Data length of all incoming interconnections,
max.
2000 bytes
Data length of all outgoing interconnections,
max.
2000 bytes
Data length per connection, (acyclic
interconnections), max.
1400 bytes
8.5 CPU 315-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-27
Technical data
Remote interconnections with cyclical
transmission

Transmission frequency: Minimum
transmission interval
10 ms
max.
2000 bytes
max.
2000 bytes
450 bytes
HMI variables via PROFINET (acyclic)
Update HMI variables 500 ms
HMI variables (PN OPC/iMAP)
2xPN OPC/1x iMAP
Number of HMI variables 200
Data length of all HMI variables, max. 2000 bytes
PROFIBUS proxy functionality
supported Yes
Number of coupled PROFIBUS devices 16
Data length per connection, max. 240 bytes (slave dependent)
interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
PROFINET No
MPI
Services
Routing Yes
S7 communication
As server
As client
Yes
Yes
Transmission rates Max. 12 Mbaud
8.5 CPU 315-2 PN/DP
8-28 Manual, 12/2006 , A5E00105475-07
Technical data
DP Master

Services
Routing Yes
connection)
SYNC/FREEZE Yes
DPV1 Yes
Isochronous mode Yes (OB 61)
Enabling/disabling the DP slave Yes
Number of DP slaves 124
Address area max. 2 KB I / max. 2 KB 0
User data per DP slave max. 244 KB I / max. 244 KB 0
DP slave
Services
connection)
DPV1 No
2nd interface
Type of interface PROFINET
Physics Ethernet
RJ 45
Autosensing (10/100 Mbaud) Yes
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
8.5 CPU 315-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-29
Technical data
Services
PG communication Yes
OP communication Yes
S7 communication
Max. configurable interconnections
Maximum number of instances
Yes (with loadable FBs)
14
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
PROFINET IO
Number of integrated PROFINET IO controllers 1
Number of connectable PROFINET IO devices 128
Enabling / disabling PROFINET IO devices Yes
Max. user data consistency with PROFINET IO 256 bytes
Update Time 1 ms to 512 ms
The minimum value is determined by the set
communication portion for PROFINET IO, the
number of IO devices and the amount of
configured user data.
Send clock 1 ms
Routing Yes
S7 protocol functions
PG functions Yes
OP functions Yes
Over TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Programming
Nesting levels 8
8.6 CPU 317-2 DP
8-30 Manual, 12/2006 , A5E00105475-07
Technical data
Dimensions

Weight 460 g
Voltages, currents
Permitted range 20.4 V to 28.8 V
Current consumption (no-load operation), typically 100 mA
Power consumption (nominal value), typically 650 mA
I
2
t Min. 1 A
2
s
(recommended)
min. 2 A
8.6 CPU 317-2 DP
Table 8-7 Technical data for the CPU 317-2 DP
Technical data
CPU and version
Order no. [MLFB] 6ES7317-2AJ10-0AB0
Hardware version 01
Memory
Work memory
Integrated 512 KB
Expandable No
data blocks
max. 256 KB
(max. 8 MB)
(maintenance-free)
At least 10 years
Execution times
Processing times of
Fixed-point arithmetic 0.2 s
Floating-point arithmetic 1.0 s
8.6 CPU 317-2 DP
Manual, 12/2006 , A5E00105475-07 8-31
Technical data
S7 counters 512
IEC counters Yes
Type SFB
Number Unlimited
(limited only by working memory)
S7 timers 512
IEC timers Yes
Type SFB
Number Unlimited
Data blocks
Number 2047
Size 64 KB
address areas)
Yes
Blocks
Micro Memory Card.
OBs See the instruction list
Size 64 KB
Number of time-delay interrupt OBs 2 (OB 20, 21)
Number of watchdog interrupts 4 (OB 32, 33, 34, 35)
8.6 CPU 317-2 DP
8-32 Manual, 12/2006 , A5E00105475-07
Technical data
Number of asynchronous error OBs 5 (OB 80, 82, 85, 86, 87)
Nesting depth
Number, max. 2048
Size 64 KB
FCs See the instruction list
Number 2048
Size 64 KB
Address areas (I/O)
Inputs max. 8192 bytes (user-specific addressing)
Outputs max. 8192 bytes (user-specific addressing)
Distributed
Inputs
Outputs

max. 8192 bytes
max. 8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
Digital channels
Inputs max. 65636
Outputs max. 65636
Analog channels
Inputs max. 4096
Outputs max. 4096
8.6 CPU 317-2 DP
Manual, 12/2006 , A5E00105475-07 8-33
Technical data
Removal
Racks max. 4
Modules per rack 8
Integrated 2
Via CP 4
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
Time
Buffered Yes
40 C)
buffered period
Number 0 to 3
Range of values 2
31
hours
Granularity 1 hour
restart
On MPI Master/slave
On DP Master/slave
signaling functions
32
communication)
counters
Number of variables
30
max. 30
max. 14
8.6 CPU 317-2 DP
8-34 Manual, 12/2006 , A5E00105475-07
Technical data
Force
Block status Yes
Single-step Yes
Breakpoint 2
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Consistent data
max. 22 bytes
22 bytes
User data per job
Consistent data
max. 76 bytes
As server Yes
User data per job
Consistent data
160 byte (as the server)
Can be used for
PG communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
OP communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
Reserved (default)
Configurable
Max. 30
0
0 to 30
Routing Yes (max. 8)
8.6 CPU 317-2 DP
Manual, 12/2006 , A5E00105475-07 8-35
Technical data
interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
MPI
Services
Routing Yes
S7 communication
As server
As client

Yes
DP Master
Services
Routing Yes
connection)
Isochronous mode No
SYNC/FREEZE Yes
DPV1 Yes
Transmission rate Up to 12 Mbaud
Address area max. 8 KB I / 8 KB O
8.6 CPU 317-2 DP
8-36 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave
(except for DP slave at both interfaces)
Services
connection)
Address areas max. 32, max. 32 bytes each
DPV1 No
2nd interface
Physics RS 485
Interface power supply (15 to 30 VDC) max. 200 mA
Functionality
MPI No
PROFIBUS DP Yes
DP Master
Services
Routing Yes
connection)
Isochronous mode Yes (OB61)
SYNC/FREEZE Yes
DPV1 Yes
Transmission rate Up to 12 Mbps
8.6 CPU 317-2 DP
Manual, 12/2006 , A5E00105475-07 8-37
Technical data
DP slave
(except for DP slave at both interfaces)
Services
connection)
Transmission rates Up to 12 Mbps
Address areas max. 32, max. 32 bytes each
DPV1 No
Programming
Instruction set See the instruction list
Nesting levels 8
Dimensions
Weight 460 g
Voltages, currents
Current consumption (no-load operation),
typically
Typically 100 mA
Power consumption (nominal value), typically ???????
I
2
t 1 A
2
s
(recommended)
min. 2 A

8.7 CPU 317-2 PN/DP
8-38 Manual, 12/2006 , A5E00105475-07
8.7 CPU 317-2 PN/DP
Technical data
Technical data
CPU and version
Order no. [MLFB] 6ES7317-2EK13-0AB0
Hardware version 01
Memory
Work memory
Work memory 1024 KB
Expandable No
data blocks
256 KB
(max. 8 MB)
(maintenance-free)
At least 10 years
Execution times
Processing times of
Fixed-point arithmetic 0.2 s
Floating-point arithmetic 1.0 s
S7 counters 512
IEC counters Yes
Type SFB
Number Unlimited
S7 timers 512
8.7 CPU 317-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-39
Technical data
IEC timers
Yes
Type SFB
Number Unlimited
Data blocks
Number 2047
Size 64 KB
address areas)
Yes
Blocks
Micro Memory Card.
Size 64 KB
Number of time-delay interrupt OBs 2 (OB 20, 21)
Number of watchdog interrupts 4 (OB 32, 33, 34, 35)
Number of process interrupt OBs 1 (OB61)
Number of startup OBs 1 (OB100)
Number of asynchronous error OBs 6 (OB 80, 82, 83, 85, 86, 87)
(OB83 for PROFINET IO)
Nesting depth
Number, max. 2048
Size 64 KB
8.7 CPU 317-2 PN/DP
8-40 Manual, 12/2006 , A5E00105475-07
Technical data
FCs
Number, max. 2048
Size 64 KB
Address areas (I/O)
Inputs max. 8192 bytes (user-specific addressing)
Outputs max. 8192 bytes (user-specific addressing)
Distributed
Inputs
Outputs

max. 8192 bytes
max. 8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
Digital channels
Inputs max. 65536
Outputs max. 65536
Analog channels
Inputs max. 4096
Outputs max. 4096
Removal
Racks max. 4
Modules per rack 8
Integrated 1
Via CP 4
FM max. 8
CP (PtP) max. 8
CP (LAN) max. 10
8.7 CPU 317-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-41
Technical data
Time
Clock Yes (hardware clock)
Factory setting DT#1994-01-01-00:00:00
Buffered Yes
40 C)
buffered period
ON
Number 0 to 3
Value range 2
31
hours
Granularity 1 hour
restart
On MPI Master/slave
On DP Master/slave
On Ethernet via NTP Yes (as client)
signaling functions
32
communication)
counters
Number of variables
30
max. 30
max. 14
Force
Block status Yes
Single-step Yes
Breakpoint 2
8.7 CPU 317-2 PN/DP
8-42 Manual, 12/2006 , A5E00105475-07
Technical data
Diagnostics buffer
Yes
loadable FBs)
loadable FBs)
loadable FBs)
Sending stations
Receiving stations
max. 8
max. 8
max. 8
Consistent data
max. 22 bytes
22 bytes
User data per job
Consistent data
max. 76 bytes
76 bytes
As server Yes
User data per job
Consistent data
communication)
8.7 CPU 317-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-43
Technical data
can be used for

PG communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
OP communication
Reserved (default)
Configurable
Max. 31
1
1 to 31
Reserved (default)
Configurable
Max. 30
0
0 to 30
Routing
MPI
DP master
DP slave (active)
PROFINET

Yes
Max. 10
Max. 24
Max. 14

Max. 24
CBA
Reference setting for CPU communication 50%
Data length of all incoming
4000 bytes
Data length of all outgoing
4000 bytes
interconnections
500
4000 bytes
Remote interconnections with acyclic
transmission

max.
2000 bytes
max.
2000 bytes
1400 bytes
8.7 CPU 317-2 PN/DP
8-44 Manual, 12/2006 , A5E00105475-07
Technical data
transmission

10 ms
max.
2000 bytes
max.
2000 bytes
450 bytes
HMI variables (PN OPC/iMAP)
2xPN OPC/1x iMAP
supported Yes
interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
max. 200 mA
Functionality
MPI Yes
PROFIBUS DP Yes
PROFINET No
MPI
Services
Routing Yes
S7 communication
As server
As client
Yes
Yes
8.7 CPU 317-2 PN/DP
Manual, 12/2006 , A5E00105475-07 8-45
Technical data
DP Master

Services
Routing Yes
connection)
Enable/disable DP slave Yes
SYNC/FREEZE Yes
DPV1 Yes
User data per DP slave Max. 244 bytes I / 244 bytes O
DP slave
Services
connection)
DPV1 No
2nd interface
Physics Ethernet
RJ45
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
8.7 CPU 317-2 PN/DP
8-46 Manual, 12/2006 , A5E00105475-07
Technical data
Services
PG communication Yes
OP communication Yes
S7 communication
Yes (with loadable FBs)
16
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
PROFINET IO
Update Time 1 ms to 512 ms
The minimum value is determined by the set
communication portion for PROFINET IO, the
number of IO devices and the amount of
configured user data.
Send clock 1 ms
S7 protocol functions
PG functions Yes
OP functions Yes
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Programming
Nesting levels 8
Dimensions
Weight 460 g
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-47
Technical data
Voltages, currents
typically
100 mA
Power consumption (nominal value), typically 650 mA
I
2
t Min. 1 A
2
s
(recommended)
min. 2 A
8.8 CPU 319-3 PN/DP
Technical data
Technical data
CPU and version
Order no. [MLFB] 6ES7318-3EL00-0AB0
Hardware version 01
Associated programming package STEP 7 V5.4 + SP1 + HSP or higher
Memory / backup
Work memory
Work memory, integrated 1400 KB
Work memory, expandable No
data blocks
700 KB
(max. 8 MB)
At least 10 years
Buffering Up to 700 Kbytes (maintenance-free)
Execution times
Processing times of
Bit instructions, min. 0.01 s
Word instructions, min. 0.02 s
Fixed-point arithmetic, min. 0.02 s
Floating-point arithmetic, min. 0.1 s
8.8 CPU 319-3 PN/DP
8-48 Manual, 12/2006 , A5E00105475-07
Technical data
S7 counters
Number 2048
Retentive address areas, configurable Yes
Retentive address areas, preset From C0 to C7
IEC Counters
Available Yes
Type SFB
Number Unlimited
S7 timers
Number 2048
Retentive address areas, configurable Yes
Retentive address areas, preset Not retentive
IEC timers Yes
Type SFB
Number Unlimited
Bit memory
Number 8192 bytes
Retentive address areas, configurable MB 0 to MB 8191
Preset retentive address areas MB 0 to MB15
Number of clock memories 8 (1 memory byte)
Data blocks
Number 4095
(in 1 to 4095 range of numbers)
Size 64 KB
address areas)
Yes
Local data per priority class, max. 1024 bytes
Blocks
Total number of blocks 4096 (DBs, FCs, FBs)
Micro Memory Card.
Size, max. 64 KB
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-49
Technical data
OBs
Size, max. 64 KB
Number of free cycle OBs 1 (OB 1)
Number of time-of-day-interrupt OBs 1 (OB 10)
Number of delay interrupt OBs 2 (OB 20, 21)
Number of cyclic interrupt OBs 4 (OB 32, 33, 34, 35)
(OB 35: smallest configurable clock = 500 s)
Number of DPV1-interrupt OBs (only DP-
CPUs)
3 (OB 55, 56, 57)
Number of synchronous cycle interrupt OBs 1 (OB 61)
Number of asynchronous error interrupts 6 (OB 80, 82, 83, 85, 86, 87)
(OB83 only for PROFINET IO)
Number of synchronous error interrupt OBs 2 (OB 121, 122)
Nesting depth
FBs See the Instruction List
Number, max. 2048
Size 64 KB
FCs See the Instruction List
Number, max. 2048
Size 64 KB
Address areas (I/O)
Inputs 8192 bytes
Outputs 8192 bytes
Distributed
Inputs
Outputs

8192 bytes
8192 bytes
I/O process image
Configurable
Inputs
Outputs

2048 bytes
2048 bytes
Preset
Inputs
Outputs

256 bytes
256 bytes
8.8 CPU 319-3 PN/DP
8-50 Manual, 12/2006 , A5E00105475-07
Technical data
Digital channels

Inputs 65536
Outputs 65536
Inputs, central 1024
Analog channels
Inputs 4096
Outputs 4096
Inputs, central 256
Removal
Racks, max. 4
Modules per rack, max. 8
Integrated 2
Via CP 4
processors

FM 8
CP (PtP) 8
CP (LAN) 10
Time
Clock
Hardware clock Yes
Buffered Yes
40C)
buffered period
ON
Operating hours counter
Number 4
Number 0 to 3
Value range 0 to 2
31
hours
(using the SFC 101)
Granularity 1 hour
restart
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-51
Technical data

supported Yes
On MPI Master/slave
On DP Master/slave
on Ethernet via NTP Yes (as client)
signaling functions
32
communication)
Status/control variables
Variables Inputs, outputs, memory bits, DBs, timers,
counters
Maximum number of variables 30
Number of variables
status variables, max.

30
Number of variables
control variables, max.

14
Force
Force Yes
Force, variables Inputs/outputs
Force, maximum number of variables 10
Block status Yes
Single-step Yes
Number of breakpoints 2
Diagnostics buffer
Available Yes
Maximum number of entries 500
loadable FBs)
8.8 CPU 319-3 PN/DP
8-52 Manual, 12/2006 , A5E00105475-07
Technical data
loadable FBs)
loadable FBs)
Routing Yes
supported Yes
Number of GD circuits, max. 8
Number of GD packets, max. 8
Number of GD packets, sender, max. 8
Number of GD packets, receiver, max. 8
Size of GD packets, max. 22 bytes
Size of GD packets, consistent, max. 22 bytes
supported Yes
User data per job, max. 76 bytes
User data per job, consistent, max. 76 bytes (for X_SEND or X_RCV), 64 bytes (for
X_PUT or X_GET as the server)
S7 communication
supported Yes
As server Yes
User data per job
Consistent data
communication)
S5compatible communication
supported Yes (via CP and loadable FCs)
Number of connections
Total 32
usable for PG communication 31
PG communication, reserved 1
PG communication, configurable, max. 31
usable for OP communication 31
OP communication, reserved 1
OP communication, configurable, max. 31
usable for S7 basic communication 30
S7 basic communication, reserved 0
S7 basic communication, configurable, max. 30
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-53
Technical data
PROFINET CBA
Reference setting for the CPU communication
load
20%
Data length of all incoming master/slave
connections, max.
24,000 bytes
Data length of all outgoing master/slave
connections, max.
24,000 bytes
interconnections
1000
8000 bytes
Remote interconnections with acyclical
transmission

max.
3200 bytes
max.
3200 bytes
1400 bytes
transmission

1 ms
max.
4800 bytes
Data length of all outgoing interconnections 4800 bytes
250 bytes
HMI variables (PN OPC/iMap)
2xPN OPC / 1x iMap
8.8 CPU 319-3 PN/DP
8-54 Manual, 12/2006 , A5E00105475-07
Technical data

supported Yes
interfaces
1st interface
Physics RS 485
(15 to 30 VDC)
Max. 150 mA
Functionality
MPI Yes
DP master Yes
DP slave Yes
MPI
Services
Routing Yes
S7 communication, as server Yes
S7 communication, as client No (but via CP and loadable FBs)
Transmission rates Max. 12 Mbits/s
DP master
Services
Routing Yes
connection)
Constant bus cycle time support Yes
Isochronous mode No
SYNC/FREEZE Yes
DPV1 Yes
Transmission speed Max. 12 Mbits/s
Number of DP slaves Max. 124
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-55
Technical data
DP slave (except for DP slave at both DP interfaces)
Services
connection)
DPV1 No
Transmission rates Up to 12 Mbits/s
Intermediate memory
Inputs 244 bytes
Outputs 244 bytes
Address areas Max. 32, max. 32 bytes each
2nd interface
Physics RS 485
Functionality
MPI No
DP master Yes
DP slave Yes
DP master
Services
Routing Yes
connection)
SYNC/FREEZE Yes
DPV1 Yes
8.8 CPU 319-3 PN/DP
8-56 Manual, 12/2006 , A5E00105475-07
Technical data
DP slave (except for DP slave at both DP interfaces)
Services
connection)
DPV1 No
3rd. interface
Physics Ethernet
RJ45
Functionality
PROFINET Yes
MPI No
PROFIBUS DP No
Services
S7 communication
Yes
16
32
Routing Yes
PROFINET IO Yes
PROFINET CBA Yes
via TCP/IP
ISO on TCP
UDP

Yes
Yes
Yes
Web server Yes
8.8 CPU 319-3 PN/DP
Manual, 12/2006 , A5E00105475-07 8-57
Technical data
PROFINET IO
Update Time 250 s to 128 ms (at send clock 250 s)
500 s to 256 ms (at send clock 500 s)
1 ms to 512 ms (at send clock 1 ms)
The minimum update time is determined by the
time slice set for PROFINET IO communication,
by the number of IO devices used, and by the
amount of configured user data.
Send clock 250 s, 500 s, 1 ms
PROFINET CBA
Acyclic transfer Yes
Cyclic transfer Yes
CPU/Programming
Programming language STEP 7 as of V5.3
LAD Yes
FBD Yes
STL Yes
SCL Yes
CFC Yes
GRAPH Yes
HiGraph Yes
Nesting levels 8
Dimensions
Weight 1250 g
Supply voltage
Lower limit of admissible range (DC) 20.4 V
Upper limit of admissible range (DC) 28.8 V
(recommended)
min. 2 A
Current consumption
Making current, typically 4 A
I
2
t 1.2 A
2
s
typically
0.4 A
Power consumption (nominal value), typically 1.05 A
Power loss, typically 14 W

8.8 CPU 319-3 PN/DP
8-58 Manual, 12/2006 , A5E00105475-07

Manual, 12/2006 , A5E00105475-07 A-1
Appendix
A
A.1 Information about upgrading to a CPU 31xC or CPU 31x
A.1.1 Scope
Who should read this information?
You are already using a CPU from the SIEMENS S7-300 series and now want to upgrade to
a new device.
Please note that problems may occur while downloading your user program to the "new"
CPU.
If you have used one of the following CPUs in the past ...

as of version CPU Order number
Firmware
CPU 312 IFM 6ES7 312-5AC02-0AB0
6ES7 312-5AC82-0AB0
V1.0.0
CPU 313 6ES7 313-1AD03-0AB0 V1.0.0
CPU 314 6ES7 314-1AE04-0AB0
6ES7 314-1AE84-0AB0
V1.0.0
CPU 314 IFM 6ES7 314-5AE03-0AB0 V1.0.0
CPU 314 IFM 6ES7 314-5AE83-0AB0 V1.0.0
CPU 315 6ES7 315-1AF03-0AB0 V1.0.0
CPU 315-2 DP 6ES7 315-2AF03-0AB0
6ES7 315-2AF83-0AB0
V1.0.0
CPU 316-2 DP 6ES7 316-2AG00-0AB0 V1.0.0
CPU 318-2 DP 6ES7 318-2AJ00-0AB0 V3.0.0
Appendix
A-2 Manual, 12/2006 , A5E00105475-07
... then please note if you upgrade to one of the following CPUs

as of version CPU Order number
Firmware
Hereafter called
312 6ES7312-1AE13-0AB0 V2.6
312C 6ES7312-5BE03-0AB0 V2.6
313C 6ES7313-5BF03-0AB0 V2.6
313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
313C-2 DP 6ES7313-6CF03-0AB0 V2.6
314 6ES7314-1AG13-0AB0 V2.6
314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
314C-2 DP 6ES7314-6CG03-0AB0 V2.6
315-2 DP 6ES7315-2AG10-0AB0 V2.6
315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
317-2 DP 6ES7317-2AJ10-0AB0 V2.5
317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
319-3 PN/DP 6ES7318-3EL00-0AB0 V2.5
CPU 31xC/31x
Reference
If you intend to migrate from PROFIBUS DP to PROFINET, we also recommend the
following manual: Programming manual From PROFIBUS DP to PROFINET IO
See also
DPV1 (Page 3-53)
Appendix
Manual, 12/2006 , A5E00105475-07 A-3
A.1.2 Changed behavior of certain SFCs
SFC 56, SFC 57 and SFC 13 which work asynchronously
Some of the SFCs that work asynchronously, when used on CPUs 312IFM 318-2 DP, were
always, or under certain conditions, processed after the first call ("quasi-synchronous").
On the 31xC/31x CPUs these SFCs actually run asynchronously. Asynchronous processing
may cover multiple OB1 cycles. As a result, a wait loop may turn into an endless loop within
an OB.
The following SFCs are affected:
SFC 56 "WR_DPARM"; SFC 57 "PARM_MOD"
On CPUs 312 IFM to 318-2 DP, these SFCs always work "quasi-synchronously" during
communication with centralized I/O modules and always work synchronously during
communication with distributed I/O modules.

Note
If you are using SFC 56 "WR_DPARM" or SFC 57 "PARM_MOD", you should always
evaluate the SFC's BUSY bit.

SFC 13 "DPNRM_DG"
On CPUs 312 IFM to 318-2 DP, this SFC always works "quasi synchronously" when it is
called in OB82. On CPUs 31xC/31x it generally works asynchronously.

Note
In the user program, the job should merely be started in OB 82. The data should be
evaluated in the cyclical program, taking account of the BUSY bits and the value returned
in RET_VAL.

Hint
If you are using a CPU 31xC/31x, we recommend that you use SFB 54, rather than SFC
13 "DPNRM_DG".
SFC 20 "BLKMOV"
In the past, this SFC could be used with CPUs 312 IFM to 318-2 DP to copy data from a non
runtime-related DB.
SFC 20 no longer has this functionality with CPUs 31xC/31x. SFC83 "READ_DBL" is now
used instead.
Appendix
A-4 Manual, 12/2006 , A5E00105475-07
SFC 54 "RD_DPARM"
This SFC is no longer available on CPUs 31xC/31x. Use SFC 102 "RD_DPARA" instead,
which works asynchronously.
SFCs that may return other results
You can ignore the following points if you only use logical addressing in your user program.
When using address conversion in your user program (SFC 5 "GADR_LGC",
SFC 49 "LGC_GADR"), you must check the assignment of the slot and logical start address
for your DP slaves.
In the past, the diagnostic address of a DP slave was assigned to the slave's virtual slot
2. Since DPV1 was standardized, this diagnostic address has been assigned to virtual
slot 0 (station proxy) for CPUs 31xC/31x.
If the slave has modeled a separate slot for the interface module (e.g. CPU31x-2 DP as
an intelligent slave or IM 153), then its address is assigned to slot 2.
Activating / deactivating DP slaves via SFC 12
With CPUs 31xC/31x, slaves that were deactivated via SFC 12 are no longer automatically
activated at the RUN to STOP transition. Now they are not activated until they are restarted
(STOP to RUN transition).
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP
Interrupt events from distributed I/Os while the CPU status is in STOP
With the new DPV1 functionality (IEC 61158/ EN 50170, volume 2, PROFIBUS), the
handling of incoming interrupt events from the distributed I/Os while the CPU status is in
STOP has also changed.
Previous response by the CPU with STOP status
With CPUs 312IFM 318-2 DP, initially an interrupt event was noticed while the CPU was in
STOP mode. When the CPU status subsequently returned to RUN, the interrupt was then
fetched by an appropriate OB (e.g. OB 82).
New response by the CPU
With CPUs 31xC/31x, an interrupt event (process or diagnostic interrupt, new DPV1
interrupts) is acknowledged by the distributed I/O while the CPU is still in STOP status, and
is entered in the diagnostic buffer if necessary (diagnostic interrupts only). When the CPU
status subsequently returns to RUN, the interrupt is no longer fetched by the OB. Possible
slave faults can be read using suitable SSL queries (e.g. read SSL 0x692 via SFC51).
Appendix
Manual, 12/2006 , A5E00105475-07 A-5
A.1.4 Runtimes that change while the program is running
Runtimes that change while the program is running
If you have created a user program that has been fine-tuned in relation to certain processing
times, please note the following points if you are using a CPU 31xC/31x:
the program will run much faster on the CPU 31xC/31x.
Functions that require MMC access (e.g. system start-up time, program download in
RUN, return of DP station, etc), may sometimes run slower on the CPU 31xC/31x.
A.1.5 Converting the diagnostic addresses of DP slaves
Converting the diagnostic addresses of DP slaves
If you are using a CPU 31xC/31x with DP interface as the master, please note that you may
have to reassign the diagnostic addresses for the slaves since the changes to the DPV1
standard sometimes require two diagnostic addresses per slave.
The virtual slot 0 has its own address (diagnostic address of the station proxy). The
module status data for this slot (read SSL 0xD91 with SFC 51 "RDSYSST") contains IDs
that relate to the entire slave/station, e.g., the station error ID. Failure and restoration of
the station are also signaled in OB86 on the master via the diagnostic address of the
virtual slot 0.
At some of the slaves the interface module is also modeled as a separate virtual slot (for
example, CPU as an intelligent slave or IM153), and a suitable separate address is
assigned to virtual slot 2.
The change of operating status is signaled in the master's diagnostic interrupt OB 82 via
this address for CPU 31xC-2DP acting as an intelligent slave.

Note
Reading diagnostics data with SFC 13 "DPNRM_DG":
The originally assigned diagnostics address still works. Internally, STEP 7 assigns this
address to slot 0.

When using SFC51 "RDSYSST", for example, to read module status information or module
rack/station status information, you must also consider the change in slot significance as well
as the additional slot 0.
Appendix
A-6 Manual, 12/2006 , A5E00105475-07
A.1.6 Reusing existing hardware configurations
Reusing existing hardware configurations
If you reuse the configuration of a CPU 312 IFM to 318-2 DP for a CPU 31xC/31x, the CPU
31xC/31x may not run correctly.
If this is the case, you will have to replace the CPU in the STEP 7 hardware configuration
editor. When you replace the CPU, STEP 7 will automatically accept all the settings (if
appropriate and possible).
A.1.7 Replacing a CPU 31xC/31x
Replacing a CPU 31xC/31x
When supplied, the CPU 31xC/31x adds a connecting plug to the power supply connector.
You no longer need to disconnect the cables of the CPU when you replace a 31xC / 31x
CPU. Insert a screwdriver with 3.5 mm blade into the right side of the connector to open the
interlock mechanism, then unplug it from the CPU. Once you have replaced the CPU, simply
plug the connecting plug back into the power supply connector.
Appendix
Manual, 12/2006 , A5E00105475-07 A-7
A.1.8 Using consistent data areas in the process image of a DP slave system
Consistent data
The table below illustrates the points to consider with respect to communication in a DP
master system if you want to transfer I/O areas with "Total length" consistency. You can
transfer a maximum of 128 bytes of consistent data.
Table A-1 Consistent data
CPU 315-2 DP
(as of firmware 2.0.0),
CPU 317, CPU 319
CPU 31xC
CPU 315-2 DP
(as of firmware 1.0.0),
CPU 316-2 DP,
CPU 318-2 DP (firmware < 3.0)
CPU 318-2 DP
(firmware >= 3.0)
The address area of consistent
data in the process image is
automatically updated.
Even if they exist in the process
image, consistent data is not
automatically updated.
You can choose whether or not
to update the address area of
consistent data in the process
image.
In order to read and write
consistent data
you can also use the SFCs 14
and 15
If the address area of consistent
data is outside the process
image,
you have to use the SFCs 14
and 15 to read and write
consistent data.
Direct access to consistent
areas is also possible (e.g.
L PEW or T PAW).
To read and write consistent data,
you must use SFC14 and 15.
To read and write consistent
data, you can also use SFC 14
and SFC 15.
If the address area of
consistent data is not in the
process image, you must use
SFC 14 and SFC 15 to read
and write consistent data.
Direct access to consistent
areas is also possible (for
example, L PEW or T PAW).
Appendix
A-8 Manual, 12/2006 , A5E00105475-07
A.1.9 Load memory concept for the CPU 31xC/31x
Load memory concept for the CPU 31xC/31x
On CPUs 312 IFM to 318-2 DP, the load memory is integrated into the CPU and may be
extended with a memory card,
The load memory of the CPU 31xC/31x is located on the micro memory card (MMC), and is
retentive. When blocks are downloaded to the CPU, they are stored on the MMC and cannot
be lost even in the event of a power failure or memory reset.
Reference
See also the Memory concept chapter in the CPU Data 31xC and 31x manual.

Note
User programs can only be downloaded and thus the CPU can only be used if the MMC is
inserted.

A.1.10 PG/OP functions
PG/OP functions
With CPUs 315-2 DP (6ES7315-2AFx3-0AB0), 316-2DP and 318-2 DP, PG/OP functions at
the DP interface were only possible if the interface was set to active. With CPUs 31xC/31x,
these functions are possible at both active and passive interfaces. The performance of the
passive interface is considerably lower, however.
A.1.11 Routing for the CPU 31xC/31x as an intelligent slave
Routing for the CPU 31xC/31x as an intelligent slave
If you use the CPU 31xC/31x as an intelligent slave, the routing function can only be used
with an actively-configured DP interface.
In the properties of the DP interface in STEP 7, select the "Test, Commissioning, Routing"
check box of the "DP-Slave" option.
Appendix
Manual, 12/2006 , A5E00105475-07 A-9
A.1.12 Changed retentive behavior of CPUs with firmware V2.0.12 or higher
Changed retentive behavior for CPUs with firmware >= V 2.0.12
For data blocks for these CPUs
you can set the retentive response in the block properties of the DB.
Using SFC 82 "CREA_DBL" -> Parameter ATTRIB, NON_RETAIN bit, you can specify if
the actual values of a DB should be maintained at POWER OFF/ON or STOP-RUN
(retentive DB) or if the start values should be read from the load memory (non-retentive
DB).
A.1.13 FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP, a
CPU 317 or a CPU 319-3 PN/DP
FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP / CPU 317 /
CPU 319-3 PN/DP

All CPUs except CPU 315-2 PN/DP, CPU 317,
CPU 318-2 DP and CPU 319-3 PN/DP
CPU 315-2 PN/DP, CPU 317 ,CPU 318-2 DP and
CPU 319-3 PN/DP
If there are FM/CPs with their own MPI address in
the central rack of an S7-300, then they are in the
exact same CPU subnet as the CPU MPI station.
If there are FM/CPs with their own MPI address
in the central rack of an S7-300, then the CPU
forms its own communication bus via the
backplane bus with these FM/CPs, which are
separated from the other subnets.
The MPI address of such an FM/CP is no longer
relevant for the stations on other subnets. The
communication to the FM/CP is made via the MPI
address of the CPU.
When exchanging your existing CPU with a CPU 315-2 PN/DP / CPU 317 / CPU 319-3
PN/DP, you therefore need to
replace the CPU in your STEP 7 project with the CPU 315-2 PN/DP / CPU 317 /
CPU 319-3 PN/DP
Reconfigure the OPs. The control and the destination address must be reassigned (= the
MPI address of the CPU 315-2 PN/DP / CPU 317
CPU 319-3 PN/DP and the slot of the respective FM)
Reconfigure the project data for FM/CP to be loaded to the CPU.
This is required for the FM/CP in this rack to remain "available" to the OP/PG.
Appendix
A-10 Manual, 12/2006 , A5E00105475-07
A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET
interface
If you have already used S7 communication via CP with loadable FBs (FB 8, FB 9, FB 12
FB 15 and FC 62 with version V1.0) from the SIMATIC_NET_CP STEP 7 library (these
blocks all feature the family type CP300 PBK) and now want to use the integrated
PROFINET interface for S7 communication, you must use the corresponding blocks from the
Standard Library\Communication Blocks STEP 7 library in your program (the corresponding
blocks FB 8, FB 9, FB 12 FB 15 and FC 62 have at least version V1.1 and family type
CPU_300).
Procedure
1. Download and overwrite the old FBs/FCs in your program container with the
corresponding blocks from the standard library.
2. Update the corresponding block calls, including updating the instance DBs, in your user
program.

Manual, 12/2006 , A5E00105475-07 Glossary-1
Glossary
Accumulator
Accumulators represent CPU register and are used as buffer memory for download, transfer,
comparison, calculation and conversion operations.
Address
An address is the identifier of a specific address or address area. Examples: Input I 12.1;
Flag Word MW 25; Data Block DB 3.
Analog module
Analog modules convert process values (e.g. temperature) into digital values which can be
processing in the CPU, or they convert digital values into analog manipulated variables.
Application
An application is a program that runs directly on the MS-DOS / Windows operating system.
Applications on the PG include the STEP 5 basic package, GRAPH 5 and others.
User program
ASIC
ASIC is the acronym for Application Specific Integrated Circuits.
PROFINET ASICs are components with a wide range of functions for the development of
your own devices. They implement the requirements of the PROFINET standard in a circuit
and allow extremely high packing densities and performance.
Because PROFINET is an open standard, SIMATIC NET offers PROFINET ASICs for the
development of your old devices under the name ERTEC .
Backplane bus
The backplane bus is a serial data bus. It supplies power to the modules and is also used by
the modules to communicate with each other. Bus connectors interconnect the modules.
Backup memory
Backup memory ensures buffering of the memory areas of a CPU without backup battery. It
backs up a configurable number of timers, counters, flag bits, data bytes and retentive
timers, counters, flag bits and data bytes).
Glossary

Glossary-2 Manual, 12/2006 , A5E00105475-07
Bit memory
Flag bits are part of the CPU's system memory. They store intermediate results of
calculations. They can be accessed in bit, word or dword operations.
Bus
A bus is a communication medium connecting several nodes. Data can be transferred via
serial or parallel circuits, that is, via electrical conductors or fiber optic.
Bus segment
A bus segment is a self-contained section of a serial bus system. Bus segments are
interconnected by way of repeaters, for example, in PROFIBUS DP.
Central module
CPU
Clock flag bits
flag bit which can be used to generate clock pulses in the user program (1 byte per flag bit).

Note
When operating with S7-300 CPUs, make sure that the byte of the clock memory bit is not
overwritten in the user program!

Code block
A SIMATIC S7 code block contains part of the STEP 7 user program. (in contrast to a DB:
this contains only data.)
Component-based automation
PROFINET CBA
Compress
The PG online function "Compress" is used to rearrange all valid blocks in CPU RAM in a
contiguous area of load memory, starting at the lowest address. This eliminates
fragmentation which occurs when blocks are deleted or edited.
Configuration
Assignment of modules to module racks/slots and (e.g. for signal modules) addresses.
Glossary

Consistent data
Data which belongs together in terms of content and must not be separated is known as
consistent data.
For example, the values of analog modules must always be handled as a whole, i.e. the
value of an analog module must not be corrupted as a result of read access at two different
times.
Counters
Counters are part of CPU system memory. The content of "Counter cells" can be modified by
STEP 7 instructions (for example, up/down count.)
CPU
Central processing unit = CPU of the S7 automation system with a control and arithmetic
unit, memory, operating system, and interface for programming device.
Cycle time
The cycle time represents the time a CPU requires for one execution of the user program.
Cyclic interrupt
Interrupt, cyclic interrupt
Data block
Data blocks (DB) are data areas in the user program which contain user data. There are
global data blocks which can be accessed by all code blocks, and instance data blocks
which are assigned to a specific FB call.
Data, static
Static data can only be used within a function block. These data are saved in an instance
data block that belongs to a function block. Data stored in an instance data block are
retained until the next function block call.
Data, temporary
Temporary data represent local data of a block. They are stored in the L-stack when the
block is executed. After the block has been processed, these data are no longer available.
Default router
The default router is the router that is used when data must be forwarded to a partner
located within the same subnet.
In STEP 7, the default router is named Router. STEP 7 assigns the local IP address to the
default router.
Glossary

Determinism
Real Time
Device
Within the context of PROFINET, "device" is the generic term for:
Automation systems,
Field devices (for example, PLC, PC),
Active network components (for example, distributed I/O, valve blocks, drives),
hydraulic devices and
pneumatic devices.
The main characteristic of a device is its integration in PROFINET communication over
Ethernet or PROFIBUS.
The following device types are distinguished based on their attachment to the bus:
PROFINET devices
PROFIBUS devices
PROFIBUS device
PROFINET device
Device Name
Before an IO device can be addressed by an IO controller, it must have a device name. In
PROFINET, this method was selected because it is simpler to work with names than with
complex IP addresses.
The assignment of a device name for a concrete IO device can be compared with setting the
PROFIBUS address of a DP slave.
When it ships, an IO device does not have a device name. An IO device can only be
addressed by an IO controller, for example for the transfer of project engineering data
(including the IP address) during startup or for user data exchange in cyclic operation, after it
has been assigned a device name with the PG/PC .
Diagnostic interrupt
Modules capable of diagnostics operations report detected system errors to the CPU by
means of diagnostic interrupts.
Diagnostics
System diagnostics
Diagnostics buffer
The diagnostics buffer represents a buffered memory area in the CPU. It stores diagnostic
events in the order of their occurrence.
Glossary

DP master
A master which behaves in accordance with EN 50170, Part 3 is known as a DP master.
DP slave
A slave operated on PROFIBUS with PROFIBUS DP protocol and in accordance with EN
50170, Part 3 is referred to as DP slave.
DPV1
The designation DPV1 means extension of the functionality of the acyclical services (to
include new interrupts, for example) provided by the DP protocol. The DPV1 functionality has
been incorporated into IEC 61158/EN 50170, volume 2, PROFIBUS.
Electrically isolated
The reference potential of the control and on-load power circuits of isolated I/O modules is
electrically isolated; for example, by optocouplers, relay contact or transformer. I/O circuits
can be interconnected with a root circuit.
Equipotential bonding
Electrical connection (equipotential bonding conductor) which eliminates potential difference
between electrical equipment and external conductive bodies by drawing potential to the
same or near the same level, in order to prevent disturbing or dangerous voltages between
these bodies.
Error display
One of the possible reactions of the operating system to a runtime error is to output an error
message. Further reactions: Error reaction in the user program, CPU in STOP.
Error handling via OB
After the operating system has detected a specific error (e.g. access error with STEP 7), it
calls a dedicated block (Error OB) that determines further CPU actions.
Error response
Reaction to a runtime error. Reactions of the operating system: It sets the automation
system to STOP, indicates the error, or calls an OB in which the user can program a
reaction.
ERTEC
ASIC
Glossary

Fast Ethernet
Fast Ethernet describes the standard with which data is transmitted at 100 Mbps. Fast
Ethernet uses the 100 Base-T standard.
FB
Function block
FC
Function
Flash EPROM
FEPROMs can retain data in the event of power loss, same as electrically erasable
EEPROMs. However, they can be erased within a considerably shorter time (FEPROM =
Flash Erasable Programmable Read Only Memory). They are used on Memory Cards.
Force
The Force function can be used to assign the variables of a user program or CPU (also:
inputs and outputs) constant values.
In this context, please note the limitations listed in the Overview of the test functions section
in the chapter entitled Test functions, Diagnostics and Troubleshooting in the S7-300
Installation manual.
Function
According to IEC 1131-3, a function (FC) is a code block without static data. A function
allows parameters to be passed in the user program. Functions are therefore suitable for
programming frequently occurring complex functions, for example calculations.
Function block
According to IEC 1131-3, a function block (FB) is a code block with static data. A function
block allows parameters to be transferred to the user program. Function blocks are therefore
suitable for programming frequently occurring complex functions, for example controls, mode
selections.
Functional ground
Grounding which has the sole purpose of safeguarding the intended function of electrical
equipment. With functional grounding you short-circuit interference voltage which would
otherwise have an unacceptable impact on equipment.
Glossary

GD circuit
A GD circuit comprises a number of CPUs sharing data by means of global data
communication, and is used as follows:
A CPU broadcasts a GD packet to the other CPUs.
A CPU sends and receives a GD packet from another CPU.
A GD circuit is identified by a GD circuit number.
GD element
A GD element is generated by assigning shared global data. It is identified by a unique
global data ID in the global data table.
GD packet
A GD packet can consist of one or several GD elements transmitted in a single message
frame.
Global data
Global data can be addressed from any code block (FC, FB, OB). In particular, this refers to
flag bits M, inputs I, outputs Q, timers, counters and data blocks DB. Global data can be
accessed via absolute or symbolic addressing.
Global data communication is a method of transferring global data between CPUs (without
CFBs).
Ground
The conductive earth whose electrical potential can be set equal to zero at any point.
Ground potential can be different from zero in the area of grounding electrodes. The term
reference ground is frequently used to describe this situation.
Grounding means, to connect an electrically conductive component via an equipotential
grounding system to a grounding electrode (one or more conductive components with highly
conductive contact to earth).
Chassis ground is the totality of all the interconnected passive parts of a piece of equipment
on which dangerous fault-voltage cannot occur.
GSD file
The properties of a PROFINET device are described in a GSD file (General Station
Description) that contains all the information required for configuration.
As with PROFIBUS, you can incorporate a PROFINET device into STEP 7 via a GSD file.
In PROFINET IO, the GSD file is in XML format. The structure of the GSD file conforms to
ISO 15734, which is the world-wide standard for device descriptions.
In PROFIBUS, the GSD file is in ASCII format.
Glossary

HART
English: Highway Adressable Remote Transducer
Industrial Ethernet
Industrial Ethernet (formerly SINEC H1) is a technology that allows data to be transmitted
free of interference in an industrial environment.
Due to the openness of PROFINET, you can use standard Ethernet components. We
recommend, however, that you install PROFINET as Industrial Ethernet.
Fast Ethernet
Instance data block
The STEP 7 user program assigns an automatically generated DB to every call of a function
block. The instance data block stores the values of inputs / outputs and in/out parameters, as
well as local block data.
Interrupt
The CPU's operating system distinguishes between different priority classes for user
program execution. These priority classes include interrupts, e.g. process interrupts. When
an interrupt is triggered, the operating system automatically calls an assigned OB. In this OB
the user can program the desired response (e.g. in an FB).
A cyclic interrupt is generated periodically by the CPU in a configurable time pattern. A
corresponding OB will be processed.
Interrupt, delay
The delay interrupt belongs to one of the priority classes in SIMATIC S7 program
processing. It is generated on expiration of a time started in the user program. A
Interrupt, delay
Interrupt, diagnostic
Interrupt, process
Process interrupt
Glossary

Interrupt, status
A status interrupt can be generated by a DPV1 slave and causes OB 55 to be called on the
DPV1 master. For detailed information on OB 55, see the Reference Manual System
software for S7-300/400: System and Standard Functions.
Interrupt, time-of-day
The time-of-day interrupt belongs to one of the priority classes in
SIMATIC S7 program processing. It is generated at a specific date (or daily) and time-of-day
(e.g. 9:50 or hourly, or every minute). A corresponding OB will be processed.
Interrupt, update
An update interrupt can be generated by a DPV1 slave and causes OB56 to be called on the
DPV1 master. For detailed information on OB56, see the Reference Manual System
Interrupt, vendor-specific
A vendor-specific interrupt can be generated by a DPV1 slave. It causes OB57 to be called
on the DPV1 master.
For detailed information on OB 57, see the Reference Manual System Software for
S7-300/400: System and Standard Functions.
IO controller
PROFINET IO controller
PROFINET IO device
PROFINET IO Supervisor
PROFINET IO system
IO device
PROFINET IO device
PROFINET IO system
IO supervisor
PROFINET IO device
PROFINET IO system
Glossary

IO system
PROFINET IO system
IP address
To allow a PROFINET device to be addressed as a node on Industrial Ethernet, this device
also requires an IP address that is unique within the network. The IP address is made up of
4 decimal numbers with a range of values from 0 through 255. The decimal numbers are
separated by a period.
The IP address is made up of
The address of the (subnet) network and
The address of the node (generally called the host or network node).
Load memory
This memory contains objects generated by the programming device. Load memory is
implemented by means of a plug-in Micro Memory Card of different memory capacities. The
SIMATIC Micro Memory Card must be inserted to allow CPU operation.
Load power supply
Power supply to the signal / function modules and the process I/O connected to them.
Local data
Data, temporary
MAC address
Each PROFINET device is assigned a worldwide unique device identifier in the factory. This
6-byte long device identifier is the MAC address.
The MAC address is divided up as follows:
3 bytes vendor identifier and
3 bytes device identifier (consecutive number).
The MAC address is normally printed on the front of the device.
Example: 08-00-06-6B-80-C0
Master
When a master has the token, it can send data to other nodes and request data from other
nodes (= active node).
Slave
Glossary

Memory Card (MC)
Memory Cards are memory media for CPUs and CPs. They are implemented in the form of
RAM or FEPROM. An MC differs from a Micro Memory Card only in its dimensions (MC is
approximately the size of a credit card).
Micro Memory Card (MMC)
Micro Memory Cards are memory media for CPUs and CPs. Their only difference to the
Memory Card is the smaller size.
Module parameters
Module parameters are values which can be used to configure module behavior. A
distinction is made between static and dynamic module parameters.
NCM PC
SIMATIC NCM PC
Nesting depth
A block can be called from another by means of a block call. Nesting depth is referred to as
the number of simultaneously called code blocks.
Network
A network is a larger communication system that allows data exchange between a large
number of nodes.
All the subnets together form a network.
Non-isolated
The reference potential of the control and on-load power circuits of non-isolated I/O modules
is electrically interconnected.
OB
Organization blocks
OB priority
The CPU operating system distinguishes between different priority classes, for example,
cyclic program execution, process interrupt controlled program processing. Each priority
class is assigned organization blocks (OBs) in which the S7 user can program a response.
The OBs are assigned different default priority classes. These determine the order in which
OBs are executed or interrupt each other when they appear simultaneously.
Glossary

Operating state
SIMATIC S7 automation systems know the following operating states: STOP, START, RUN.
Operating system
The CPU operating system organizes all the CPU functions and processes which are not
associated with a specific control task.
CPU
Organization blocks
Organization blocks (OBs) form the interface between the CPU operating system and the
user program. The order in which the user program is run is defined in the organization
blocks.
Parameters
1. Variable of a STEP 7 code block
2. Variable for declaring module response (one or several per module). All modules have a
suitable basic factory setting which can be customized in STEP 7.
There are static and dynamic parameters.
Parameters, dynamic
Unlike static parameters, you can change dynamic module parameters during runtime by
calling an SFC in the user program, e.g. limit values of an analog signal input module.
Parameters, static
Unlike dynamic parameters, static parameters of modules cannot be changed by the user
program. You can only modify these parameters by editing your configuration in STEP 7, for
example, modification of the input delay parameters of a digital signal input module.
PC station
SIMATIC PC station
PG
Programming device
PLC
A PLC in the context of SIMATIC S7 --> is a programmable logic controller.
Programmable logic controller
Glossary

PNO
Technical committee that defines and further develops the PROFIBUS and PROFINET
standards.
Website: http://www.profinet.com
Priority class
The S7 CPU operating system provides up to 26 priority classes (or "Program execution
levels"). Specific OBs are assigned to these classes. The priority classes determine which
OBs interrupt other OBs. Multiple OBs of the same priority class do not interrupt each other.
In this case, they are executed sequentially.
Process image
The process image is part of CPU system memory. At the start of cyclic program execution,
the signal states at the input modules are written to the process image of the inputs. At the
end of cyclic program execution, the signal status of the process image of the outputs is
transferred to the output modules.
Process interrupt
A process interrupt is triggered by interrupt-triggering modules as a result of a specific event
in the process. The process interrupt is reported to the CPU. The assigned organization
block will be processed according to interrupt priority.
Process-Related Function
PROFINET components
Product version
The product version identifies differences between products which have the same order
number. The product version is incremented when forward-compatible functions are
enhanced, after production-related modifications (use of new parts/components) and for bug
fixes.
PROFIBUS
Process Field Bus - European field bus standard.
PROFIBUS DP
PNO
PROFIBUS device
A PROFIBUS node has at least one or more PROFIBUS ports.
A PROFIBUS device cannot take part directly in PROFINET communication but must be
included over a PROFIBUS master with a PROFINET port or an Industrial
Ethernet/PROFIBUS link (IE/PB Link) with proxy functionality.
Device
Glossary

PROFIBUS DP
A PROFIBUS with the DP protocol that complies with EN 50170. DP stands for distributed
peripheral (IO) = fast, real-time, cyclic data exchange. From the perspective of the user
program, the distributed IOs are addressed in exactly the same way as the central IOs.
PROFIBUS
PNO
PROFINET
Within the framework of Totally Integrated Automation (TIA), PROFINET represents a
consequent enhancement of:
Industrial Ethernet, the communication bus for the cell level
Experience gained from both systems was and is being integrated into PROFINET.
PROFINET is an Ethernet-based automation standard of PROFIBUS International
(previously PROFIBUS Users Organization e.V.), and defines a multi-vendor communication,
PNO
PROFINET ASIC
ASIC
PROFINET CBA
Within the framework of PROFINET, PROFINET CBA is an automation concept for the
implementation of applications with distributed intelligence.
PROFINET CBA lets you create distributed automation solutions, based on default
components and partial solutions.
Component Based Automation allows you to use complete technological modules as
standardized components in large systems.
The components are also created in an engineering tool which may differ from vendor to
vendor. Components of SIMATIC devices are created, for example, with STEP 7.
PROFINET components
A PROFINET component includes the entire data of the hardware configuration, the
parameters of the modules, and the corresponding user program. The PROFINET
component is made up as follows:
Technological Function
The (optional) technological (software) function includes the interface to other PROFINET
components in the form of interconnectable inputs and outputs.
Device
The device is the representation of the physical programmable controller or field device
including the I/O, sensors and actuators, mechanical parts, and the device firmware.
Glossary

PROFINET device
A PROFINET device always has at least one Industrial Ethernet port. A PROFINET device
can also have a PROFIBUS port as a master with proxy functionality.
Device
PROFINET IO
Within the framework of PROFINET, PROFINET IO is a communication concept for the
implementation of modular, distributed applications.
PROFINET IO allows you to create automation solutions, which are familiar to you from
PROFIBUS.
That is, you have the same application view in STEP 7, regardless of whether you configure
PROFINET or PROFIBUS devices.
Device used to address the connected IO devices. This means that the IO controller
exchanges input and output signals with assigned field devices. The IO controller is often the
controller on which the automation program runs.
PROFINET IO device
PROFINET IO system
PROFINET IO device
Distributed field device assigned to one of the IO controllers (for example, remote IO, valve
terminals, frequency converters, switches)
PROFINET IO system
PG/PC or HMI device for commissioning and diagnostics.
PROFINET IO device
PROFINET IO system
Glossary

PROFINET IO system
PROFINET IO controller with assigned PROFINET IO devices.
PROFINET IO device
Programmable controllers (PLCs) are electronic controllers whose function is stored as a
program in the control unit. The structure and wiring of the device does not therefore depend
on the controller's function. A programmable logic controller is structured like a computer; it
consists of a CPU with memory, input/output modules and an internal bus system. The IOs
and the programming language are oriented to control engineering needs.
CPU
Programming device
Programming devices are essentially compact and portable PCs which are suitable for
industrial applications. They are identified by a special hardware and software for
programmable logic controllers.
Proxy
The PROFINET device with proxy functionality is the substitute for a PROFIBUS device on
Ethernet. The proxy functionality allows a PROFIBUS device to communicate not only with
its master but also with all nodes on PROFINET.
You can integrate existing PROFIBUS systems into PROFINET communication, for example
with the help of an IE/PB Link or a CPU 31x PN/DP. The IE/PB Link then handles
communication over PROFINET as a substitute for the PROFIBUS components.
PROFINET device
RAM
RAM (Random Access Memory) is a semiconductor read/write memory.
Real Time
Real time means that a system processes external events within a defined time.
Determinism means that a system reacts in a predictable (deterministic) manner.
In industrial networks, both these requirements are important. PROFINET meets these
requirements. PROFINET is implemented as a deterministic real-time network as follows:
The transfer of time-critical data between different stations over a network within a
defined interval is guaranteed.
To achieve this, PROFINET provides an optimized communication channel for real-time
communication : Real Time (RT).
An exact prediction of the time at which the data transfer takes place is possible.
It is guaranteed that problem-free communication using other standard protocols, for
example industrial communication for PG/PC can take place within the same network.
Real Time
Glossary

Reduction factor
The reduction rate determines the send/receive frequency for GD packets on the basis of the
CPU cycle.
Reference ground
Ground
Reference potential
Voltages of participating circuits are referenced to this potential when they are viewed and/or
measured.
Restart
On CPU start-up (e.g. after is switched from STOP to RUN mode via selector switch or with
POWER ON), OB100 (restart) is initially executed, prior to cyclic program execution (OB1).
On restart, the input process image is read in and the STEP 7 user program is executed,
starting at the first instruction in OB1.
Retentive memory
A memory area is considered retentive if its contents are retained even after a power loss
and transitions from STOP to RUN. The non-retentive area of memory flag bits, timers and
counters is reset following a power failure and a transition from the STOP mode to the RUN
mode.
Retentive can be the:
Bit memory
S7 timers
S7 counters
Data areas
Router
Default router
Switch
RT
Real Time
Runtime error
Errors occurred in the PLC (that is, not in the process itself) during user program execution.
Glossary

Segment
Bus segment
SFB
System function block
SFC
System function
Signal module
Signal modules (SM) form the interface between the process and the PLC. There are digital
input and output modules (input/output module, digital) and analog input and output modules
(input/output module, analog).
SIMATIC
The term denotes Siemens AG products and systems for industrial automation.
SIMATIC NCM PC
SIMATIC NCM PC is a version of STEP 7 tailored to PC configuration. For PC stations, it
offers the full range of functions of STEP 7.
SIMATIC NCM PC is the central tool with which you configure the communication services
for your PC station. The configuration data generated with this tool must be downloaded to
the PC station or exported. This makes the PC station ready for communication.
SIMATIC PC station
A "PC station" is a PC with communication modules and software components within a
SIMATIC automation solution.
Slave
A slave can only exchange data after being requested to do so by the master.
Master
SNMP
SNMP (Simple Network Management Protocol) makes use of the wireless UDP transport
protocol. Consists of two network components, similar to the client/server model. The SNMP
Manager monitors the network nodes, and the SNMP agents collect the various network-
specific information in the individual network nodes and places it in a structured form in the
MIB (Management Information Base). This information allows a network management
system to run detailed network diagnostics.
Glossary

STARTUP
A START-UP routine is executed at the transition from STOP to RUN mode. Can be
triggered by means of the mode selector switch, or after power on, or by an operator action
on the programming device. An S7-300 performs a restart.
STEP 7
Engineering system. Contains programming languages for creating user programs for
SIMATIC S7 controllers.
Subnet mask
The bits set in the subnet mask decides the part of the IP address that contains the address
of the subnet/network.
In general:
The network address is obtained by an AND operation on the IP address and subnet
mask.
The node address is obtained by an AND NOT operation on the IP address and subnet
mask.
Subnetwork
All the devices interconnected by switches are nodes of the same network or subnet. All the
devices in a subnet can communicate directly with each other.
All devices in the same subnet have the same subnet mask.
A subnet is physically restricted by a router.
Substitute
Proxy
Substitute value
Substitute values are configurable values which output modules transfer to the process when
the CPU switches to STOP mode.
In the event of an I/O access error, a substitute value can be written to the accumulator
instead of the input value which could not be read (SFC 44).
Glossary

Switch
PROFIBUS is based on a bus topology. Communication nodes are connected by a passive
cable - the bus.
In contrast, Industrial Ethernet is made up of point-to-point links: Each communication node
is connected directly to one other communication node.
Multiple communication nodes are interconnected at the port of an active network
component, that is, at the switch. Other communications nodes (including switches) can then
be connected to the other ports of the switch. The connection between a communication
node and the switch remains a point-to-point link.
The task of a switch is therefore to regenerate and distribute received signals. The switch
"learns" the Ethernet address(es) of a connected PROFINET device or other switches and
forwards only the signals intended for the connected PROFINET device or connected switch.
A switch has a certain number of ports. At each port, connect a maximum of one PROFINET
device or a further switch.
System diagnostics
System diagnostics refers to the detection, evaluation, and signaling of errors that occur
within the PLC, for example programming errors or module failures. System errors can be
indicated by LEDs or in STEP 7.
System function
A system function (SFC) is a function integrated into the operating system of the CPU that
can be called when necessary in the STEP 7 user program.
System function blocks (SFB) are integrated in the CPU operating system and can be called
in the STEP 7 user program.
System memory
System memory is an integrated RAM memory in the CPU. System memory contains the
address areas (e.g. timers, counters, flag bits) and data areas that are required internally by
the operating system (for example, communication buffers).
System status list
The system status list contains data that describes the current status of an S7-300 or S7-
400. You can always use this list to obtain an overview of:
the configuration of the S7-300
the current CPU parameter settings and the programmable signal modules
the current status and processes in the CPU and in the programmable signal modules.
Glossary

Terminating resistor
The terminating resistor is used to avoid reflections on data links.
Timer
Timers
Timers
Timers are part of CPU system memory. The content of timer cells is automatically updated
by the operating system, asynchronously to the user program. STEP 7 instructions are used
to define the precise function of the timer cell (for example, on-delay) and to initiate their
execution (for example, start).
TOD interrupt
Transmission rate
Data transfer rate (in bps)
Ungrounded
Having no direct electrical connection to ground
User program
In SIMATIC, we distinguish between the operating systems of the CPU and user programs.
The user program contains all instructions, declarations and data for signal processing
required to control a plant or a process. It is assigned to a programmable module (for
example CPU or FM) and can be structured in smaller units (blocks).
Operating system
STEP 7
Varistor
Voltage-dependent resistor
Work memory
The working memory is integrated in the CPU and cannot be extended. It is used to run the
code and process user program data. Programs only run in the working memory and system
memory.
Glossary


Manual, 12/2006 , A5E00105475-07 Index-1
Index
(
(Simple Network Management Protocol), 3-30
A
Aim of this Documentation, iii
Analog inputs
Configuration, 7-44
Not connected, 7-41
Technical data, 7-53
Analog outputs
Not connected, 7-41
Application
in industrial environments, 6-4
in residential areas, 6-4
Application View, 3-21
Approval
CE, 6-1
CSA, 6-2
FM, 6-3
Marine, 6-4
UL, 6-2
Approvals
Standards, 6-1
Automation concept, 3-21
B
Blocks, 3-25
Compatibility, 3-25
Download, 4-11
Upload, 4-13
Burst pulses, 6-5
C
CE
Approval, 6-1
Communication
Communication protocols, 3-27
CPU services, 3-9
Data consistency, 3-19
Global data communication, 3-13
Open IE communication, 3-27
S7 basic communication, 3-11
S7 communication, 3-12
Communication load
configured, 5-9
Dependency of physical cycle time, 5-10
Influence on the physical cycle time, 5-10
Communications concept, 3-21
Component Based Automation, 3-20, 3-21
Compression, 4-14
Configuration
Interrupt inputs, 7-42
Standard AI, 7-44
Standard DI, 7-42
Standard DO, 7-43
Technological functions, 7-46
Consistent data, A-7
Continuous shock, 6-8
CPU 312
Technical data, 8-3
CPU 312C
Technical Data, 7-3
Usage of integrated I/Os, 7-30
CPU 313C
Technical data, 7-9
CPU 313C-2 DP
CPU 313C-2 PtP
CPU 314
Technical data, 8-9
CPU 314C-2 DP
Index

Index-2 Manual, 12/2006 , A5E00105475-07
CPU 314C-2 PtP
Technical data, 8-9
Technical Data, 7-22
CPU 315-2 DP
CPU 315-2 PN/DP
CPU 317-2 DP
CPU 317-2 PN/DP
Technical Data, 8-38
CPU 319-3 PN/DP
CPU memory reset, 4-14
CPUs 31xC
Differences, 2-3
CSA
Approval, 6-2
Cycle time
Calculation, 5-5
Definition, 5-2
Extension, 5-4
Maximum cycle time, 5-9
Process image, 5-2
Sample calculation, 5-24
Sequence of cyclic program processing, 5-3
Time slice model, 5-2
D
Data consistency, 3-19
Definition
Electromagnetic Compatibility, 6-5
Degree of protection IP 20, 6-9
Diagnostics
Standard I/O, 7-48
Differences between the CPUs, 2-3
Digital inputs
Configuration, 7-42
Digital outputs
Configuration, 7-43
Fast, 7-51
Display languages
of the web server, 3-31
Download
of blocks, 4-11
DPV1, 3-53
E
Electrostatic discharge, 6-5
EMC, 6-5
Emission of radio interference, 6-6
Error displays, 2-13
F
Firewall, 3-32
FM
Approval, 6-3
G
General technical data, 6-1
Global data communication, 3-13
I
I/O process image, 4-7
Identification code for Australia, 6-3
IEC 61131, 6-3
Industrial Ethernet, 3-20
Information about migration to another CPU, A-1
Insulation test, 6-9
Integrated I/Os
Usage, 7-30, 7-35
interfaces
PROFINET interface:Addressing ports, 3-6
PROFINET interface:Send clock, 3-7
PROFINET interface:Time synchronization, 3-5
PROFINET interface:Update time, 3-7
Interfaces
MPI interface, 3-1
MPI interface:Connectable devices, 3-2
PN interface, 3-5
PROFIBUS DP interface, 3-3
PROFIBUS DP interface:Operating modes with two
DP interfaces, 3-3
PtP interface, 3-8
Interfaces PROFIBUS DP interface
Connectable devices, 3-4
Interrupt inputs, 7-47
Configuration, 7-42
Index

Manual, 12/2006 , A5E00105475-07 Index-3
Interrupt response time
Calculation, 5-22
Definition, 5-21
of signal modules, 5-22
of the CPUs, 5-21
Process interrupt processing, 5-22
Interrupt, delay, 5-23
L
Load memory, 4-1
Local data, 4-8
Longest response time
Calculation, 5-18
Conditions, 5-17
M
Marine
Approval, 6-4
Maximum cycle time, 5-9
Mechanical environmental conditions, 6-8
Memory
Compression, 4-14
Memory areas
Load memory, 4-1
System memory, 4-2
Work memory, 4-2
Memory functions
Compression, 4-14
Download of blocks, 4-11
Promming, 4-14
RAM to ROM, 4-14
Restart, 4-14
Uploading blocks, 4-13
Warm start, 4-14
Micro Memory Card
Micro Memory Card, 4-9
Micro Memory Card - Useful life, 4-10
Mode selector switch, 2-3, 2-6, 2-8, 2-10, 2-12
MPI, 3-1
MPI interface
Time synchronization, 3-2
N
Network node, 3-14
O
OB83, 3-26
OB86, 3-26
Organization blocks, 3-26
P
PN interface, 3-5
Power supply
Connection, 2-3, 2-6, 2-8, 2-10, 2-12
Process interrupt processing, 5-22
PROFIBUS, 3-20
PROFIBUS DP Interface, 3-3
PROFIBUS DP Interface
PROFIBUS International, 3-20
PROFINET, 3-6, 3-20
Implementation, 3-20
interface, 3-5
Objectives, 3-20
PROFINET CBA, 3-20, 3-21
PROFINET IO, 3-20
Protection class, 6-9
PtP interface, 3-8
Pulseshaped disturbance, 6-5
R
RAM to ROM, 4-14
Required basic knowledge, iii
Response time
Calculating the longest, 5-18
Calculating the shortest, 5-16
Conditions for the longest, 5-17
Conditions for the shortest, 5-16
Definition, 5-14
DP cycle times, 5-14, 5-15
Factors, 5-14
Fluctuation width, 5-14
Reduction with direct I/O access, 5-18
Restart, 4-14
Retentive memory, 4-2
Load memory, 4-2
Retentive behavior of memory objects, 4-4
Retentive behavior of the memory objects, 5-7
System memory, 4-2
Index

Index-4 Manual, 12/2006 , A5E00105475-07
Routing
Access to stations on other subnets, 3-14
Example of an application, 3-17
Network node, 3-14
Requirements, 3-16
S
S7 basic communication, 3-11
S7 communication, 3-12
S7 connections
Distribution, 3-50
End point, 3-48
of CPUs 31xC, 3-51
Time sequence for allocation, 3-50
Transition point, 3-48
Sample calculation
of the cycle time, 5-24
Sample calculation
of the response time, 5-25
Sample calculation
of interrupt response time, 5-26
Scope of this documentation, v
Scope of this manual, iii, A-1, A-2
Security
of the web server, 3-32
SFB 52, 3-25
SFB 53, 3-25
SFB 54, 3-25
SFB81, 3-25
SFC102, 3-25
SFC12, 3-25
SFC13, 3-25
SFC49, 3-25
SFC5, 3-25
SFC58, 3-25
SFC70, 3-25
SFC71, 3-25
Shipping conditions, 6-7
Shock, 6-8
Shortest response time
Calculation, 5-16
Conditions, 5-16
Compatible Micro Memory Cards, 7-2, 8-2
Properties, 4-10
Slot, 2-2, 2-5, 2-7, 2-10, 2-12
Sinusoidal disturbance, 6-6
SNMP, 3-30
Standards and approvals, 6-1
Status displays, 2-13
Storage conditions, 6-7
System and standard functions, 3-25, 3-26
System memory, 4-2, 4-6
I/O process image, 4-7
Local data, 4-8
T
Technical data
Analog inputs, 7-53
Analog outputs, 7-55
CPU 312, 8-3
CPU 312C, 7-3
CPU 313C, 7-9
CPU 313C-2 DP, 7-15, 7-23
CPU 313C-2 PtP, 7-15
CPU 314, 8-9
CPU 314C-2 DP, 7-22
CPU 314C-2 PtP, 7-22
CPU 315-2 DP, 8-14
CPU 315-2 PN/DP, 8-21
CPU 317-2 DP, 8-30
CPU 319-3 PN/DP, 8-47
Digital inputs, 7-49
Digital outputs, 7-51
Shipping and storage conditions, 6-7
Technical Data
CPU 317-2 PN/DP, 8-38
Temperature, 6-7
Test voltage, 6-9
MPI interface, 3-2
U
UL
Approval, 6-2
Upload, 4-13
Useful life of a Micro Memory Card, 4-10
User program
Upload, 4-13
V
Vibration, 6-8
Index

Manual, 12/2006 , A5E00105475-07 Index-5
W
Warm start, 4-14
Watchdog interrupt, 5-23
Web Access on the CPU, 3-31
Web Server
Activating, 3-32
Display languages, 3-31
Display Refresh Status, 3-32
Security, 3-32
Web Server, 3-30
Work memory, 4-2

Index

Index-6 Manual, 12/2006 , A5E00105475-07

SIMATIC S7-300 S7-300, CPU 31xC and CPU 31x: Installation
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________
______________

Preface

Guide to the S7-300
documentation

1
Installation Order

2
S7-300 components

3
Configuring

4
Installing

5
Wiring

6
Addressing

7
Commissioning

8
Maintenance

9
Debugging functions,
diagnostics and
troubleshooting

10

11
Appendix

A
SIMATIC
S7-300
S7-300, CPU 31xC and CPU 31x:
Installation
Operating Instructions
12/2006
A5E00105492-07
This manual is part of the documentation package
with the order number: 6ES7398-8FA10-8BA0
The following supplement is part of this documentation:

No.
Product Information Drawing number
Edition
1 for Fast Connect Connector A5E01163594-01 06/2007

Safety Guidelines

Danger

Warning

Caution
Caution
Notice
account.
property damage.
Qualified Personnel
Prescribed Usage
Note the following:

Warning
This device may only be used for the applications described in the catalog or the technical description and only in
connection with devices or components from other manufacturers which have been approved or recommended by
Siemens. Correct, reliable operation of the product requires proper transport, storage, positioning and assembly
as well as careful operation and maintenance.
Trademarks
owner.
editions.

Siemens AG
Postfach 48 48
90437 NRNBERG
GERMANY
Order No.: A5E00105492-07
01/2007

Operating Instructions, 12/2006, A5E00105492-07 iii
Preface
Purpose of this manual
This manual contains essential information about:
the configuration,
the installation
the wiring
the addressing
and commissioning
In addition, you will become familiar with the tools you can use to diagnose and eliminate
errors in hardware and software.
Basic knowledge
To understand this manual, you require a general knowledge of automation engineering.
You should also be accustomed to working with STEP 7 basic software.
For further information, refer to the Programming with STEP 7 manual.
Scope
Table 1 Scope of this manual
as of version CPU Convention:
CPU designations:
Order No.
Firmware
CPU 312C 6ES7312-5BE03-0AB0 V2.6
CPU 313C 6ES7313-5BF03-0AB0 V2.6
CPU 313C-2 PtP 6ES7313-6BF03-0AB0 V2.6
CPU 313C-2 DP 6ES7313-6CF03-0AB0 V2.6
CPU 314C-2 PtP 6ES7314-6BG03-0AB0 V2.6
CPU 314C-2 DP
CPU 31xC
6ES7314-6CG03-0AB0 V2.6
CPU 312 6ES7312-1AE13-0AB0 V2.6
CPU 314 6ES7314-1AG13-0AB0 V2.6
CPU 315-2 DP 6ES7315-2AG10-0AB0 V2.6
CPU 315-2 PN/DP 6ES7315-2EH13-0AB0 V2.5
CPU 317-2 DP 6ES7317-2AJ10-0AB0 V2.5
CPU 317-2 PN/DP 6ES7317-2EK13-0AB0 V2.5
CPU 319-3 PN/DP
CPU 31x
6ES7318-3EL00-0AB0 V2.5
Preface

iv Operating Instructions, 12/2006, A5E00105492-07

Note
The special features of the F-CPUs of the S7 spectrum can be found as product information
on the Internet under
http://support.automation.siemens.com/WW/view/en/11669702/133300.

Note
For new modules, or modules of a more recent version, we reserve the right to include a
Product Information containing latest information.

Changes compared to the previous version
Changes compared to the previous version of this operating instructions CPU31xC and
CPU31x: Installation, with footer number The following changes have been made to
A5E00105491-06, Release 01/2006:
Isochronous mode on PROFIBUS DP for CPU315-2 PN/DP, CPU317-2 DP, CPU317-2
PN/DP and CPU319-3 PN/DP
Firmware update on the networks
Configurable process image for CPU 315-2 PN/DP, CPU 317-2 DP and
CPU 319-3 PN/DP
Watchdog interrupt time setting for CPU 319-3 PN/DP starting at 500 s (for OB35)
Reset of the CPU to delivery state
Extended diagnostics for PROFINET CPUs
Measuring proximity switch for diagnostic repeater, for DP CPUs (SFC 103)
Enhancement of block-specific messages for all CPUs (SFC105 to SFC108)
Time synchronization over DP
Time synchronization over NTP at PROFINET CPUs
I&M data of the CPU (plant and location ID)
Minimum update time of 250 s at PROFINET IO Devices with CPU319
Activating/deactivating PROFINET IO devices on PROFINET CPUs (enhanced SFC12)
Support of maintenance events on PROFINET CPUs
Web server functionality of PROFINET CPUs
Increase of the maximum number of entries in the diagnostics buffer to 500 on
PROFINET CPUs
OUC expansion (UDP and ISO on TCP) for all PROFINET CPUs
Approvals
See chapter Technical Specifications > Standards and Approvals.
Preface

Operating Instructions, 12/2006, A5E00105492-07 v
CE approval
Identification for Australia (C-Tick mark)
Standards
Documentation classification
The following documentation is part of the S7-300 documentation package.
It is also available on the Internet at: http://support.automation.siemens.com/WW/view/en/
and the corresponding entry ID

YOU ARE READING the Manual
31xC and 31x CPUs, technical data
Entry ID: 12996906

Control and display elements, communication,
memory concept, cycle and response times,
technical data
Operating instructions
Entry ID: 12996906

Configuration, installation, wiring, addressing,
commissioning, maintenance and the test
functions, diagnostics and troubleshooting.
System Manual
PROFINET System Overview
Entry ID: 19292127

Basic knowledge of PROFINET:
Network components, data exchange and
communication, PROFINET IO, Component
Based Automation, sample application
PROFINET IO and Component Based
Automation
Programming Manual
From PROFIBUS DP to PROFINET I/O
Entry ID: 19289930

Guideline for the migration from PROFIBUS DP
to PROFINET I/O.
Manual
CPU 31xC: Technological functions
Entry ID: 12429336
CD with examples

Description of the various technological
functions of positioning and counting. PtP
communication, rules
The CD contains examples of the technological
functions
Manual
S7-300 Automation System: Module data
Entry ID: 8859629

Descriptions of functions and technical
specifications of signal modules, power supply
modules and interface modules
Instruction List
CPU 31xC and CPU 31x
Entry ID: 13206730

List of the operation repertoire of the CPUs and
their execution times. List of executable blocks.
Preface

vi Operating Instructions, 12/2006, A5E00105492-07
Getting Started
The following Getting Started editions are available
as a collective volume:
S7-300 Getting Started Collection
Entry ID: 15390497
PROFINET Getting Started Collection
Entry ID: 19290251

The example used in this Getting Started
guides you through the various steps in
commissioning required to obtain a fully
functional application.
In addition to the S7-300 documentation package you require information from the following
descriptions:

Reference Manual
System software for S7-300/400 system and
standard functions
Entry ID: 1214574

This manual, consisting of Volume 1 and
Volume 2, provides a complete overview of the
OBs, SFCs, SFBs, IEC functions, diagnostics
data, system state list (SSL) as well as the
events contained in the operating systems of
the CPUs of the S7-300 and S7-400. This
manual is part of the STEP 7 Standard Package
reference information. You can also find the
description in the online help for STEP 7.
Manual
Programming with STEP 7
Entry ID: 18652056

This manual provides a comprehensive
overview of STEP 7 programming and is part of
basic knowledge of STEP 7 basic. You can also
find the description in the online help for STEP
7.
Manual
SIMATIC NET: Twisted Pair and Fiber-Optic
Networks
Entry ID: 8763736

Description of Industrial Ethernet networks,
network configuration, components, installation
guidelines for networked automation systems in
buildings, etc.
Component Based Automation: Configure
SIMATIC iMap plants
Entry ID: 22762190

Description of the SIMATIC iMap configuring
software
Component Based Automation: SIMATIC iMap
STEP 7 Add-On, create PROFINET components
Entry ID: 22762278

Descriptions and instructions for creating
PROFINET components with STEP 7 and for
using SIMATIC devices in Component Based
Automation
Manual
Isochronous mode
Entry ID: 15218045

Description of the system characteristics
"Isochronous mode"
Manual
SIMATIC communication
Entry ID: 1254686

Basics, services, networks, communication
functions, connecting PGs/OPs, engineering
and configuring in STEP 7.
Preface

Operating Instructions, 12/2006, A5E00105492-07 vii
Recycling and Disposal
The devices described in this manual can be recycled, because their components contain a
minimum of harmful substances. For environment-friendly recycling and disposal of your old
equipment, contact a certified disposal facility for electronic scrap.
Contacts
See product informationTechnical Support, Contacts and Training.
You will find the product information on the Internet at:
http://www.siemens.com/automation/service
Search for the entry with the number 19293011.
Training
SIMATIC Technical Support
Service & Support on the Internet
Preface

viii Operating Instructions, 12/2006, A5E00105492-07

Operating Instructions, 12/2006, A5E00105492-07 ix
Table of contents
Preface...................................................................................................................................................... iii
1 Guide to the S7-300 documentation ....................................................................................................... 1-1
2 Installation Order .................................................................................................................................... 2-1
3 S7-300 components................................................................................................................................ 3-1
3.1 Example of an S7-300 configuration.......................................................................................... 3-1
3.2 Overview of the vital modules of an S7-300 .............................................................................. 3-2
4 Configuring ............................................................................................................................................. 4-1
4.1 Overview.................................................................................................................................... 4-1
4.2 Basic engineering principles ...................................................................................................... 4-2
4.3 Component dimensions ............................................................................................................. 4-4
4.4 Specified clearances.................................................................................................................. 4-6
4.5 Arrangement of modules on a single rack ................................................................................. 4-7
4.6 Distribution of modules to several racks.................................................................................... 4-8
4.7 Selection and installation of cabinets....................................................................................... 4-10
4.8 Example: Selecting a cabinet................................................................................................... 4-12
4.9 Electrical assembly, protective measures and grounding ....................................................... 4-13
4.9.1 Grounding concept and overall structure................................................................................. 4-13
4.9.2 Installing an S7-300 with grounded reference potential .......................................................... 4-14
4.9.3 Installing an S7-300 with ungrounded reference potential (not CPU 31xC)............................ 4-15
4.9.4 Isolated or common potential modules?.................................................................................. 4-17
4.9.5 Grounding measures ............................................................................................................... 4-19
4.9.6 Overview display: Earthing ...................................................................................................... 4-21
4.10 Selection of the load power supply .......................................................................................... 4-23
4.11 Planning subnets ..................................................................................................................... 4-25
4.11.1 Overview.................................................................................................................................. 4-25
4.11.2 Configuring MPI and PROFIBUS subnets............................................................................... 4-27
4.11.2.1 Overview.................................................................................................................................. 4-27
4.11.2.2 Basic principles of MPI and PROFIBUS subnets .................................................................... 4-27
4.11.2.3 Multi-Point Interface (MPI) ....................................................................................................... 4-30
4.11.2.4 PROFIBUS DP interface.......................................................................................................... 4-32
4.11.2.5 Network components of MPI/DP and cable lengths ................................................................ 4-34
4.11.2.6 Cable lengths of MPI and PROFIBUS subnets ....................................................................... 4-38
4.11.3 Configuring PROFINET subnets.............................................................................................. 4-43
4.11.3.1 Overview.................................................................................................................................. 4-43
4.11.3.2 PROFINET devices.................................................................................................................. 4-43
4.11.3.3 Integration of field bus systems in PROFINET ........................................................................ 4-46
4.11.3.4 PROFINET IO and PROFINET CBA ....................................................................................... 4-47
4.11.3.5 PROFINET cable lengths and network expansion .................................................................. 4-52
4.11.3.6 Connectors and other components for Ethernet...................................................................... 4-55
4.11.3.7 Example of a PROFINET Subnet ............................................................................................ 4-55
4.11.3.8 Example of a PROFINET IO system ....................................................................................... 4-57
Table of contents

x Operating Instructions, 12/2006, A5E00105492-07
4.11.4 Routed network transitions....................................................................................................... 4-58
4.11.5 Point-to-point (PtP)................................................................................................................... 4-60
4.11.6 Actuator/sensor interface (ASI) ................................................................................................ 4-60
5 Installing ................................................................................................................................................. 5-1
5.1 Installing a S7-300 ..................................................................................................................... 5-1
5.2 Installing the mounting rail ......................................................................................................... 5-3
5.3 Installing modules on the mounting rail...................................................................................... 5-6
5.4 Labeling modules....................................................................................................................... 5-8
6 Wiring ..................................................................................................................................................... 6-1
6.1 Requirements for wiring the S7-300 .......................................................................................... 6-1
6.2 Bonding the Protective Conductor to the Mounting Rail ............................................................ 6-3
6.3 Adjusting the Power Supply Module to Local Mains Voltage..................................................... 6-4
6.4 Wiring the Power Supply Module and the CPU......................................................................... 6-5
6.5 Wiring front connectors .............................................................................................................. 6-7
6.6 Plugging the front connectors into modules............................................................................. 6-10
6.7 Labeling the module I/Os ......................................................................................................... 6-11
6.8 Terminating shielded cables on the shielding contact element ............................................... 6-12
6.9 Wiring the MPI / PROFIBUS connectors ................................................................................. 6-15
6.9.1 Connecting the bus connector ................................................................................................. 6-15
6.9.2 Setting the terminating resistor on the bus connector ............................................................. 6-16
7 Addressing.............................................................................................................................................. 7-1
7.1 Slot-specific addressing of modules .......................................................................................... 7-1
7.2 User-specific addressing of modules......................................................................................... 7-3
7.2.1 User-specific addressing of modules......................................................................................... 7-3
7.2.2 Addressing digital modules ........................................................................................................ 7-4
7.2.3 Addressing analog modules....................................................................................................... 7-5
7.2.4 Addressing the integrated I/Os of CPU 31xC ............................................................................ 7-6
7.3 Addressing on PROFIBUS DP................................................................................................... 7-8
7.4 Addressing on PROFINET......................................................................................................... 7-9
8 Commissioning ....................................................................................................................................... 8-1
8.1 Overview .................................................................................................................................... 8-1
8.2 Commissioning procedure ......................................................................................................... 8-1
8.2.1 Procedure: Commissioning the hardware.................................................................................. 8-1
8.2.2 Procedure: Software commissioning ......................................................................................... 8-3
8.3 Commissioning check list........................................................................................................... 8-5
8.4 Commissioning the Modules...................................................................................................... 8-7
8.4.1 Inserting/Replacing a Micro Memory Card................................................................................. 8-7
8.4.2 Initial turn-on .............................................................................................................................. 8-9
8.4.3 CPU memory reset by means of mode selector switch............................................................. 8-9
8.4.4 Formatting the Micro Memory Card ......................................................................................... 8-13
Table of contents

Operating Instructions, 12/2006, A5E00105492-07 xi
8.4.5 Connecting the programming device (PG) .............................................................................. 8-14
8.4.5.1 Connect PG/PC to the integrated PROFINET interface of the CPU 31x PN/DP .................... 8-14
8.4.5.2 Connecting the PG to a node................................................................................................... 8-15
8.4.5.3 Connecting the PG to several nodes ....................................................................................... 8-16
8.4.5.4 Using the PG for commissioning or maintenance.................................................................... 8-17
8.4.5.5 Connecting a PG to ungrounded MPI nodes (not CPU 31xC) ................................................ 8-19
8.4.6 Starting SIMATIC Manager...................................................................................................... 8-20
8.4.7 Monitoring and modifying I/Os ................................................................................................. 8-21
8.5 Commissioning PROFIBUS DP............................................................................................... 8-25
8.5.1 Commissioning PROFIBUS DP............................................................................................... 8-25
8.5.2 Commissioning the CPU as DP master................................................................................... 8-26
8.5.3 Commissioning the CPU as DP Slave..................................................................................... 8-30
8.5.4 Direct data exchange............................................................................................................... 8-35
8.6 Commissioning PROFINET IO................................................................................................ 8-37
8.6.1 Requirements........................................................................................................................... 8-37
8.6.2 Configuring and commissioning the PROFINET IO system.................................................... 8-37
9 Maintenance........................................................................................................................................... 9-1
9.1 Overview.................................................................................................................................... 9-1
9.2 Backing up firmware on a SIMATIC Micro Memory Card.......................................................... 9-1
9.3 Updating the firmware................................................................................................................ 9-2
9.3.1 Backing up firmware on a SIMATIC Micro Memory Card.......................................................... 9-2
9.3.2 Firmware update using a Micro Memory Card........................................................................... 9-4
9.3.3 Online (via networks) update of CPU FW V2.2.0 or higher. ...................................................... 9-5
9.4 Backup of project data to a Micro Memory Card ....................................................................... 9-6
9.5 Resetting to the Delivery State .................................................................................................. 9-7
9.6 Module installation / removal ..................................................................................................... 9-9
9.7 Digital output module AC 120/230 V: Changing fuses ............................................................ 9-13
10 Debugging functions, diagnostics and troubleshooting......................................................................... 10-1
10.1 Overview.................................................................................................................................. 10-1
10.2 Identification and maintenance data of the CPU ..................................................................... 10-1
10.3 Overview: Test functions.......................................................................................................... 10-4
10.4 Overview: Diagnostics ............................................................................................................. 10-6
10.5 Diagnostics functions available in STEP 7 ............................................................................ 10-10
10.6 Network infrastructure diagnostics (SNMP)........................................................................... 10-11
10.7 Diagnostics using status and error LEDs............................................................................... 10-12
10.7.1 Introduction ............................................................................................................................ 10-12
10.7.2 Status and error displays of all CPUs .................................................................................... 10-13
10.7.3 Evaluating the SF LED in case of software errors................................................................. 10-14
10.7.4 Evaluating the SF LED in case of hardware errors................................................................ 10-16
10.7.5 Status and Error Indicators: CPUs with DP Interface............................................................ 10-17
10.7.6 Status and Error Indicators: CPUs with PROFINET interface for the S7-300....................... 10-18
10.7.7 Status and Error Indicators: PROFINET IO Devices ............................................................. 10-20
Table of contents

xii Operating Instructions, 12/2006, A5E00105492-07
10.8 Diagnostics of DP CPUs ........................................................................................................ 10-21
10.8.1 Diagnostics of DP CPUs operating as DP Master ................................................................. 10-21
10.8.2 Reading out slave diagnostic data......................................................................................... 10-24
10.8.3 Interrupts on the DP Master ................................................................................................... 10-30
10.8.4 Structure of the slave diagnostic data when the CPU is operated as intelligent slave.......... 10-31
10.9 Diagnostics of PROFINET CPUs........................................................................................... 10-39
10.9.1 Diagnostics options of PROFINET IO.................................................................................... 10-39
10.9.2 Maintenance........................................................................................................................... 10-41
11 General technical data.......................................................................................................................... 11-1
11.1 Standards and approvals ......................................................................................................... 11-1
11.2 Electromagnetic compatibility .................................................................................................. 11-5
11.3 Transportation and storage conditions for modules................................................................. 11-7
11.4 Mechanical and climatic environmental conditions for S7-300 operation................................ 11-8
11.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage
of S7-300................................................................................................................................ 11-10
11.6 Rated voltages of S7-300....................................................................................................... 11-10
A Appendix................................................................................................................................................. A-1
A.1 General rules and regulations for S7-300 operation.................................................................. A-1
A.2 Protection against electromagnetic interference........................................................................ A-3
A.2.1 Basic Points for EMC-compliant system installations................................................................ A-3
A.2.2 Five basic rules for securing EMC.............................................................................................A-5
A.2.2.1 1. Basic rule for ensuring EMC..................................................................................................A-5
A.2.3 EMC-compliant installation of automation systems ................................................................... A-7
A.2.4 Examples of an EMC-compliant installation: Cabinet configuration .......................................... A-9
A.2.5 Examples of an EMC-compliant installation: Wall mounting.................................................... A-10
A.2.6 Cable shielding.........................................................................................................................A-12
A.2.7 Equipotential bonding...............................................................................................................A-14
A.2.8 Cable routing inside buildings ..................................................................................................A-16
A.2.9 Outdoor routing of cables.........................................................................................................A-18
A.3 Lightning and surge voltage protection.................................................................................... A-19
A.3.1 Overview .................................................................................................................................. A-19
A.3.2 Lightning protection zone concept ...........................................................................................A-19
A.3.3 Rules for the transition point between lightning protection zones 0 <-> 1............................... A-21
A.3.4 Rules for the transition point between lightning protection zones 1 <-> 2 and higher............. A-23
A.3.5 Example: Surge protection circuit for networked S7-300 PLCs............................................... A-26
A.3.6 How to protect digital output modules against inductive surge voltage................................... A-28
A.4 Safety of electronic control equipment.....................................................................................A-30
Glossary ..................................................................................................................................... Glossary-1
Index................................................................................................................................................ Index-1
Table of contents

Operating Instructions, 12/2006, A5E00105492-07 xiii
Tables
Table 1 Scope of this manual .................................................................................................................... iii
Table 1-1 Ambient influence on the automation system (AS).................................................................... 1-1
Table 1-2 Galvanic isolation....................................................................................................................... 1-1
Table 1-3 Communication between sensors/actuators and the PLC......................................................... 1-2
Table 1-4 The use of local and distributed I/O........................................................................................... 1-2
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs) ................... 1-2
Table 1-6 CPU performance ...................................................................................................................... 1-2
Table 1-7 Communication.......................................................................................................................... 1-3
Table 1-8 Software..................................................................................................................................... 1-3
Table 1-9 Supplementary features............................................................................................................. 1-3
Table 3-1 S7-300 components: .................................................................................................................. 3-2
Table 4-1 Mounting rails - Overview .......................................................................................................... 4-4
Table 4-2 Module width.............................................................................................................................. 4-4
Table 4-3 Shielding terminals - Overview .................................................................................................. 4-5
Table 4-4 Interface modules - Overview.................................................................................................... 4-8
Table 4-5 Cabinet types ........................................................................................................................... 4-11
Table 4-6 Cabinet selection ..................................................................................................................... 4-13
Table 4-7 VDE specifications for the installation of a PLC system.......................................................... 4-14
Table 4-8 Measures for protective grounding .......................................................................................... 4-19
Table 4-9 Connecting the load voltage reference potential ..................................................................... 4-20
Table 4-10 Features of load power supply units ........................................................................................ 4-23
Table 4-11 Subnet nodes........................................................................................................................... 4-28
Table 4-12 MPI/PROFIBUS DP addresses................................................................................................ 4-28
Table 4-13 MPI addresses of CPs/FMs in an S7-300 system................................................................... 4-29
Table 4-14 Operating modes for CPUs with two DP interfaces................................................................. 4-32
Table 4-15 Permissible cable length of a segment on the MPI subnet...................................................... 4-34
Table 4-16 Permissible cable length of a segment on the PROFIBUS subnet.......................................... 4-34
Table 4-17 Lengths of stub cables per segment ........................................................................................ 4-35
Table 4-18 PG connecting cable................................................................................................................ 4-35
Table 4-19 Available bus cables ................................................................................................................ 4-35
Table 4-20 Properties of PROFIBUS bus cables....................................................................................... 4-36
Table 4-21 Marginal conditions for wiring interior bus cables.................................................................... 4-36
Table 4-22 Bus connector .......................................................................................................................... 4-37
Table 4-23 Data for twisted-pair patch cables............................................................................................ 4-53
Table 4-24 Data for user assemblies using patch cables of the Fast Connect product family.................. 4-54
Table of contents

xiv Operating Instructions, 12/2006, A5E00105492-07
Table 5-1 Module accessories ................................................................................................................... 5-2
Table 5-2 Installation tools and materials................................................................................................... 5-3
Table 5-3 Mounting holes for rails.............................................................................................................. 5-4
Table 5-4 Slot numbers for S7 modules..................................................................................................... 5-8
Table 6-1 Wiring accessories..................................................................................................................... 6-1
Table 6-2 Tools and material for wiring...................................................................................................... 6-1
Table 6-3 Wiring conditions for PS and CPU............................................................................................. 6-2
Table 6-4 Wiring conditions for front connectors........................................................................................ 6-2
Table 6-5 Assignment of front connectors to modules............................................................................... 6-7
Table 6-6 Wiring front connectors .............................................................................................................. 6-9
Table 6-7 Inserting the front connector .................................................................................................... 6-10
Table 6-8 Assignment of labeling strips to modules................................................................................. 6-11
Table 6-9 Shielding diameter assignment to shielding terminals............................................................. 6-12
Table 7-1 Integrated I/Os of CPU 312C..................................................................................................... 7-6
Table 7-2 Integrated I/Os of CPU 313C..................................................................................................... 7-7
Table 7-3 Integrated I/Os of CPU 313C-2 PtP/DP..................................................................................... 7-7
Table 7-4 Integrated I/Os of CPU 314C-2 PtP/DP..................................................................................... 7-7
Table 8-1 Recommended commissioning procedure: Hardware............................................................... 8-2
Table 8-2 HSP for PROFINET IO devices on CPU 31x PN/DP, V2.5 ....................................................... 8-4
Table 8-3 Recommended commissioning procedure - Part II: Software ................................................... 8-4
Table 8-4 Possible reasons of a CPU request to reset memory................................................................ 8-9
Table 8-5 Procedure for CPU memory reset............................................................................................ 8-10
Table 8-6 Internal CPU events on memory reset..................................................................................... 8-12
Table 8-7 Software requirements............................................................................................................. 8-25
Table 8-8 DP address areas of the CPUs................................................................................................ 8-25
Table 8-9 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP master ..... 8-27
Table 8-10 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP slave........ 8-31
Table 8-11 Configuration example for the address areas of transfer memory........................................... 8-32
Table 8-12 PROFINET IO address areas of the CPUs.............................................................................. 8-37
Table 8-13 CPU startup for operation as IO controller............................................................................... 8-42
Table 8-14 Even recognition of the CPU 31x PN/DP as IO controller ....................................................... 8-42
Table 9-1 Backing up the firmware to the SIMATIC Micro Memory Card.................................................. 9-3
Table 9-2 Firmware update using a SIMATIC Micro Memory Card........................................................... 9-4
Table 9-3 Properties of the CPU in the delivery state................................................................................ 9-7
Table 9-4 Lamp images.............................................................................................................................. 9-8
Table 10-1 SSL partial lists with I&M data ................................................................................................. 10-3
Table of contents

Operating Instructions, 12/2006, A5E00105492-07 xv
Table 10-2 Differences between forcing and controlling tags.................................................................... 10-6
Table 10-3 Status and error displays ....................................................................................................... 10-13
Table 10-4 Evaluation of the SF LED (Software error) ............................................................................ 10-14
Table 10-5 Evaluation of the SF LED (Hardware error)........................................................................... 10-16
Table 10-6 LEDs BF, BF1 and BF2 ......................................................................................................... 10-17
Table 10-7 BF LED is lit ........................................................................................................................... 10-17
Table 10-8 BF LED flashes ...................................................................................................................... 10-17
Table 10-9 BF2 / BF3 LED is lit................................................................................................................ 10-19
Table 10-10 BF2 / BF3 LED flashes at a PROFINET IO controller ........................................................... 10-19
Table 10-11 BF LED flashes on a PROFINET IO device .......................................................................... 10-20
Table 10-12 Event detection of CPU 31x2 operating as DP master.......................................................... 10-23
Table 10-13 Evaluating RUN to STOP transitions of the DP slave in the DP master................................ 10-23
Table 10-14 Reading out diagnostic data in the master system, using STEP 5 and STEP 7 ................... 10-25
Table 10-15 Event recognition of CPUs 31x-2 operating in DP slave mode ............................................. 10-29
Table 10-16 Evaluating RUNSTOP transitions in the DP Master/DP Slave.............................................. 10-29
Table 10-17 Structure of station status 1 (Byte 0) ..................................................................................... 10-32
Table 10-20 Structure of the Master PROFIBUS address (byte 3)............................................................ 10-33
Table 10-21 Structure of the manufacturer ID (byte 4 and 5) .................................................................... 10-33
Table 11-1 Use in industrial environments................................................................................................. 11-4
Table A-1 System startup after specific events .......................................................................................... A-1
Table A-2 Mains voltage............................................................................................................................. A-2
Table A-3 Protection against external electrical interference..................................................................... A-2
Table A-4 Protection against external electrical interference..................................................................... A-2
Table A-5 Coupling mechanisms................................................................................................................ A-4
Table A-6 Cable routing inside buildings.................................................................................................. A-16
Table A-7 Lightning conductor (Type 1) of cables with the help of surge protection equipment ............. A-22
Table A-8 Surge-protection components for lightning protection zones 1 <-> 2...................................... A-24
Table A-9 Surge-protection components for lightning protection zones 2 <-> 3...................................... A-25
Table A-10 Example of a circuit conforming to lightning protection requirements (legend to previous
figure) ....................................................................................................................................... A-27

Table of contents

xvi Operating Instructions, 12/2006, A5E00105492-07

Operating Instructions, 12/2006, A5E00105492-07 1-1
1
Overview
There you find a guide leading you through the S7-300 documentation.
Selecting and configuring
Table 1-1 Ambient influence on the automation system (AS)
What provisions do I have to make for AS installation
space?
Installation: Configuring - Component dimensions
Installation: Mounting - Installing the mounting rail
How do environmental conditions influence the AS? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Appendix

Table 1-2 Galvanic isolation
Which modules can I use if electrical isolation is required
between sensors/actuators?
Module Data Manual
Under what conditions do I have to isolate the modules
electrically?
How do I wire that?
CPU 31xC and CPU 31x operating instructions: Installation:
Wiring
Under which conditions do I have to isolate stations
electrically?
How do I wire that?
Installation Configuring Configuring subnets


1-2 Operating Instructions, 12/2006, A5E00105492-07
Table 1-3 Communication between sensors/actuators and the PLC
Which module is suitable for my sensor/actuator? For CPU: CPU 31xC and CPU 31x Manual, Technical Data
For signal modules: Reference manual of your signal
module
How many sensors/actuators can I connect to the module? For CPU: CPU 31xC and CPU 31x Manual, technical data
of signal modules: Reference manual of your signal module
To connect my sensors/actuators to the PLC, how do I wire
the front connector ?
Installation: Wiring Wiring the front connector
When do I need expansion modules (EM) and how do I
connect them?
How to mount modules on racks / mounting rails S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Assembly Installing modules on the mounting
rail
Table 1-4 The use of local and distributed I/O
Which range of modules do I want to use? For local I/O and expansion devices: Module Data reference
manual
For distributed I/O and PROFIBUS DP: Manual of the
relevant I/O device
Table 1-5 Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs)
Which rack / mounting rail is most suitable for my
application?
Which interface modules (IM) do I need to connect the EMs
to the CU?
What is the right power supply (PS) for my application? S7-300, CPU 31xC and CPU 31x operating instructions:
Table 1-6 CPU performance
Which memory concept is best suited to my application? CPU 31xC and CPU 31x Manual, Technical Data
How do I insert and remove Micro Memory Cards? S7-300, CPU 31xC and CPU 31x operating instructions:
Installation: Commissioning Commissioning modules
Removing / inserting a Micro Memory Card (MMC)
Which CPU meets my demands on performance? S7-300 instruction list: CPU 31xC and CPU 31x
Length of the CPU response / execution times CPU 31xC and CPU 31x Manual, Technical Data
Which technological functions are implemented? Technological Functions Manual
How can I use these technological functions? Technological Functions Manual


Table 1-7 Communication
Which principles do I have to take into account? Communication with SIMATIC Manual
Options and resources of the CPU CPU 31xC and CPU 31x Manual, Technical Data
How to use communication processors (CPs) to optimize
communication
CP Manual
Which type of communication network is best suited to my
application?
subnets
How to network the various components S7-300, CPU 31xC and CPU 31x Operating Instructions:
subnets
What to take into account when configuring PROFINET
networks
SIMATIC NET Manual, Twisted-Pair and Fiber Optic
Networks (6GK1970-1BA10-0AA0) Network Configuration
Installation and Commissioning
Table 1-8 Software
Software requirements of my S7-300 system CPU 31xC and CPU 31x Manual, Technical Data
Technical Data
Table 1-9 Supplementary features
How to implement monitor and modify functions
(Human Machine Interface)
For text-based displays: The relevant Manual
For Operator Panels: The relevant Manual
For WinCC: The relevant Manual
How to integrate process control modules For PCS7: The relevant Manual
What options are offered by redundant and fail-safe
systems?
S7-400H Manual Redundant Systems
Fail-Safe Systems Manual
Information to be observed when migrating from PROFIBUS
DP to PROFINET IO
Programming Manual: From PROFIBUS DP to PROFINET
IO



Installation Order
2
We will start by showing you the sequence of steps you have to follow to install your system.
Then we will go on to explain the basic rules that you should follow, and how you can modify
an existing system.
Installation procedure

Configuring
lnstallation
Wiring
Networking
Yes
Should a subnetwork
be installed?
No
Addressing
lnstallation completed,
continue with commissioning

Basic rules for trouble-free operation of the S7 system
In view of the many and versatile applications, we can only provide basic rules for the
electrical and mechanical installation in this section.
You have to at least keep to these basic rules in order to obtain a fully functional SIMATIC-
S7 system.
Installation Order

Modifying the existing S7 system structure
To modify the configuration of an existing system, proceed as described earlier.

Note
When adding a new signal module, always refer to the relevant module information.

Reference
Also refer to the description of the various modules in the manual: SIMATIC S7-300
Automation Systems, Module Data Manual.

S7-300 components
3
3.1 Example of an S7-300 configuration
SF
BUSF
DC5V
FRCE
RUN
STOP
SF
BUSF
DC5V
FRCE
RUN
STOP
5
4
1 2 3

Number Description
Power supply (PS) module
Central processing unit (CPU); the example in the diagram shows a CPU 31xC with
integrated I/O.
Signal module (SM)
PROFIBUS bus cable
Cable for connecting a programming device (PG)
You use a programming device (PG) to program the S7300 PLC. Use the PG cable to
interconnect the PG with the CPU.
To commission or program a CPU with PROFINET interface, you may also use an Ethernet
cable to interconnect the PG with the PROFINET connector of the CPU.
Several S7-300 CPUs communicate with one another and with other SIMATIC S7 PLCs via
the PROFIBUS cable. Several S7-300 are connected via the PROFIBUS bus cable.
S7-300 components
3.2 Overview of the vital modules of an S7-300
You can choose from a number of modules for installing and commissioning the S7-300. The
most important modules and their functions are shown below.
Table 3-1 S7-300 components:
Component Function Illustration
Mounting rail
Accessories:
Shielding terminal
S7-300 racks

Power supply (PS) module The PS converts the line voltage
(120/230 VAC) into a 24 VDC operating
voltage, and supplies the S7-300 and
its 24 VDC load circuits.

A CPU 31xC, for example
SlEMENS

A CPU 312, 314, or 315-2 DP, for
example
CPU
Accessories:
Front connectors (CPU 31xC only)
The CPU executes the user program,
supplies 5 V to the S7-300 backplane
bus, and communicates with other
nodes of an MPI network via the MPI
interface.
Additional features of specific CPUs:
DP master or DP slave on a
PROFIBUS subnet
Technological functions
PtP communication
Ethernet communication via
integrated PROFINET interface

A CPU 317, for example
S7-300 components
Signal modules (SM)
Digital input modules
Digital output modules
Digital I/O modules,
Analog input modules
Analog output modules
Analog I/O modules

Accessories:
Front connectors
The SM matches different process
signal levels to the S7-300.

Function modules (FM)
Accessories:
Front connectors
The FM performs time-critical and
memory-intensive process signal
processing tasks.
Positioning or controlling, for example

Communication processor (CP)
Accessories: Connecting cable
The CP relieves the CPU of
communication tasks.
Example: CP 342-5 DP for connecting
to PROFIBUS DP

SIMATIC TOP connect
Accessories:
Front connector module with ribbon
cable terminals
Wiring of digital modules

Interface module (IM)
Accessories:
Connecting cable
The IM interconnects the various rows
in an S7-300

PROFIBUS cable with bus connector Interconnect the nodes of an MPI or
PROFIBUS subnet

S7-300 components
PG cable Connects a PG/PC to a CPU

RS 485 repeater
RS 485 Diagnostic Repeater
The repeater is used to amplify the
signals and to couple segments of an
MPI or PROFIBUS subnet.

Switch A switch is used to interconnect the
Ethernet nodes.

Twisted-pair cables with RJ45
connectors.
Interconects devices with Ethernet
interface (a switch with a CPU 317-2
PN/DP, for example)

Programming device (PG) or PC with
the STEP 7 software package
You need a PG to configure, set
parameters, program and test your S7-
300

Configuring
4
4.1 Overview
There, you can find all the necessary information
for the mechanical configuration of an S7-300,
for the electrical configuration of an S7-300,
that has to be observed in networking.
Reference
For more detailed information, refer to
the Communication with SIMATIC manual or
the SIMATIC NET Twisted-Pair and Fiber-Optic Networks Manual
(6GK1970-1BA10-0AA0)
Configuring
4.2 Basic engineering principles
Important information for engineering

Warning
Open equipment
S7-300 modules are open equipment. That is, the S7-300 must be installed in a cubicle,
cabinet or electrical control room which can only be accessed using a key or tool. Only
trained or authorized personnel are allowed access to such cubicles, cabinets or electrical
operating rooms.

Caution
Operation of an S7-300 in plants or systems is defined by special set of rules and
regulations, based on the relevant field of application. Observe the safety and accident
prevention regulations for specific applications, for example, the machine protection
directives. This chapter and the appendix General rules and regulations on S7-300 operation
provide an overview of the most important rules you need to observe when integrating an
S7-300 into a plant or a system.

Central Rack (CR) and Expansion Rack (ER)
An S7-300 PLC consists of a central unit (CU) and of one or multiple expansion modules.
The rack containing the CPU is the central unit (CU). Racks equipped with modules and
connected to the CU form the expansion modules (EMs) of the system.
Use of an expansion module (EM)
You can use EMs if the CU runs out of slots for your application.
When using EMs, you might require further power supply modules in addition to the extra
racks and interface modules (IM). When using interface modules you must ensure
compatibility of the partner stations.
Racks
The rack for your S7-300 is a mounting rail. You can use this rail to mount all modules of
your S7-300 system.
Configuring
Horizontal and vertical installation
You can mount an S7-300 either vertically or horizontally. The following ambient air
temperatures are permitted:
Vertical assembly: 0 C to 40 C
Horizontal assembly: 0 C to 60 C
Always install the CPU and power supply modules on the left or at the bottom.
DC5 V
FRCE
RUN
ST OP
D
C
5
F
R
C
E
R
U
N
S
T
O
P
SM
SM
SM
SM SM SM SM SM
SM
SM
SM
SM SM SM
SM
SM
CPU
CPU
PS
PS
1
2
3
3

Number Description
the vertical installation of an S7-300
the horizontal installation of an S7-300
The mounting rail

Configuring
4.3 Component dimensions
Length of the mounting rails
Table 4-1 Mounting rails - Overview
Mounting rail length Usable length for modules Order No.
160 mm 120 mm 6ES7 390-1AB60-0AA0
482.6 mm 450 mm 6ES7 390-1AE80-0AA0
530 mm 480 mm 6ES7 390-1AF30-0AA0
830 mm 780 mm 6ES7 390-1AJ30-0AA0
2000 mm cut to length as required 6ES7 390-1BC00-0AA0
In contrast to other rails, the 2 m mounting rail is not equipped with any fixing holes. These
must be drilled, allowing optimal adaptation of the 2 m rail to your application.
Installation Dimensions of the Modules
Table 4-2 Module width
Module Width
Power supply module PS 307, 2 A 50 mm
CPU For information on assembly dimensions,
refer to the Technical Data in CPU 31xC and
CPU 31x Manual, Technical Data.
Analog I/O modules 40 mm
Digital I/O modules 40 mm
Simulator module SM 374 40 mm
Interface modules IM 360 and IM 365 40 mm
Interface module IM 361 80 mm
Module height: 125 mm
Module height with shielding contact element: 185 mm
Maximum assembly depth: 130 mm
Maximum assembly depth of a CPU with an inserted DP connector with angled cable
feed: 140 mm
Maximum assembly depth with open front panel (CPU): 180 mm
Dimensions of other modules such as CPs, FMs etc. are found in the relevant manuals.
Configuring
Shielding contact element
The direct contact between the shielding contact element and the mounting rail makes it
easy for you to connect all shielded cables of your S7 modules to ground.
C
P
U
P
S
1
2

Number Description
Shielding terminals
The bracket.
Mount the bracket (order number. 6ES7 390-5AA0-0AA0) to the rail using the two screw
bolts. If you use a shielding contact element, the specified dimensions are measured from
the base of the element.
Width of the shielding contact element: 80 mm
Mountable terminal elements per shield connecting element max. 4
Table 4-3 Shielding terminals - Overview
Cable with shielding diameter Shielding terminal order no.
Cable with 2 mm to 6 mm shielding diameter 6ES7 390-5AB000AA0
Cable with 3 mm to 8 mm shielding diameter 6ES7 390-5BA000AA0
Cable with 4 mm to 13 mm shielding diameter 6ES7 390-5CA000AA0

Configuring
4.4 Specified clearances
4.4 Specified clearances
You must maintain the clearance shown in the figure in order to provide sufficient space for
installing the modules, and to allow the dissipation of heat generated by the modules.
The S7-300 assembly on multiple racks shown in the figure below shows the clearance
between racks and adjacent components, cable ducts, cabinet walls etc.
For example, when routing your module wiring through cable duct, the minimum clearance
between the bottom of the shield connection element and the cable duct is 40 mm.
40 mm
40 mm
40 mm
40 mm
200 mm + a
a
20 mm 20 mm
SM
SM
SM
SM SM CPU
PS
CPU
2
1

Number Description
Wiring with cable duct
Minimum clearance between the cable duct and the bottom edge of the shielding contact
element is 40 mm

Configuring
4.5 Arrangement of modules on a single rack
4.5 Arrangement of modules on a single rack
Reasons for using one or multiple racks
The number of racks you need will depend on your application.

Reasons for using a single rack: Reasons for distributing modules between
several racks
Compact, space-saving use of all your
modules
Local use of all modules
Fewer signals to be processed
More signals to be processed
Insufficient number of slots

Note
If you opt for the installation on a single rack, insert a dummy module to the right of the CPU
(order no.: 6ES7 370-0AA01-0AA0). This gives you the option of adding a second rack for
your application, simply by replacing the dummy module with an interface module, and
without having to reinstall and rewire the first rack.

Rules: Layout of modules on a single module rack
The following rules apply to module installations on a single rack:
No more than eight modules (SM, FM, CP) may be installed to the right of the CPU.
The accumulated power consumption of modules mounted on a rack may not exceed 1.2
A on the S7-300 backplane bus.
Reference
Further information is available in the technical data, for example, in the SIMATIC S7-300
Automation Systems Manual, Module data, or in the S7-300 Manual, CPU 31xC and CPU
31x, Technical Data.
Example
The figure below shows a layout with eight signal modules in an S7-300 assembly.
CPU PS SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8

Configuring
4.6 Distribution of modules to several racks
Exceptions
With CPU 312 and CPU 312C, only a single-row configuration on a rack is possible.
Using interface modules
If you are planning an assembly in multiple racks, then you will need interface modules (IM).
An interface module routes the backplane bus of an S7-300 to the next rack.
The CPU is always located on rack 0.
Table 4-4 Interface modules - Overview
Properties Two or more rows Cost-effective 2-row configuration
Send IM in rack 0 IM 360
order no..: 6ES7 360-3AA01-0AA0
IM 365
order no..: 6ES7 365-0AB00-0AA0
Receiver IM in racks 1 to 3 IM 361
order no..: 6ES7 361-3CA01-0AA0
IM 365 (hard-wired to send IM 365)
Maximum number of expansion
modules
3 1
Length of connecting cables 1 m (6ES7 368-3BB01-0AA0)
2.5 m (6ES7 368-3BC51-0AA0)
5 m (6ES7 368-3BF01-0AA0)
10 m (6ES7 368-3CB01-0AA0)
1 m (hard-wired)
Remarks - Rack 1 can only receive signal modules;
the accumulated current load is limited to
1.2 A, whereby the maximum for rack 1 is
0.8 A
These restrictions do not apply to operation
with interface modules IM 360/IM 361
Rules: Distribution of modules to several racks
Please note the following points if you wish to arrange your modules on multiple racks:
The IM always uses slot 3 (slot 1: power supply module; slot 2: CPU, slot 3: Interface
module)
It is always on the left before the first signal module.
No more than 8 modules (SM, FM, CP) are permitted per rack.
The number of modules (SM, FM, CP) is limited by the permitted current consumption on
the S7-300 backplane bus. The accumulated power consumption may not exceed 1.2 A
per row.

Note
For information on the current consumption of the modules, refer to the SIMATIC
Automation Systems S7-300, Module Specifications Manual.
Configuring
Rules: Interference-proof interfacing
Special shielding and grounding measures are not required if you interconnect the CU and
EM using suitable interface modules (Send IM and Receive IM).
However, you must ensure
a low impedance interconnection of all racks,
that the racks of a grounded assembly are grounded in a star pattern,
that the contact springs on the racks are clean and not bent, thus ensuring that
interference currents are properly discharged to ground.
Example: Full assembly using four racks
The figure shows the arrangement of modules in an S7-300 assembly on 4 racks.
CPU PS
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8
PS
PS
SM1 SM2 SM3 SM4 SM5 SM6 SM7 SM8 lM
lM
lM
lM
1
2
3
4
5
5
5
6

Number Description
Rack 0 (central unit)
Rack 1 (expansion module)
The connecting cable 368
Restriction for CPU 31xC. When this CPU is used, do not insert SM 8 into Rack 4.
Configuring
4.7 Selection and installation of cabinets
Reasons for installing an S7-300 in a cabinet
Your S7-300 should be installed in a cabinet,
if you plan a larger system,
if you are using your S7-300 systems in an environment subject to interference or
contamination, and
to meet UL/CSA requirements for cabinet installation.
Selecting and dimensioning cabinets
Take the following criteria into account:
ambient conditions at the cabinet's place of installation
the specified mounting clearance for racks (mounting rails)
accumulated power loss of all components in the cabinet.
The ambient conditions (temperature, humidity, dust, chemical influence, explosion hazard)
at the cabinet's place of installation determine the degree of protection (IP xx) required for
the cabinet.
Reference for degrees of protection
For further information on the degrees of protection, refer to IEC 529 and DIN 40050.
The power dissipation capability of cabinets
The power dissipation capability of a cabinet depends on its type, ambient temperature and
on the internal arrangement of devices.
Reference for power loss
For detailed information on dissipatable power loss, refer to the Siemens catalogs. You can
find these at: https://mall.automation.siemens.com/de/guest/guiRegionSelector.asp
Specification of cabinet dimensions
Note the following specifications when you determine the dimensions of a cabinet for your
S7-300 installation:
Space required for racks (mounting rails)
Minimum clearance between the racks and cabinet walls
Minimum clearance between the racks
Space required for cable ducts or fan assemblies
Position of the stays

Warning
Modules may get damaged if exposed to excess ambient temperatures.

Configuring
Reference for ambient temperatures
For information on permitted ambient temperatures, refer to the S7-300 Automation System,
Module Data Manual.
Overview of typical cabinet types
The table below gives you an overview of commonly used cabinet types. It shows you the
applied principle of heat dissipation, the calculated maximum power loss and the degree of
protection.
Table 4-5 Cabinet types
Open cabinets Closed cabinets
Through-ventilation by
natural convection
Increased through-
ventilation
Natural convection Forced convection with
rack fan, improvement
of natural convection
Forced convection with
heat exchanger,
internal and external
auxiliary ventilation

Mainly inherent heat
dissipation, with a
small portion across
the cabinet wall.
Higher heat dissipation
with increased air
movement.
Heat dissipation only
across the cabinet
wall; only low power
losses permitted. In
most cases, the heat
accumulates at the top
of the cabinet interior.
Heat dissipation only
across the cabinet
wall. Forced
convection of the
interior air improves
heat dissipation and
prevents heat
accumulation.
Heat dissipation by
heat exchange
between heated
internal air and cool
external air. The
increased surface of
the pleated profile of
the heat exchanger
wall and forced
convection of internal
and external air
provide good heat
dissipation.
Degree of protection
IP 20
IP 20
IP 54
IP 54
IP 54
Typical power dissipation under following marginal conditions:
Cabinet size: 600 mm x 600 mm x 2,200 mm
Difference between the outer and inner temperature of the cabinet is 20 C (for other temperature differences refer to
the temperature charts of the cabinet manufacturer)
up to 700 W up to 2,700 W (with
fine filter up to
1,400 W)
up to 260 W up to 360 W up to 1,700 W
Configuring
4.8 Example: Selecting a cabinet
4.8 Example: Selecting a cabinet
Introduction
The sample below clearly shows the maximum permitted ambient temperature at a specific
power loss for different cabinet designs.
Installation
The following device configuration should be installed in a cabinet:
Central unit, 150 W
Expansion modules, each with 150 W
Load power supply under full load, 200 W
This results in an accumulated power loss of 650 W.
Power loss dissipated
The diagram in the figure below shows guide values for the permitted ambient temperature
of a cabinet with the dimensions 600 mm x 600 mm x 2,000 mm, based on the accumulated
power loss. These values only apply if you maintain the specified assembly and clearance
dimensions for racks (rails).

200 400 600 1000 1200 1400
20
30
40
50
60
800
Power loss in W
Ambient temperature in C
1
2
3

Number Description
Closed cabinet with heat exchanger (heat exchanger size 11/6 (920 mm x 460 mm x
111 mm))
Cabinet with through-ventilation by natural convection
Closed cabinet with natural convection and forced convection by equipment fans
Configuring
4.9 Electrical assembly, protective measures and grounding
Result
The figure below shows the resultant ambient temperatures, based on an accumulated
power loss of 650 W:
Table 4-6 Cabinet selection
Cabinet design Maximum permitted ambient
temperature
Closed with natural convection and forced convection (trend
3)
Operation not possible
Open with through-ventilation (trend 2) approx. 38 C
Closed with heat exchanger (trend 1) approx. 45 C
Cabinet types suitable for horizontal installation of the S7-300:
open, with closed ventilation
closed, with heat exchanger
4.9.1 Grounding concept and overall structure
This section contains information about the overall configuration of an S7-300 connected to a
grounded TN-S network:
Circuit-breaking devices, short-circuit and overload protection to VDE 0100 and
VDE 0113
Load power supplies and load circuits
Grounding concept

Note
An S7-300 can be used in many different ways, so we can only describe the basic rules
for the electrical installation in this document. Those basic rules are a must in order to
achieve a fully functional S7-300 system.

Definition: Grounded mains
In a grounded mains network, the neutral conductor is always bonded to ground. A short-
circuit to ground of a live conductor, or of a grounded part of the system, trips the protective
devices.
Configuring
Specified components and protective measures
A number of components and protective measures are prescribed for plant installations. The
type of components and the degree of compulsion pertaining to the protective measures will
depend on the VDE specification applicable to your particular plant.
The table below shows components and protective measures.
Table 4-7 VDE specifications for the installation of a PLC system
Compare ... 1) VDE 0100 VDE 0113
Disconnect devices for control
systems, signal generators and
final control elements
(1) ...Part 460:
Master switch
... Part 1:
Load disconnect switch
Short-circuit / overload
protection:
In groups for signal generators
and final control elements
(2) ...Part 725:
Single-pole fusing of
circuits
... Part 1:
With grounded secondary
power circuit: single-pole
fusing
Otherwise: fusing of all poles
Load power supply for AC load
circuits with more than five
electromagnetic devices
(3) Galvanic isolation by
transformer
recommended
Electrical isolation by transformer
mandatory
1) This column refers to the indexes of the figure in the chapter "Overview: Grounding".
Reference
For further information on protective measures, refer to the Appendix.
See also
Overview display: Earthing (Page 4-21)
4.9.2 Installing an S7-300 with grounded reference potential
Introduction
When the S7-300 is configured with a grounded reference potential, any interference
currents are discharged to the grounding conductor / ground. A grounding slide contact is
used for this except with CPU 31xC.

Note
Your CPU is supplied with grounded reference potential. Therefore, if you wish to install an
S7-300 with grounded reference potential, you do not need to modify your CPU!

Configuring
Grounded reference potential of the CPU 31x
The figure shows an S7-300 configuration with grounded reference potential (factory state.)
M L+
M
10M <100nF
M
1
2
3

Number Description
Grounding slide contact in grounded state
Ground of the internal CPU circuitry
The mounting rail

Note
Do not pull out the grounding slide contact when you install an S7-300 with grounded
reference potential.

4.9.3 Installing an S7-300 with ungrounded reference potential (not CPU 31xC)
Introduction
When the S7-300 is configured with an ungrounded reference potential, interference currents
are discharged to the ground conductor / to ground via an RC combination integrated in the
CPU.

Note
An S7-300 with a CPU 31xC cannot be configured ungrounded.

Configuring
Application
In large systems, the S7-300 may require a configuration with grounded reference potential
due to ground-fault monitoring. This is the case, for example, in chemical industry and power
stations.
Ungrounded reference potential of the CPU 31x
The figure shows an S7-300 configuration with floating potential
M L+
M
10M <100 nF
M
2
3
1

Number Description
How to implement an ungrounded reference potential in your CPU: Use a screwdriver with
3.5 mm blade width to push the grounding slide contact forwards in the direction of the
arrow until it snaps into place.
Ground of the internal CPU circuitry
The mounting rail.

Note
You should set up the ungrounded reference potential before you mount the device on the
rail. If you have already installed and wired up the CPU, you may have to disconnect the MPI
interface before you pull out the grounding slide contact.

Configuring
4.9.4 Isolated or common potential modules?
Isolated modules
Isolated modules are installed with galvanic isolation between the reference potentials of the
control circuit (Minternal) and load circuit (Mexternal.)
Field of application
Use isolated modules for:
All AC load circuits
DC load circuits with separate reference potential
Examples:
DC load circuits containing sensors which are connected to different reference
potentials (for example, if grounded sensors are located at a considerable distance
from the control system and equipotential bonding is not possible)
DC load circuits with grounded positive pole (L+) (battery circuits.)
Isolated modules and grounding concept
You can always use isolated modules, irrespective of the grounding state of the control
system's reference potential.
Example: Assembly with CPU 31xC and isolated modules
The figure below shows an example of such a configuration: A CPU 31xC with isolated
modules. The CPU 31xC (1) is automatically grounded.
PS Dl DO S7-300 CPU
U
L1 L+
L+
P
N
L1
L1
N
N
PE
Data
intern
M
intern
M
M
extern
AC 230 V load current
supply
24 VDC load current supply
Grounding busbar in
cabinet
1

Configuring
Common potential modules
In a configuration containing modules with common potential, the reference potentials of the
control circuit (Minternal) and analog circuit (Manalog) are not galvanically isolated.
Example: Installing an S7-300 with common potential modules
When using an SM 334 AI 4/AO 2 analog I/O module, connect one of the grounding
terminals Manalog to the CPU's chassis ground.
The figure below shows an example of such a configuration: An S7-300 with common
potential modules
PS S7-300 CPU
1 mm
2
U
Data
V
A
A A
D D
P
intern
M
intern
M
M
M
L+
L+
L1
L1
N
N
PE
extern
M
analog
+ +
Grounding busbar in
cabinet
24 VDC load current supply

Configuring
4.9.5 Grounding measures
Bonding to ground
Low-impedance connections to ground reduce the risk of electric shock as a result of a
short-circuit or system fault. Low-impedance connections (large surface, large-surface
contact) reduce the effects of interference on the system or the emission of interference
signals. An effective shielding of cables and devices is also a significant contribution.

Warning
All protection class 1 devices, and all larger metal parts, must be bonded to protective
ground. That is the only way to safely protect operators from electrical shock. This also
discharges any interference transmitted from external power supply cables, signal cables or
cables to the I/O devices.

Measures for protective grounding
The table below shows an overview of the most important measures for protective
grounding.
Table 4-8 Measures for protective grounding
Device Measures
Cabinet / mounting frame Connection to central ground (equipotential busbar, for example)
using cables with protective conductor quality
Rack / mounting rail Connection to central ground, using cables with a minimum cross-
section of 10 mm
2
, if the rails are not installed in the cabinet and not
interconnected with larger metallic parts.
Module None
I/O Device Grounding via grounding-type plug
Sensors and final control
elements
Grounding in accordance with regulations applying to the system
Rule: Connect the cable shielding to ground
You should always connect both ends of the cable shielding to ground / system ground. This
is the only way to achieve an effective interference suppression in the higher frequency
range.
Attenuation is restricted to the lower frequency range if you connect only one end of the
shielding (that is, at the start or end of the cable) to ground. One-sided shielding connections
could be more favorable in situations
not allowing the installation of an equipotential bonding conductor,
where analog signals (some mA or A) are transferred,
or if foil shielding is used (static shielding).
Configuring

Note
Potential differences between two grounding points might cause an equipotential current
flow across shielding connected at both ends. In this case, you should install an
additional equipotential bonding conductor.

Caution
Always avoid the flow of operating current to ground.

Rule: Load circuit grounding
You should always ground the load circuits. This common reference potential (ground)
ensures proper functioning.

Note
(not valid for CPU 31xC):
If you want to locate a fault to ground, provide your load power supply (terminal L or M) or
the isolating transformer with a removable connection to the protective conductor (see
Overview: Grounding section 4).

Connecting the load voltage reference potential
A complex system containing many output modules requires an additional load voltage for
switching the final control elements.
The table below shows how to connect the load voltage reference potential Mexternal for the
various configurations.
Table 4-9 Connecting the load voltage reference potential
Installation

common potential modules isolated modules Note
grounded Connect Mexternal with M on
the CPU
Connect or do not connect
Mexternal to the grounding
busbar
-
ungrounded Connect Mexternal with M on
the CPU
Connect or do not connect
Mexternal to the grounding
busbar
Ungrounded installation
with CPU 31xC is not
possible

Configuring
4.9.6 Overview display: Earthing
CPU 31xC
The figure below shows you the complete assembly of an S7-300 with CPU 31xC with a
power supply from TN-S mains. Apart from powering the CPU, the PS 307 also supplies the
load current for the 24 VDC modules. Remark: The layout of the power connections does not
correspond with their physical arrangement; it was merely selected to give you a clear
overview.
L1
L2
L3
N
PE
SM CPU PS
AC
AC
AC
AC
DC
DC
L1
L +
M
P
N
Low-voltage distribution
TN-S system (3 x 400 V), for example
Cabinet
Signal modules
Mounting rail
Grounding busbar in cabinet
Load voltage circuit
24 VAC to 230 VAC for AC modules
5 VDC to 60 VDC for non-isolated DC modules
5 VDC to 60 VDC for isolated DC modules
1
3
4
2
2
2

Figure 4-1 Connecting the load voltage reference potential
Number Description
The main switch
The short-circuit / overload protection
The load current supply (galvanic isolation)
This connection is made automatically for the CPU 31xC
Configuring
All CPUs except CPU 31xC
The figure below shows you the complete assembly of an S7-300 with TN-S mains supply
(does not apply to CPU 31xC). Apart from powering the CPU, the PS 307 also supplies the
load current for the 24 VDC modules.
Remark: The layout of the power connections does not correspond with their physical
arrangement; it was merely selected to give you a clear overview.
AC
AC
AC
AC
DC
DC
PS
CPU SM
L1
N
L +
Mb
P
L1
Mb
L2
L3
N
PE
Cabinet
Mounting rail
Signal modules
Load circuit
24 VAC to 230 VAC for AC modules
Load circuit
5 VDC to 60 VDC for non-isolated DC modules
Load circuit
5 VDC to 60 VDC for optically isolated DC modules
e.g. TN S system (3 x 400 V)
Ground bus in cabinet
1
3
4
2
2
2
5

Figure 4-2 Connecting the load voltage reference potential
Number Description
The main switch
The short-circuit / overload protection
The load current supply (galvanic isolation)
The removable connection to the grounding conductor, for ground fault localization
The grounding slide contact of the CPU (not CPU 31xC)
Configuring
4.10 Selection of the load power supply
Task of the load power supply
The load power supply feeds the input and output circuits (load circuits), and the sensors
and actuators.
Features of load power supply units
You will have to adapt the load power supply unit to your specific application. The table
below shows a comparison of the various load power supply units and their features to help
you make your choice:
Table 4-10 Features of load power supply units
Necessary for ... Feature of the load power
supply
Remarks
Modules requiring voltage
supplies 60 VDC or 25 VAC.
24 VDC load circuits
Safety isolation This is a common feature of the
Siemens power supply series
PS 307 and SITOP power
series 6EP1.

Output voltage tolerances:
20.4 V to 28.8 V
40.8 V to 57.6 V
51 V to 72 V
-
Load power supply requirements
Only an extra-low voltage of 60 VDC which is safely isolated from mains may be used as
load voltage. Safe isolation from mains can be achieved, for example, in accordance with
VDE 0100 Part 410 / HD 384-4-41 / IEC 364-4-41 (as functional extra-low voltage with safe
isolation) or VDE 0805 / EN 60950 / IEC 950 (as safety extra-low voltage SELV) or VDE
0106 Part 101.
Load current determination
The required load current is determined by the accumulated load current of all sensors and
actuators connected to the outputs.
A short-circuit induces a surge current at the DC outputs which is 2 to 3 times higher than
the rated output current, until the clocked electronic short-circuit protection comes into effect.
Make allowances for this increased short-circuit current when selecting your load power
supply unit. Uncontrolled load power supplies usually provide this excess current. With
controlled load power supplies, and particularly for low output power up to 20 A, always
ensure that the supply can handle this excess current.
Configuring
Example: S7-300 with load power supply from PS 307
The figure below shows the overall S7-300 configuration (load power supply unit and
grounding concept), with TN-S mains supply. The PS 307 supplies the CPU and the load
current circuit of the 24 VDC modules.

Note
The layout of the power connections does not correspond with their physical arrangement; it
was merely selected to give you a clear overview.

PS
CPU SM
L1
N
L +
M
P
L1
M
L2
L3
N
PE
Cabinet
Mounting rail
Signal modules
TN S system (3 x 400 V), for example
Grounding busbar in cabinet
Load circuit 24 V DC for
DC module

Example: S7-300 with load power supply from PS 307
Configuring
4.11 Planning subnets
4.11.1 Overview
Subnets
Subnets available in SIMATIC for the various automation levels (process, cell, field and
actuator/sensor level ):
Multi-Point Interface (MPI)
PROFIBUS
PROFINET (Industrial Ethernet)
Point-to-point communication (PtP)
Actuator/Sensor Interface (ASI)
Multi-Point Interface (MPI)
Availability: For all CPUs described in this document.
MPI is a small area subnet containing a small number of nodes at the field/cell level. It is a
multipoint-capable interface in SIMATIC S7/M7 and C7, designed as PG interface, for
networking a small number of CPUs, or for low volume data exchange with PGs.
MPI always retains the last configuration of the transmission rate, node number and highest
MPI address, even after CPU memory reset, power failure or deletion of the CPU parameter
configuration.
It is advisable to use the PROFIBUS DP network components for your MPI network
configuration. The same configuration rules apply. Exception: OWG modules are not allowed
in the MPI network.
PROFIBUS
Availability: CPUs with the "DP" name suffix are equipped with a PROFIBUS interface (CPU
315-2 DP, for example).
PROFIBUS represents the network at the cell and field level in the SIMATIC open,
multivendor communication system.
PROFIBUS is available in two versions:
1. PROFIBUS DP field bus for high-speed cyclic data exchange, and PROFIBUS-PA for
intrinsically safe applications (requires DP/PA coupler).
2. The cell level as PROFIBUS (FDL or PROFIBUS FMS) for high-speed data exchange
with communication partners at the same authorization level (can only be implemented
via CP).
Configuring
PROFINET (Industrial Ethernet)
Availability: CPUs with the "PN" name suffix are equipped with a PROFINET interface (CPU
317-2 PN/DP or CPU 319-3 PN/DP for example). A PROFINET interface, or communication
processors, can be used to implement Industrial Ethernet in an S7-300 CPU system.
Industrial Ethernet, in an open multivendor communication system, represents the SIMATIC
network at the process and cell level. PROFINET CPUs, however, also support real-time
communication at the field level. This structure also supports S7 communication. Industrial
Ethernet is suitable for high-speed and high-volume data exchange, and for remote network
operations via gateway.
PROFINET is available in two versions:
PROFINET IO and
PROFINET CBA.
PROFINET IO is a communication concept for the implementation of modular, distributed
applications. PROFINET IO allows you to create automation solutions you are familiar with
from PROFIBUS.
PROFINET CBA (Component based Automation) is an automation concept for the
implementation of applications with distributed intelligence. PROFINET CBA lets you create
distributed automation solutions, based on default components and partial solutions. This
concept satisfies demands for a higher degree of modularity in the field of mechanical and
systems engineering by extensive distribution of intelligent processes.
Component-Based Automation allows you to use complete technological modules as
standardized components in complex systems.
Point-to-point communication (PtP)
Availability: CPUs with "PtP" name suffix are equipped with a second interface, namely the
PtP interface (CPU 314C-2 PtP, for example)
PtP does not represent a subnet in the common sense, because it is used to interconnect
only two stations.
If a PtP interface is not available, you require PtP Communication Processors (CP).
Implementation by means of communication processors (CP).
The ASI, or actuator/sensor interface, represents a subnet system on the lowest process
level for automation systems. It is designed especially for networking digital sensors and
actuators. The maximum data volume is 4 bits per slave station.
S7-300 CPUs require communication processor for the ASI connection.
Reference
For further information on communication, refer to the Communication with SIMATIC
manual.
Configuring
4.11.2 Configuring MPI and PROFIBUS subnets
4.11.2.1 Overview
The next section contains all the information you require to configure MPI, PtP and
PROFIBUS subnets:
Contents
MPI, PtP and PROFIBUS subnets
Multi-Point Interface
PROFIBUS DP
MPI and PROFIBUS network components
Example of networks - MPI
4.11.2.2 Basic principles of MPI and PROFIBUS subnets
Convention: device = node
All devices you interconnect on the MPI or PROFIBUS network are referred to as nodes.
Segment
A segment is a bus line between two terminating resistors. A segment may contain up to 32
nodes. It is also limited with respect to the permitted line length, which is determined by the
transmission rate.
Baud rate
Maximum transmission rates:
MPI:
CPU 315-2 PN/DP, CPU 317 and CPU 319-3 DP/DP 12 Mbps
All other CPUs: 187.5 kbps
PROFIBUS DP: 12 Mbps
Configuring
Number of nodes
Maximum number of nodes per subnet:
Table 4-11 Subnet nodes
Parameters MPI PROFIBUS DP
Number 127 126
1)

Addresses 0 to 126 0 to 125
Remark Default: 32 addresses
Reserved addresses:
Address 0 for PG
Address 1 for OP
of those:
1 master (reserved)
1 PG connection (address 0 reserved)
124 slaves or other masters
1
Note the CPU-specific maximum specifications in the relevant CPU manual.
MPI/PROFIBUS DP addresses
You need to assign an address to all nodes in order to enable intercommunication:
On the MPI network: an "MPI address"
On the PROFIBUS DP network: "a PROFIBUS DP address"
You can use the PG to set the MPI/PROFIBUS addresses for each one of the nodes (some
of the PROFIBUS DP slaves are equipped with a selector switch for this purpose).
Default MPI/PROFIBUS DP addresses
The table below shows you the default setting of the MPI/PROFIBUS DP addresses, and the
factory setting of the highest MPI/PROFIBUS DP addresses for the nodes.
Table 4-12 MPI/PROFIBUS DP addresses
Node (device) Default
MPI/PROFIBUS DP
address
Default highest MPI
address
Default highest PROFIBUS DP
address
PG 0 32 126
OP 1 32 126
CPU 2 32 126
Rules: Assignment of MPI/PROFIBUS DP addresses
Note the following rules before assigning MPI/PROFIBUS addresses:
All MPI/PROFIBUS subnet addresses must be unique.
Highest MPI/PROFIBUS address physical MPI/PROFIBUS address, and must be
identical for each node. (Exception: connecting a PG to multiple nodes; refer to the next
chapter).
Configuring
Differences in the MPI addresses of CPs/FMs in an S7300 system
Table 4-13 MPI addresses of CPs/FMs in an S7-300 system
Options Example
CPU CP CP SM

Example:
A system containing an S7-300 CPU and 2
CPs.
You have two options of assigning MPI
addresses to CPs/FMs installed in a system:
CPU CP CP
1st option: The CPU accepts the MPI addresses
you set for the CPs in STEP 7.
MPI addr. MPI
addr.+x
MPI
add.+y

2nd option: The CPU automatically assigns MPI
addresses to the CPs in its system, based on
the following syntax: MPI addr. CPU; MPI
addr.+1; MPI addr.+2.
(Default)
MPI addr. MPI
addr.+1
MPI
addr.+2

Special feature: CPU 315-2 PN/DP, CPU 317
and CPU 319-3 DP/DP
When the central rack of an S7-300 contains
FM/CPs with their own MPI address, the CPU
forms its own communication bus via the
backplane bus for these FM/CPs and separates it
from the other subnets.
The MPI address of those FM/CPs is thus no
longer relevant for the nodes on other subnets.
The MPI address of the CPU is used to
communicate with these FMs/CPs.
Recommendation for MPI addresses
Reserve MPI address "0" for a service PG, or "1" for a service OP, for temporary
connections of these devices to the subnet. You should therefore assign different MPI
addresses to PGs/OPs operating on the MPI subnet.
Recommended MPI address of the CPU for replacement or service operations:
Reserve MPI address "2" for the CPU. This prevents duplication of MPI addresses after you
connect a CPU with default settings to the MPI subnet (for example, when replacing a CPU).
That is, you should assign an MPI address greater than "2" to CPUs on the MPI subnet.
Recommendation for PROFIBUS addresses
Reserve PROFIBUS address "0" for a service PG that you can subsequently connect briefly
to the PROFIBUS subnet as required. You should therefore assign unique PROFIBUS
addresses to PGs integrated in the PROFIBUS subnet.
Configuring
PROFIBUS DP: Electrical cables or fiber-optic cables?
Use fiber optic cables on a field bus with greater length, rather than copper conductors, in
order to be independent on the transmission rate, and to exclude external interference.
For information on what to take into account with respect to equipotential bonding in your
network configuration, refer to the corresponding chapter in the appendix.
Reference
For further information, refer to the Communication section in CPU 31xC and CPU 31x
Manual, Technical Data.
4.11.2.3 Multi-Point Interface (MPI)
Availability
All the CPUs described here are equipped with an MPI interface
A CPU equipped with an MPI/DP interface is configured and supplied as
MPI interface.
Properties
The MPI (Multi-Point Interface) represents the CPU interface for PG/OP connections, or for
communication on an MPI subnet.
The default transmission rate of all CPUs is 187.5 kbps. You can also set 19.2 kbps for
communication with an S7-200. The
315-2 PN/DP, 317-2 and 319-3 PN/DP CPUs support transmission rates to 12 Mbps.
The CPU automatically broadcasts its bus configuration via the MPI interface (the
transmission rate, for example). A PG, for example, can thus receive the correct parameters
and automatically connect to a MPI subnet.

Note
You may only connect PGs to an MPI subnet which is in RUN.
Other stations (for example, OP, TP, ...) should not be connected to the MPI subnet while
the system is in RUN. Otherwise, transferred data might be corrupted as a result of
interference, or global data packages may be lost.

Configuring
The CPU's MPI interface supports time synchronization. The CPU can be programmed for
operation as time master (with default synchronization intervals) or time slave.
The synchronization mode is set in the "Clock" tab of the CPU or interface properties dialog
box in HW Config.
When operated as time master, the CPU broadcasts time synchronization message frames
at programmed synchronization intervals at the MPI interface to other node stations of the
MPI subnet. Time synchronization is initiated immediately when you set the CPU time by
way of PG or SFC.
Time synchronization at the MPI interface is also available at:
At the DP Interface

Note

Example 1
Example 2
Devices capable of MPI communication
PG/PC
OP/TP
S7-300 / S7-400 with MPI interface
S7-200 (only at 19.2 kbps)
Configuring
4.11.2.4 PROFIBUS DP interface
Availability
CPUs with the "DP" have at least one DP interface.
The 315-2 PN/DP and 317-2 PN/DP CPUs feature an integrated MPI/DP interface.
The 317-2 DP and 319-3 PN/DP CPUs feature an MPI/DP interface plus an additional DP
interface. The factory setting of the CPU's MPI/DP interface is MPI mode. You need to set
DP mode in STEP 7 if you want to use the DP interface.
Operating modes for CPUs with two DP interfaces
Table 4-14 Operating modes for CPUs with two DP interfaces
MPI/DP interface PROFIBUS DP interface
MPI
DP master
DP slave
1)

not configured
DP master
DP slave
1)

1)
simultaneous operation of the DP slave on both interfaces is excluded
Properties
The PROFIBUS DP interface is mainly used to connect distributed I/O. PROFIBUS DP
allows you to create large subnets, for example.
The PROFIBUS DP interface can be set for operation in master or slave mode, and supports
transmission rates up to 12 Mbps.
The CPU broadcasts its bus parameters (transmission rate, for example) via the PROFIBUS
DP interface when master mode is set. This functionality automatically provides the correct
parameters for online operation of a programming device, for example. In your configuration
you can specify to disable bus parameter broadcasting.

Note
(for DP interface in slave mode only)
When you disable the "Test, Commissioning, Routing" check box in the DP interface
properties dialog box in STEP 7, the transmission rate settings of the master automatically
override corresponding user-specific settings. This disables the routing function at this
interface.

Configuring
The CPU's DP interface supports time synchronization. The CPU can be programmed for
operation as time master (at corresponding synchronization intervals) or time slave.
The synchronization mode is set in the "Clock" tab of the interface properties dialog box in
HW Config.
When operated as time master on the DP interface, the CPU broadcasts time
synchronization message frames at programmed synchronization intervals to other node
stations of the PROFIBUS DP subnet. Time synchronization is initiated immediately when
you set the CPU time by way of PG or SFC.
Time synchronization at the DP interface is also available at:
At the MPI Interface

Note

Example 1
Example 2
Devices capable of PROFIBUS DP communication
PG/PC
OP/TP
DP slaves
DP master
Actuators/Sensors
S7-300/S7-400 with PROFIBUS DP interface
Reference
Further information on PROFIBUS: http://www.profibus.com
Configuring
4.11.2.5 Network components of MPI/DP and cable lengths
MPI subnet segment
You can install cables with a length of up to 50 m in an MPI subnet segment. This length of
50 m is the distance between the first and the last node of the segment.
Table 4-15 Permissible cable length of a segment on the MPI subnet
Baud rate S7-300 CPUs (non-isolated
MPI interface)
without CPU 315-2 PN/DP /
CPU 317 / CPU 319
CPU 315-2 PN/DP / CPU 317 /
CPU 319
19.2 kbps
187.5 kbps
50 m 1000 m
1.5 Mbps 200 m
3.0 Mbps
6.0 Mbps
12.0 Mbps
-
100 m
Segment on the PROFIBUS subnet
The maximum cable length of a a segment on the PROFIBUS subnet is determined by the
set transmission rate.
Table 4-16 Permissible cable length of a segment on the PROFIBUS subnet
Baud rate Maximum cable length of a segment
9.6 kbps to 187.5 kbps 1000 m
500 kbps 400 m
1.5 Mbps 200 m
3 Mbps to 12 Mbps 100 m
Longer cable lengths via RS 485 Repeater / RS 485-Diagnostics Repeater
You need to install RS485 repeaters for segments requiring cable lengths longer than the
allowed length. For further information about the RS485 Repeater refer to the Module
Specifications Manual.
Stub cables
Make allowances for the maximum stub cable length when you connect bus nodes to a
segment by means of stub cables, for example, a PG via standard PG cable.
For transmission rates up to 3 Mbps, you can use a PROFIBUS bus cable with bus
connector as stub cable. For transmission rates higher than 3 Mbps, use the patch cord to
connect the PG or PC. You can connect several PG patch cords to the the bus (for order
numbers see table 4-20). Other types of stub cables are not permitted.
Configuring
Length of stub cables
The table below shows the maximum permitted lengths of stub cables per segment:
Table 4-17 Lengths of stub cables per segment
Number of nodes with stub cable length of ... Baud rate Max. length of stub
cables per segment
1.5 m or 1.6 m 3 m
9.6 kbps to 93.75 kbps 96 m 32 32
187.5 kbps 75 m 32 25
500 kbps 30 m 20 10
1.5 Mbps 10 m 6 3
3 Mbps to 12 Mbps
1)

1)

1)

1)
To connect PGs or PCs when operating at rates higher than 3 Mbps, use PG connecting
cables with the order number 6ES7 901-4BD00-0XA0. In your bus configuration, you can
use multiple PG patch cords with this order number. Other types of stub cables are not
permitted.
PG connecting cable
Table 4-18 PG connecting cable
Type Order No.
PG connecting cable 6ES7 901-4BD00-0XA0
PROFIBUS cables
For PROFIBUS DP or MPI networking we offer you the following bus cables for diverse fields
of application:
Table 4-19 Available bus cables
Bus cable Order No.
PROFIBUS cable 6XV1 830-0AH10
PROFIBUS cable, halogen-free 6XV1 830-0LH10
PROFIBUS underground cable 6XV1 830-3AH10
PROFIBUS trailing cable 6XV1 830-3BH10
PROFIBUS cable with PUR sheath for
environments subject to chemical and
mechanical stress
6XV1 830-0DH10
PROFIBUS cable with PE sheath for the food and
beverages industry
6XV1 830-0BH10
PROFIBUS cable for festooning 6XV1 830-3CH10
Properties of PROFIBUS cables
The PROFIBUS bus cable is a 2-wire, shielded twisted-pair cable with copper conductors. It
is used for hardwired transmission in accordance with US Standard EIA RS485.
Configuring
The table below lists the characteristics of these bus cables.
Table 4-20 Properties of PROFIBUS bus cables
Properties Values
Wave impedance approx. 135 to 160 (f = 3 MHz to 20 MHz)
Loop resistance 115 /km
Effective capacitance 30 nF/km
Attenuation 0.9 dB/100 m (f = 200 kHz)
Permitted conductor cross-sections 0.3 mm
2
to 0.5 mm
2

Permitted cable diameter 8 mm 0.5 mm
Installation of bus cables
When you install PROFIBUS bus cables, you must not
twist,
stretch
or compress them.
When wiring indoor bus cables, also maintain the following marginal conditions (dA = outer
cable diameter):
Table 4-21 Marginal conditions for wiring interior bus cables
Characteristics Condition
Bending radius (one-off) 80 mm (10 x dA)
Bending radius (multiple times) 160 mm (20 x dA)
Permitted temperature range during installation 5 C to +50 C
Shelf and static operating temperature range 30 C to +65 C (22 F to +149 F)
Reference
For information on the use of fiber-optic cables for PROFIBUS, refer to the SIMATIC NET,
PROFIBUS Networks Manual.
Configuring
Bus connector RS 485
Table 4-22 Bus connector
Type Order No.
Bus connector RS 485 up to 12 Mbaud
with 90 cable exit
without programming device interface
with programming device interface

6ES7 972-0BA11-0XA0
6ES7 972-0BB11-0XA0
Fast connect bus connector RS 485 up to 12 Mbaud
with 90 cable exit in insulation displacement technique
without programming device interface

6ES7 972-0BA50-0XA0
6ES7 972-0BB50-0XA0
Bus connector RS 485 up to 12 Mbaud
with 35 cable exit (not for CPU 31xC, 312, 314 and 315-2 DP)

6ES7 972-0BA40-0XA0
6ES7 972-0BB40-0XA0
Field of application
You need bus connectors to connect the PROFIBUS bus cable to an MPI or PROFIBUS-DP
interface
You do not require a bus connector for:
DP slaves with degree of protection IP 65 (ET 200X, for example)
RS 485 repeater.
RS485 Repeater 485

Type Order No.
RS 485 repeater 6ES7 972-0AA01-0XA0
RS 485 Diagnostic Repeater 6ES7 972-0AB01-0XA0

Note
SFC 103 "DP_TOPOL" can be used to initiate identification of the bus topology of a DP
master system by way of the interconnected diagnostic repeaters.

Purpose
RS485 repeaters are used to amplify data signals on bus lines and to couple bus segments.
You require this RS 485 Repeater in the following situations:
more than 32 network nodes
when interconnecting a grounded with an ungrounded segment
when exceeding the maximum line length in a segment
Configuring
Longer cable lengths
If you want to implement cable lengths above those permitted in a segment, you must use
RS485 repeaters. The maximum cable length between two RS 485 repeaters corresponds to
the maximum cable length of a segment. Please note that these maximum cable lengths
only apply if there is no further node interconnected between the two RS 485 repeaters. You
can connect up to nine RS 485 repeaters in series. Please note that you have to add the RS
485 repeater when you determine the number of nodes in your subnet, even if it is not
assigned its own MPI/PROFIBUS address.
Reference
For further information about the RS485 Repeater, refer to the Module Specifications
Manual.
4.11.2.6 Cable lengths of MPI and PROFIBUS subnets
Example: Installation of an MPI subnet
The figure below shows you the block diagram of a MPI subnet.
PROFlBUS
4
3
1
5
PS CPU PS CPU
S7-300 S7-300
PG
CPU PS
S7-300
CP
OP 27
S7-300
1
2
2
3
CPU PS
S7-300
CP
OP 27
CPU PS CPU PS
S7-300
OP 27
PG
OP 27
MPl addr. 2 MPl addr. 1 MPl addr. 5 MPl addr. 3 MPl addr. 4 MPl addr. 7 MPl addr. 6
MPl addr. 10 MPl addr. 11 MPl addr. 13
MPl addr. 0

Number Identifier
Terminating resistor enabled.
S7-300 and OP 27 have subsequently been connected to the MPI subnet using their default MPI address.
CPU 31xC, 312, 314, 315-2 DP:
You can also assign user-specific MPI addresses to the CPs/FMs at these CPUs.
CPU 317-2 DP, 315-2 PN/DP, 317-2 PN/DP, 319-3 PN/DP:
CPs and FMs do not have their own MPI address on this CPU.
In addition to the MPI address, the CP also has a PROFIBUS address (7 in this case).
Connected via stub cable using the default MPI address only for commissioning/maintenance.
Configuring
Example: Maximum distances in the MPI subnet
The figure below shows you:
a possible MPI subnet configuration
maximum distances possible in an MPI subnet
the principle of "Line extension" using RS 485 repeaters
3
3
3
RS 485
repeater
RS 485
repeater
MPl addr. 10
MPl addr. 4
MPl addr. 7
MPl addr. 0
Max. 50 m
M
a
x
.

1
0
0
0

m
Max. 50 m
1
PG
OP 27 OP 27
1
1
1
1
1
2
CPU PS
S7-300
CPU PS
S7-300
OP 27
PG
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300

Number Identifier
PG connected by means of a stub cable for maintenance purposes
Configuring
Example: Terminating resistor in the MPI subnet
The figure below shows you an example of an MPI subnet and where to enable the
terminating resistor.
The figure below illustrates where the terminating resistors must be enabled in an MPI
subnet. In this example, the programming device is connected via a stub cable only for the
duration of commissioning or maintenance.
PG
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300
CPU PS
S7-300
OP 27 OP 27
RS 485
repeater
PG
1
1
1
1
2

Digit Identifier
PG connected by means of a stub cable for maintenance purposes

Warning
Disturbance of data traffic might occur on the bus. A bus segment must always be
terminated at both ends with the terminating resistor. This, for example, is not the case if the
last slave with bus connector is off power. The bus connector draws its power from the
station, and the terminating resistor is thus disabled. Please make sure that power is always
supplied to stations on which the terminating resistor is active. Alternatively, the PROFIBUS
terminator can also be used as active bus termination.

Configuring
Example: Installation of a PROFIBUS subnet
The figure below shows you the basic principles of a PROFIBUS subnet installation.

S5-95U
PG
1
3 S7-300
CPU PS
CPU
31x-2 DP
MASTER
MPI addr. 0
MPI addr. 3 PROFIBUS
Addr. 2
PROFIBUS
Addr. 3
PROFIBUS
Addr. 4
PROFIBUS
Addr. 5
PROFIBUS
Addr. 6
PROFIBUS
Addr. 7
3
CPU PS ET 200M
CPU PS ET 200M
CPU PS ET 200 M
3 S7-300
CPU PS DP-CPU CPU PS ET 200M CPU PS ET 200M
CPU ET 200B ET 200B CPU ET 200B CPU ET 200B
PROFIBUS
Addr. 12
PROFIBUS
Addr. 11
PROFIBUS
Addr. 10
PROFIBUS
Addr. 9
PROFIBUS
Addr. 8
1
1
2

Number Identifier
PG connected by means of stub cable for maintenance purposes
Configuring
Example: CPU 314C-2 DP as MPI and PROFIBUS node.
The figure below shows you an assembly with a CPU 314C-2 DP integrated in an MPI
subnet and also operated as DP master in a PROFIBUS subnet.
S7-300
CPU
PS CPU
S7-300
CPU
PS CPU
PG
9
PROFIBUS subnet MPI subnet
S7-300 CPU:
with DP interface
in DP Master mode
RS 485-
Repeater
MPI addr. 2
MPI addr. 3
MPI addr. 4
MPI addr. 6
MPI addr. 5
OP 27
MPI addr. 7 MPI addr. 8
MPI addr. 0
S7-300
CPU
PS CPU
S7-300
PS CPU
OP 27
CPU
PS DP-CPU
ET200M ET200M
ET200M ET200M ET200M ET200M
ET200B ET200B
S5-95U
S5-95U
S5-95U
DP addr. 3 DP addr. 4
DP addr. 5
DP addr. 6
DP addr. 7
2
1
1
1
1
1
1
DP addr. 2

Number Identifier
PG connected via a stub cable for maintenance or commissioning purposes

Configuring
4.11.3 Configuring PROFINET subnets
4.11.3.1 Overview
The next section contains all the information you require to configure PROFINET subnets:
Contents
PROFINET nodes
Integration of field bus system into PROFINET
PROFINET IO and PROFINET CBA (Component-Based Automation)
PROFINET cable lengths
Ethernet bus cable and connector
Example of a PROFINET subnet
Example of a PROFINET IO system
4.11.3.2 PROFINET devices
Definition: Devices in the PROFINET environment
Automation systems (e.g. PLC, PC)
Field devices (for example, PLC, PC, hydraulic devices, pneumatic devices)
Active network components (e.g. switches, gateways, routers)
PROFIBUS or other fieldbus systems
The main characteristics of a device is its integration into PROFINET communication by
means of Ethernet or PROFIBUS.
PROFINET devices
PROFIBUS devices
Definition: PROFINET devices
can also have a PROFIBUS port, that is, as master with proxy functionality.
Configuring
Definition: PROFIBUS devices
A PROFIBUS device has at least one PROFIBUS link with an electric interface (RS485) or
an optical interface (polymer optical fiber, POF).
A PROFIBUS device cannot take part directly in PROFINET communication, but must be
implemented by means of PROFIBUS master with PROFINET link or Industrial
Comparison of the terminology in PROFIBUS DP and PROFINET IO
The following schematic shows you the general names of the most important devices in
PROFINET IO and PROFIBUS DP. The table below shows the designation of the various
components in the PROFINET IO and PROFIBUS DP context.
2
3
4
5
6 6
1

Figure 4-3 PROFINET and PROFIBUS devices
Number PROFINET PROFIBUS Remark
IO system DP master
system

IO controller DP master Device used to address the connected IO
devices/DP slaves.
That is: the IO controller/DP master exchanges
input and output signals with field devices.
The IO controller/DP master is often the controller
on which the automation program runs.
IO supervisor PG/PC
Class 2 DP
master
PG/PC/HMI device for commissioning and
diagnostics
Industrial Ethernet PROFIBUS Network infrastructure
HMI (Human
Machine Interface)
HMI Device for operating and monitoring functions.
IO device DP slave Distributed field device assigned to one of the IO
controllers/DP masters, for example, distributed
I/O, valve terminal, frequency converter, and
switches with integrated PROFINET IO
functionality.
Configuring
Slots and Submodules
A PROFINET IO device is modularly structured - similar to a PROFIBUS DP slave.
In doing so, modules are fitted to slots and submodules to subslots. Channels are located on
the modules / submodules using which process signals can be read in and issued.
The following graphic illustrates the situation.
1 2 2 2
3
3
4
4
4
4
4
4
4
4
2

Figure 4-4 Module, Submodule, Slot, and Channel

Digit Description
Interface module
Module with components
Submodule
Channel
In principle it is possible to divide a slot into additional subslots on which the submodules are
connected.
Configuring
4.11.3.3 Integration of field bus systems in PROFINET
Field bus Integration
PROFINET allows you use a proxy to integrate existing field bus systems (for example,
PROFIBUS, ASI, etc.) into PROFINET. In this way, you can set up hybrid systems consisting
of field bus and Ethernet-based subsystems. A continuous technological transition to
PROFINET is thus possible.
Interconnecting PROFINET and PROFIBUS
You can interconnect PROFIBUS devices to the local PROFIBUS interface of a PROFINET
device. This allows you to integrate existing PROFIBUS configurations in PROFINET.
The following picture illustrates the network types that are supported for PROFINET:
PROFIBUS.
1
2
3
PROFlBUS
lndustrial Ethernet

Figure 4-5 PROFINET devices, PROFIBUS devices, and proxy

Number Description
PROFINET devices
PROFINET device with proxy functionality (see below for more information)
PROFIBUS devices
Configuring
PROFINET device with proxy functionality = Substitute
the Ethernet. The proxy functionality allows a PROFIBUS device to communicate not only
with its master but also with all the nodes on the PROFINET.
With PROFINET, existing PROFIBUS systems can be integrated into the PROFINET
communication with the aid of an IE/PB link, for example. The IE/PB link then handles
communication via PROFINET on behalf of the PROFIBUS components.
In this way, you can link both DPV0 and DPV1 slaves to PROFINET.
Further Information
For information on the differences and common features of PROFINET IO and PROFIBUS
DP and information on migrating from PROFIBUS DP to PROFIBUS IO, refer to the From
PROFIBUS DP to PROFINET IO programming manual.
4.11.3.4 PROFINET IO and PROFINET CBA
What is PROFINET IO?
As part of PROFINET, PROFINET IO is a communication concept that is used to implement
modular, distributed applications.
PROFINET IO allows you to create automation solutions of the type with which you are
familiar from PROFIBUS.
PROFINET IO is implemented using the PROFINET standard for programmable controllers.
The STEP 7 engineering tool helps you to structure and configure an automation solution.
In STEP 7 you have the same application view, regardless of whether you are configuring
PROFINET devices or PROFIBUS devices. You will program your user program in the same
way for both PROFINET IO and PROFIBUS DP since you will use the extended blocks and
system status lists for PROFINET IO.
Reference
Information on new and modified blocks and system status lists can be found in the From
PROFIBUS DP to PROFINET IO programming manual.
What is PROFINET CBA?
As part of PROFINET, PROFINET CBA (Component Based Automation) is an automation
concept that focuses on the following:
Implementation of modular applications
Machine - machine communication
PROFINET CBA lets you create distributed automation solutions based on off-the-shelf
components and partial solutions. This concept meets the demand for a greater modularity in
the field of mechanical and systems engineering by extensive distribution of intelligent
processes.
With Component Based Automation you can implement complete technological modules as
standardized components that can be used in large systems.
You create the modular, intelligent components of the PROFINET CBA in an engineering
tool (which may differ according to the device manufacturer). Components that are formed
from SIMATIC devices are created with STEP 7, and are interconnected using the SIMATIC
iMAP tool.
Configuring
Interaction between PROFINET IO and PROFINET CBA
PROFINET CBA is used to integrate PROFINET IO systems into machine-to-machine
communication. A PROFINET component is created from a PROFINET IO system in STEP
7, for example. With SIMATIC iMap, you can configure systems consisting of several such
components. The communication connections between the devices are configured simply as
interconnection lines.
The following graphic illustrates a distributed automation solution with several components
which communicate via PROFINET. The components on the right have IO devices and an IO
controller on PROFINET IO.
iMAP
PROXY
Ethernet
PROFlBUS
PROFlNET lO lntelligent field
device on Ethernet
Component with
distributed lO on
PROFlBUS
Component with
distributed lO on
Ethernet
PROFlNET
Component
PROFlNET
Communication

Figure 4-6 PROFINET CBA - modular concept
Configuring
Differentiation between PROFINET IO and PROFINET CBA
PROFINET IO and CBA are two different ways of looking at programmable controllers on
Industrial Ethernet.
lO data view Component view
One cable, lT standards, standard applications
protocols, controller, etc.
- Distributed l/Os
- Usual lO view in STEP 7
(PROFlNET Component Description) (Generic Station Description)
- Distributed intelligence
- Plant-wide engineering
GSD PCD
PROFlNET
PROFlNET CBA PROFlNETlO

Figure 4-7 Differentiation between PROFINET IO and PROFINET CBA
Component Based Automation breaks the overall system down into various functions. These
functions are configured and programmed.
PROFINET IO provides you with a picture of the plant that is very similar to the view
obtained in PROFIBUS. You continue to configure and program the individual programmable
controllers.
Configuring
Controllers in PROFINET IO and PROFINET CBA
You can also use some PROFINET IO controllers for PROFINET CBA.
The following PROFINET devices act as a PROFINET CBA or IO controller:
Programmable logic controllers,
S7-300 CPU 31x-2 PN/DP, firmware version V2.3 or later
S7-300 CPU 319-3 PN/DP, firmware version V2.4.0 or later
CP 343-1 - version 6GK7 343-1EX21-0XE0 and 6GK7 343-1GX21-0XE0 or later
CP 443-1 Advanced with MLFB 6GK7 443-1EX40 version V2.1 and 6GK7 443-1EX41
version V1.0 or later.
The following PROFINET devices can only act as a PROFINET IO controller:
PCs that are linked to a PROFINET IO-compatible CP (CP 1616 for example) or via
SOFTNET PN IO (with CP 1612 for example). With the CP 1616 and SOFTNET PN IO,
the user program runs in the CPU of the PC.
SIMOTION devices for particularly stringent real-time requirements.
Some PROFINET devices can only be used as PROFINET CBA controllers, for example,
PCs with standard Ethernet interfaces and the WinLC software.
CP443-1 EX 40 V2.1 or later or CP443-1 EX41 V 1.0 or later
Proxy in PROFINET IO and PROFINET CBA
The proxies for PROFINET IO and proxies for PROFINET CBA are different.
In PROFINET IO, the proxy for PROFINET IO represents each connected PROFIBUS DP
slave as a PROFINET IO device on the PROFINET.
In PROFINET CBA, the proxy for PROFINET CBA represents every connected PROFIBUS
DP slave as one component, which can participate in PROFINET communication.
There are thus different IE/PB links for PROFINET IO and PROFINET CBA, for example. At
present you can currently only use a CPU 31x PN/DP as a proxy for PROFINET CBA.
Linking PROFIBUS devices via an IE/PB link
Please note that proxy functionality is available in both PROFINET IO and PROFINET CBA.
For the IE/PB link, this means that you must use different devices depending on the system
you are using.
Configuring and Integrating Components and Devices in PROFINET Communication
In Component Based Automation, an interconnection editor is used to incorporate the
components (SIMATIC iMap for example). The components are described in a PCD file.
With PROFINET IO, the devices are incorporated using an engineering system (STEP 7 for
example). The devices are described in a GSD file.
Configuring
Interaction between PROFINET CBA and PROFINET IO
PROFINET IO integrates field devices (IO devices) into PROFINET. The input and output
data of the IO devices is processed in the user program. The IO devices with their IO
controller can, in turn, be part of a component in a distributed automation structure.
Communication between a CPU as the IO controller and the assigned IO devices as
PROFINET IOs is configured in the same way as for a PROFIBUS DP master system in
STEP 7. The user program is also created in STEP 7. From the entire PN IO system, you
create a component in STEP 7 (see Figure PROFINET CBA).
You then configure communication between the components in user-friendly SIMATIC iMAP.
Update Time
The IO controller (outputs) provides new data to all IO devices in the PROFINET IO system
within the update time. This means that all the IO devices have sent their latest data to the
IO controller (inputs).

Note
Update Times for Cyclical Data Exchange
STEP 7 determines the update time on the basis of the existing hardware configuration and
the resulting cyclical data traffic. During this time, a PROFINET IO device has exchanged its
user data with the associated IO controller.
You can set the update date either for a whole bus segment of an IO controller, or for an
individual IO device.
In STEP 7, the update time can be changed manually.
The smallest possible update time in a PROFINET system depends on the following factors:
Number of PROFINET IO devices
Quantity of configured user data
Volume of PROFINET IO communication traffic (compared to the volume of PROFINET
CBA communication traffic)

Additional cyclical PROFINET services
The update time dialog in STEP 7 / HW Config is used to set an update date for the device
to be reserved for PROFINET IO.
See the STEP 7 Online Help for more information.

Configuring
Send clock
Period between two successive intervals for IRT or RT communication. The send clock is the
shortest possible transmit interval for exchanging data. The calculated update times are
multiples of the send clock.
The minimum possible update time thus depends on the minimum send clock of the IO
controller that can be set.
If both the IO controller and the IO device support a send clock of 250s, you can achieve a
minimum update time of 250s.
It is also possible to operate IO devices that only support a send clock of 1 ms on an IO
controller that works with a send clock of 250s. The minimum update time for the IO
devices concerned is then at least 1 ms, however.
Update times of CPU 319-3 PN/DP
Programmable update times when using CPU 319-3 PN/DP:

Send
clock
Update time
250 s 250 s to 128 ms
500 s 500 s to 256 ms
1 ms 1 ms to 512 ms
The minimum update time depends on the number of IO devices used, and on the volume of
configured user data, and on the load in PROFINET IO communication. STEP 7
automatically makes allowances for these dependencies when you configure the system.
Details of the possible uses of the individual products
See also the documentation for the product concerned.
4.11.3.5 PROFINET cable lengths and network expansion
Network expansion options are based on various factors (hardware design used, signal
propagation delay, minimum distance between data packets, etc.)
Twisted-pair patch cables
TP Cords are used to interconnect terminal devices with the Industrial Ethernet FC cabling
system. It is designed for use in environments with low EMC load, for example, in offices or
in control cabinets.
The length of twisted-pair cords between two devices may not exceed 10 m.
Compared to Industrial Ethernet twisted-pair cables, the TP cords are significantly thinner
and more flexible due to the reduced effort for their shielding. The connectors used in
connecting industrial twisted-pair components are standardized RJ45 connectors and sub D
connectors.
Configuring
Product range
Twisted-pair patch cords available:
Table 4-23 Data for twisted-pair patch cables
Cable designation Application Available
lengths
Order number
TP Cord RJ45/RJ45 TP connecting cable with two
RJ45 connectors
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2GE50
6XV1 850-2GH10
6XV1 850-2GH20
6XV1 850-2GH60
6XV1 850-2GN10
TP XP cord RJ45/RJ45 TP crossover cable with two
RJ45 connectors
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2HE50
6XV1 850-2HH10
6XV1 850-2HH20
6XV1 850-2HH60
6XV1 850-2HN10
TP cord 9/RJ45 TP patch cable with 9-pin
sub-D connector and
RJ45 connector
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2JE50
6XV1 850-2JH10
6XV1 850-2JH20
6XV1 850-2JH60
6XV1 850-2JN10
TP XP cord 9/RJ45 Crossover TP patch cable with
9-pin sub-D connector and RJ45
connector.
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2ME50
6XV1 850-2MH10
6XV1 850-2MH20
6XV1 850-2MH60
6XV1 850-2MN10
TP patch cable
9-45/RJ45
TP patch cable with RJ45 connector
and sub-D connector, 45 cable exit
(only for OSM/ESM)
1.0 m 6XV1 850-2NH10
TP XP patch cable
9-45/RJ45
Cross-over TP patch cable with RJ45
connector and sub-D connector with
45 cable exit (for OSM/ESM only)
1.0 m 6XV1 850-2PH10
TP XP patch cable 9/9 Crossover TP patch cable for direct
interconnection of two industrial
Ethernet network components with
ITP interface, with two 9-pin sub-D
connectors
1.0 m 6XV1 850-2RH10
TP cord RJ45/15 TP patch cable with 15-pin
sub-D connector and
RJ45 connector
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2LE50
6XV1 850-2LH10
6XV1 850-2LH20
6XV1 850-2LH60
6XV1 850-2LNN10
TP XP patch cable
RJ45/15
Crossover TP patch cable with
15-pin sub-D connector and RJ45
connector.
0.5 m
1.0 m
2.0 m
6.0 m
10.0 m
6XV1 850-2SE50
6XV1 850-2SH10
6XV1 850-2SH20
6XV1 850-2SH60
6XV1 850-2SN10
Configuring
Industrial Ethernet Fast Connect twisted-pair cables
The FastConnect Twisted-Pair cabling system is ideal for structured cabling in the production
hall. FastConnect cables allow for the quick and easy on-site assembly of patch cables. The
RJ45 cabling technology is the existing standard and is also available as an industrial
version which allows structured cabling.
Product range
Industrial Ethernet Fast Connect twisted-pair cables available:
Table 4-24 Data for user assemblies using patch cables of the Fast Connect product family
Cable designation Application Available
lengths
Order number
SIMATIC NET IE
FC RJ 45
PLUG 145
RJ45 connector for Industrial Ethernet
with rugged metal housing and four
integrated insulation displacement
terminals for connecting Industrial
Ethernet FC installation cables; 145
cable outlet.
1 piece
10 items
50 items
6GK1 901-1BB30-0AA0
6GK1 901-1BB30-0AB0
6GK1 901-1BB30-0AE0
SIMATIC NET IE
FC RJ 45
PLUG 180
RJ45 connector for Industrial Ethernet
with rugged metal housing and four
integrated insulation displacement
terminals for connecting Industrial
Ethernet FC installation cables; 180
cable outlet.
1 piece
10 items
50 items
6GK1 901-1BB10-2AA0
6GK1 901-1BB10-2AB0
6GK1 901-1BB10-2AE0
Reference
Detailed information is available in the
SIMATIC NET Manual: Twisted-Pair and Fiber-Optic Networks (6GK1970-1BA10-0AA0)
On the Internet at http://www.siemens.com/automation/service&support.
Catalog IK PI, SIMATIC NET (E86060-K6710-A101-B5)
See also
Connecting the PG to a node (Page 8-15)
Connecting the PG to several nodes (Page 8-16)
Configuring
4.11.3.6 Connectors and other components for Ethernet
The selection of the bus cable, bus connector and other components for Ethernet (for
example, switches, etc.) depends on the intended application.
We offer a range of products covering a variety of applications for the installation of an
Ethernet connection.
Reference
SIMATIC NET: Twisted-Pair and Fiber-Optic Networks (6GK1970-1BA10-0AA0)
4.11.3.7 Example of a PROFINET Subnet
Example: Installation of a PROFINET subnet
The graphic illustrates the combination of corporate level and process control level via
industrial Ethernet. PCs in a classical office environment can be used to acquire data of the
process automation system.
Subnet 2
Company network
Subnet 1
Switch 1 Switch 3 Switch 2 Router
CPU
31x PN/DP
CPU
31x PN/DP
CPU
31x PN/DP
(DP master)
ET 200
(DP slave)
PG
P
R
O
F
l
B
U
S
l NDUSTRl AL ETHERNET

Figure 4-8 Example of a PROFINET Subnet
Configuring
Installation guidelines
PROFINET allows you to set up a high-performance and continuous communication system.
You can further increase performance by using the following installation guidelines.
Interconnect a router between the office network and the PROFINET system. Use the
router to define access privileges for your PROFINET system.
Set up your PROFINET in a star architecture where this is useful (for example: in a switch
cabinet).
Keep the number of switches low. This increases clarity of your PROFINET system
architecture.
Connect your programming device (PG) close to the communication partner (for example:
connect the PG and the communication partner to the same switch).
Modules with PROFINET interfaces may only be operated in LANs where all nodes are
equipped with SELV/PELV power supplies or protection systems of equal quality.
A data transfer device that ensures this safety must be specified for the coupling to the
WAN.
Reference
For detailed information on Industrial Ethernet networks or network components, refer to:
the Internet URL http://www.siemens.com/automation/service&support.
The STEP 7 Online Help. There you can also find further information on IP address
assignment.
The Communication with SIMATIC (EWA 4NEB 710 6075-01) manual
The SIMATIC NET manual: Twisted-Pair and Fiber Optic Networks (6GK1970-1BA10-
0AA0)
Configuring
4.11.3.8 Example of a PROFINET IO system
Functions of PROFINET IO
The following graphic shows the new functions in PROFINET IO
PC
PC
PC
PC
PC PG/PC
PC
PC
lE/PB Link
PN lO
P1
P2
P3
P4
P5
P6
P7
CPU 319-3
PN/DP
P1
lM 154-8
CPU
P1
P2
P3
PG
PB
lE
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
ET 200S
P1 P2
2
3
4
5 6
1
7
8
Switch 1 Switch 2
Company network
PROFlBUS
lndustrial Ethernet
lO
Controllers
DP master
lO
Controllers
DP master
PN
PN
ET 200
(DP slave)
ET 200
(DP slave)
lO device lO device
lO device lO device
Router
PN PN
PN PN

The connection of company
network and field level
You can access devices at the field level from PCs in your company network
Example:
PC - Switch 1 - Router - Switch 2 - CPU 319-3 PN/DP .
Connections between the
automation system and field
level
You can, of course, also access other areas on the Industrial Ethernet from a PG at the
field level.
Example:
PG - integrated switch IM 154-8 CPU - Switch 2 - integrated switch IO device ET
200S - on IO device: ET 200S .
The IO controller of the CPU
IM 154-8 CPU directly
controls devices on the
PROFIBUS.
At this point, you can see the extended IO feature between the IO controller and IO
device(s) on the Industrial Ethernet:
The IM 154-8 CPU is operated as IO controller for the IO devices ET 200S and
ET 200S
The IM 154-8 CPU is also the IO controller for
ET 200 (DP slave) by way of IE/PB Link.
Configuring
The CPU 319-3 PN/DP can
be operated as IO controller or
DP master
Here you can see that a CPU can be both the IO controller for an IO device and the DP
master for a DP slave:
The 319-3 PN/DP CPU is operated as IO controller for the IO devices
ET 200S and ET 200 S
The CPU 319-3 PN/DP is the DP master for a DP slave . The
DP slave is assigned locally to the CPU and is not visible on the Industrial
Ethernet.
Reference
Further Information
about PROFINET can be found in the programming manual From PROFIBUS DP to
PROFINET IO
This manual also provides a clear overview of the new PROFINET blocks and system
status lists.
4.11.4 Routed network transitions
Example: Programming device access beyond network limits (routing)
A CPU with several interfaces can also serve as a router for intercommunication with
different subnets. With a PG you can access all modules on local and remote networks.
Requirements:
Implement STEP 7 starting with Version 5.0.
Note: For STEP 7 requirements with respect to the CPUs used, refer to the technical
specifications.
Assign the PG/PC to a network in your STEP 7 project (SIMATIC Manager, assigning a
PG/PC).
The various networks are interconnected using modules with routing functions.
After you configured all networks in NETPRO, initiated a new compilation for all stations,
and then download the configuration to all modules with routing function. This also
applies to all changes made in the network.
All routers therefore know all paths to a destination station.
Configuring
Access to remote networks
1
2
3
PG/PC 3
S7-300
PS
S7-300
PS
CPU
31x-2 DP
CPU
MPl
S7-400 S7-400
PS PS
CPU
416
CPU
417
MPl
PG/PC 1
PROFlBUS
ET200
PG/PC 2

Figure 4-9 Access to remote networks
Example 1
To access the CPU 31x-2 DP using PG/PC 1:
PG/PC 1 - MPI network - CPU 417 as router - PROFIBUS network - CPU 31x-2 DP
Example 2
To access the the S7-300 CPU (on the right in the figure) using PG/PC 2:
PG/PC 2 - PROFIBUS network - CPU 31x-2 DP as router - MPI network - S7-300 CPU
Example 3
To access the 416 CPU using PG/PC 3:
PG/PC 3 - MPI network - CPU 31x-2 DP as router - PROFIBUS network - CPU 417 as
router - MPI network - CPU 416

Note
Only for CPUs with DP interface:
If these CPUs are operated as I-slaves and you want to use routing functionality, set the
Commissioning / Debug Mode / Routing check box in the DP Interface for DP Slave dialog
box in STEP 7.

Information on routing can be found ...
CPU Data Reference Manual for your CPU
In the Communication with SIMATIC manual.
Configuring
4.11.5 Point-to-point (PtP)
Availability
CPUs with the "PtP" name suffix have at least one PtP interface.
Features
Using the PtP interface of your CPU, you can connect external devices with serial interface.
You can operate such a system at transmission rates up to 19.2 kbps in full duplex mode
(RS 422), and up to 38.4 kbps in half duplex mode (RS 485).
Transmission rate
Half duplex: 38.4 kbps
Full duplex: 19.2 kbps
Drivers
PtP communication drivers installed in those CPUs:
ASCII drivers
3964(R) Protocol
RK 512 (CPU 314C-2 PtP only)
Devices capable of PtP communication
Devices equipped with a serial port, for example, barcode readers, printers, etc.
Reference
CPU 31xC: Technological functions manual
4.11.6 Actuator/sensor interface (ASI)
Implementation using communication processors (CP).
The ASI, or Actuator/Sensor Interface, represents a subnet system on the lowest process
level for automation systems. It is designed especially for networking digital sensors and
actuators. The maximum data volume is 4 bits per slave station.
S7-300 CPUs require communication processor for the ASI connection.

Installing
5
5.1 Installing a S7-300

Here we will explain the steps required for the mechanical assembly of an S7-300.

Note
Note the installation guidelines and notes on safety in this manual when mounting,
commissioning and operating S7-300 systems.

Open components
S7-300 modules are "Open Components" according to IEC 61131-2 and EC directive
73/23/EEC (Low-Voltage directive), and to UL/CSA Approval an "open type".
In order to conform with specifications on safe operation relating to mechanical strength,
inflammability, stability and touch-protection, the following alternative installation modes are
prescribed:
Installation in a suitable cubicle
Installation in a suitable cabinet
Installation in an appropriately equipped and closed operating area
Access to these areas must only be possible with a key or tool. Only trained or authorized
personnel is allowed access to these cubicles, cabinets or electrical operating rooms.
Installing
5.1 Installing a S7-300
Accessories included
Installation accessories are included with the module package. The appendix contains a list
of accessories and spare parts together with the corresponding order numbers.
Table 5-1 Module accessories
Module Accessories included Explanation
1 x Slot number label For assigning slot numbers CPU
Inscription labels for the MPI address and Firmware Version (all
CPUs)
for labeling of integrated inputs and outputs
(CPU 31xC only)
Tip: Templates for labeling strips are available
on the Internet at
http://www.siemens.com/automation/csi_en_ww,
under entry ID 11978022.
1 Bus connector For electrical interconnection of modules Signal module (SM)
Function Module (FM) 1 Labeling strip For labeling module I/O
on the Internet at
1 Bus connector For electrical interconnection of modules Communication
module (CP)
1 Inscription label
(only CP 342-2)
For labeling the AS interface connector
on the Internet at
Interface module (IM) 1 x Slot number label
(only IM 361 and IM 365)
For assigning slot numbers on racks 1 to 3
Installing
5.2 Installing the mounting rail
Tools and material required
To install the S7-300, you require the tools and materials listed in the table below.
Table 5-2 Installation tools and materials
You require ... for ...
cutting the 2 m rail to length commonly available tool
scribing and drilling holes on the 2 m rail commonly available tool, 6.5 mm diameter drill bit
screw-mounting the rail wrench or screwdriver, matching the selected
fixing screws
diverse M6 screws (length depends on the place
of installation) with nuts and spring lock washers
screw-fastening the modules on the rail screwdriver with 3.5 mm blade width (cylindrical
design)
pulling out the grounding slide contact to achieve
ungrounded state
screwdriver with 3.5 mm blade width (cylindrical
design)
Mounting rail versions available
Ready-to-use, four standard lengths (with 4 holes for fixing screws and 1 ground
conductor bolt)
One meter mounting rail
May be shortened to any special length. Supplied without holes for fixing screws and
without ground conductor bolt.
Requirement
Prepare the 2 m mounting rail for installation.
Preparing the 2 m mounting rail for installation
1. Cut the 2 m mounting rail to the required length.
2. Mark out:
four bores for the fixing screws (for dimensions, refer to "Dimensions for fixing holes")
one hole for the protective conductor bolt.
3. If the length of your rail exceeds 830 mm, you must stabilize it by providing additional
holes for fixing it with more screws.
Mark out these holes along the groove in the middle section of the rail (see the Figure
below). The pitch should be approx. 500 mm.
4. Drill the marked holes, bore diameter = 6.5
+0,2
mm for M6 screws.
Installing
5. Mount an M6 bolt for fixing the ground conductor.
2
1
3
4
5

Number Identifier
Hole for the ground conductor bolt
Groove for drilling additional holes for mounting screws
Hole for the mounting screw
Additional hole for mounting screw
Hole for the mounting screw
Dimension of the mounting holes
The mounting hole dimensions for the mounting rail are shown in the table below.
Table 5-3 Mounting holes for rails
"Standard" mounting rail 2 m mounting rail
32,5 mm
57,2 mm
b a

32,5 mm
57,2 mm
15 mm 15 mm
~ 500 mm ~ 500 mm

Length of rail Dimension a Dimension b
160 mm 10 mm 140 mm
482.6 mm 8.3 mm 466 mm
530 mm 15 mm 500 mm
830 mm 15 mm 800 mm

Installing
Fixing screws
You can use the following screw types for mounting the rails:

For ... you can use ... Explanation
Cylindrical head screw M6 to
ISO 1207/ISO 1580
(DIN 84/DIN 85)
outer fixing screws
M6 hexagonal head screw to
ISO 4017 (DIN 4017)
Additional fixing screws
(only 2 m mounting rail)
Cylindrical head screw M6 to
ISO 1207/ISO 1580
(DIN 84/DIN 85)
Choose a suitable screw length
for your assembly.
You also need size 6.4 washers
to ISO 7092 (DIN 433)
Installing the mounting rail
1. Install the mounting rails so that sufficient space is available for installing modules and to
allow heat dissipation (clearance of at least 40 mm above and below the modules. See
the figure below).
2. Mark up the mounting holes on the mounting surface. Drill the holes, diameter = 6.5
+0.2
mm.
3. Screw the rail (M6 screws) onto the mounting surface.

Note
Always make sure of a low-impedance contact between the rail and a mounting surface,
if the latter is a grounded metal panel or equipment mounting panel. On varnished or
anodized metals, for instance, use a suitable contacting agent or contact washers.

Installing
5.3 Installing modules on the mounting rail
The figure below shows the clearance required for the installation of an S7-300.
40 mm
40 mm
20
mm
20
mm

Requirements for module installation
The configuration of the automation system is completed.
The mounting rail is installed.
Mounting order of the modules
Hang the modules onto the rail, starting at the left and in the following order:
1. Power supply module
2. CPU
3. SMs, FMs, CPs, IMs

Note
Please check before you insert any SM 331 analog input modules whether you have to
reposition the measuring range submodules at the side of the module. For more
information see the "Analog Modules" chapter in the Module Data Manual.

Installing

Note
When installing an S7-300 system with ungrounded reference potential, make the
relevant settings on the CPU. You ideally do so before you mount any modules onto the
rail.
Installation steps
The various steps in module installation are explained below.

1. Plug the bus connectors into the CPU and SMs
/ FMs / CPs / IMs.
Except for the CPU, each module is supplied
with a bus connector.
Always start at the CPU when you plug in
the bus connectors. Remove the bus
connector from the "last" module of the
assembly.
Plug the bus connectors into the other
modules.
The "last" module does not receive a bus
connector.

2. Add all modules to the rail in the specified order
, slide them up to the module on the left ,
then swing them down .
2
3
1

3. Screw-tighten the modules.

See also
Installing an S7-300 with ungrounded reference potential (not CPU 31xC) (Page 4-15)
Installing
5.4 Labeling modules
Assign slot numbers
You should assign a slot number to each one of the mounted modules, thus making it easier
to assign the modules in the configuration table in STEP 7. The table below shows the slot
number assignment.
Table 5-4 Slot numbers for S7 modules
Slot number Module Remark
1 Power supply (PS) module
2 CPU
3 Interface module (IM) to the right of the CPU
4 1. Signal module (SM) to the right of the CPU or IM
5 2. Signal module (SM)
Installing
Attach the slot numbers to the modules.
1. Hold the corresponding slot number in front of the relevant module.
2. Place the tongue in the opening on the module .
3. Press the slot number into the module . The slot number breaks off from the wheel.
The figure below illustrates this procedure. The slot number labels are included with the
CPU.
2
1

Installing

Wiring
6
6.1 Requirements for wiring the S7-300
This chapter
Describes the requirements for wiring the PS, CPU and front connectors.
Accessories required
The following accessories are required for wiring the S7-300.
Table 6-1 Wiring accessories
Accessories Description
Front connectors for connecting the sensors / actuators of the
system to the S7-300
Labeling strips for labeling the module I/Os
Shielding contact element, shielding terminals
(matching the shielding diameter)
for connecting cable shielding
Tools and material required
Tools and materials required for wiring the S7-300.
Table 6-2 Tools and material for wiring
To ... you need ...
Connect the protective conductor to the rail Wrench (size 10)
Protective conductor cable (cross-
section 10 mm
2
) with M6 cable lug
M6 nut, washer, spring lock washer
Adjust the power supply module to mains voltage Screwdriver with a blade width of 4.5 mm
Wire the power supply module and the CPU Screwdriver with a 3.5-mm blade, side-cutters,
stripping tool
Flexible cable, for example, sheathed flexible
cable 3 x 1.5 mm
2

Wire end ferrules to DIN 46228
Wire the front connector Screwdriver with a 3.5-mm blade, side-cutters,
stripping tool
Flexible cables, 0.25 mm
2
to 0.75/1.5 mm
2

Shielded cables as required
Wiring
6.1 Requirements for wiring the S7-300
Wiring conditions for PS and CPU
Table 6-3 Wiring conditions for PS and CPU
Connectable cables to PS and CPU
Solid conductors No
Flexible conductors
without wire end ferrule
With wire end ferrule

0.25 mm
2
to 2.5 mm
2

0.25 mm
2
to 1.5 mm
2

Number of conductors per terminal 1 or 2, up to 1.5 mm
2
(total) in a common wire
end ferrule
Diameter of the conductor insulation max. 3.8 mm
Stripped length 11 mm
without insulating collar
with insulating collar

Design A, 10 mm to 12 mm length
Design E, up to 12 mm length
Wiring conditions for front connectors
Table 6-4 Wiring conditions for front connectors
Front connectors Connectable cables
20-pole 40-pole
Solid conductors No No
Flexible conductors
without wire end ferrule
with wire end ferrule

0.25 mm
2
to 1.5 mm
2

0.25 mm
2
to 1.5 mm
2

0.25 mm
2
to 0.75 mm
2

0.25 mm
2
to 0.75 mm
2

Mains feed 1.5 mm
2

Number of conductors per
terminal
1 or 2, up to 1.5 mm
2
(total) in a
common wire end ferrule
1 or 2, up to 0.75 mm
2
(total) in a
common wire end ferrule
Diameter of the conductor
insulation
max. 3.1 mm max. 2.0 mm for 40-pole
cables
max. 3.1 mm for 20-pole
cables
Stripped length 6 mm 6 mm
Wire end ferrules to DIN
46228
without insulating collar
with insulating collar



Wiring
6.2 Bonding the Protective Conductor to the Mounting Rail
6.2 Bonding the Protective Conductor to the Mounting Rail
Requirement
The mounting rail is fixed onto the mounting surface.
Connecting the protective conductor
Connect the mounting rail to the protective conductor.
The mounting rail is provided with a M6 protective conductor screw for this purpose.
Minimum cross-section of the protective conductor: 10 mm
2

The figure below shows how the protective conductor has to be bonded to the rail.

Note
Always make sure of a low-impedance contact between the protective conductor and the rail.
You can achieve this by using a low-impedance cable, keeping it as short as possible and
contacting it to a large surface.
For example, an S7-300 mounted on a hinged frame must be connected to ground using a
flexible grounding strap.

Wiring
6.3 Adjusting the Power Supply Module to Local Mains Voltage
6.3 Adjusting the Power Supply Module to Local Mains Voltage
Introduction
You can operate the S7-300 power supply module on 120 VAC or 230 VAC. The default
setting for the PS 307 is 230 VAC.
Setting the mains voltage selector switch
Verify that the setting of the voltage selector switch matches your local mains voltage.
To set the selector switch:
1. Remove the protective cap with a screwdriver.
2. Set the selector switch to match the local line voltage.
3. Reinsert the protective cap.
2
1
2

Number Identifier
Remove the protective cap with a screwdriver
Set selector switch to mains voltage

Wiring
6.4 Wiring the Power Supply Module and the CPU
Requirement
All modules are mounted onto the rail.
Wiring the PS and CPU

Note
The PS 307 power supply module is equipped with two additional 24 VDC terminals L+ and
M for the supply to I/O modules.

Note
The power supply connector of your CPU is a plug-in device and can be removed.

Warning
There is a risk of contact to live wires if the power supply module, or any additional load
power supply units, are connected to the mains.
You should therefore isolate the S7-300 from power before you start wiring it. Always use
crimp ferrules with insulating collars for the conductors. Close all front panels of the modules
when you completed the wiring. This is conditional before you reconnect the S7-300 to
power.

1. Open the PS 307 power supply module and CPU front panels.
2. Open the strain relief on the PS 307.
3. Strip the power cable to a length of 11 mm and connect it to L1, N and to the protective
earth (PE) terminal of the PS 307.
4. Screw-tighten the strain relief again.
5. Next, wire the PS and CPU
The power supply connector of the CPUs is a removable plug-in device.
Strip the connecting cables for the CPU power supply to a length of 11 mm. Wire the
lower terminal M on the PS 307 to the terminal M of the CPU and the lower terminal L+
on the PS 307 to terminal L+ of the CPU.

Warning
Reversing the polarity of the M and L+ terminals trips the internal fuse on your CPU.
Always interconnect the M and L+ terminals of the power supply module and of the CPU.

Wiring
6. Close the front panels.
The figure below illustrates the procedures described earlier.
l
L+
M
M
M
L+
L+
N
L1
230V/120V
1 2 3

Number Identifier
Strain relief of the power supply cable
Connection cables between the PS and CPU
Removable power supply connector

Note
The PS 307 power supply module is equipped with two additional 24 VDC terminals L+ and
M for the supply to I/O modules.

Wiring
6.5 Wiring front connectors
Introduction
The sensors and actuators of your system are connected to the S7-300 AS by means of
front connectors. Wire the sensors and actuators to the relevant front connector and then
plug it into the module.
Front connector versions
Front connectors come in 20-pin and 40-pin versions with screw contacts or spring terminals.
You require 40-pin front connectors for the CPUs 31xC and 32-channel SMs.
Use the following front connectors as required for the module:
Table 6-5 Assignment of front connectors to modules
Module Front connector with screw
terminals, order no.:
Front connector with spring
terminals, order no.:
Signal modules
(not 32-channel),
Function modules,
Communication module
CP 342-2
6ES7 392-1AJ00-0AA0 6ES7 392-1BJ00-0AA0
Signal modules
(32-channel) and
CPU 31xC
6ES7 392-1AM00-0AA0 6ES7 392-1BM01-0AA0
Connecting on spring terminals
It is quite easy to wire a front connector with spring terminals: Simply insert the screwdriver
vertically into the opening with the red opening mechanism, insert the wire into the terminal
and remove the screwdriver.

Warning
You might damage the spring clamp mechanism of the front connector if you turn the
screwdriver sideways or use the wrong size of screwdriver. Always slide a matching
screwdriver vertically into the desired opening until it reaches the mechanical stop. This
ensures that the spring terminal is fully open.

Tip
There is a separate opening for test probes up to 2 mm in diameter to the left of the opening
for the screwdriver.
Wiring
Requirement
The modules (SM, FM, CP 342-2) are mounted on the rail.
Preparing the front connectors and cables

Warning
There is a risk of contact to live wires if the power supply module, or any additional load
power supply units, are connected to the mains.
You should therefore isolate the S7-300 from power before you start wiring it. Close all front
panels of the modules when you completed the wiring. This is conditional before you
reconnect the S7-300 to power.

1. Switch off the power supply.
2. Open the front door.
3. Place the front connector into wiring position.
Push the front connector into the signal module until it latches. In this position, the front
connector still protrudes from the module.
Advantage of this wiring position: Comfortable wiring.
The front connector pins do not contact the module in this wiring position.
4. Strip the conductors to a length of 6 mm.
5. Crimp the wire end ferrules, for example, to terminate two conductors at one terminal.
1
2
3

Number Identifier
The switched off power supply module (PS)
The opened module
The front connector in wiring position
Wiring
Wiring front connectors
Table 6-6 Wiring front connectors
Step 20-pin front connector 40-pin front connector
1. Place the included cable strain relief into the front
connector.

Cable exit at the bottom of the module?
If yes:
Starting at terminal 20, work your way down to
terminal 1.

Start wiring at terminal 40 or 20, and work in alternating
passes from terminals 39, 19, 38, 18 etc. until you have
reached terminals 21 and 1.
2.
If not:
Start wiring at terminal 1, and work your way up to
terminal 20.

Start wiring at terminal 1 or 21, and work in alternating
passes from terminals 2, 22, 3, 23 etc. until you have
reached terminals 20 and 40.
3. Front connectors with screw terminals:
Always screw-tighten the unused terminals.
4. Place the strain relief around the cable harness and the
front connector.
5. Tighten the strain relief for the cable harness. Push in the strain relief to the left to increase cable space.

1
2

2
1
3 4

The work step numbers are shown in the figure above
Insert the strain relief.
Wire the terminals.
to Wire the terminals.
Tighten the strain relief clamp.
Reference
For information on wiring the integrated I/O of 31xC CPUs, refer to the CPU 31xC and
CPU 31x, Technical Data manual.
Wiring
6.6 Plugging the front connectors into modules
6.6 Plugging the front connectors into modules
Requirement
The front connectors are completely wired.
Inserting the front connector
Table 6-7 Inserting the front connector
Step 20pin front connector 40pin front connector
Push in the unlocking mechanism on top of
the module.
Keeping the locking mechanism pressed,
insert the front connector into the module.
Provided the front connector is seated
correctly in the module, the unlocking
mechanism automatically returns to the
initial position when you release it.
Tighten the mounting screw in the center
of the connector.

This pulls the front connector completely
into contact with the module.
1.
Note
When you insert the front connector into the module, an encoding mechanism engages in
the front connector, thus ensuring that the connector can only be inserted into modules of
the same type.
2. Close the front panel. Close the front panel.

1
2
3

1
2

The work step numbers are shown in the figure above
Keep the release mechanism pressed
Insert the front connector
Only then close the front panel
Tighten the mounting screw,
Only then close the front panel

Wiring
6.7 Labeling the module I/Os
6.7 Labeling the module I/Os
Introduction
The labeling strips are used to document the assignment of module I/Os to the sensors /
actuators of your system.
You have to use the following labeling strips, depending on the module:
Table 6-8 Assignment of labeling strips to modules
Module Labeling strip
Order no.:
SMs (not 32-channel),
Function modules,
Communication module CP 342-2
6ES7 392-2XX00-0AA0
SMs (32-channel) 6ES7 392-2XX10-0AA0
Filling out and inserting labeling strips
1. Label the strips with the addresses of the sensors / actuators.
2. Slide the labeled strips into the front panel.

Tip
Templates for labeling strips are available on the Internet at
http://www.siemens.com/automation/csi_en_WW, under entry ID 11978022.
Wiring
6.8 Terminating shielded cables on the shielding contact element
Application
The shield connecting element allows easy grounding of all shielded cables of S7 modules,
due to its direct contact to the mounting rail.
Design of the shielding contact element
The shielding contact element consists of:
a bracket with two screw bolts for rail mounting (order no.: 6ES5 390-5AA00-0AA0) and
the shielding terminals.
You must use the following shielding terminals, based on the shielding diameter of your
cables:
Table 6-9 Shielding diameter assignment to shielding terminals
Cable with shielding diameter Shielding terminal order no.:
2 cables, each with shielding diameter of 2 mm to 6 mm 6ES7 390-5AB00-0AA0
1 cable, shielding diameter 3 mm to 8 mm 6ES7 390-5BA00-0AA0
1 cable, shielding diameter 4 mm to 13 mm 6ES7 390-5CA00-0AA0
The shielding contact element width is 80 mm and provides two rows, each with 4 shielding
terminals.
Wiring
Installing the shield connecting element underneath two signal modules
1. Push the two screw bolts of the bracket into the guide on the underside of the mounting
rail.
2. Place the bracket underneath the modules whose shielded cables are to be terminated.
3. Screw-tighten the bracket onto the rail.
4. The shielding terminal is equipped with a slotted web underneath. Place the shielding
terminal at this position onto the edge of the bracket (see figure below). Push the
shielding terminal down and pivot it into the desired position.
You can install up to 4 shielding terminals on each of the two rows of the shielding
contact element.
2
1
3

Number Identifier
Bracket of shielding contact element
Edge of the bracket where the shielding terminal(s) has to be placed.
Shielding terminals
Wiring
Terminating 2-wire cables on shielding contact elements
Only one or two shielded cables may be terminated per shielding terminal (see the figure
below). The cable is clamped down at the stripped cable shielding.
1. Strip the cable shielding to a length of at least 20 mm.
2. Clamp in the stripped cable shielding underneath the shielding terminal.
Push the shielding terminal towards the module and feed the cable through the clamp
opening ..
If you need more than four shielding terminals, start wiring at the rear row of the shielding
contact element.
1
2
2

Number Identifier
Magnified view of the shielding terminal
Wiring of the shielding terminal
Tip
Provide a sufficient cable length between the shielding terminal and the front connector. This
allows you to disconnect the front connector for repairs, without having to disconnect the
shielding terminal also, for example.
See also
Cable shielding (Page A-12)
Wiring
6.9 Wiring the MPI / PROFIBUS connectors
6.9.1 Connecting the bus connector
Introduction
You need to network all the nodes you integrate into a subnet of your system. Information on
how to wire the bus connector can be found in the article below.
Wiring a bus connector with screw terminals
1. Strip the bus cable.
Details on stripped lengths are found in the product information supplied with the bus
connector.
2. Open the bus connector housing.
3. Insert the green and the red wire into the screw-terminal block.
Always connect the same wires to the same terminal (green wire to terminal A, red wire to
terminal B, for example).
4. Press the cable sheath into the clamp. Make sure that the shielding directly contacts the
shielding contact surfaces.
5. Screw-tighten the wire terminals.
6. Close the bus connector housing.
Wiring a Fast Connect bus connector
1. Strip the bus cable.
Details on stripped lengths are found in the product information supplied with the bus
connector.
2. Open the strain relief of the bus connector.
3. Insert the green and red wire into the open contacting covers.
Always connect the same wires to the same terminal (green wire to terminal A, red wire to
terminal B, for example).
4. Close the contacting cover.
This presses the conductors into the insulation displacement terminals.
5. Screw-tighten the strain relief clamp. Make sure that the shielding directly contacts the
shielding contact surfaces.

Note
Use a bus connector with 90 cable exit.
See also
Network components of MPI/DP and cable lengths (Page 4-34)
Wiring
6.9.2 Setting the terminating resistor on the bus connector
Inserting a bus connector in a module
1. Connect the wired bus connector to the module.
2. Screw the bus connector tightly onto the module.
3. If the bus connector is at the start or end of a segment, you have to switch on the
terminator resistance (Switch position "ON"; see following figure).

Note
6ES7 972-0BA30-0XA0 bus connectors are not equipped with a terminating resistor. You
cannot insert this type of bus connector at the beginning or end of a segment.

Please make sure during startup and normal operation that power is always supplied to
nodes where the terminating resistor is active.
The figure below shows the switch settings of a bus connector:
on
off
on
off
On On
Off Off
Terminating resistor activated Terminating resistor not activated

Removing the fiber-optic cable
You can unplug a bus connector with a looped-through bus cable at any time from the
PROFIBUS DP interface without interrupting data exchange on the bus.
Wiring
Possible data traffic errors

Warning
Data traffic error might occur on the bus!
A bus segment must always be terminated at both ends with the terminating resistor. For
example, this is not the case when the last slave with the bus connector is deactivated.
Because the bus connector takes its voltage from the station, this terminating resistor is
ineffective. Please make sure that power is always supplied to stations on which the
terminating resistor is active.

Wiring

Addressing
7
7.1 Slot-specific addressing of modules
Introduction
In slot-specific addressing (default addressing if configuration data was not loaded to the
CPU yet), each slot number is assigned a module start address. This is a digital or analog
address, based on the type of module.
This section shows you which module start address is assigned to which slot number. You
need this information to determine the start addresses of the installed modules.
Maximum assembly and the corresponding module start addresses
The figure below shows you an S7-300 assembly on four racks, and the optional slots with
their modules.Start addresses
The input and output addresses for I/O modules begin at the same module start address.

Note
On a CPU 31xC system you cannot insert any modules into slot 11 of rack 3. The address
area is reserved for the integrated I/O.

Addressing
7.1 Slot-specific addressing of modules
The figure below shows the slots of an S7-300 and the corresponding module start
addresses:
SF
BUSF
DC5V
FRCE
RUN
STOP
SM
SM
SM
SM
Slot number
Digital module start address
Analog module start address
3
3
1 2 3
3
lM SM SM SM SM SM SM SM SM
lM PS CPU SM SM SM SM SM SM SM SM
4
96
640
4
64
512
8
16
320
9
20
336
10
24
352
11
28
368
7
12
304
6
8
288
5
4
272
4
0
256
11
60
496
10
56
480
9
52
464
8
48
448
7
44
432
6
40
416
5
36
400
4
32
384
11
92
624
10
88
608
9
84
592
8
80
576
7
76
560
6
72
544
5
68
528
5
100
656
6
104
672
7
108
688
9
116
720
10
120
736
11
124
752
8
112
704
Rack 3 (EM)
Not CPU 31xC
Rack 2 (EM)
Rack 1 (EM)
Rack 0 (CU)
Slot number
Slot number
Slot number

Addressing
7.2 User-specific addressing of modules
7.2.1 User-specific addressing of modules
User-specific addressing
User-specific addressing means that you can assign an address of your choice to any
module (SM/FM/CP). The addresses are assigned in STEP 7. There you specify the module
start address that forms the basis for all other addresses of the module.
Advantages in user-specific addressing:
Optimization of available address space as there are no "address gaps" between the
modules.
In your standard software configuration, you can define addresses which are independent
of the relevant S7300 configuration.

Note
You always configure the hardware in HW Config of STEP 7 when using PROFIBUS DP
or PROFINET IO field devices. User-specific addressing is automatically set in this case.
There is no fixed slot addressing for such a configuration.

Addressing
7.2.2 Addressing digital modules
This section describes how to assign addresses to digital modules. You need this
information in order to be able to address the channels of the digital module in the user
program.
Addresses of digital modules
The address of an input or output of a digital module consists of a byte address plus a bit
address.

Example: I 1.2

The example consists of:
input I,
byte address 1 and
bit address 2

The byte address is based on the module start address.
The bit address is the number printed on the module.
When the first digital module is located in slot 4, its default start address is 0. The start
address of each further digital module increments by the count of 4.
The figure below shows you how the scheme by which the addresses of the various
channels of a digital module are derived.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Byte address:
Module start address
Byte address:
Module start address + 1
Bit address

Addressing
An example of digital modules
The example in the figure below shows which default addresses are derived when a digital
module is located in slot 4 (that is, when the module start address is 0). Slot number 3 is not
assigned, because the example does not contain an interface module.
PS CPU SM
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
4 1 2
:
:
:
:
:
:
Address 0.0
Address 1.7
Address 1.1
Address 1.0
Address 0.7
Address 0.1
Slot
number

7.2.3 Addressing analog modules
This section describes how to address analog modules. You need this information in order to
be able to address the channels of the analog modules in your user program.
Addresses of analog modules
The analog input or output channel is always assigned a word address. The channel address
is based on the module start address. When the first analog is located in slot 4, its default
start address is 256. The start address of each further analog module increments by the
count of 16.
An analog I/O module has the same start addresses for its input and output channels.
Addressing
An example of analog modules
The example in the figure below shows you which default channel addresses are derived for
an analog module located at slot 4. As you can see, the input and output channels of an
analog I/O module are addressed starting at the same address, namely the module start
address.
Slot number 3 is not assigned, because the example does not contain an interface module.
:
:
:
:
lnputs
Outputs
Channel 0: Address 256
Slot
number
PS CPU SM
1 2 4

Figure 7-1 I/O addresses of an analog module at slot 4

7.2.4 Addressing the integrated I/Os of CPU 31xC
CPU 312C
Addresses of the integrated I/Os of this CPU:
Table 7-1 Integrated I/Os of CPU 312C
Inputs / outputs Default addresses Remarks
10 digital inputs 124.0 to 125.1
of which 8 Inputs are for
technological functions:
124.0 to 124.7
6 digital outputs 124.0 to 124.5
of which 2 inputs are for
124.0 to 124.1
All digital inputs can be assigned an
interrupt function.

Optional technological functions:
Counting
Frequency measurement
Pulse width modulation
Addressing
CPU 313C
Addresses of the integrated I/Os of this CPU:
Table 7-2 Integrated I/Os of CPU 313C
Inputs / outputs Default addresses Comments
124.0 to 125.0
125.4 to 125.6
124.0 to 124.2
4+1 analog inputs 752 to 761
2 analog outputs 752 to 755
interrupt function.

Counting
CPU 313C-2 PtP and CPU 313C-2 DP
Addresses of the integrated I/Os of these CPUs:
Table 7-3 Integrated I/Os of CPU 313C-2 PtP/DP
124.0 to 125.0
125.4 to 125.6
124.0 to 124.2
interrupt function.

Counting
CPU 314C-2 PtP and CPU 314C-2 DP
Addresses of the integrated I/Os of these CPUs:
Table 7-4 Integrated I/Os of CPU 314C-2 PtP/DP
124.0 to 125.7
124.0 to 124.3
4+1 analog inputs 752 to 761
2 analog outputs 752 to 755
interrupt function.

Counting
Positioning
Addressing
7.3 Addressing on PROFIBUS DP
Special features
You cannot influence outputs with transfer instructions if they are assigned to technological
functions.
I/Os not configured for technological functions can be used as standard I/Os.
7.3 Addressing on PROFIBUS DP
Overview
The corresponding DP slaves must be commissioned for operation on PROFIBUS DP in
order to enable addressing of distributed I/O in the user program.
This commissioning includes
the assignment of DP slaves to PROFIBUS addresses
the assignment of slots or address ranges to the I/O modules in order to enable their
addressing in the user program. Slots which do not contain user date are assigned
diagnostics addresses.
This applies likewise when the CPU is operated as DP slave.
Further information about CPU operation in DP master or DP slave mode is available in the
chapter Commissioning PROFIBUS DP.
User-specific addressing of distributed PROFIBUS IO
Distributed PROFIBUS DP IO requires user-specific addressing.
Further information is available in the User-specific addressing of modules chapter.
Addressing consistent user data areas
The table below shows items to be taken into consideration in terms of communication in a
PROFIBUS DP master system when transferring I/O areas with "Total length" consistency.

Rule for 1 byte to 32 bytes data consistency on PROFIBUS DP:
The address area of consistent data in the process image is automatically updated.
You can also use SFC14 "DPRD_DAT" and SFC15 "DPWR_DAT" to read and write consistent data.
SFC14 and SFC15 are required to read and write consistent data of address areas which are not
available in the process image.
The length of areas with "Total length" consistency accessed by the SFC must match the
programmed range.
Direct access to consistent areas is also possible (L PEW or T PAW, for example).
PROFIBUS DP supports the transfer of up to 32 bytes of consistent data.

Addressing
7.4 Addressing on PROFINET
Overview
The corresponding I/O devices must be commissioned for operation on PROFINET in order
to enable addressing of distributed peripherals on PROFINET IO in the user program.
This commissioning includes
the definitions of I/O device numbers and names
the definition of I/O device names in order to enable the assignment of IP addresses and
access to the IO devices by the CPU 31x PN/DP operated as IO controller.
the assignment of slots/subslots or address ranges to the I/O modules in order to enable
their addressing in the user program. Slots which do not contain user date are assigned
diagnostics addresses.
Further information about CPU operation as I/O controller is available in the chapter
Commissioning PROFINET IO.
User-specific addressing of distributed PROFINET IO
Distributed peripherals on PROFINET IO require user-specific addressing.
Further information is available in the User-specific addressing of modules chapter.
Addressing consistent user data areas
The table below shows items to be taken into consideration in terms of communication in a
PROFINET IO system when transferring I/O areas with "Total length" consistency.

Rule for 1 byte to 254 bytes data consistency on PROFINET IO:
The address area of consistent data in the process image is automatically updated.
You can also use SFC14 "DPRD_DAT" and SFC15 "DPWR_DAT" to read and write consistent data.
SFC14 and SFC15 are required to read and write consistent data of address areas which are not
available in the process image.
The length of areas with "Total length" consistency accessed by the SFC must match the
programmed range.
Direct access to consistent areas is also possible (L PEW or T PAW, for example).
PROFINET IO supports the transfer of up to 254 bytes of consistent data.

Addressing

Commissioning
8
8.1 Overview
This section contains important notes on commissioning which you should strictly observe in
order to avoid injury or damage to machines.

Note
Your commissioning phase is determined primarily by your application, so we can only offer
you general information, without claiming completeness of this topic.

Reference
Note the information about commissioning provided in the descriptions of your system
components and devices.
8.2 Commissioning procedure
8.2.1 Procedure: Commissioning the hardware
Hardware requirements
S7-300 is installed
S7-300 is wired
With networked S7-300, the following applies to the interfaces:
MPI/ PROFIBUS
The MPI/PROFIBUS addresses are configured
The terminating resistors on the segments are enabled.
PROFINET
The integrated PROFINET interface of CPU 31x PN/DP is configured in STEP 7
(IP address and device name are set in HW Config)
The CPU is connected to the subnet.
Commissioning
Recommended procedure: Hardware
The S7-300 system can be very large and extremely complex due to its modular structure
and versatile expansion options. It is therefore inappropriate to initially start up an S7-300
with multiple racks and all inserted (installed) modules. Rather, we recommend a step-by-
step commissioning procedure.
We recommend the following initial commissioning procedure for an S7-300:
Table 8-1 Recommended commissioning procedure: Hardware
Tasks Remarks Information can be found
An installation and wiring
check according to checklist
- in the chapter: Checklist for
commissioning
Disconnecting drive
aggregates and control
elements
This prevents negative effects on your system as a result
of program errors.

Tip: By redirecting data from your outputs to a data block,
you can always check the status at the outputs
-
Preparing the CPU Connecting the PG in the chapter: Connecting the
programming device (PG).
Commission the CU with inserted power supply module
and CPU.
First, switch on the expansion devices (EMs) which are
equipped with their own power supply module, and then
switch on the power supply module of the CU.
in the chapter: Initial power on Central unit (CU):
commission the CPU and
power supply, check the
LEDs
Check the LED displays on both modules. in the chapter: Debugging
functions, diagnostics and
troubleshooting
Reset CPU memory and
check the LEDs
- in the chapter: CPU memory
reset by means of mode
selector switch
CU:
commission the remaining
modules
Insert further modules into the CU and commission these,
working successively.
in the Module specifications
Manual
Expansion module (EM):
Connecting
Interconnect the CU with EMs as required: Insert only one
send IM into the CU, and insert the matching receive IM
into into the EM.
in the chapter: Installation
EM:
Commissioning
Insert further modules into the EMs and commission
these, working in successively.
See above.

Danger
Proceed step-by-step. Do not go to the next step unless you have completed the previous
one without error / error message.

Commissioning
Reference
Important notes can also be found in the section Debugging Functions, Diagnostics and
Troubleshooting.
See also
Procedure: Software commissioning (Page 8-3)
8.2.2 Procedure: Software commissioning
Requirements
Your S7-300
is installed and
wired.
Software requirements to be satisfied in order to utilize the full functionality of your CPU:

For the CPUs you require the following versions of STEP
7
31xC, 312, 314, 315-2 DP V5.2 + Servicepack 1 + HSP or higher
317-2 DP V5.2 + Servicepack 1 + HSP 0117 or
higher
315-2 PN/DP V5.4 + Servicepack 1 + HSP 0115 or
higher
317- 2 PN/DP V5.4 + Servicepack 1 + HSP 0115 or
higher
319-3 PN/DP V5.4 + Servicepack 1 + HSP 0114 or
higher
With networked S7-300, the following applies to the interfaces:
MPI/ PROFIBUS
The MPI/PROFIBUS addresses are configured
The terminating resistors on the segments are enabled
PROFINET
The integrated PROFINET interface of CPU 31x PN/DP is configured in STEP 7 (IP
address and device names are set in HW Config)
The CPU is connected to the subnet.

Note
Please observe the procedure for commissioning the hardware.

Commissioning
Hardware Support Packages (HSP) required
HSPs required in addition to the HSP for CPU 31x PN/DP, V2.5 for error-free operation with
other I/O devices:
Table 8-2 HSP for PROFINET IO devices on CPU 31x PN/DP, V2.5
PROFINET IO Device HSP required
ET 200S with interface module
IM 151-3 PN (6ES7151-3AA10-0AB0) HSP0089, V1.3 or higher
IM 151-3 PN (6ES7151-3AA20-0AB0) HSP0098, V1.3 or higher
IM 151-3 PN High Feature (6ES7151-3BA20-0AB0) HSP0099, V1.3 or higher
ET 200S with interface module
IM 154-4 PN High Feature (6ES7154-4AB00-0AB0) HSP0092, V1.3 or higher
Recommended procedure: Software
Table 8-3 Recommended commissioning procedure - Part II: Software
Tasks Remarks Information can be found ...
Switch on the PG and run
SIMATIC Manager
Download the
configuration and the
program to the CPU
- In the STEP 7 Programming
Manual
Debugging the I/Os Helpful functions are here:
Monitoring and controlling tags
Testing with program status
Forcing
Controlling outputs in STOP mode (PO enable)
Tip: Test the signals at the inputs and outputs using the
simulation module SM 374, for example.
In the STEP 7 Programming
Manual
Chapter: Debugging functions,
diagnostics and
troubleshooting
Commissioning PROFIBUS
DP or Ethernet
- in the chapter: Commissioning
PROFIBUS DP
in the chapter: Configuring
PROFINET interface X2
Commissioning PROFINET
IO
in the PROFINET System
Description System Manual
Connect the outputs Commissioning the outputs successively. -

Danger
Proceed step-by-step. Do not go to the next step unless you have completed the previous
one without error / error message.

Commissioning
8.3 Commissioning check list
Reaction to errors
React to errors as follows:
Check the system with the help of the check list in the chapter below.
Check the LED displays on all modules. For information on their meaning, refer to the
chapters describing the relevant modules.
If required, remove individual components to trace the error.
Reference
Important notes can also be found in the section Debugging Functions, Diagnostics and
Troubleshooting.
See also
Procedure: Commissioning the hardware (Page 8-1)
Introduction
After you mounted and wired your S7-300, we advise you to check all previous steps once
again.
The check list tables below are a guide for your examination of the S7-300. They also
provide cross-references to chapters containing further information on the relevant topic.

Racks

Points to be examined are in the manual S7-300: Installation in chapter
Are the rails mounted firmly to the wall, in the frame or in the
cabinet?
Configuring, Installation
Have you maintained the free space required? Configuring, Installation
Are the cable ducts installed properly? Configuring
Is the air circulation OK? Installing
Commissioning
Concept of grounding and chassis ground

Have you established a low-impedance connection (large
surface, large contact area) to local ground?
Configuring, Appendix
Are all racks (rails) properly connected to reference potential
and local ground (direct electrical connection or ungrounded
operation)?
Configuring, Wiring, Appendix
Are all grounding points of electrically connected modules and
of the load power supply units connected to reference
potential?
Configuring, Appendix
Module installation and wiring

Are all modules properly inserted and screwed in? Installing
Are all front connectors properly wired, plugged, screw-
tightened or latched to the correct module?
Installation, Wiring
Mains voltage

Points to be examined S7-300:
Installation in
chapter
See manual;
Section ...
Is the correct mains voltage set for all components? Wiring Module data
Power supply module

Points to be examined S7-300:
Installation in
chapter
See manual;
Section ...
Is the mains plug wired correctly? Wiring -
Is mains voltage connected? - -

Commissioning
8.4 Commissioning the Modules
8.4.1 Inserting/Replacing a Micro Memory Card
SIMATIC Micro Memory Card (MMC) as memory module
The memory module used on your CPU is a SIMATIC Micro Memory Card. You can set up
the SIMATIC Micro Memory Card as a load memory or a portable data medium.

Note
A SIMATIC Micro Memory Card must be inserted for CPU operation.

Note
The CPU goes into STOP and requests a memory reset when you remove the SIMATIC
MMC while the CPU is in RUN state.

Caution
Data on a SIMATIC Micro Memory Card can be corrupted if you remove the card while it is
being accessed by a write operation. You may have to delete the SIMATIC Micro Memory
Card using the PG or format it in the CPU if you remove it from the live system.
DO NOT remove the SIMATIC Micro Memory Card when the system is in RUN state; always
shut down power or set the CPU to STOP state in order to prevent any write access of a
programming device. When the CPU is in STOP mode and you cannot not determine
whether or not a PG is writing to the card (e.g. load/delete block), disconnect the
communication lines.

Warning
Make sure that the SIMATIC Micro Memory Card to be inserted contains a user program
which is suitable for the CPU (system). The wrong user program may have fatal processing
effects.

Commissioning
Inserting/replacing the SIMATIC Micro Memory Card
1. Switch the CPU to STOP mode.
2. Is a SIMATIC Micro Memory Card inserted?
If yes, ensure that no write operations are running on the PG (such as loading a block). If
you cannot ensure this state, disconnect all communication lines of the CPU.
Press the ejector and remove the SIMATIC MMC.
The frame of the module slot is equipped with an ejector for removing the SIMATIC MMC
(see CPU 31xC and CPU 31x Manual, Technical Data CPU31x Operator Control and
Display Elements).
You need a small screwdriver or ball-point pen to eject the SIMATIC Micro Memory Card.
3. Insert the ("new") SIMATIC MMC into the card slot with its beveled edge facing the
ejector.
4. Carefully push the SIMATIC MMC into the CPU slot to engage the interlock.
5. Reset CPU memory (see Resetting CPU memory by means of mode selector switch)

Inserting and removing a SIMATIC MMC when CPU power is switched off
After you replaced a SIMATIC MMC in POWER OFF state,
the CPUs
automatically detect a physically identical SIMATIC MMC with changed content
automatically detect a new MMC with contents to the previous SIMATIC MMC
It automatically performs a CPU memory reset after POWER ON.
Reference
Chapter Properties of the SIMATIC Micro Memory Card , CPU 31xC and CPU 31x
Manual, Technical data
Chapter Technical data of the SIMATIC Micro Memory Card (MMC), CPU 31xC and
CPU 31x Manual, Technical data
Commissioning
8.4.2 Initial turn-on
Requirements
You must have installed and wired up the S7-300.
Insert the Micro Memory Card into the CPU
Your CPU's mode selector switch must be set to STOP.
Initial power on of a CPU with Micro Memory Card
Switch on the PS 307 power supply module.
Result:
The 24 VDC LED on the power supply module is lit.
The 5 VDC LED on the CPU
is lit.
The STOP LED flashes at 2 Hz when the CPU executes an automatic memory reset.
The STOP LED is lit after memory reset.
8.4.3 CPU memory reset by means of mode selector switch
When to reset CPU memory
You reset CPU memory
in order to clear all retentive memory bits, timers and counters, and to initialize work
memory with the start values of the retentive DBs in load memory.
if the new retentive new memory bits, timers and counters downloaded to the CPU user
program using the "Download user program to Memory Card" function are liable to cause
unwanted reactions.
Reason: the "Download user program to Memory Card" function does not delete any
retentive memory areas.
when the CPU requests a memory reset; indicated by the STOP LED flashing at 0.5 Hz
intervals
Table 8-4 Possible reasons of a CPU request to reset memory
Causes of a CPU request to reset memory Special features
The SIMATIC MMC has been replaced.
RAM error in CPU
Insufficient work memory for loading all
user program blocks from a SIMATIC
MMC.
Attempts to load faulty blocks; if a wrong
instruction was programmed, for example.
CPU with inserted SIMATIC Micro Memory Card:
Recursive request of a CPU memory reset.
For further information on the behavior of the SIMATIC
MMC during CPU memory reset, refer to the CPU 31xC
and CPU 31x Manual, Technical data, Memory Reset
and Restart
Commissioning
How to reset memory
There are two ways to reset CPU memory:

CPU memory reset using the mode selector
switch
CPU memory reset using the PG
... is described in this chapter. ... is only possible when CPU is in STOP mode
(see STEP 7 Oneline Help ).
Resetting CPU memory using the mode selector switch
The table below shows the steps in resetting CPU memory.
Table 8-5 Procedure for CPU memory reset
Step Reset CPU memory
1. Turn the key to STOP position .
2. Turn the key to MRES position Hold the key in this position until the STOP LED lights up
for the second time and remains on (this takes 3 seconds).
Now release the key.
3. You must turn the key to MRES position again within 3 seconds and hold it there until the
STOP LED flashes (at 2 Hz).
You can now release the switch. When the CPU has completed memory reset, the STOP
LED stops flashing and remains lit.
The CPU has reset the memory.
The procedure described earlier is only required to reset CPU memory when the CPU has
not requested (indicated by slow flashing of the STOP LED) a memory reset. If the CPU
requests a memory reset you only have to briefly set the mode selector switch to the MRES
position in order to initiate the memory reset.
Commissioning
The figure below shows how to use the mode selector switch to reset CPU memory:
t
1 2 3
STOP
LED
on
Off
3 s
Max. 3 s
Min. 3 s
CPU

You may have to format the SIMATIC MMC if memory was successfully reset and the CPU
once again requests a memory reset (see Formatting the SIMATIC Micro Memory Card).
STOP LED does not flash during the memory reset
What should I do if the STOP LED does not flash during the memory reset or if other LEDs
are lit?
1. You must repeat steps and .
2. If the CPU still does not reset memory, evaluate the diagnostic buffer of the CPU.
Commissioning
What happens in the CPU during a memory reset
Table 8-6 Internal CPU events on memory reset
Event Action in CPU
1. The CPU deletes the entire user program in the main memory.
2. The CPU deletes the retentive data.
3. The CPU tests its own hardware.
CPU activities
4. The CPU copies the runtime-relevant content of the SIMATIC Micro Memory Card (load
memory) to work memory.
Tip: If the CPU is unable to copy the contents from the SIMATIC MMC and requests a
memory reset:
Remove the SIMATIC Micro Memory Card.
Reset CPU memory
Read the diagnostic buffer.
Memory contents
after reset
The user program is once again transferred from the SIMATIC MMC to work memory. Memory
utilization is indicated accordingly.
Data in the diagnostics buffer.
You can read the diagnostic buffer with the PG (see STEP 7 Online Help).
The MPI parameters (MPI address and highest MPI address, transmission rate, configured MPI
addresses of CPs/FMs in an S7300).
Same applies to CPU 315-2 PN/DP /CPU 317 / CPU 319 if the MPI/DP interface of the CPU is
programmed for operation as DP interface (PROFIBUS address, highest PROFIBUS address,
baud rate, configured as active or passive interface).
Data retained
Content of elapsed time counter
Special feature: Interface parameters (MPI or MPI/DP interface)
The following parameters hold a special position when CPU memory is reset.
Parameters of interface (MPI parameters or MPI-/DP parameters for MPI-/DP interfaces).
The table below describes which interface parameters remain valid after a CPU memory
reset.

CPU memory reset ... MPI/DP parameters
with inserted SIMATIC Micro Memory Card: ...the MPI parameters on the SIMATIC Micro
Memory Card or integrated read-only load
memory are valid. If this location does not contain
any parameter data (SDB), the previously set
parameters stay valid.
without inserted SIMATIC Micro Memory Card: ... are retained and valid.

Commissioning
8.4.4 Formatting the Micro Memory Card
Situations which require formatting of the SIMATIC Micro Memory Card:
The SIMATIC Micro Memory Card module type is not a user module
The SIMATIC Micro Memory Card is not formatted
The SIMATIC Micro Memory Card is defective
Invalid content of the SIMATIC Micro Memory Card
The content of the SIMATIC Micro Memory Card has been marked invalid
The "Download user program" operation was interrupted as a result of Power Off.
The "Write to EPROM" operation was interrupted as a result of Power Off.
Error when evaluating the module content during CPU memory reset.
Formatting error, or formatting failed.
If one of these errors has occurred, the CPU prompts you for yet another memory reset,
even after a memory reset operation has been performed. The contents of the SIMATIC
MMC are retained until it is formatted, unless the "Download user program" or "Write to
EPROM" operation was interrupted due to Power Off.
The SIMATIC Micro Memory Card is only formatted if a specific reason is given (see above).
It is not formatted, for example, when the CPU requests a memory reset after module
replacement. In this case, a switch to MRES triggers a normal memory reset for which the
module content remains valid.
How to format your SIMATIC Micro Memory Card
If the CPU has requested a memory reset (STOP LED flashing slowly) you can format the
SIMATIC MMC using the mode selector switch as described below:
1. Toggle the switch to the MRES position and hold it there until the STOP LED lights up
and remains on (after approx. 9 seconds).
2. Within the next three seconds, release the switch and toggle it once again to MRES
position. The STOP LED flashes to indicate that formatting is in progress.

Note
Always perform these steps within the specified time, for the SIMATIC Micro Memory Card
will otherwise not be formatted and returns to memory reset status.

See also
CPU memory reset by means of mode selector switch (Page 8-9)
Commissioning
8.4.5 Connecting the programming device (PG)
8.4.5.1 Connect PG/PC to the integrated PROFINET interface of the CPU 31x PN/DP
Requirement
CPU with integrated PROFINET interface (CPU 319-3 PN/DP, for example)
PG/PC with network card
Connect PG/PC to the integrated PROFINET interface of the CPU 31x PN/DP
1. Connect the PG/PC to a switch, using a TP patch cable
.
2. In the same way, connect the switch to the integrated PROFINET interface of your
CPU .
CPU
PS
ETb200S
PN
PG/PC
2
1
lO device
Switch
lndustrial Ethernet

Result
You connected the PG/PC to the integrated PROFINET interface of the CPU.
Tip
Using an Ethernet crossover cable, you can also connect your PG/PC directly to the
integrated PROFINET interface of the CPU 31x PN/DP.
Reference
For information on PROFINET, refer to the PROFINET System Description.
For information on passive network components such as switches, refer to the SIMATIC
NET manual: Twisted Pair and Fiber-Optic Networks.
Commissioning
See also
Configuring and commissioning the PROFINET IO system (Page 8-37)
8.4.5.2 Connecting the PG to a node
Requirement
The PG must be equipped with an integrated MPI interface or an MPI card in order to
connect it via MPI.
Connecting a PG to the integrated MPI interface of the CPU
Interconnect the PG with the MPI interface of your CPU by way of a PG patch cable . You
can use a self-made PROFIBUS bus cable with bus connectors. The figure below illustrates
the connection between the PG and the CPU
1
PG
PS
MPl
CPU SM

Number Identifier
PG cable used to interconnect the PG with the CPU
Procedure for PROFIBUS DP
The procedure is basically the same, if the CPU interface is set to PROFIBUS DP mode
Commissioning
8.4.5.3 Connecting the PG to several nodes
Requirements
connect it to an MPI.
Connecting the PG to several nodes
Use bus connectors to connect a PG which is permanently installed on the MPI subnet to the
other nodes of the MPI subnet.
The figure below shows two networked S7-300s which are interconnected by means of bus
connectors.
1
2
2
PG
CPU PS SM
SM CPU PS

Number Identifier
PROFIBUS bus cable
Connector with enabled terminating resistor

Commissioning
8.4.5.4 Using the PG for commissioning or maintenance
Requirement
Using the PG for commissioning or maintenance
Use a stub cable to connect the commissioning and maintenance PG to the other subnet
nodes. The bus connector of these nodes must be equipped with a PG socket.
The figure below shows the interconnection of two networked S7-300 and a PG.
2
3
2
1
PS SM CPU
PS SM CPU
PG

Number Identifier
Stub cable used to interconnect the PG with the CPU
Connectors with enabled terminating resistors
PROFIBUS bus cable used to network both CPUs
Commissioning
MPI addresses for service PGs
If there is no stationary PG, we recommend:
To connect a PG to an MPI subnet with "unknown" node addresses, set the following
addresses on the service PG:
MPI address: 0
Highest MPI address: 126
IN STEP 7, you then determine the highest MPI address on the MPI subnet and match the
highest MPI address in the PG to that of the MPI subnet.
See also
Procedure: Commissioning the hardware (Page 8-1)
Procedure: Software commissioning (Page 8-3)
Commissioning
8.4.5.5 Connecting a PG to ungrounded MPI nodes (not CPU 31xC)
Requirement
Connecting a PG to ungrounded nodes on an MPI subnet (not CPU 31xC)
Connecting a PG to ungrounded nodes
Always use an ungrounded PG to connect to ungrounded MPI subnet nodes or to
ungrounded S7-300 PLCs.
Connecting a grounded PG to the MPI
You want to operate with ungrounded nodes. If the MPI at the PG is grounded, you must
interconnect the nodes and the PG with an RS485 repeater. You must connect the
ungrounded nodes to bus segment 2 if the PG is connected to bus segment 1
(terminals A1 B1) or to the PG/OP interface (refer to chapter 9 in the Module Data Manual).
The figure below shows an RS485 repeater as interface between grounded and ungrounded
nodes of an MPI subnet.
1
2
1
CPU PS
PG
Bus segment 2
(ungrounded
signals)
Bus segment 1
(grounded signals)

Number Identifier
Connectors with enabled terminating resistors
RS485 Repeaters, with activated terminating resistors
See also
PROFINET cable lengths and network expansion (Page 4-52)
Network components of MPI/DP and cable lengths (Page 4-34)
Commissioning
8.4.6 Starting SIMATIC Manager
Introduction
SIMATIC Manager is a GUI for online/offline editing of S7 objects (projects, user programs,
blocks, hardware stations and tools).
The SIMATIC Manager lets you
manage projects and libraries,
call STEP 7 tools,
access the PLC (AS) online,
edit Memory Cards.
Starting SIMATIC Manager
After installation, the SIMATIC Manager icon appears on the Windows desktop, and the Start
menu contains entry SIMATIC Manager under SIMATIC.
1. Run SIMATIC Manager by double-clicking the icon, or from the Start menu (same as with
all other Windows applications).
User interface
A corresponding editing tool is started up when you open the relevant objects. You start the
program editor by double-clicking the program block you want to edit (object-oriented start).
Online Help
The online help for the active window is always called by pressing F1.
Commissioning
8.4.7 Monitoring and modifying I/Os
The "Monitor and modify tags" tool
The STEP 7 "Monitor and modify tags" tool lets you:
monitor program tags in any format
edit the tag status or data in the CPU (modifying).
Creating a tag table
You have two options of creating a tag table (VAT):
in the LAD / FBD / STL editor by selecting the PLC > Monitor/Modify Variables command
This table is also available directly online.
in SIMATIC Manager with the Blocks container open via menu item Insert New Object >
Variable table
This table created offline can be saved for future retrieval. You can also test it after
switching to online mode.
VAT structure:
In the VAT, every address to be monitored or modified (e.g. inputs, outputs) occupies one
row.
The meaning of the VAT columns is as follows:

Column text This field ...
Address contains the absolute address of the tag
Icon contains the symbolic descriptor of the tag
This is identical to the specification in the Symbol Table.
Symbol comment shows the symbol comment of the Symbol Table
Status format contains the default format setting, e.g. HEX.
You can change the format as follows:
right-click in the format field. The Format List opens.
or
left-click in the format field until the relevant format appears
Status value shows the content of the tag at the time of update
Modify value is used to enter the new tag value (modify value)
Monitor tag
You have two options for monitoring tags:
updating the status values once via menu item Tag > Update Status Values
or
continuous update of status values via menu item Tag > Monitor
Commissioning
Modifying tags
To modify tags , proceed as follows:
1. Left-click the field Modify value of the relevant tag.
2. Enter the modify value according to the data type.
3. To update modify values once, select the menu item Tag > Activate Modify Value.
or
Enable modify values permanently via menu item Tag > Modify.
4. In the Monitor test function, verify the modify value entry in the tag.
Is the modify value valid?
You can disable the modify value entered in the table. An invalid value is displayed same as
a comment. You can re-enable the modify value.
Only valid modify values can be enabled.
Setting the trigger points
Trigger points:
The "Trigger point for monitoring" determines the time of update for values of tags to be
monitored.
The "Trigger point for modifying" determines the time for assigning the modify values to
the tags to be modified.
Trigger condition:
The "Trigger condition for monitoring" determines whether to update values once when
the trigger point is reached or continuously every time the trigger point is reached.
The "Trigger condition for modifying" determines whether to assign modify values once or
permanently to the variable to be modified.
You can customize the trigger points using the tool "Monitor and modify tag" in the menu
item Tag > Set Trigger ... .
Special features
If "Trigger condition for monitoring" is set to once , the menu items Tag > Update Status
Values or Tag > Monitor have the same effect, namely a single update.
If "Trigger condition for modifying" is set to once , the menu items Tag > Update Status
Values or Tag > Modify have the same effect, namely a single assignment.
If trigger conditions are set to permanent , the said menu items have different effects as
described above.
If monitoring and modifying is set to the same trigger point, monitoring is executed first.
If Process mode is set under Debug > Mode, values are not cyclically updated when
permanent modification is set.
Remedy: Use the Force test function.
Commissioning
Saving/opening the variable table
Saving the VAT
1. After aborting or completing a test phase, you can save the variable table to memory. The
name of a variable table starts with the letters VAT, followed by a number from 0 to
65535; e.g. VAT5.
Opening VAT
1. Select the menu item Table > Open.
2. Select the project name in the Open dialog.
3. In the project window below, select the relevant program and mark the Blocks container.
4. In the block window, select the desired table.
5. Confirm with OK.
Establishing a connection to the CPU
The variables of a VAT represent dynamic quantities of a user program. In order to monitor
or modify variables it is required to establish a connection to the relevant CPU. Every
variable tables can be linked to another CPU.
In menu item PLC > Connect to ... , establish a connection to one of the following CPUs:
configured CPU
directly connected CPU
available CPU ...
The table below lists the display of variables.

CPUs The CPU variables are displayed, ...
configured CPU in their S7 program (Hardware Station) in which the VAT is
stored.
directly connected CPU that is connected directly to the PG.
available CPU. that is selected in the dialog window.
Use the menu items PLC > Connect to ... > Available CPU ... to
connect to an available CPU. This can be used to connect to any
CPU available on the network.
Commissioning
Modifying outputs in CPU STOP mode
The function Enable PO resets the output disable signal for the peripheral outputs (PO),
thus enabling modifying of the PO in CPU STOP mode.
In order to enable the POs, proceed as follows:
1. In menu item Table > Open the variable table (VAT), open the VAT that contains the PO
you want to modify, or activate the window containing the corresponding VAT.
2. To modify the PO of the active VAT, select the CPU connection in menu command PLC
> Connect to ... .
3. Use menu command PLC > Operating Mode to open the Operating Mode dialog and
switch the CPU to STOP mode.
4. Enter your values in the "Modify value" column for the PO you want to modify.
Examples:
PO: POB 7 modify value: 2#0100 0011
POW 2 W#16#0027
POD 4 DW#16#0001
5. Select Variable > Enable PO to set "Enable PO" mode.
6. Modify the PO by selecting Variable > Activate Modify Values. "Enable PO" mode
remains active until reset by selecting Variable > Enable PO once again.
"Enable PO" is also terminated when the connection to the PG goes down.
7. Return to step 4 if you want to set new values.

Note
For example, a message pops up to indicate a CPU mode transition from STOP to RUN
or START-UP.
A message also pops up when the "Enable PO" function is set while the CPU is in RUN
mode.

Commissioning
8.5 Commissioning PROFIBUS DP
8.5.1 Commissioning PROFIBUS DP
Requirements
Requirements for commissioning a PROFIBUS DP network:
A PROFIBUS DP network is installed.
You have configured the PROFIBUS DP network using STEP 7 Standard Package and
have assigned a PROFIBUS DP address and the address space to all the participants.
Note that you must also set address switches at some of the DP slaves (see the
description of the relevant DP slave).
Software requirements are shown in the table below, based on the CPU used:
Table 8-7 Software requirements
CPU Order No. Software required
313C-2 DP 6ES7313-6CF03-0AB0
314C-2 DP 6ES7314-6CG03-0AB0
STEP 7 V 5. 2 + SP1 + HSP
or higher COM PROFIBUS V 5.0
315-2 DP 6ES7315-2AG10-0AB0 STEP 7 V 5.2 + SP1 + HSP or higher
315-2 PN/DP 6ES7315-2EH13-0AB0 STEP 7 V5.4 + SP1 + HSP or higher
317-2 DP 6ES7317-2AJ10-0AB0 STEP 7 V5.2 + SP1 + HSP or higher
317-2 PN/DP 6ES7317-2EK13-0AB0 STEP 7 V5.4 + SP1 + HSP or higher
319-3 PN/DP 6ES7318-3EL00-0AB0 STEP 7 V 5.4 + SP1 + HSP or higher
DP address areas of the CPUs
Table 8-8 DP address areas of the CPUs
Address area 313C-2 DP
314C-2 DP
315-2 DP 315-2 PN/DP 317-2 DP
317-2 PN/DP
319-3 PN/DP
Entire address area of inputs and of
outputs
1024 bytes 2048 bytes 2048 bytes 8192 bytes
of these in the process image, for
inputs and outputs respectively:
max. 128 bytes max. 128 bytes max. 2048 bytes max. 2048 bytes
Default 128 bytes
1
128 bytes
1
128 bytes 256 bytes
1
default cannot be changed
Commissioning
DP diagnostics addresses
DP diagnostic addresses occupy 1 byte per DP master and DP slave in the input address
area. For example, at these addresses DP standard diagnostics can be called for the
relevant node (LADDR parameter of SFC 13). The DP diagnostic addresses are specified in
your configuration. If you do not specify any DP diagnostic addresses, STEP 7 assigns these
DP diagnostic addresses in ascending order, starting at the highest byte address.
In the case of a CPU 31xC-2 DP, CPU 31x-2 DP or CPU 31x PN/DP assigned as a master,
two different diagnostic addresses must be assigned for S7 slaves.
Diagnostic address of the slave (address for slot 0)
At this address all slave events are reported in the DP master (Node representative), e.g.
Node failure.
Diagnostic address of the module (address for slot 2)
All module (CPU 313C-2 DP as I-Slave, for example) events are reported in the master
(OB82) at this address. With a CPU as DP Slave, for example, diagnostic interrupts for
operating mode transitions are reported at this address.
See also
Connecting the PG to a node (Page 8-15)
Connecting the PG to several nodes (Page 8-16)
8.5.2 Commissioning the CPU as DP master
Requirements for commissioning
The PROFIBUS subnet has been configured.
The DP slaves are ready for operation (see relevant DP slave manual).
In order to operate the MPI/DP interface as DP interface it must be configured
accordingly (only CPU 315-2 PN/DP/ CPU 317 and CPU 319).
You must configure the CPU as DP master prior to commissioning. That is, in STEP 7
you have to
configure the CPU as a DP master,
assign a PROFIBUS address to the CPU,
assign a master diagnostic address to the CPU,
integrate the DP slaves into the DP master system.
Is the DP CPU a DP slave?
If so, this DP slave appears in the PROFIBUS-DP catalog as configured station. In the
DP master, assign a slave diagnostic address to this DP slave CPU. You must
interconnect the DP master with the DP slave CPU and specify the address areas for
data exchange with the DP slave CPU.
Commissioning
Commissioning
Commission the DP CPU as a DP master in the PROFIBUS subnet as follows:
1. Download the PROFIBUS subnet configuration created with STEP 7 (preset
configuration) from the PG to the DP CPU.
2. Switch on all of the DP slaves.
3. Switch the DP CPU from STOP to RUN.
Startup of DP CPU as DP master
During startup, the DP CPU checks the configured preset configuration of its DP master
system against the actual configuration.
If preset configuration = actual configuration, the CPU switches to RUN mode.
If the preset configuration to the actual configuration, the configuration of parameter
Startup if preset configuration actual configuration determines the startup behavior of the
CPU.

Startup when the preset configuration actual
configuration = yes (default setting)
Startup when the preset configuration actual
configuration = no
DP CPU switches to RUN.
(BUSF LED flashes if any of the DP slaves
cannot be addressed)
DP CPU remains in STOP mode, and the BUS
LED flashes after the set Monitoring time for
transfer of parameters to modules.
The flashing BUSF LED indicates that at least
one DP slave cannot be accessed. In this case,
check whether all DP slaves are switched on or
correspond with your configuration, or read out
the diagnostic buffer with STEP 7.
Recognizing the operating state of DP slaves (Event recognition)
The table below shows how the DP CPU operating as a DP master recognizes operating
mode transitions of a CPU operating as a DP slave or data exchange interruptions.
Table 8-9 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP master
Event What happens in the DP master?
Bus interruption
(short circuit,
connector removed)
Call of OB 86 with the message Station failure
(coming event; diagnostic address of the DP slave assigned to the DP
master)
With I/O access: call of OB 122
(I/O access error)
DP slave:
RUN STOP
Call of OB 82 with the message Module error
(incoming event; diagnostic address of the DP slave assigned to the DP
master; Variable OB82_MDL_STOP=1)
DP slave:
STOP RUN
Call of OB 82 with the message Module OK
(outgoing event; diagnostic address of the DP-Slave assigned to the DP
master; Variable OB82_MDL_STOP=0)
Commissioning
Tip:
When commissioning the CPU as DP master, always program OB82 and OB86. This helps
you to recognize and evaluate data exchange errors or interruption.
Programming, status/control via PROFIBUS
As an alternative to the MPI interface, you can program the CPU or execute the PG's status
and control functions via the PROFIBUSDP interface.

Note
The use of Status and Control function via the PROFIBUS-DP interface extends the DP
cycle.

Constant Bus Cycle Time
This is a property of PROFIBUS DP. The "Constant bus cycle time" function ensures that the
DP master always starts the DP bus cycle within a constant interval. From the perspective of
the slaves, this means that they receive their data from the master at constant time intervals.
In STEP 7 V 5.x or higher you can configure constant bus cycle times for PROFIBUS
subnets. Details on constant bus cycle times are found in the STEP 7 Online Help.
Isochronous updating of process image partitions
SFC126 "SYNC_PI" is used for the isochronous update of the process image partition of
inputs. An application program which is interconnected with a DP cycle (by means of OB61)
can use this SFC for consistent updates of data recorded in the process image partition of
inputs in synchronism with this cycle. SFC126 accepts interrupt control and can only be
called in OB61.
SFC 127 "SYNC_PO" is used for the isochronous update of the process image partition of
outputs. An application program which is interconnected to a DP cycle can use the SFC for
the consistent transfer of the computed output data of a process image partition of outputs to
the I/O in synchronism with this cycle. SFC 127 accepts interrupt control and can only be
called in OB 61.
The SFCs 126 and 127 are described in the STEP 7 Online Help and in the System
Software S7-300/400, System and Standard Functions Reference Manual.
The 315-2 PN/DP, 317 DP, 317-2 PN/DP and 319-3 PN/DP CPUs support isochronous
mode. CPUs with two DP interfaces (CPU 317-2 DP and CPU 319-3 PN/DP) only support
isochronous mode on their second (DP) interface.
Reference
For further information on isochronous mode, refer to the "Isochronous mode" Manual.
Commissioning
Further information about time synchronization on PROFIBUS DP is available in the chapter
Interfaces > PROFIBUS DP.
Sync/Freeze
The SYNC control command is used to set sync mode on the DP slaves of selected groups.
In other words, the DP master transfers current output data and instructs the relevant DP
slaves to freeze their outputs. The DP slaves writes the output data of the next output frames
to an internal buffer; the state of the outputs remains unchanged.
Following each SYNC control command, the DP slaves of the selected groups transfer the
output data stored in the internal buffer to the process outputs.
The outputs are only updated cyclically again after you transfer the UNSYNC control
command using SFC11 "DPSYC_FR".
The FREEZE control command is used to set the relevant DP slaves to Freeze mode, in
other words, the DP master instructs the DP slaves to freeze the current state of the inputs.
It then transfers the frozen data to the input area of the CPU.
Following each FREEZE control command, the DP slaves freeze the state of their inputs
again.
The DP master receives the current state of the inputs cyclically again not until you have
sent the UNFREEZE control command with SFC11 "DPSYC_FR".
The SFCs 11 are described in the corresponding STEP 7 Online Help and in the System
Software S7-300/400, System and Standard Functions Reference Manual.
Startup of the DP master system

CPU 31xC-2 DP / 31x-2 DP / 31x PN/DP is DP master
The Parameter transfer to modules parameter is also used to define the startup monitoring time for
DP slaves.
That is, the DP slaves must startup and must have received all parameters from the CPU (as DP
master) within the defined time.
PROFIBUS address of the DP master
For the DP CPU, you must not set "126" as a PROFIBUS address.
Commissioning
8.5.3 Commissioning the CPU as DP Slave
Requirements for commissioning
The DP master is configured and programmed.
If the MPI/DP interface of your CPU must be a DP interface, you must configure the
interface as DP interface.
Prior to commissioning, you must set the relevant parameters and configure the DP CPU
for operation as DP slave. That is, in STEP 7 you have to
"power on" the CPU as DP slave,
assign a PROFIBUS address to the CPU,
assign a slave diagnostic address to the CPU,
specify whether the DP master is an S7 DP master or another DP master,
specify the address areas for data exchange with the DP master.
All other DP slaves are programmed and configured.
GSD files
If you are working on an IM 308-C or third party system, you require a GSD file in order to be
able to configure the DP CPU as a DP slave in a DP master system.
COM PROFIBUS V 4.0 or later includes this GSD file.
When working with an older version or another configuration tool, you can download the
GSD file at:
On the Internet at http://www.automation.siemens.com/csi/gsd
or
via modem from the IneterSfacesCenter Frth, Germany, telephone number +49 911
737972
.

Note
This note applies to the CPUs 31xC-2 DP, CPU 315, CPU 317 and CPU 319.
If you wish to use the CPU as a standard slave using the GSD file, you must not set the
Commissioning / Test mode check box on the DP interface properties dialog box when you
configure this slave CPU in STEP 7.

Configuration and parameter assignment message frame
STEP 7 assists you during configuration and parameter assignment of the DP CPU. Should
you require a description of the configuration and parameter assignment frame, in order to
use a bus monitor for example, you can find it on the Internet at
http://www.siemens.com/automation/csi_es_WW/product under entry ID 1452338.
Commissioning
Commissioning
Commission the DP CPU as a DP slave in the PROFIBUS subnet as follows:
1. Switch on power, but hold the CPU in STOP mode.
2. First, switch on all other DP masters/slaves.
3. Now switch the CPU to RUN mode.
Startup of DP CPU as DP slave
When the DP-CPU is switched to RUN mode, two mutually independent operating mode
transitions are executed:
The CPU switches from STOP to RUN mode.
The CPU starts data exchange with the DP master via the PROFIBUS DP interface.
Recognizing the Operating State of the DP master (Event Recognition)
The table below shows how the DP CPU operating as a DP slave recognizes operating state
transitions or data exchange interruptions.
Table 8-10 Event recognition by CPUs 31xC-2 DP / 31x-2 DP / 31x PN/DP operating as DP slave
Event What happens in the DP slave?
Bus interruption
(short circuit,
connector removed)
Call of OB 86 with the message Station failure
(coming event; diagnostic address assigned to the DP slave)
With I/O access: Call of OB 122
(I/O access error)
DP master.
RUN STOP
Call of OB 82 with the message Module error
(coming event; diagnostic address assigned the DP slave; variable
OB82_MDL_STOP=1)
DP master
STOP RUN
Call of OB 82 with the message Module OK
(outgoing event; diagnostic address assigned to the DP slave; variable
OB82_MDL_STOP=0)
Tip:
When commissioning the CPU as DP slave, always program OB82 and OB86. This helps
you to recognize and evaluate the respective operating states or data exchange errors.
Status/control, programming via PROFIBUS
As an alternative to the MPI interface, you can program the CPU or execute the PG's status
and control functions via the PROFIBUS DP interface.

Note
The execution of status and control function via PROFIBUS DP interface extends the DP
cycle.
Commissioning
User data transfer by way of transfer memory
The DP CPU operating as intelligent DP slave provides a transfer memory for PROFIBUS
DP. User data are always exchanged between the CPU (DP slave) and the DP master by
way of this transfer memory. You can configure up to 32 address areas for this function.
That is, the DP master writes its data to these transfer memory address areas, the CPU
reads these data in the user program, and vice versa.
1
DP master
CPU as DP slave
Transfer memory
in l/O address
space
l/O l/O
PROFlBUS

Number Description
The functions which control data exchange between transfer memory and the distributed
I/O of the slave CPU must be implemented in the user program. The DP master cannot
access this I/O directly.
Address areas of transfer memory
In STEP 7, configure the I/O address areas:
You can configure up to 32 I/O address areas.
Maximum length per address area is 32 bytes.
You can configure a maximum of 244 input bytes and 244 outputs bytes.
The table below shows the principle of address areas. You can also find this figure in the
STEP 7 configuration.
Table 8-11 Configuration example for the address areas of transfer memory
Type Master
address
Type Slave
address
Length Unit Consistency
1 I 222 O 310 2 BYTE Unit
2 O 0 I 13 10 Word Total length
:
32
Address areas in the
DP master CPU
Address areas in the
DP slave CPU
These paramaters of the address areas
must be the same for DP master and DP
slave.
Commissioning
Sample program
Below you will see a small sample program for data exchange between the DP master and
the DP slave. The addresses used in the example are found in the table above.

In the DP slave CPU In the DP master CPU
L 2 //Data preparation in the
//DP slave

T MB 6
L IB 0
T MB 7
L MW 6 //Transfer data to
//DP master

T PQW 310

L PIB 222 //process received data in the
//DP master
T MB 50
L PIB 223
L B#16#3
+ I
T MB 51
L 10 //Data preparation in the
//DP master
+ 3
T MB 60
CALL SFC 15 //Send data to DP slave
LADDR:= W#16#0
RECORD:=
P#M60.0 Byte20
//In the user program of the masters
//a block of 20 bytes lengths starting at
MB60
//is written consistently to the output area
//PAB0 to PAB19
//(transfer area from master to
//slave)
RET_VAL:=MW 22

CALL SFC 14 //Data received from
//DP master

LADDR:=W#16#D //The slave reads
//I/O bytes PEB13
//to PEB32 (transferred
//data from master)
//consistently and saves
these to
//MB30 to MB49
//

RET_VAL:=MW 20
RECORD:=P#M30.0 byte 20
L MB 30 //Further processing of
//received data

L MB 7
+ I
T MW 100
Commissioning
Working with transfer memory
Note the following rules when working with the transfer memory:
Assignment of address areas:
Input data of DP slaves are always output data of the DP master
Output data of DP slaves are always input data of the DP master
The user can define these addresses. In the user program, access data with
load/transfer instructions or with SFC 14 and SFC 15. You can also define addresses of
the process image of inputs or outputs.
The lowest address of specific address areas is their respective area start address.
The length, unit and consistency of the address areas for DP master and DP slave must
be identical.
The master and slave addresses may differ in logically identical transfer memory
(independent logical I/O address spaces in the master and slave CPU).

Note
Assign addresses from the I/O address area of the DP CPU to the transfer memory.
You cannot use any addresses which have been assigned to transfer memory for other
I/O modules.

S5 DP master
If you use an IM 308-C as a DP master and the DP CPU as a DP slave, the following applies
to the exchange of consistent data.
Use IM 308-C in the S5 control to program FB192 for enabling exchange of consistent data
between the DP master and slave. With the FB192, the data of the DP CPU are only output
or read out in a consistent block.
S5-95 as DP master
If you set up an AG S5-95 for operation as DP master, you also have to set its bus
parameters for the DP CPU as DP slave.
User data transfer in STOP mode
User data is treated in transfer memory according to the STOP state of the DP master or DP
slave.
The DP slave CPU goes into STOP:
Data in transfer memory of the CPU are overwritten with "0" value, that is, the DP master
reads "0" in direct data exchange mode.
The DP master goes into STOP:
Current data in transfer memory of the CPU are retained and can be read by the CPU.
Commissioning
PROFIBUS address
For the DP CPU, you must not set "126" as a PROFIBUS address.
See also
User-specific addressing of modules (Page 7-3)
8.5.4 Direct data exchange
Requirements
STEP 7 V 5.x or higher lets you configure "Direct data exchange" for PROFIBUS nodes. DP
CPUs can take part in direct data exchange as senders and receivers.
Definition
"Direct data exchange" is a special communication relationship between PROFIBUS DP
nodes.
Characteristic of direct data exchange are the PROFIBUS DP nodes "Listening" on the bus
for data a DP slave returns to its DP master. This mechanism allows "Listening stations"
(receivers) direct access to modified input data of remote DP slaves.
Address Areas
In your STEP 7 configuration of the relevant peripheral input addresses, specify which
address area of the receiving node is to receive data requested from the sending node.
The following types of DP-CPU are possible:
DP slave sending station
Receiving station, as DP slave or DP master, or as CPU not integrated in a master
system.
Commissioning
Example: Direct data exchange via DP CPUs
The example in the figure below shows the relationships you can configure for direct data
exchange. The figure shows all DP masters and all DP slaves each as one DP CPU. Note
that other DP slaves (ET 200M, ET 200X, ET 200S) can only operate as sending node.
PROFlBUS
CPU
CPU
DP master 1
DP slave 3 DP slave 5
CPU
DP slave 1
CPU
DP master 2
CPU
DP slave 2
CPU
DP slave 4
DP master
System1
DP master
System2

Commissioning
8.6 Commissioning PROFINET IO
8.6.1 Requirements
Requirements
PROFINET IO is supported in STEP 7 V5.3 SP1 or higher. A later version of STEP 7 may be
required to support specific CPU functionality. Information about the STEP 7 versions
required for specific CPUs is available in the CPU 31xC and CPU 31x, Technical Data
Manual.
PROFINET IO address areas of the CPUs
Table 8-12 PROFINET IO address areas of the CPUs
Address area 315-2 PN/DP 317-2 PN/DP
319-3 PN/DP
Entire address area of inputs and of outputs 2048 bytes 8192 bytes
of these in the process image, for inputs and outputs
respectively:
max. 2048 bytes max. 2048 bytes
Default 128 bytes 256 bytes
Diagnostics addresses use 1 byte each in the input address space for
the IO controller, PROFINET interface and ports
each IO device (header module on slot 0, ports of the PROFINET interface) and all
internal modules / submodules of the device which do not contain any user data (power
module of ET 200S, or ports of the PROFINET interface, for example).
You can use these addresses, for example, to read module-specific diagnostics data records
by calling SFB52. STEP 7 assigns diagnostics addresses in descending order, starting at the
highest byte address.
Information about the structure of module-specific diagnostics data records is available in the
From PROFIBUS DP to PROFINET IO Programming Manual.
8.6.2 Configuring and commissioning the PROFINET IO system
Overview
There are several ways for you to start with commissioning the PROFINET IO interface of
the CPU, and then the PROFINET IO system:
Online via MPI/ DP interface
Online via switch and PROFINET interface
Offline, by saving the data to a Micro Memory Card in SIMATIC Manager on your
programming device, and then inserting the Micro Memory Card into the CPU
Commissioning
Commissioning a PROFINET IO system via MPI/DP
lndustrial Ethernet
2
1
PG/PC
PS CPU
MPl PN
Switch
lO device
ETb200S

Number Meaning
Use the PG cable to connect the PG to the integrated MPI/DP interface of the CPU.
Use the twisted-pair patch cable to interconnect the integrated PROFINET IO interface of
the CPU with the Industrial Ethernet (for example, connection to a switch).
Commissioning a PROFINET IO system directly via PROFINET interface
CPU
PS
ETb200S
PN
PG/PC
2
1
lO device
Switch
lndustrial Ethernet

Number Meaning
Use a twisted-pair patch cable to connect the PG/PC to a switch
In the same way, connect the switch to the integrated PROFINET interface of your CPU
Commissioning
Commissioning requirements:
The CPU is in STOP mode.
The IO devices are switched on.
The PROFINET subnet is installed, and the communication partners (for example,
PG, IO controller, IO devices) are connected to the PROFINET subnet.
Configuring the PROFINET IO system

Step Tasks
Configuring hardware in the STEP 7 SIMATIC Manager
1 Select File > New...
Assign a name to your project and confirm with OK.
2 Select Insert > Station > SIMATIC 300 Station to add an S7-300 station.
3 Double-click "Hardware."
Result: HW Config opens.
4 Insert your components by means of drag-and-drop:
Mounting rail
Power supply
CPU 31x PN/DP (CPU 317-2 PN/DP, V 2.3.0, for example)
Result: The "Properties Ethernet Interface PN-IO" dialog box opens. The properties of
the PROFINET X2 interface are shown in the Parameters tab.
Assigning the IP address
5 Click "New" on the "Properties Ethernet Interface PN-IO" dialog box to create a new
subnet.
Result: The "Properties New Industrial Ethernet Subnet" dialog box opens.
6 Assign a name and confirm with "OK."
Result: You are back to the "Properties Ethernet Interface PN-IO" dialog box.
7 Enter the IP address and the subnet mask in the dialog box. This information is available
from your network administrator.
Note: The worldwide unique MAC address is preset by the manufacturer and cannot be
changed.
8 If you setup a connection via router, you must also enter the address of the router. This
information is also available from your network administrator.
9 Click "OK" to close the properties dialog box.
Configuring the PROFINET IO system
10 Insert the IO devices at the PROFINET IO system, for example, an IM 151-3 PN
(ET 200S under PROFINET IO), then configure the slots and set their parameters by
means of drag-and-drop, based on the physical assembly.
11 Select Edit > Object properties to assign device names and numbers to the IO devices.
Commissioning
Step Tasks
12 When operating PROFINET IO and PROFINET CBA in parallel, set up the PROFINET IO
system properties by
activating the "Use this module for PROFINET CBA communication" check box
adapting the "Communication portion (PROFINET IO)" in the "Update time" tab
(change the communication portion of PROFINET IO to 87.5 %, for example).

13 Save your configuration with Station > Save and compile.
Configuration Download
14 Download the configuration to the CPU. You have three options:
Online via MPI/ DP interface (the PG and CPU must be located on the same subnet).
When you download the configuration in a system containing several node addresses,
select the appropriate MPI or PROFIBUS address of the destination CPU.
Online via switch and PROFINET interface When you download the configuration in a
system containing several nodes, select the appropriate IP address of the destination
CPU. Select the MAC address of the CPU if you have not assigned it an IP address
yet. In the next dialog box, you can assign the configured IP address to the CPU.
The PG must be connected to the subnet. The PG interface must be set to TCP/IP
(Auto) mode. Setting in the IE-PG Access tab of the interface properties dialog box:
Assign Project-Specific IP Address.
Offline, by saving the data to a Micro Memory Card in SIMATIC Manager on your
programming device, and then inserting the Micro Memory Card into the CPU
Commissioning
Step Tasks
Assigning IO Device Names
15 Requirements: The PG must be connected to the subnet. The PG interface must be set
to TCP/IP (Auto) mode. Setting in the IE-PG Access tab of the interface properties dialog
box: Assign Project-Specific IP Address.
Procedure: In online mode, select the various IO devices in HW Config, then select PLC
> Ethernet > Assign Device Name to assign the corresponding device names.
Note: The CPU can only assign the IP address automatically, and thus enable its correct
communication with the IO device, after you assigned a device name to the latter.
If the configuration of the IO devices you downloaded to the CPU actually corresponds
with their physical configuration on the subnet, the CPU addresses the IO devices, and
the BF LED stops flashing both on the CPU and on the IO device.
You can now switch the CPU to RUN, provided there are no other conditions preventing a
startup, and the CPU and IO devices exchange data (read inputs, write outputs, for
example).
Result
You used STEP 7 to configure the PROFINET interface of your CPU and the and the
PROFINET IO system. The CPU can now be reached by other nodes in your Industrial
Ethernet subnet.
Reference
Detailed information about addressing of the PROFINET IO interface and on the
configuration of its properties and ports is available in the:
STEP 7 Online Help and
PROFINET System Description System Manual.
Commissioning
CPU startup for operation as IO controller
In its startup sequence, and based on the preset configuration, the CPU verifies the actual
configuration
of the local I/O,
of the distributed I/O on the PROFIBUS DP system, and
the PROFINET IO system.
The startup of the CPU is determined by the corresponding configuration in the "Startup" tab:
Table 8-13 CPU startup for operation as IO controller
Preset Actual configuration Preset = Actual
configuration
Startup permitted when target
configuration does not match the
actual configuration
Startup not permitted when target
configuration does not match the
actual configuration
CPU goes into RUN. CPU goes into RUN. After POWER
ON, and after the parameter
monitoring time has expired, the
CPU goes into RUN.
If the BF2/BF3 LED flashes, this
means that at least one IO device
cannot be addressed. In this case,
verify that all IO devices are
switched on and correspond with
the set configuration. For further
information, read the diagnostics
buffer in STEP 7.
CPU startup fails
Detecting interruptions in the data transfer to the IO device
The following table shows, how the CPU 31x PN/DP recognizes interruptions of the data
transfer:
Table 8-14 Even recognition of the CPU 31x PN/DP as IO controller
What happens in the IO controller? Event
CPU in RUN CPU in STOP
Bus interruption (short circuit,
connector removed)
Call of OB86 with the
message Station failure
(coming event; diagnostics
address of the IO device)
With I/O access: call of
OB 122
(I/O access error)
The event is written to the
diagnostics buffer
Tip:
Always program OB86 when you commission the CPU. This allows you to detect and
analyze interruptions in the data transfer.
Commissioning
Status/control, programming via PROFINET
As an alternative to the MPI /DP interface, you can program the CPU or execute the PG's
status and control functions via the PROFINET interface..
If you have not commissioned the PROFINET interface of the CPU yet, you can connect to
the CPU using its MAC address (see also Configuring the PROFINET IO System in the table
above).
To do so, use HW Config to download your project to the CPU. Address the CPU using its
MAC address. The CPU is also assigned the configured IP address after you downloaded
the configuration. With that you can then use all programming device functions, such as
download program, status/control etc., on the interface.
Commissioning

Maintenance
9
9.1 Overview
S7-300 is a maintenance-free automation system.
Thus, maintenance is considered
Backing up of the operating system on a SIMATIC Micro Memory Card
Updating of the operating system from a SIMATIC Micro Memory Card
Updating of the firmware online
Backing up of project data on a SIMATIC Micro Memory Card
Replacement of modules
Replacement of fuses in digital output modules
9.2 Backing up firmware on a SIMATIC Micro Memory Card
Situations which require backup of the firmware
It is advisable in certain situation to backup your CPU firmware:
You may want to replace the CPU in your system with a CPU out of storage. In this case you
should make sure that the firmware of the shelf CPU and of the system firmware are
identical.
It is also advisable to create an emergency backup copy of the firmware.
Maintenance
9.3 Updating the firmware
9.3.1 Backing up firmware on a SIMATIC Micro Memory Card
On which CPUs can you backup the firmware?
You can generate a backup copy of the the firmware as of the following CPU versions:

CPU Order No. Firmware as
of
Required Micro Memory Card
in MB
as of 6ES7312-1AD10-0AB0 V2.0.0 312
as of 6ES7312-1AE13-0AB0 V2.0.12
2
as of 6ES7314-1AF10-0AB0 V2.0.0 314
6ES7314-1AG13-0AB0 or
later
V2.0.12
2
315-2 DP as of 6ES7315-2AG10-0AB0 V2.0.0 4
as of 6ES7312-5BD00-0AB0 V1.0.0 312C
as of 6ES7312-5BE03-0AB0 V2.0.12
2
as of 6ES7313-5BE00-0AB0 V1.0.0 313C
as of 6ES7313-5BF03-0AB0 V2.0.12
2
as of 6ES7313-6CE00-0AB0 V1.0.0 313C-2 DP
as of 6ES7313-6CF03-0AB0 V2.0.12
4
as of 6ES7313-6BE00-0AB0 V1.0.0 313C-2 PtP
as of 6ES7313-6BF03-0AB0 V2.0.12
2
as of 6ES7314-6CF00-0AB0 V1.0.0 314C-2 DP
as of 6ES7314-6CG03-0AB0 V2.0.12
4
as of 6ES7314-6BF00-0AB0 V1.0.0 314C-2 PtP
as of 6ES7314-6BG03-0AB0 V2.0.12
2
as of 6ES7315-2EG10-0AB0 V2.3.0 315-2 PN/DP
as of 6ES7315-2EH13-0AB0 V2.3.4
4
317-2 DP as of 6ES7317-2AJ10-0AB0 V2.1.0 4
as of 6ES7317-2EJ10-0AB0 V2.2.0 317-2 PN/DP
as of 6ES7317-2EK13-0AB0 V2.3.4
4
319-3 PN/DP as of 6ES7318-3EL00-0AB0 V2.4.0 8
Maintenance
Backing up the firmware of your CPU to the SIMATIC Micro Memory Card
Table 9-1 Backing up the firmware to the SIMATIC Micro Memory Card
Step Action required: This happens in the CPU:
1. Insert the new SIMATIC Micro Memory
Card into the CPU.
The CPU requests memory reset
2. Turn the mode selector switch to MRES
position and hold it there.
-
3. POWER OFF / POWER ON. Hold the
mode selector switch in MRES position
until ...
... the STOP, RUN and FRCE LEDs start
flashing.
4. Mode selector switch to STOP. -
5. Mode selector switch briefly to MRES
position, then let it return to STOP.
The CPU starts to backup the operating
system on the SIMATIC MMC.
All LEDs are lit during the backup
operation.
The STOP LED flashes when the backup
is complete to indicate that the CPU
requires a memory reset.
6. Remove the SIMATIC Micro Memory
Card.
-

Maintenance
9.3.2 Firmware update using a Micro Memory Card
In which situations should I update the firmware?
After (compatible) function expansions, or after an enhancement of operating system
performance, the firmware of the CPU should be upgraded (updated) to the latest version.
Where do I get the latest version of the firmware?
You can order the latest firmware (as *.UPD files) from your Siemens partner, or download it
from the Siemens Internet homepage:
http://www.siemens.com/automation/service&support
Firmware update using a SIMATIC Micro Memory Card
Table 9-2 Firmware update using a SIMATIC Micro Memory Card
Step Action required: This happens in the CPU:
1. Recommendation
Before you update the CPU firmware, you should create a backup copy of the "old"
firmware on an empty SIMATIC Micro Memory Card. If problems occur during the update,
you can simply reload your old firmware from the SIMATIC Micro Memory Card.
2. Transfer the update files to a blank
SIMATIC Micro Memory Card using
STEP 7 and your programming
device.
-
3. Switch off CPU power and insert a
containing the firmware update.
-
4. Switch on power. The CPU automatically detects the SIMATIC
Micro Memory Card with the firmware update
and runs the update.
All LEDs are lit during firmware update.
The STOP LED flashes when the FW update
is completed, and indicates that the CPU
requires a memory reset.
5. Switch off CPU power and remove a
containing the firmware update.
-

Maintenance
9.3.3 Online (via networks) update of CPU FW V2.2.0 or higher.
To update the firmware, you require the *.UPD files which contain the current firmware
version.
Requirements
Online FW updates can be performed in STEP 7 V5.3 or higher.
The files (*.UPD) containing the current firmware version must be available in the file
system on your PG/PC. A folder may contain only the files of one firmware version.
Performing a firmware update
1. Run STEP 7 and change to HW Config.
2. Open the station containing the CPU you want to update.
3. Select the CPU.
4. Select the PLC> Update firmware command. The menu command can only be executed
if the selected CPU supports the "Update Firmware" function.
5. The Update firmware dialog box opens. Click Browse to select the path to the firmware
update files (*.UPD)
6. After you selected a file, the information in the lower fields of the Update Firmware dialog
box shows you the firmware file and version for the corresponding modules.
7. Click the Run button. STEP 7 verifies that the selected file can be interpreted by the
module, and then downloads the file to the CPU. If this requires changing the operating
state of the CPU, you will be asked to perform these tasks in the relevant dialog boxes.
The CPU then automatically updates the firmware.
8. In STEP 7 (reading the CPU diagnostics buffer), verify that the CPU can start with the
new firmware.
Result
You updated the CPU online with a new firmware version.
Maintenance
9.4 Backup of project data to a Micro Memory Card
9.4 Backup of project data to a Micro Memory Card
Function principles
Using the Save project to Micro Memory Card and Retrieve project from Micro Memory Card
functions, you can save all project data to a SIMATIC Micro Memory Card, and retrieve
these at a later time. The SIMATIC Micro Memory Card can be located in a CPU or in the
Micro Memory Card programming adapter of a PG or PC.
Project data is compressed before it is saved to a SIMATIC Micro Memory Card, and
uncompressed on retrieval.

Note
In addition to project data, you may also have to save your user data to the SIMATIC MMC.
Always select a SIMATIC Micro Memory Card with sufficient memory capacity.
A message warns you of insufficient memory capacity on your SIMATIC Micro Memory Card.

The volume of project data to be saved corresponds with the size of the project's archive file.

Note
For technical reasons, you can only transfer the entire contents (user program and project
data) using the Save project to Micro Memory Card action.

Handling the functions
How you use the Save project to memory card / Retrieve project from memory card functions
depends on the location of the SIMATIC micro memory card:
When the SIMATIC MMC is inserted in the MMC slot, select a project level (for example,
CPU, programs, sources or blocks) which is uniquely assigned to the CPU from the
project window in SIMATIC Manager. Select the PLC > Save project to Memory Card or
PLC > Retrieve project from Memory Card menu command. The program now writes all
configuration data to the SIMATIC Micro Memory Card, or retrieves these data from the
card.
If project data are not available on the currently used programming device (PG/PC) you
can select the source CPU from the "Available nodes" window. Select PLC > Show
available nodes command to open the "Available nodes" window. Select the
connection/CPU that contains your project data on SIMATIC Micro Memory Card. Now
select menu command Retrieve project from Memory Card.
If the SIMATIC MMC is located in the MMC programming unit of a PG or PC, open the
"S7 memory card window" using the File > S7 Memory Card > Open command. Select
the PLC > Save project to Memory Card or PLC > Retrieve project from Memory Card
menu command. to open a dialog in which you can select the source or target project.
Maintenance
9.5 Resetting to the Delivery State

Note
Project data can generate high data traffic. Especially in RUN mode with read/write
access to the CPU, this can lead to waiting periods of several minutes.

Sample application
When you assign more than one member of your service and maintenance department to
perform maintenance tasks on a SIMATIC PLC, it may prove difficult to provide quick access
to current configuration data to each staff member.
However, CPU configuration data available locally on any CPU that is to be serviced can be
accessed by any member of the service department. They can edit these data and then
release the updated version to all other personnel.
Delivery state of the CPU
Default values set at the CPU properties:
Table 9-3 Properties of the CPU in the delivery state
Properties Value
MPI address 2
MPI baud rate 187.5 Kbps
Retentive bit memories, timers and counters All retentive bit memories, timers and counters are
deleted
Retentive range set for bit memories, timers
and counters
Default settings (16 memory bytes, no timers and 8
counters)
Contents of the diagnostics buffer deleted
IP address none
Time 1.1.94 00:00:00
Maintenance
Procedure
Proceed as follows in order to reset a CPU to the delivery state via the mode selector switch:
1. Switch off the supply voltage.
2. Remove the SIMATIC Micro Memory Card from the CPU.
3. Hold the mode selector switch in the MRES setting and switch the supply voltage on
again.
4. Wait until LED lamp image 1 from the subsequent overview is displayed.
5. Release the mode selector switch, set it back to MRES within 3 seconds and hold it in
this position.
6. Wait until LED lamp image 2 from the next overview is displayed.
This lamp image lights up for approximately five seconds, that is for the duration of
RESET. During this period you can abort the resetting procedure by releasing the mode
selector switch.
7. Wait until LED lamp image 3 from the subsequent overview is displayed and release the
mode selector switch again.
The CPU is now reset to the delivery state. It starts without buffering (all LEDs are lit) and
changes to the STOP mode
Lamp images while the CPU is being reset
While you are resetting the CPU to the delivery state, the LEDs light up consecutively in the
following lamp images:
Table 9-4 Lamp images
LED Color Lamp image 1 Lamp image 2 Lamp image 3
STOP Yellow
RUN Green
FRCE Yellow
5 VDC Green
SF Red
BFx Red
= LED lit
= LED dark
= LED flashes at 0.5 Hz
Maintenance
9.6 Module installation / removal
Installation and wiring rules
The table below shows you points to follow when wiring, installing or removing S7-300
modules.

Rules governing ... Power supply ... CPU ... SM/FM/CP
Blade width of the screwdriver 3.5 mm (cylindrical design)
Tightening torque
Fixing modules to the mounting
rail
Connecting cables

from 0.8 N/m to 1.1 N/m



POWER OFF when replacing the ... Yes Yes
S7-300 operating mode when
replacing ...
STOP
Load voltage OFF when replacing
the ...
Yes Yes
Initial situation
The module you want to replace is still mounted and wired. You want to install the same type
of module.

Warning
Disturbances can corrupt data if you insert or remove S7-300 modules while data are being
transferred via the integrated interface of your CPU. You should never replace any modules
of the S7-300 while data traffic is active at an integrated interface. If you are not certain
whether or not data transfer is active on the interface, unplug the connector at the interface
before you replace the module.

Maintenance
Removing the module (SM/FM/CP)
To remove the module:

Step 20-pin front connector 40-pin front connector
1. Switch the CPU to STOP.
2. Switch off the load voltage to the module.
3. Remove the labeling strip from the module.
Unlock the front connector and remove it. 5.
To do so, press down the unlocking
mechanism with one hand and pull out
the front connector at the grips using
the other hand.
Remove the fixing screw from the middle of the
front connector. Pull the front connector out,
holding it at the grips.
6. Undo the module fixing screw(s).
7. Swing the module out.
1
2
3
4

Number Identifier
Remove labeling strips.
Open module.
Press unlocking mechanism/loosen mounting screw, and pull out front connector.
Remove mounting screw of module and swing module out.
Maintenance
Removing the front connector coding from the module
Before you start installing the new module, remove the upper part of the front connector
coding pin from this module.
Reason: This part is already inserted in the wired front connector.

Installing a new module
To install the new module:
1. Hang in a new module of same type.
2. Swivel the module down into place.
3. Screw-tighten the module.
4. Slide the labeling strips into the module.
1
2
3
4

Number Identifier
Hang module onto rail.
Swivel module downward.
Screw-tighten the module
Insert labeling strips.
Maintenance
Removing the front connector coding from the front connector
You may take a "used" front connector to wire another module by removing its coding
mechanism:
Simply use a screwdriver to push out the front connector coding.
This upper part of the coding key must then be plugged back into the old module.
Putting a new module into service
Proceed as follows to put the new module into service:
2. Reinstall the front connector.
3. Close the front panel.
4. Switch the load voltage back on.
5. Reset the CPU to RUN mode.
1
2

Number Identifier
Move the front connector into operating position
Close front panel.
Reaction of the S7-300 after module replacement
After a module replacement, the CPU switches to run mode, provided no error has occurred.
If the CPU stays in STOP you can view the cause of error in STEP 7 (see the Programming
with STEP 7 User manual).
Maintenance
9.7 Digital output module AC 120/230 V: Changing fuses
Fuses for digital outputs
The digital outputs of the following digital output modules are short-circuit protected by fusing
of the channel groups:
Digit output module SM 322; DO 16 A 120 V
Digit output module SM 322; DO 8 120/230 VAC
System check
Eliminate the causes of fuse tripping.
Replacement fuses
If replacement is required, you can use the following fuses:
8 A, 250 V fuse
Wickmann 19 194-8 A
Schurter SP001.013
Littlefuse 217.008
Fuse holder
Wickmann 19 653

Warning
Improper handling of digital output modules could result in injury or damage to
property.
There are dangerous voltages > 25 VAC or > 60 VDC beneath the covers to the right
of the module.
Before you open these covers, make sure that you have either unplugged the front
connector from the module or isolated the module from power.

Warning
Improper handling of front connectors could result in injury or damage to property.
When you remove the front connector while the system is in RUN, beware of
dangerous live voltage > 25 VAC or > 60 VDC across the pins.
If the front connector is wired to such voltages, hot swapping of modules must always
be carried out by skilled or instructed electrical staff, in order to avoid unintentional
contact to the module pins.

Maintenance
Location of fuses in the digital module 120/230 VAC
Digital output modules are equipped with 1 fuse per channel group. The fuses are located at
the left side of the digital output module. The following figure shows you where to find the
fuses on the digital output modules.
1
1

Replacing fuses
The fuses are located at the left side of the module. Replace the fuses as follows:
1. Switch the CPU to STOP.
2. Switch off the load voltage of the digital output module.
3. Remove the front connector from the digital output module.
4. Loosen the fixing screw of the digital output module.
5. Swing out the digital output module.
6. Remove the fuse holder from the digital output module .
7. Replace the fuse.
8. Screw the fuse holder back into the digital output module.
9. Reinstall the digital output module.

Debugging functions, diagnostics and
troubleshooting
10
10.1 Overview
This chapter helps you to get acquainted with tools you can use to carry out the following
tasks:
Hardware/software error diagnostics.
Elimination of hardware/software errors.
Testing the hardware/software for example, during commissioning.

Note
It would go beyond the scope of this manual to provide detailed descriptions of all the
tools you can use for diagnostics, testing and troubleshooting functions. Further notes are
found in the relevant hardware/software manuals.

10.2 Identification and maintenance data of the CPU
Definition and properties
Identification and maintenance data (I&M) is information that is stored in a module for the
purpose of providing you with support when
checking the system configuration
locating modified plant hardware
troubleshooting a plant
Identification data (I data) is information about the module (some of which may be printed on
the module housing) such as the order and serial number. I data represent fixed information
from the manufacturer about the module and are read-only.
Maintenance data (M data) represent system-specific information such as the installation
location. M data is created during configuration and written to the module.
I&M data can be used to identify modules uniquely on the network.
Debugging functions, diagnostics and troubleshooting
Reading and writing I&M data with STEP 7
Read
STEP 7 returns I&M data in "Module status" ("General" and Identification" tab) and in
"Available nodes" (detail view). See the STEP 7 Online Help.
You can read I&M data by calling SFC51 in the user program. Declare the SSL parts list
number and index at the input parameters of SFC51 (see the table below).
CPUs which support reading of I&M data on the "Start page" and "Identification" page
using the web server:

CPU Firmware
CPU 315-2 PN/DP as of V 2.5
Write
You always required STEP 7 HW Config to write M-data of the modules.
Data you can enter in the course of configuration , for example:
Name of the AS (station name)
The station name is assigned in SIMATIC Manager when you create the station. The
program generates a default station, for example, "SIMATIC 300(1)". You can always
change this name.
Data you can enter in STEP 7 HW Config, "CPU properties", "General" tab:
Name of the module
HW Config assigns a default name
Plant ID of the module
No default setting
Location identifier (LID) of a module
No default setting
Reading the I&M data in the user program
In order to read I&M data of the CPU in the user program, define the SSL ID and index and
read the corresponding SSL by calling SFC51. The table below shows the SSL IDs and
associated indexes.
SSL partial lists with I&M data
The I&M data are available in the SSL partial lists at the defined indexes.
Table 10-1 SSL partial lists with I&M data
SSL-ID
W#16#
Index
W#16#
Meaning
Module identification
an identification data record
0001 Identification of the module
The module order number and release version are stored here.
0006 Identification of the basic software
Returns information about the SW version of the module. (These identification data
are identical to index 0001, as a basic software is not available for S7-300 CPUs.)
0111
0007 Identification of the basic firmware
Indicates the firmware version of the module.
Component identification
Component identification
0001 Name of the AS
Returns the name of the AS (station name).
0002 Name of the module
Returns the name of the module.
0003 Plant ID of the module
Returns a unique identifier for the module.
011C
000B Location identifier (LID) of a module
Returns the installation location of the module.
Reference
For detailed information about the structure an content of the SSLs, refer to the System
Software for S7-300/400, System and Standard Functions Manual and to the STEP 7 Online
Help.
I&M data of connected I/O
Information about the I&M data of I/O connected to the CPU is available in the manuals of
the corresponding I/O modules.
10.3 Overview : Test functions
10.3 Overview: Test functions
Determining addressed nodes with "Node flashing test" (for CPUs >= V2.2.0)
To identify the addressed node, select PLC > Diagnostics/Setting > Node/Flashing Test in
STEP 7.
A dialog appears in which you can set the flashing time and start the flashing test. The
directly connected node can be identified by a flashing FORCE LED. The flashing test
cannot be performed if the FORCING function is active.
Debugging functions of the software: Monitoring and controlling tags, stepping mode
STEP 7 offers you the following testing functions you can also use for diagnostics:
Monitoring and controlling tags
Can be used for PG/PC monitoring of specific CPU or user program tags. You can also
assign constant values to the tags.
Testing with program status
You can test your program by viewing the program status of each function (result of
logical links, status bit) or the data of specific registers in real-time mode.
For example, if you have selected the programming language LAD in STEP 7 for your
presentation, the color of the symbol will indicate a closed switch or an active circuit.

Note
The STEP 7 testing function with program status extends the CPU cycle time! In STEP 7
you can customize the maximum permitted increase in cycle time (not for CPU 3182 DP).
In this case, set process mode for the CPU parameters in STEP 7.

stepping mode
When testing in single-step mode, you can process your program instructions in
sequence (= single-step) and set break points. This is only possible in testing mode and
not in process mode.
Debugging functions of the software: Forcing tags
The Force function can be used to assign the tags of a user program or CPU (also: inputs
and outputs) constant values which can not be overwritten by the user program.
For example, you can use it to jumper sensors or switch outputs permanently, irrespective of
the user program.

10.3 Overview : Test functions

Danger
This could result in severe injury or even death, and damage to property.
Incorrect use of the Force function could result in death or severe injury, and damage to
machinery or even the entire plant. Always follow the safety instructions in the STEP 7
manuals.

Danger
Forcing with S7-300 CPUs
The force values in the process image of the inputs can be overwritten by write commands
(such as T IB x, = I x.y, Copy with SFC, etc.) and by read I/O commands (such as L PIW x)
in the user program, or by write PG/OP functions! Outputs initialized with forced values only
return the forced value if not accessed by the user program via peripheral write instructions
(TPQB x, for example) or by PG/OP write functions!
Always ensure that forced values in the I/O process image cannot be overwritten by the
user program or PG/OP functions!

TPAW
Besy
Pll
Transfer
User Program
Force value
PlO
Transfer
Besy
Pll
Transfer
Force value
PlO
Transfer
Overwritten by
T PAW
Force value
Besy Operating system editing
S7-300-CPU forcing corresponds to "cyclical controlling"
Type
Force job
for inputs
Execution
Force job
for inputs
Execution
Force job
for outputs
Execution
Force job
for outputs

Figure 10-1 Principle of forcing in S7-300 CPUs

10.4 Overview: Diagnostics
Differences between forcing and controlling tags
Table 10-2 Differences between forcing and controlling tags
Characteristics/function Forcing Controlling tags
Memory bit (M) - Yes
Timers and counters (T, C) - Yes
Data blocks (DB) - Yes
Inputs and outputs (I, O) Yes Yes
Peripheral inputs (PI) - -
Peripheral outputs (PO) - Yes
User program can overwrite modify/force values Yes Yes
Maximum number of force values 10 -
Power off retentive Yes No
Reference
Details on debugging functions of the software are available in the STEP 7 Online Help and
in the Programming with STEP 7 Manual.
Introduction
System errors can occur especially in the commissioning phase. Tracking these errors might
be a time-consuming effort, since they can occur both on the hardware and software side.
Here, the multitude of testing functions ensures commissioning without problems.

Note
Errors during operation are almost always a result of faults or damage to the hardware.

Type of error
Errors the S7 CPUs can recognize and to which you can react with the help of organization
blocks (OBs) can be split into the following categories:
Synchronous error: Errors you can relate to a specific point in the user program (error
when accessing a peripheral module, for example).
Asynchronous error: Errors you can not relate to a specific point in the user program
(cycle time exceeded, module error, for example).
Troubleshooting
Programming with foresight and, above all, knowledge and proper handling of diagnostic
tools puts you into an advantageous position in error situations:
You can reduce the effects of errors.
It makes it easier for you to locate errors (by programming error OBs, for example).
You can limit downtimes.
Diagnostics with LED display
SIMATIC S7 hardware offers diagnostics with LEDs.
These LEDs are implemented in three colors:

LED color State of CPU
Green Regular operation.
Example: Power is on.
Yellow Non-regular operating status.
Example: Forcing is active.
Red Fault.
Example: Bus error
LED flashing Special event
Example: CPU memory reset
Two LEDs are used for Ethernet:

LED designation Color State Meaning
LINK Green Off No other device is connected with the integrated
PROFINET interface of the CPU.
On Another device (in most cases a switch) is connected to
the integrated PROFINET interface of the CPU, and the
physical connection is in place.
RX/TX Yellow Off No activity:
No data are transferred via the integrated PROFINET
interface of the CPU.
On Activity:
Data are transferred via the integrated PROFINET
interface of the CPU.
Note: The LED flickers when small data volumes are
transferred.

Reference
Notes on diagnostics of I/O modules capable of diagnostics are found in the relevant
Manual.
Diagnostic buffer
If an error occurs, the CPU writes the cause of error to the diagnostic buffer. In STEP 7 you
use the programming device to read the diagnostic buffer. This location holds error
information in plain text.
Other modules capable of diagnostics can be equipped with their own diagnostic buffer. In
STEP 7 (HW Config -> Diagnosing hardware) you can use the programming device to read
this buffer.
Diagnosable modules without diagnostic buffer write their error information to the CPU's
diagnostic buffer.
When an error or an interrupt event occurs, (e.g. time-of-day interrupt), the CPU switches to
STOP mode, or you can react in the user program via error/interrupt OBs. For a diagnostics
interrupt you would call OB82.
Diagnostics of field devices on PROFINET
Further information:
PROFINET System Description System Manual.
From PROFIBUS DP to PROFINET IO Programming Manual
The topics in the next chapters are focused on the diagnostics of local or distributed modules
on PROFIBUS.
Diagnostics with system functions
If the following CPUs are used, we recommend that you use the more user-friendly SFB 54
RALRM (called in diagnostic OB82) to evaluate the diagnostics from centralized or
distributed modules or DP slaves:

CPU As of firmware version
31xC,
312, 314, 315-2 DP
V 2.0.0
315-2 PN/DP V 2.3.0
317-2 DP V 2.1.0
317-2 PN/DP V 2.2.0
319-3 PN/DP V 2.4.0
Further options for diagnostics with system functions are listed below:
Using SFC 51 "RDSYSST" to read an SSL partial list or an extract thereof.
Reading the diagnostic data (slave diagnostics) of a DP slave, using SFC 13
"DPNRM_DG"
Every DP slave provides slave diagnostic data according to EN 50 170 Volume 2,
PROFIBUS. You can use SFC 13 "DPNRM_DG" to read these diagnostic data. Error
information is stored in hex code. Refer to the relevant module manual for information on
the meaning of the read code.
For example, the entry of the value 50H (= dual 0101 0000) in byte 7 of the slave
diagnostics for the distributed I/O module ET 200B indicates a faulty fuse or missing load
voltage in channel group 2 and 3.
Reading data records by calling SFC52 "RDREC"
You can call SFC52 "RDREC" (read record) to read a specific data record from the
addressed module. Data records 0 and 1 are especially suitable for reading diagnostic
information from a diagnosable module.
Data record 0 contains 4 bytes of diagnostic data describing the current state of a signal
module. Data record 1 contains the 4 bytes of diagnostic data also stored in data record
0, plus module-specific diagnostic data.
Reading out the start information of the current OB, using the SFC 6 "RD_SINFO"
Error information is also found in the start information of the relevant error OB.
You can use SFC 6 "RD_SINFO" (read start information) to read the start information of
the OB that was last called and not yet processed completely, and of the start-up OB that
was last called.
Triggering detection of the bus topology in a DP master system with the SFC103
"DP_TOPOL"
The diagnostics repeater improves the ability to locate faulty modules or an interruption
on the DP cable when failures occur in ongoing operation. It operates in slave mode and
is capable of logging faults based on the determination of the DP segment topology.
You can use SFC103 "DP_TOPOL" to trigger the identification of the bus topology of a
DP master system by the diagnostic repeater. The SFCs 103 are described in the
corresponding STEP 7 Online Help and in the System Software S7-300/400, System and
Standard Functions Reference Manual. The diagnostic repeater is described in the
manual Diagnostic Repeater for PROFIBUS DP.
10.5 Diagnostics functions available in STEP 7
10.5 Diagnostics functions available in STEP 7
Diagnostics using the "Diagnosing Hardware" function
Locate the cause of a module error by viewing the online information on the module. You
can locate the cause of an error in the user program cycle with the help of the diagnostic
buffer and of the stack content. You can also check whether a user program will run on a
specific CPU.
Hardware diagnostics give you an overview of the PLC status. In an overview
representation, a symbol can display the error status of every module. A double-click on the
faulty module opens detailed error information. The scope of this information depends on the
specific module. You can view the following information:
Display of general information on the module (e.g. order No., version, designation) and
module status (e.g. error).
Indication of module errors (channel error, for example) at local I/O and PROFIBUS DP
slaves or PROFINET IO devices.
Display of messages from the diagnostic buffer.
In addition, diagnostics data about the PROFINET interface are presented.
For CPUs you can also view the following module status information:
Cause of an error in the user program cycle.
Indication of the cycle time (longest, shortest and last cycle).
Options and utilization of MPI communication.
Indication of performance data (number of possible I/O, memory bits, counters, timers
and blocks).
Diagnostics (network connection, communications diagnostics and statistics, for example)
of the PROFINET interface and of its ports
For details on diagnostic functions in STEP 7 and on procedures, refer to the Programming
with
STEP 7 Manual and to the HW Config Online Help.
10.6 Network infrastructure diagnostics (SNMP)
10.6 Network infrastructure diagnostics (SNMP)
Availability
As an open standard, you can use any SNMP-based systems or software solutions for
diagnostics in PROFINET.
Network diagnostics
protocol. It consists of two network components, similar to the client/server model. The
SNMP manager monitors the network nodes and the SNMP agents collect the various
network-specific information in the individual network nodes and store them in a structured
form in the MIB (Management Information Base). This information allows a network
management system to run detailed network diagnostics.
Detecting the network topology
LLDP (Link Layer Discovery Protocol) is a protocol that is used to detect the closest
neighbors. It enables a device to send information about itself and to save information
received from neighboring devices in the LLDP MIB. This information can be looked up via
the SNMP. This information allows a network management system to determine the network
topology.
Integration into STEP 7
Configuration of the OPC server is integrated into the STEP 7 Hardware Configuration.
Stations from the STEP 7 project that are already configured can be transferred directly. As
an alternative to STEP 7, the configuration can also be run with the NCM PC (included on
the SIMATIC NET CD) or can be determined automatically and transferred to the project
configuration.
A STEP 7 connection is not required for network management with the SNMP protocol.
Use of SNMP in the SIMATIC NET environment
SNMP-capable devices from the SIMATIC NET family can be monitored and operated via a
conventional standard Internet browser. The management system known as web-based
management offers a range of device-specific information (network statistics, status of
redundant supply, for example).
Diagnostics with the SIMATIC NET SNMP OPC server
The SNMP OPC server software provides the diagnostics and parameter assignment for all
SNMP devices. The OPC server uses the SNMP protocol to exchange data with these
devices.
All information can be integrated into OPC-compatible systems, into WinCC HMI system for
example. This enables process and network diagnostics to be combined in the HMI system.
10.7 Diagnostics using status and error LEDs
Uses of SNMP
SNMP can be used as follows:
By users, to integrate network diagnostics into a central HMI/SCADA system using the
SNMP OPC server.
By the IT administrators of machine and plant owners to monitor their Industrial Ethernet
network using standard network management systems.
By the IT administrators, primarily to monitor the office network, and in many cases also
the automation network, using standard network management systems
(for example, HP Openview).
Further Information
Information relating to SNMP in the network management standardization group can be
found at http://www.profinet.com.
Further details about SNMP can be found at http://www.snmp.org.
Further information about the SNMP OPC server can be found at
http://www.siemens.com/snmp-opc-server.
10.7.1 Introduction
Diagnostics with LEDs is an initial tool for error localization. Usually, you evaluate the
diagnostic buffer for further error localization.
The buffer contains plain text information on the error that has occurred. For example, you
will find the number of the appropriate error OB here. You can prevent the CPU from going
into STOP mode by generating this OB and downloading it to the CPU.
10.7.2 Status and error displays of all CPUs
Table 10-3 Status and error displays
LED Meaning
SF 5 VDC FRCE RUN STOP
Off Off Off Off Off CPU power supply missing.
Remedy:
Check whether the power supply module is connected to mains and
switched on.
Off On X (see
the
descripti
on)
Off On The CPU is in STOP mode.
Remedy: Start the CPU.
On On X Off On The CPU is in STOP mode as a result of error.
Remedy: refer to the tables below, evaluation of the SF LED
X On X Off Flashes
(0.5 Hz)
The CPU requests memory reset.
X On X Off Flashes
(2 Hz)
The CPU executes memory reset.
X On X Flashes
(2 Hz)
On The CPU is in startup mode.
X On X Flashes
(0.5 Hz)
On The CPU was halted by a programmed break point.
For details refer to the Programming with STEP 7 Manual.
On On X X X Hardware or software error
Remedy: refer to the tables below, evaluation of the SF LED
X X On X X You enabled the Force function
For details refer to the Programming with STEP 7 Manual.
X X Flashes
(2 Hz)
X X Node flashing test was activated.
Flash
es
Flashes Flashes Flashes Flashes Your CPU has an internal system error. The procedure is as follows:
1. Set the mode selector switch to STOP.
2. Perform POWER ON/OFF.
3. Read the diagnostics buffer with STEP 7.
4. Contact your local SIEMENS partner.
Explanation of the State X:
This status is irrelevant for the current CPU function.
Reference
Details on the OBs and on SFCs required for their evaluation can be found in the STEP 7
Online Help and in the Manual System Software for S7-300/400 - System and Standard
Functions.

10.7.3 Evaluating the SF LED in case of software errors
Table 10-4 Evaluation of the SF LED (Software error)
Possible errors Response of the CPU Remedies
TOD interrupt is enabled and
triggered. However, a matching
block is not loaded.
(Software/configuration error)
Call of OB85.
CPU goes into STOP if
OB85 is not loaded.
Load OB10 (OB number is apparent
from the diagnostic buffer).
Start time of the enabled TOD
interrupt was jumped, e.g. by
advancing the internal clock.
Call of OB80.
goes into STOP if OB80
is not loaded
Disable the TOD interrupt before you
set the time-of-day with SFC 29.
Delay interrupt triggered by
SFC 32. However, a matching
Call of OB85.
OB85 is not loaded.
Load OB 20 or 21 (CPU 317 only) (the
OB number can be viewed in the
diagnostic buffer).
Process interrupt is enabled and
triggered. However, a matching
Call of OB85.
OB85 is not loaded.
Load OB40 (OB number is apparent
from the diagnostic buffer).
Status alarm is generated, but
the appropriate OB55 is not
loaded.
Call of OB85.
OB85 is not loaded.
Load OB55
Update alarm is generated, but
the appropriate OB 56 is not
loaded.
Calls OB85. CPU does
not STOP if OB85 is
loaded.
Load OB56
Vendor-specific alarm is
generated, but the appropriate
OB57 is not loaded.
Call of OB85.
OB85 is not loaded.
Load OB57
Access to missing or defective
module upon updating the
process image (software or
hardware error)
Call OB 85 (depending
on the configuration in
HW Config). CPU goes
into STOP if OB 85 is not
loaded.
Load OB85, the start information of the
OB contains the address of the relevant
module. Replace the relevant module
or eliminate the program error.
The cycle time was exceeded.
Probably too many interrupt
OBs called simultaneously.
Call of OB80.
OB80 is not loaded. The
CPU switches to STOP
despite loaded OB80 if
the doubled cycle time
was exceeded without
retriggering cycle time
80.
Extension of the cycle time (STEP 7
Hardware configuration), changing the
program structure. Remedy: If
necessary, retrigger cycle time
monitoring by calling SFC 43
Programming error
Block not loaded
Wrong block number
Wrong timer/counter number
Read/write access to wrong
area
etc.
not STOP if OB121 is
loaded.
Eliminate the programming error. The
STEP 7 testing function helps you to
locate the error.
Possible errors Response of the CPU Remedies
I/O access errors
An error has occurred when
module data was accessed
not STOP if OB122 is
loaded.
Check module addressing in HW
Config or whether a module/DP slave
has failed.
error, e.g. insufficient length of
the DB for global data
communication.
Call of OB87.
OB87 is not loaded.
Check global data communication in
STEP 7. If required, correct the DB
size.
Tip:
You can use SFC 39 to disable all interrupts and asynchronous error events.

Note
The shorter the selected cyclic interrupt period, the more likely it is that cyclic interrupt
errors will occur. You must take into account the operating system times of the CPU in
question, the user program runtime and extension of the cycle time by active PG
functions, for example.

Reference
Details on the OBs and on the SFCs required for their evaluation are available in the STEP 7
Online Help and in the System Software for S7-300/400 - System and Standard Functions
Reference Manual.

10.7.4 Evaluating the SF LED in case of hardware errors
Table 10-5 Evaluation of the SF LED (Hardware error)
Possible problem CPU reaction Possible remedies
A module was removed or
inserted while the system was
in RUN.
CPU goes into STOP. Screw-tighten the modules and
restart the CPU.
A distributed module was
removed or inserted on
PROFIBUS DP while the
system was in RUN.
Call of OB86.
CPU goes into STOP if OB86 is
not loaded.
When the module is integrated
by means of GSD file:
Call of OB 82. CPU goes into
STOP when OB 82 is not loaded.
Load OB86 or OB82.
A distributed module was
removed or inserted on
PROFINET IO while the
system was in RUN.
Call of OB83.
not loaded.
OB 86 is also called when one or
several modules of an ET 200S
(IO device) are removed or
inserted while the system is in
RUN. CPU switches to STOP if
OB 86 is not loaded.
Load OB 83 and OB 86.
A diagnosable module reports
a diagnostic interrupt.
Call of OB82.
not loaded.
Reaction to the diagnostic event,
based on the module
configuration.
Attempt to access a missing
or faulty module. Loose
connector (software or
hardware error).
Call of OB85, if access was
attempted during update of the
process image (OB 85 call must
be enabled accordingly in the
parameters). Call of OB 122 with
direct I/O access. CPU switches
to STOP if the OB is not loaded.
Load OB 85, the start information
of the OB contains the address of
the relevant module. Replace the
relevant module, tighten the plug
or eliminate the program error.
Faulty SIMATIC MMC. The CPU goes into STOP mode
and requests memory reset.
Replace the SIMATIC MMC, reset
CPU memory, transfer the
program again, then set the CPU
to RUN mode.
Reference
Details on the OBs and on the SFCs required for their evaluation are available in the STEP 7
Online Help and in the System Software for S7-300/400 - System and Standard Functions
Reference Manual.
10.7.5 Status and Error Indicators: CPUs with DP Interface
Description of the BF, BF1 and BF2 LEDs
Table 10-6 LEDs BF, BF1 and BF2
LED Meaning
SF 5 VDC BF BF1 BF2
On On On/ flashes - - PROFIBUS DP interface error.
Remedy: See the table below
On On - On/ flashes X Fault at the second PROFIBUS DP interface of
CPU 317 or CPU 319-3 PN/DP.
On On - X On/ flashes Error on the second PROFIBUS DP interface of the
CPU 317-2 DP or CPU 319-3 PN/DP.
Remedy: See the tables below
Explanation of the State X:
The LED can assume the On or Off state. This status, however, is irrelevant for the current
CPU function. For example, the states Force On or Off do not influence the CPU STOP
status
Table 10-7 BF LED is lit
Bus fault (hardware fault).
DP interface error.
Different transmission rates in
multiple DP master mode.
If the DP slave / master interface is
active: short-circuit on the bus.
With passive DP slave interface:
transmission rate search, i.e. there
are no other active nodes on the
bus (a master, for example)
Call of OB 86 (when CPU is in RUN
mode). CPU switches to STOP if OB
86 is not loaded.
Check the bus cable for short-circuit
or breaks.
Analyze the diagnostic data. Edit
the configuration.

Table 10-8 BF LED flashes
The CPU is DP master:
Failure of a connected station
At least one of the configured
slaves cannot be accessed.
Bad engineering configuration
mode). CPU switches to STOP if OB
86 is not loaded.
Verify that the bus cable is connected
to the CPU, or that the bus is not
interrupted.
Wait until the CPU has completed its
startup. If the LED does not stop
flashing, check the DP slaves or
evaluate the diagnostic data for the DP
slaves.
The CPU is active DP slave
Possible causes:
The response monitoring time has
elapsed.
PROFIBUS DP communication is
down.
Wrong PROFIBUS address.
mode).
CPU switches to STOP if OB 86 is not
loaded.
Check the CPU.
Verify that the bus connector is
properly seated.
Check for breaks in the bus cable to
the DP master.
Check the configuration data and
parameters.
Reference
Details on the OBs and on the SFCs required for their evaluation are available
in the STEP 7 Online Help
in the System Software for S7-300/400, System and Standard Functions Reference
Manual
10.7.6 Status and Error Indicators: CPUs with PROFINET interface for the S7-300
Status and Error Indicators: PROFINET devices

Note
The RX and TX LEDs can also, as with the CPU 319-3 PN/DP, be grouped in one LED. The
LED on this device is located, for example, behind the front cover.

LED status Description of the status LED
Not lit Flashes Lit
X There is no connection between the PROFINET
interface of your PROFINET device and a
communication partner in the Ethernet (a switch, for
example).
X Only with an IO device:
The user activated flashing from STEP 7.
LINK
X The Ethernet connection between the PROFINET
interface of the PROFINET device and the
communication partner is down.
X
(flickers)
At the current time, data are being received from a
communication partner on Ethernet via PROFINET
interface of the PROFINET device.
RX
X No data are currently received via the PROFINET
interface.
LED status Description of the status
X
(flickers)
Data are currently sent to a communication partner on
Ethernet via the PROFINET interface of the PROFINET
device.
TX
X No data are currently transmitted via the PROFINET
interface.
X Error on the PROFINET interface, communication no
longer possible (for example, with a CPU as IO
controller, when the connection to the switch is down)
X Error on the PROFINET interface (for example, due to
station failure of one or more IO devices)
BF2 or
BF3
X No error at the PROFINET interface
Remedy of faults at the PROFINET interface - BF2/ BF3 LED is lit
Table 10-9 BF2 / BF3 LED is lit
Possible problem Reaction based on the
example of a CPU
Possible remedies
Bus fault (no cable connection to a
subnet/switch)
Wrong transmission speed
Full duplex mode not set
Call of OB 86 (when CPU is
in RUN mode). CPU
switches to STOP if OB 86
is not loaded.
Check the bus cable for a short-circuit or
break.
Check that the module is connected to a
switch and not to a hub.
Check that data are being transmitted at 100
Mbps and in full duplex mode.
Analyze the diagnostic data. Edit the
configuration.
Remedy of faults at the PROFINET interface of an IO controller - BF2 / BF3 LED flashes
Table 10-10 BF2 / BF3 LED flashes at a PROFINET IO controller
Possible problem Reaction based on the
example of a CPU
Possible remedies
Failure of a connected IO device
At least one of the assigned IO
devices cannot be addressed
Call of OB 86 (when CPU is
in RUN mode).
CPU switches to STOP if
OB 86 is not loaded.
Check that the Ethernet cable is connected to
the module or whether the bus is interrupted.
Wait until the CPU has completed its startup. If
the LED does not stop flashing, check the IO
devices or evaluate its diagnostic information.
Verify that the configured device name
matches its actually assigned name.
10.7.7 Status and Error Indicators: PROFINET IO Devices
Remedy with faults at the PROFINET interface of an IO Device - BF LED flashes
Table 10-11 BF LED flashes on a PROFINET IO device
Possible problem Possible Remedies
The IP address is incorrect
Bad parameter assignment
IO controller not found / switched off, but
there is an Ethernet connection.
Bad or no device name
The response monitoring time has elapsed.
Check that the Ethernet cable is correctly
connected.
Check whether the Ethernet cable to the
controller is interrupted.
Check the configuration data and parameters.
On the IO device: Switch on the IO controller.
Check whether the expected configuration
matches the actual configuration.
Check the physical communication
connection for interruption
Tip: Identification of the PROFINET device in the cubicle
When they are first commissioned, PROFINET IO devices must be assigned a device name.
In STEP 7/HW Config, you can make the LINK LED of a PROFINET IO device you are
naming flash usingPLC > Ethernet > Assign Device Name. This allows you, for example, to
clearly identify a PROFINET IO device among several identical devices in a control cabinet.
10.8 Diagnostics of DP CPUs
10.8.1 Diagnostics of DP CPUs operating as DP Master
Evaluate diagnostics in the user program
The figure below illustrates the procedure for evaluating diagnostics data in the user
program.
Diagnostics event
OB 82 is called
Read OB82_MDL_ADDR and
read OB82_lO_FLAG
(=lD of l/O module)
Enter bit 0 of OB82_lO_FLAG as bit
15
in OB82_MDL_ADDR.
Result: Diagnostic address
For diagnostics of the entire
DP slave:
Call SFB13
at parameter LADDR, enter the
diagnostics address
"OB82_MDL_ADDR*"
Note:
SFC13 is an asynchronous block, that is,
it may be called several times
before it changes to BUSY=0 state.
lnitial call in OB82,
Final processing in the cycle
For diagnostics of relevant components:
Call SFB 54
Set Mode=1
Diagnostics data are entered at the
TlNFO and AlNFO parameters
For diagnostics of relevant modules:
Call SFB51
at parameter lNDEX, enter
"OB82_MDL_ADDR*"
Enter lD W#16#00B3 at parameter SSL_lD
(=diagnostics data of a module)
Evaluation with SFB54
(simplest option)
Evaluation with
SFC13 or SFC51

Diagnostic addresses for DP masters and DP slaves
At a CPU 31x-2, you assign diagnostic addresses for PROFIBUS DP. Verify in your
configuration that the DP diagnostic addresses are assigned once to the DP master and
once to the DP slave.
PROFlBUS
Diagnostic address
CPU 31x-2 as transmitter CPU 31x-2 as receiver

Description of the DP master
configuration
Description of the DP slave
configuration
When you configure the DP master, assign two
different diagnostic addresses for an intelligent
slave, that is, one diagnostic address for slot 0,
and one for slot 2. Functions of those two
addresses:
The diagnostic address for slot 0 reports in
the master all events relating to the entire
slave (station representative), for example,
node failure.
The diagnostic address for slot 2 is used to
report events concerning this slot. For
example, if the CPU is acting as an intelligent
slave, it returns the diagnostic interrupts for
operating state transitions.
Hereinafter, these diagnostic addresses are
referred to as assigned to the DP master.
These diagnostic addresses are used by the DP
master to obtain information about the status of
DP slave, or about bus interruptions.
When you configure the DP slave, you also
assign it a diagnostic address (in the associated
DP slave project).
Below, this diagnostic address is labeled
assigned to DP slave.
This diagnostic addresses is used by the DP
slave to obtain information on the status of the
DP master, or on bus interruptions.
Event detection
The table below shows how a CPU 31x-2 operating as DP master detects operating mode
transitions of a CPU operating as DP slave, or data exchange interruptions.
Table 10-12 Event detection of CPU 31x2 operating as DP master
Event What happens in the DP master?
Bus interrupt (short-
circuit, connector
removed)
Call of OB 86 with the message Station failure (incoming event;
diagnostic address of Slot 0 of the DP slave that is assigned to the
DP master)
with I/O access: call of OB 122 (I/O access error)
DP slave: RUN STOP Call of OB 82 with the message Module error
(incoming event; diagnostic address of Slot 2 of the DP slave that is
assigned to the DP master; Variable OB82_MDL_STOP=1)
DP slave: RUN STOP Call of OB 82 with the message Module OK
(outgoing event; diagnostic address of Slot 2 of the DP slave that is
assigned to the DP master; Variable OB82_MDL_STOP=0)
Evaluation in the user program
The table below shows how you can, for example, evaluate RUN to STOP transitions of the
DP slave in the DP master.
Table 10-13 Evaluating RUN to STOP transitions of the DP slave in the DP master
In the DP master In the DP slave (CPU 31x-2 DP)
Diagnostic addresses: (Example)
Master diagnostic address =1023
Slave diagnostic address =1022
(Slot 0 of slave)
(Diagnostic) address for "Slot 2"=1021
(Slot 2 of slave)
Diagnostic addresses: (Example)
Master diagnostic address = irrelevant
The CPU calls OB82 with the following information:
OB82_MDL_ADDR:=1021
OB82_EV_CLASS:=B#16#39 (incoming event)
OB82_MDL_DEFECT: = Module error
Tip: The CPU diagnostic buffer also contains this
information
In the user program you should also include SFC
13 "DPNRM_DG" for reading out DP slave
diagnostic data.
CPU: RUN -> STOP
The CPU generates a DP slave diagnostics
message frame

10.8.2 Reading out slave diagnostic data
The slave diagnostic data is compliant with EN 50170, Volume 2, PROFIBUS. Depending on
the DP master, diagnostic data for all DP slaves conforming to standard can be read with
STEP 7.
Diagnostic addresses for the receiving station with direct data exchange
For direct data exchange, you assign a diagnostic address in the receiving station:
PROFlBUS
Diagnostic address

Figure 10-2 PROFIBUS DP diagnostics address
In this figure, you see that assign a diagnostic address to the receiving station in your
configuration. The receiving station receives information about the status of the transmitting
station or about a bus interruption by means of this diagnostic address.
Reading out the diagnostic data
The table below shows you how the various DP master systems can read diagnostic
information from a slave.
Table 10-14 Reading out diagnostic data in the master system, using STEP 5 and STEP 7
Automation system with DP
master
Blocks or registers in STEP
7
Application Further Information
SIMATIC S7/M7 "DP Slave Diagnostics" tab Output of slave diagnostic
data in plain text to a STEP 7
user interface
Found under the keyword
Hardware diagnostics in the
STEP 7 Online Help and in
the Programming with STEP
7 Manual
SFB 54 "RALRM" Reading additional interrupt
information from a DP slave
or local module from the
relevant OB.
System and Standard
Functions Reference Manual
SFC13 "DP NRM_DG" Reading out slave
diagnostics
(store in the data area of the
user program)
System and Standard
SFC 51 "RDSYSST" Reading SSL sublists. In the
diagnostic interrupt, call SFC
51 with the SSL ID
W#16#00B4, and then read
out the SSL of the slave
CPU.
System and Standard
SFB 52
RDREC andSFC 59
RDREC
Reading the data records of
S7 diagnostics (stored in the
data area of the user
program)
System and Standard
FB 125/FC 125 Evaluating slave diagnostic
data
On the Internet under
http://www.siemens.com/aut
omation/csi_en_WW7Produc
t under the entry ID. 387 257
SIMATIC S5 with IM 308-C
operating in DP master
mode
FB 192 "IM308C" Reading slave diagnostic
data (store in the data area
of the user program)
Distributed I/O System ET
200 Manual
Example for reading the slave diagnosis with FB 192 "IM308C"
This shows you an example of how to use FB 192 in the STEP 5 user program to read out
slave diagnostics data for a DP slave.
Assumptions regarding the STEP 5 user program
For this STEP 5 user program it is assumed that:
The IM 308-C operating in DP master mode uses the page frames 0 to 15 (number 0 of
IM 308-C).
The DP slave is assigned PROFIBUS address 3.
Slave diagnostics data should be stored in DB 20. You may also use any other DB.
Slave diagnostics data consist of 26 bytes.
STEP 5 user program

STL Explanation
:A DB 30
:SPA FB 192
Name :IM308C
DPAD : KH F800
IMST : KY 0, 3
FCT : KC SD
GCGR : KM 0
TYP : KY 0, 20
STAD : KF +1
LENG : KF 26
ERR : DW 0

//Default address area of IM 308-C
//IM no. = 0, PROFIBUS address of the DP slave = 3
//function: Read slave diagnostics
//not evaluated
//S5 data area: DB 20
//Diagnostic data starting at data word 1
//Length of diagnostic data = 26 bytes
//Error code storage in DW 0 of DB 30
Example of reading out S7 diagnostic data with SFC 59 "RD REC"
Here you will find an example of how to use SFC 59 in the STEP 7 user program to read S7
diagnostics data records for a DP slave. The process of reading the slave diagnostics is
similar to SFC 13.
Assumptions regarding the STEP 7 user program
Exceptions for this STEP 7 user program:
Diagnostic data for the input module at address 200H is to be read.
Data record 1 is to be read out.
Data record 1 is to be stored in DB 10.
STEP 7 user program

STL Explanation
CALL SFC 59

REQ :=TRUE
IOID :=B#16#54
LADDR :=W#16#200
RECNUM :=B#16#1
RET_VAL :=MW2
BUSY :=MO.0
RECORD :=P# DB10.DBX 0.0 BYTE 240

//Request to read
//Identifier of the address area, here the I/O input
//Logical address of the module
//Data record 1 is to be read
//An error code is output if an error occurs
//Read operation not finished
//DB 10 is target area for the read data record 1
Note:
Data is only returned to the target area if BUSY is reset to 0 and if no negative RET_VAL has
occurred.
Diagnostic addresses
At a CPU 31x-2, you assign diagnostic addresses for PROFIBUS DP. Verify in your
configuration that the DP diagnostic addresses are assigned once to the DP master and
once to the DP slave.
PROFlBUS
Diagnostic address

Figure 10-3 PROFIBUS DP diagnostics address

Description of the DP master
configuration
Description of the DP slave
configuration
When you configure the DP master, assign two
different diagnostic addresses for an intelligent
slave, that is, one diagnostic address for slot 0,
and one for slot 2. Functions of those two
addresses:
The diagnostics address for slot 0 reports in
the master all events relating to the entire
slave (station representative), for example,
node failure.
The diagnostics address for slot 2 is used to
report events concerning this slot. For
example, if the CPU is acting as an intelligent
slave, it returns the diagnostic interrupts for
operating state transitions.
From now on, these diagnostic addresses are
referred to as assigned to the DP master.
These diagnostic addresses are used by the DP
master to obtain information about the status of of
DP slave, or about bus interruptions.
When you configure the DP slave, you also
assign it a diagnostic address (in the associated
DP slave project).
Below, this diagnostic address is labeled
assigned to DP slave.
This diagnostic addresses is used by the DP
slave to obtain information on the status of the
DP master, or on bus interruptions.
Event recognition
The table below shows how CPU 31x-2 operating as DP slave recognized operating state
transitions or data exchange interruptions.
Table 10-15 Event recognition of CPUs 31x-2 operating in DP slave mode
Event What happens in the DP slave?
Bus interruption (short circuit,
connector removed)
Calls OB86 with the message Station failure (incoming event;
diagnostic address of the DP slave, assigned to the DP slave)
With I/O access: call of OB 122 (I/O access error)
DP master RUN STOP Calls OB82 with the message Module error (incoming event;
diagnostic address of the DP slave assigned to the DP slave;
tag OB82_MDL_STOP=1)
DP master STOP RUN Call of OB82 with the message Module OK. (outgoing event;
diagnostic address of the DP slave, assigned to the DP slave;
tag OB82_MDL_STOP=0)
Evaluation in the user program
The table below shows an example of you how you can evaluate RUN-STOP transitions of
the DP master in the DP slave (see also the previous table).
Table 10-16 Evaluating RUNSTOP transitions in the DP Master/DP Slave
In the DP master In the DP slave
Diagnostics addresses: (Example)
Master diagnostic address =1023
Slave diagnostic address in the master
system=1022
(Slot 0 of slave)
(Diagnostic) address for "Slot 2"=1021
(Slot 2 of slave)
Diagnostics addresses: (Example)
Master diagnostic address = irrelevant
CPU: RUN STOP The CPU calls OB 82 with the following
information, for example:
OB82_MDL_ADDR:=422
OB82_EV_CLASS:=B#16#39 (incoming event)
OB82_MDL_DEFECT:=module malfunction
Tip: The CPU diagnostic buffer also contains this
information

10.8.3 Interrupts on the DP Master
Interrupts with S7 DP master
Process interrupts from an intelligent slave with SFC 7
In the CPU 31x-2 operating in DP slave mode, you can trigger a user-defined process
interrupt from the DP master from the user program.
A call of SFC 7 "DP_PRAL" triggers the execution of OB 40 in the user program on the DP
master. The SFC 7 allows you to forward interrupt information to the DP master in a double
word. This information can then be evaluated in the OB40_POINT_ADDR variable in the
OB40. The interrupt information can be programmed user-specific. For a detailed description
of SFC 7 "DP_PRAL", refer to the System Software for S7-300/400 - System and Standard
Functions Reference Manual.
Setting user-defined interrupts of Intelligent Slaves using SFB 75
In the CPU 31x-2 operating in DP slave mode, you can trigger user-defined interrupts from
the user program in the DP master. SFB 75 "SALRM" is used to send a process or
diagnostic interrupt from a slot in the transfer area (virtual slot) to the associated DP master
from the user program on an intelligent slave. This starts the associated OB on the DP
master.
Additional interrupt-specific information may be included. You can read this additional
information in the DP master using SFB 54 "RALRM."
Interrupts with another DP master
When CPU 31x-2 operates with another DP master, an image of these interrupts is created
in its device-specific diagnostic data. You have to post-process the relevant diagnostic
events in the DP master's user program.

Note
In order to allow the evaluation of diagnostics and process interrupts by means of device-
specific diagnostics using a different DP master, please note that:

The DP master should be able to save the diagnostics messages to its ring buffer. For
example, if the DP master can not save the diagnostic messages, only the last incoming
diagnostic message would be saved.

In your user program, you have to poll the relevant bits in the device-specific diagnostic data
in cyclic intervals. Make allowances for the PROFIBUS DP bus cycle time, for example, to be
able to poll these bits at least once and in synchronism to the bus cycle time.

With an IM 308-C operating in DP master mode, you cannot utilize process interrupts in
device-specific diagnostics, because only incoming events are reported, rather than outgoing
events.

10.8.4 Structure of the slave diagnostic data when the CPU is operated as intelligent
slave
Syntax of the diagnostics datagram for slave diagnostics

Station states1to3
Master PROFlBUS address
High byte
Low byte
Manufacturer lD
lD-specific diagnostics
(The length depends on the number of
configured address areas in transfer memory
1)
Module status (device-specific diagnostics)
(The length depends on the number of configured
address areas)
lnterrupt status (device-specific diagnostics)
(The length depends on the type of
interrupt)
1 Exception: lf configuration data from the DP master is incorrect the DP slave interprets 35 configured address spaces
(46H in byte 6)
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
to
to
to
Byte x -1
Byte x
Byte y-1
Byte y
Byte z

Figure 10-4 Structure of slave diagnostic data
Station Status 1
Table 10-17 Structure of station status 1 (Byte 0)
Bit Meaning Remedy
0 1: DP slave cannot be addressed by DP master. Is the correct DP address set on the DP slave?
Is the bus connector in place?
Does the DP slave have power?
Correct configuration of the RS485 Repeater?
Perform a reset on the DP slave.
1 1: DP slave is not ready for data exchange. Wait for the slave to complete start-up.
2 1: Configuration data sent by DP master to the DP slave is
inconsistent with slave configuration.
Was the software set for the correct station type or
DP slave configuration?
3 1: Diagnostic interrupt, generated by a STOP to RUN
transition on the CPU or by the SFB 75
0: Diagnostic interrupt, generated by a STOP to RUN
transition on the CPU or by the SFB 75
You can read the diagnostic data.
4 1: Function not supported; e.g. changing the DP address at
software level
Check configuration data.
5 0: The bit is always "0". -
6 1: DP slave type inconsistent with software configuration. Was the software set for the right station type?
(parameter assignment error)
7 1: DP slave was configured by a DP master other than the
master currently accessing the slave.
The bit is always 1 if, for example, you are
currently accessing the DP slave via PG or a
different DP master.
The DP address of the parameter assignment master
is in the "master PROFIBUS address" diagnostic byte.
Station Status 2
Bit Meaning
0 1: The DP slave requires new parameters and configuration.
1 1: A diagnostic message was received. The DP slave cannot resume operation until the error has been cleared
(static diagnostic message).
2 1: This bit is always "1" if a DP slave exists with this DP address.
3 1: The watchdog monitor is enabled on this DP slave.
4 1: DP slave has received control command "FREEZE".
5 1: DP slave has received control command "SYNC".
6 0:The bit is always set to "0".
7 1: DP slave is disabled, that is, it has been excluded from cyclic processing.
Station Status 3
Bit Meaning
0 to 6 0: These bits are always "0"
7 1:The incoming diagnostic messages exceed the memory capacity of the DP slave.
The DP master cannot write all diagnostic messages sent by the DP slave to its diagnostic buffer.
Master PROFIBUS address
The "Master PROFIBUS address" diagnostic byte stores the DP address of the DP master:
that has configured the DP slave and
has read and write access to the DP slave.
Table 10-20 Structure of the Master PROFIBUS address (byte 3)
Bit Meaning
DP address of the DP master that has configured the DP slave and has read/write access to that DP slave. 0 to 7
FFH: DP slave was not configured by a DP master
Manufacturer ID
The vendor ID contains a code specifying the type of the DP slave.
Table 10-21 Structure of the manufacturer ID (byte 4 and 5)
Byte 4 Byte 5 Vendor ID for the CPU
80H D0H 313C-2-DP
80H D1H 314C-2-DP
80H EEH 315-2 DP
81H 17H 315-2 PN/DP
80H F0H 317-2 DP
80H F1H 317-2 PN/DP
81H 1DH 319-3 PN/DP
Structure of identifier-related diagnostics of CPU 31x-2 / CPU 319-3
Module diagnostics indicate the configured address area of intermediate memory that has
received an entry.
7 6 5 4 3 2 1 0
0 1
0 0 0 0 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
Bit
Bit
Bit
Bit
Bit
Bit
Length of the identifier-related diagnostic data incl. Byte 6 (depending on
the number of configured address areas up to 6 bytes)
Entry for 2nd configured address area
Entry for 3rd configured address area
Entry for 4th configured address area
Entry for 6th to 13th configured address area
Entry for 31st configured address area
Preset configuration Actual configuration
Code for lD-related diagnostics
Entry for 1st configured address area
Entry for 14th to 21st configured address area
Entry for 22nd to 29th configured address area
Entry for 32nd configured address area
Preset configuration Actual configuration or slave CPU in STOP
Preset configuration Actual configuration
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11

Figure 10-5 Identifier-related diagnostic data
Structure of the module status
The module status reflects the status of the configured address areas, and provides detailed
ID-specific diagnostics with respect to the configuration. Module status starts with module
diagnostics and consists of a maximum of 13 bytes.
2
H
=
x
x+1
x+2
x+3
x+4
x+5
x+6
y-1
0 0
0 0
1 0 0 0 0 0 1 0
00
B
:

01
B
:

10
B
:

11
B
:
.
.
.
. .
.
.
.
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
0
H
0
H
0 0
0 0
Bit
Bit
Bit
Bit
Bit
Bit
1. Configured address area
Status type: Module status
always "0"
always "0"

Length of the module status incl. Byte x (= max. 13 bytes)
Code for device-specific diagnostics
Module status
Code for status message
CPU slot
Module OK;
Valid data
Module faults;
lnvalid data
(Module defective)
lncorrect module;
lnvalid data
No module
lnvalid data
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte

Figure 10-6 Structure of the module status for CPU 31xC
Structure of the interrupt status:
The interrupt status of module diagnostics provides details on a DP slave. Device-specific
diagnostics starts at byte y and has a maximum length of 20 bytes.
The following figure describes the structure and content of the bytes for a configured address
area of transfer memory.
.
.
.
y+1
y+4
y+7
y
y+3
z
y+2
0 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0
.
.
.
2
4...35
00

01

10
11

=02
H
=04
H
=05
H
Bit
Bit
Diagnostics or interrupt data
Length of the device-related diagnostics incl. Byte y
(max. 20 byte)
Code for device-related diagnostics
01H: Code for diagnostic interrupt
02H: Code for process interrupt
Slot no.
O
n
l
y

d
i
a
g
n
o
s
t
i
c

i
n
t
e
r
r
u
p
t
Example for Byte y+2:
CPU:
1. Address area:
2. Address area:
etc.
Byte
Byte
Byte
Byte
Byte
Byte
Byte
CPU
Number of the
transfer memory
No additional information
for the diagnostic status
lncoming diagnostic
(at least one error is pending)
Going diagnosis
Going diagnosis
Varying fault
exists

Figure 10-7 Device-specific diagnostics
Structure of the interrupt data for a process interrupt (from byte y+4)
When a process interrupt occurs (code 02H for process interrupt in byte y+1), 4 bytes of
interrupt information after byte y+4 are transferred. These 4 bytes are transferred to the
intelligent slave using SFC 7 "DP_PRAL" or SFC 75 "SALRM" when the process interrupt for
the master was generated.
Structure of the interrupt data when a diagnostic interrupt is generated in response to an operating
status change by the intelligent slave (after byte y+4)
Byte y+1 contains the code for a diagnostic interrupt (01H). The diagnostic data contains the
16 bytes of status information from the CPU. The figure below shows the allocation of the
first four bytes of diagnostic data. The next 12 bytes are always 0.
The data in these bytes correspond to the contents of data record 0 of diagnostic data in
STEP 7 (in this case, not all bits are used).
y+7
y+6
y+5
y+4
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0
0 0 0 0 1 0 1 1
0 0 0 0 0
0 0 0 0 0 0 0 0
0:
1:
0:
1:
0 0
Bit
Bit
Bit
Bit
RUN mode
STOP mode
ldentification for address areas of the
transfer memory (constant)
Module OK
Module fault
Note: Byte y+8 to Byte y+19 are always 0.
Byte
Byte
Byte
Byte

Figure 10-8 Bytes y+4 to y+7 for a diagnostic interrupt (operating status change by intelligent slave)
Structure of the interrupt data when a diagnostic interrupt is generated by SFB 75 on the intelligent
slave (after byte y+4)
.
.
.
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
0
Bit
Bit
Bit
Bit
Bit
0: Module OK
01: Module fault
Observe the application
description for SFB75
Note that these diagnostics data
have a fixed meaning in the
S7 context.
For further information refer to
the STEP 7 online help or to the
System software for S7-300/400
reference manual, system and -
standard functions, Diagnostic Data
chapter
Byte y+7
Byte y+6
Byte y+5
Byte y+4
Byte y+19

Figure 10-9 Bytes y+4 to y+19 for the diagnostics interrupt (SFB75)
10.9 Diagnostics of PROFINET CPUs
10.9.1 Diagnostics options of PROFINET IO
Diagnostics Concept
PROFINET IO supports you with an integrated diagnostics concept.
The diagnostics concept of PROFINET IO is similar to that of PROFIBUS DP.
The diagnostics functions allow you
to react to an error (event-related diagnostics, evaluation of interrupts) or
to check the current status of the AS (status-related diagnostics).
Overview of diagnostics information
You have three options of obtaining diagnostics information:
1. Diagnostics using status LEDs

Diagnostics option Benefits For detailed information refer ...
LEDs on a PROFINET interface The LED displays indicate:
whether data are being sent or received
communication error.
this manual,
chapter: Status and Error Indicators:
CPUs with PROFINET interface for the
S7-300
2. Diagnostics using the STEP 7 and NCM PC configuration and engineering tool

Online diagnostics using a
PG/PC/HMI
This allows you to evaluate the current
status of your automation system.
the System Manual: PROFINET
System Description,
chapter: Support by STEP 7/NCM PC
Reporting system errors Diagnostic information is output in plain text
format to the PC / HMI.
System Description,
chapter: Support by STEP 7/NCM PC
Network diagnostics The SNMP protocol allows you to
determine the network infrastructure
this manual,
chapter: Network infrastructure
diagnostics (SNMP)
3. Diagnostics in the STEP 7 user program

Reading system status lists (SSLs) The SSLs will help you to track down an
error.
System Description,
chapter: Evaluation of Diagnostics in
the User Program
Reference manual: System software for
S7-300/400 System and Standard
Functions
Reading diagnostics data records You can obtain detailed information about
the type and source of faults by reading the
diagnostic data records.
System Description,
the User Program
Diagnostics interrupt Can be used to evaluate diagnostics data in
the user program.
System Description,
the User Program
Evaluation of diagnostics information
PROFINET IO supports a vendor-independent structure of data records with diagnostics
information. Diagnostics information is only generated for faulty channels.
The SSLs, SFB54 and SFB52 were enhanced in order to include information about the
status of the PROFINET IO systems and the diagnostics information for an S7 user program:
Call SFC51 (read system status lists) to read module status information of the PROFINET
IO system from SSL 0x0X91.
Call SFB52 (read data record) to read status-related diagnostics data records directly
from a faulty module.
Status-related diagnostics data represent error information, for example.
Call SFB54 (read additional interrupt info) in the corresponding error OB to read event-
related diagnostics data records from a module.
Event-related diagnostics data represent interrupt information of the error OBs, for
example.
Further Information
Further information about diagnostics and diagnostics data, on the structure of diagnostics
data records and on SSLs for PROFINET is available in:
the From PROFIBUS DP to PROFINET IO Programming Manual
the PROFINET System Description System Manual
the System Software for S7-300/400, System and Standard Functions Reference Manual
in the STEP 7 Online Help
10.9.2 Maintenance
Enhanced maintenance concept
PROFINET devices support the comprehensive diagnostics and maintenance concept
according to the IEC 61158-6-10 standard.
In addition to "ok" and "faulty" information, the PROFINET components can also display
information for preventive maintenance when operating with STEP 7 V5.4 Servicepack 1 or
higher.
Preventive maintenance is displayed, for example, if the attenuation of a fiber optic cable
deteriorates.
Maintenance information
Maintenance information returns maintenance priorities. The concept distinguishes between
maintenance information based on two levels:
Maintenance request, identified by a yellow wrench icon in STEP 7:
Maintenance recommended
Maintenance requirement, identified by an orange wrench icon in STEP 7:
Maintenance required
Further Information
Further information is available in:
1. the From PROFIBUS DP to PROFINET IO Programming Manual
2. the PROFINET System Description System Manual
3. in the STEP 7 Online Help
See also
Diagnostics options of PROFINET IO (Page 10-39)

11
Introduction
Contents of general technical data:
standards and test values satisfied by modules of the S7-300 automation system
test criteria of S7-300 modules.
CE Label

The S7-300 automation system satisfies requirements and safety-related objectives
according to EC Directives listed below, and conforms with the harmonized European
standards (EN) for programmable controllers announced in the Official Journals of the
European Community:
73/23/EEC "Electrical Equipment Designed for Use within Certain Voltage Limits" (Low-
Voltage Directive)
89/336/EEC "Electromagnetic Compatibility" (EMC Directive)
94/9/EC "Equipment and protective systems intended for use in potentially explosive
atmospheres" (Explosion Protection Directive)
The EC declaration of conformity is held on file available to competent authorities at:
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Automation & Drives
A&D AS RD ST PLC
PO Box 1963
D-92209 Amberg
UL approval

CSA approval

Canadian Standards Association to
C22.2 No. 142 (Process Control Equipment)
or

or
HAZ. LOC.

UL 1604 (Hazardous Location)
CSA-213 (Hazardous Location)
APPROVED for use in
Class I, Division 2, Group A, B, C, D Tx;
Note
Currently valid approvals can be found on the rating plate of the relevant module.

FM approval

Factory Mutual Research (FM) to
Approval Standard Class Number 3611, 3600, 3810
APPROVED for use in Class I, Division 2, Group A, B, C, D Tx;

to EN 60079-15:2003 (Electrical apparatus for potentially explosive atmospheres; Type of
protection "n")
II 3 G EEx nA II Parts 4..6
Tick-mark for Australia

The S7-300 automation system satisfies requirements of standards to
AS/NZS 2064 (Class A).
IEC 61131
The S7-300 automation system satisfies requirements and criteria to
IEC 61131-2 (Programmable Controllers, Part 2: Equipment requirements and tests).
Marine approval
Classification societies:
ABS (American Bureau of Shipping)
BV (Bureau Veritas)
DNV (Det Norske Veritas)
GL (Germanischer Lloyd)
LRS (Lloyds Register of Shipping)
Class NK (Nippon Kaiji Kyokai)
Use in industrial environments
SIMATIC products are designed for industrial applications.
Table 11-1 Use in industrial environments
Field of
application
Noise emission requirements Noise immunity requirements
Industry EN 61000-6-4: 2001 EN 61000-6-2: 2001
Use in residential areas
To operate an S7-300 in a residential area, it's RF emission must comply with Limit Value
Class B to EN 55011.
The following measures are recommended to ensure the interference complies with limit
value class B:
S7-300 installation in grounded switch cabinets / cubicles
Use of noise filters in the supply lines

Warning
Personal injury and damage to property may occur.
In potentially explosive environments, there is a risk of injury or damage if you disconnect
any connectors while the S7-300 is in operation.
Always isolate the S7-300 operated in such areas before you disconnect and connectors.

Definition
Electromagnetic compatibility (EMC) is the ability of an electrical installation to function
satisfactorily in its electromagnetic environment without interfering with that environment.
The S7-300 modules also satisfy requirements of EMC legislation for the European domestic
market. Compliance of the S7-300 system with specifications and directives on electric
design is prerequisite.
Pulseshaped disturbance
The table below shows the EMC compatibility of S7 modules in areas subject to pulse-
shaped disturbance.

Pulse-shaped disturbance Test voltage corresponds with degree
of severity
Electrostatic discharge
to IEC 61000-4-2
Air discharge: 8 kV
Contact discharge 4 kV
3
2
Burst pulses (high-speed
transient disturbance)
to IEC 61000-4-4.
2 kV (power supply lines)
2 kV (signal lines > 3 m)
1 kV (signal lines < 3 m)
3
3
High-energy single pulse (surge) to IEC 61000-4-5
External protective circuit required
(refer to S7-300 Automation System, Hardware and Installation, Chapter
"Lightning and overvoltage protection")
asymmetric coupling 2 kV (power supply lines)
DC with protective elements
symmetric coupling 1 kV (power supply lines) DC with
protective elements

3
Additional measures
When connecting an S7-300 system to the public network, always ensure compliance with
Limit Value Class B to EN 55022.
Sinusoidal disturbance
The table below shows the EMC compatibility of S7-300 modules in areas subject to
sinusoidal disturbance.

Sinusoidal disturbance Test values corresponds with
degree of severity
RF radiation
(electromagnetic fields)
to IEC 61000-4-3
10 V/m, with 80% amplitude modulation of
1 kHz in the 80 MHz to 1000 MHz range
10 V/m, with 50% pulse modulation at
900 MHz

3
RF conductance on cables
and cable shielding
to IEC 61000-4-6
Test voltage 10 V, with 80% amplitude
modulation of 1 kHz in the 9 MHz to 80 MHz
range

3
Emission of radio interference
Electromagnetic interference to EN 55011: Limit Class A, Group 1 (measured at a distance
of 10 m.)

230 MHz to 1000 MHz < 47 dB (V/m)Q

Noise emission via AC mains to EN 55011: Limit value class A, Group 1.

0.15 MHz to 0.5 MHz < 79 dB (V/m)Q
< 66 dB (V/m)M
0.5 MHz to 5 MHz < 73 dB (V/m)Q
< 60 dB (V/m)M
< 60 dB (V/m)M

Introduction
The shipping and storage conditions of S7-300 modules surpass requirements to IEC 61131-
2. The data below apply to modules shipped or put on shelf in their original packing.
The modules are compliant with climatic conditions to IEC 60721-3-3, Class 3K7 (storage),
and with IEC 60721-3-2, Class 2K4 (shipping.)
Mechanical conditions are compliant with IEC 60721-3-2, Class 2M2.
Shipping and storage conditions for modules

Type of condition Permissible range
Free fall (in shipping package) 1 m
Temperature - 40 C to + 70 C
Barometric pressure 1080 hPa to 660 hPa (corresponds with an altitude
of -1000 m to 3500 m)
Relative humidity 10% to 95%, no condensation
Sinusoidal oscillation to
IEC 60068-2-6
5 Hz to 9 Hz: 3.5 mm
9 Hz to 150 Hz: 9.8 m/s
2

Shock to IEC 60068-2-29 250 m/s
2
, 6 ms, 1000 shocks
Operating conditions
S7-300 systems are designed for stationary use in weather-proof locations. The operating
conditions surpass requirements to DIN IEC 60721-3-3.
Class 3M3 (mechanical requirements)
Class 3K3 (climatic requirements)
Use with additional measures
The S7-300 may not be used under the conditions outlined below without taking additional
measures:
at locations with a high degree of ionizing radiation
in aggressive environments caused, for example, by
the development of dust
corrosive vapors or gases
strong electric or magnetic fields
in installations requiring special monitoring, for example
elevators
electrical plants in potentially hazardous areas
An additional measure could be an installation of the S7-300 in a cabinet or housing.
Mechanical environmental conditions
The table below shows the mechanical environmental conditions in the form of sinusoidal
oscillations.

Frequency band Continuous Infrequently
10 Hz f 58 Hz 0.0375 mm amplitude 0.75 mm amplitude
58 Hz f 150 Hz 0.5 g constant acceleration 1 g constant acceleration

Reducing vibrations
If your S7-300 modules are exposed to severe shock or vibration, take appropriate measures
to reduce acceleration or the amplitude.
We recommend the installation of the S7-300 on damping materials (for example, rubber-
bonded-to-metal mounting.)
Test of mechanical environmental conditions
The table below provides important information with respect to the type and scope of the test
of ambient mechanical conditions.

Condition tested Test Standard Comment
Vibration Vibration test to IEC
60068-2-6 (sinusoidal)
Type of oscillation: Frequency sweeps with a rate of change of 1
octave/minute.
10 Hz f 58 Hz, constant amplitude 0.075 mm
58 Hz f 150 Hz, constant acceleration 1 g
Duration of oscillation: 10 frequency sweeps per axis at each of three
Shock Shock, tested to
IEC 60068-2-27
Direction of shock: 3 shocks in each direction (+/-) at each of three
Continuous shock Shock, tested to
IEC 60068-2-29
Shock direction: 1000 shocks in each direction (+/-) at each of three
Climatic environmental conditions
The S7-300 may be operated on following environmental conditions:

Environmental conditions Permissible range Comments
Temperature:
horizontal mounting position:
vertical mounting position:

0C to 60C
0C to 40C

Relative humidity 10 % to 95 % No condensation, corresponds to relative
humidity (RH) Class 2 to IEC 61131, Part 2
Barometric pressure 1080 hPa to 795 hPa Corresponds with an altitude of -1000 m to
2000 m
Concentration of pollutants SO2: < 0.5 ppm;
H2S: < 0.1 ppm;
Test: 10 ppm; 4 days

Test: 1 ppm; 4 days

11.5 Specification of dielectric tests, protection class, degree of protection, and rated voltage of S7-300
11.5 Specification of dielectric tests, protection class, degree of protection,
and rated voltage of S7-300
Test voltage
Proof of dielectric strength must be provided in the type test at a test voltage to IEC 61131-2:

Circuits with rated voltage Ve to other circuits
or ground.
Test voltage
< 50 V 500 VDC
< 150 V 2500 VDC
< 250 V 4000 VDC
Protection class
Protection class I to IEC 60536, i.e., a protective conductor must be connected to the
mounting rail!
Protection against the ingress of foreign matter and water
Degree of protection IP 20 to IEC 60529, i.e., protection against contact with standard
probes.
No protection against the ingress of water.
Rated operating voltages
The S7-300 modules operate at different rated voltages. The table shows the rated voltages
and corresponding tolerances.

Rated voltages Tolerance
24 VDC 20.4 VDC to 28.8 VDC

Operating Instructions, 12/2006, A5E00105492-07 A-1
Appendix
A
A.1 General rules and regulations for S7-300 operation
Introduction
Seeing that an S7-300 can be used in many different ways, we can only describe the basic
rules for the electrical installation in this document.

Warning
Always observe these basic rules for electrical installation in order to achieve a fully
functional S7-300 system.

EMERGENCY-OFF equipment
EMERGENCY-OFF equipment to IEC 204 (corresponds to VDE 113) must remain effective
in all operating modes of the plant or system.
System startup after specific events
The table below shows what you have to observe when restarting a plant after specific
events.
Table A-1 System startup after specific events
If there is... then ...
Restart following a voltage dip or power failure, dangerous operating states must be excluded. If
necessary, force EMERGENCY-OFF.
Startup after releasing the EMERGENCY OFF
device,
uncontrolled or undefined startup operations must
be excluded.
Appendix
A.1 General rules and regulations for S7-300 operation
A-2 Operating Instructions, 12/2006, A5E00105492-07
Mains voltage
The table below shows what you have to watch with respect to the mains voltage.
Table A-2 Mains voltage
In the case of ... the ...
Stationary systems or systems without all-pole
mains disconnect switch
building installation must contain a mains
disconnect switch or a fuse.
Load power supplies, power supply modules set rated voltage range must correspond to local
mains voltage.
All circuits of the S7-300 rated mains voltage fluctuation / deviation must
lie within the permitted tolerance (refer to
Technical Data of S7-300 modules).
24 VDC power supply
The table below shows what you must observe for the 24 VDC power supply.
Table A-3 Protection against external electrical interference
In the case of ... you need to observe ...
Buildings external lightning protection
24 VDC power supply cables, signal
cables
internal lightning protection
Install lightning protection
(e.g. lightning conductors).
24 VDC power supply safe (electrical) extra-low voltage isolation
Protection against external electrical interference
The table below shows how you must protect your system against electrical interference or
faults.
Table A-4 Protection against external electrical interference
In the case of ... Make sure that ...
All plants or system in which the S7-300 is
installed
the plant or system is connected to a protective
conductor for the discharge of electromagnetic
interference.
Supply / signal / bus cables the cable routing and installation is correct.
Signal and bus cables a cable/conductor break does not cause
undefined plant or system states.

Appendix
A.2 Protection against electromagnetic interference
A.2.1 Basic Points for EMC-compliant system installations
Definition: EMC
EMC (electromagnetic compatibility) describes the capability of electrical equipment to
operate free of errors in a given electromagnetic environment, without being subject to
external influence and without influencing external devices in any way.
Introduction
Although your S7-300 and its components are developed for an industrial environment and
high electromagnetic compatibility, you should draw up an EMC installation plan before you
install the controller taking into consideration all possible sources of interference.
Possible interferences
Electromagnetic interference can influence a PLC in various ways:
Electromagnetic fields having a direct influence on the system
Interference coupling caused by bus signals (PROFIBUS DP etc.)
Interference coupling via the system wiring
Interference influencing the system via the power supply and/or protective ground
The figure below shows the likely paths of electromagnetic interference.
PS CPU SM SM SM SM SM SM SM SM
Electromagnetic
fields
Bus signal Process wiring
Protective
earth
Power supply
module

Appendix
Coupling mechanisms
Depending on the emitting media (line or isolated) and the distance between the interference
source and the device, four different coupling mechanisms can influence the PLC.
Table A-5 Coupling mechanisms
Coupling
mechanisms
Cause Typical interference sources
Electrical coupling Electrical or mechanical coupling
always occurs when two circuits
use one common cable.
Clocked devices (influence on the
network due to converters and third-
party power supply modules)
Starting motors
Potential differences on component
enclosures with common power supply
Static discharge
Capacitive coupling Capacitive or electrical coupling
occurs between conductors
connected to different potentials.
The coupling effect is
proportional to voltage change
over time.
Interference coupling due to parallel
routing of signal cables
Static discharge of the operator
Contactors
Inductive coupling Inductive or magnetic coupling
occurs between two current
circuit loops. Current flow in
magnetic fields induces
interference voltages. The
coupling effect is proportional to
current change over time.
Transformers, motors, arc welding
devices
Power supply cables routed in
parallelism
Switched cable current
High-frequency signal cable
Coils without suppression circuit
Radio frequency
coupling
Radio frequency coupling occurs
when an electromagnetic wave
reaches a conductor system. This
wave coupling induces currents
and voltages.
Neighboring transmitters (e.g. radio
phones)
Sparking (spark plugs, collectors of
electrical motors, welding devices)

Appendix
A.2.2 Five basic rules for securing EMC
A.2.2.1 1. Basic rule for ensuring EMC
If you comply with theses five basic rules ...
you can ensure EMC in many cases!
Rule 1: Large area grounding contact
When you install the automation equipment, make sure that the surfaces of inactive metal
parts are properly bonded to chassis ground.
Bond all passive metal parts to chassis ground, ensuring large area and low-impedance
contact.
When using screw connections on varnished or anodized metal parts, support contact
with special contact washers or remove the protective insulating finish on the points of
contact.
Wherever possible, avoid the use of aluminum parts for ground bonding. Aluminum
oxidizes very easily and is therefore less suitable for ground bonding.
Create a central connection between chassis ground and the equipotential
grounded/protective conductor system.
Rule 2: Proper cable routing
Always ensure proper cable routing when wiring your system.
Sort your wiring system into groups (high-voltage/power supply/signal/data cables).
Always route high-voltage, signal or data cables through separated ducts or in separate
bundles.
Install the signal and data cables as close as possible to grounded surfaces (e.g.
supporting beans, metal rails, steel cabinet walls ).
See also
Cable routing inside buildings (Page A-16)
Outdoor routing of cables (Page A-18)
Appendix
Rule 3: Fixing the cable shielding
Ensure proper fixation of the cable shielding.
Always use shielded data cable. Always connect both ends of the shielding to ground on
a large area.
Analog cables must always be shielded. For the transmission of low-amplitude signals it
might prove to be more efficient to have only one side of the shielding connected to
ground.
Directly behind the cable entry in the cabinet or enclosure, terminate the shielding on a
large area of the shielding/protective ground bar and fasten it with the help of a cable
clamp. Then, route the cable to the module; however, do not connect the shielding once
again to ground in this place.
Connections between the shielding/protective ground conductor bar and the
cabinet/enclosure must be of a low impedance.
Always install shielded data cables in metal/metallized connector housings.
See also
Cable shielding (Page A-12)
Rule 4: Special EMC measures
Take special EMC measures for particular applications.
Connect anti-surge elements to all inductive devices not controlled by S7-300 modules.
For cabinet or cubicle lighting in the immediate range of your controller, use incandescent
lamps or interference suppressed fluorescent lamps.
See also
How to protect digital output modules against inductive surge voltage (Page A-28)
Appendix
Rule 5: Homogeneous reference potential
Create a homogeneous reference potential and ground electrical equipment whenever
possible (refer to the section on Equipotential bonding).
Route your equipotential conductors over a wide area if potential differences exist or are
expected between your system components.
Make sure you carefully direct your grounding measures. Grounding measures protect
the controller and its functions.
Form a star circuit to connect the equipment in your system and the cabinets containing
central/expansion units to the grounding/protective conductor system. This prevents the
formation of ground loops.
See also
Equipotential bonding (Page A-14)
A.2.3 EMC-compliant installation of automation systems
Introduction
Quite often it is the case that interference suppression measures are not taken until
corruption of user signals is detected after the controller is actually in operation.
Frequently, the causes of such interference are found in inadequate reference potentials as
a result of faulty installation. This section shows you how to avoid such errors.
Inactive metal parts
Inactive parts are referred to as electrically conductive elements, separated from active
elements by a basic insulating and only subject to electrical potential if an error occurs.
Installation and ground bonding of inactive metal parts
Bond all inactive metal parts to a large-surface ground when you install the S7-300. Proper
ground bonding ensures a homogeneous reference potential for the controller and reduces
the effect of interference coupling.
The ground connection establishes an electrically conductive interconnection of all inactive
parts. The sum of all interconnected inactive parts is referred to as chassis ground.
This chassis ground must never develop a hazardous potential even if a fault occurs.
Therefore, chassis ground must be connected to the protective conductor using cables with
an adequate conductor cross-section. To avoid ground loops, physically separate chassis
ground elements (cabinets, parts of the building construction or machine) must be bonded to
the protective conductor system in a star circuit.
Appendix
Observe the following for ground connection:
In the same way as with active elements, exercise meticulous care to interconnect
inactive metal elements.
Always make sure that you have a low-impedance interconnection between metal
elements (e.g. large and highly conductive contact surface).
The protective insulating finish on varnished or anodized metal elements must be pierced
or removed. Use special contact washers or completely remove the finish on the point of
contact.
Protect your connecting elements against corrosion (e.g. with a suitable grease).
Interconnect moving chassis ground elements (e.g. cabinet doors) with flexible ground
straps. Always use short ground straps with a large surface (the surface is decisive for
the diversion of high-frequency currents).
Appendix
A.2.4 Examples of an EMC-compliant installation: Cabinet configuration
Cabinet configuration
The figure below shows a cabinet installation with the measures described above (bonding
of inactive metal parts to chassis ground and connecting the cable shielding to ground). This
sample applies only to grounded operation. Note the points in the figure when you install
your system.
1 2 3
4
5
7
8
6

Figure A-1 Example of an EMC compatible cabinet installation
Appendix
Key to installation
The numbers in the following list refer to the numbers in the figure above.

Number Identifier Explanation
Ground straps If no large-surface metal-to-metal connections are
available, you must either interconnect inactive metal parts
(e.g. cabinet doors or mounting plates) or bond them to
chassis ground using ground straps. Use short ground
straps with a large surface.
Supporting bars Interconnect the supporting bars on a large area to the
cabinet walls (metal-to-metal connection).
Mounting the rail The mounting bar and rack must be interconnected with
large-area metal-to-metal connections.
Signal cables Connect the shielding of signal cables on a large area of
the protective conductor/additional shielding conductor bar
and fasten them with cable clamps.
Cable clamp The cable clamp must cover a large area of the shielding
braid and ensure good contact.
Shielding conductor bar Interconnect the shielding conductor bar on a large
surface with the supporting bars (metal-to-metal
connection). The cable shielding is terminated on the
conductor bar.
Protective ground bar Interconnect the protective conductor bar on a large
surface with the supporting bars (metal-to-metal
connection). Interconnect the grounding busbar with the
protective ground system, using a separate cable
(minimum cross-section 10
2
).
Cable to the protective
ground system
(equipotential ground)
Interconnect the cable on a large area with the protective
ground system (equipotential ground).

A.2.5 Examples of an EMC-compliant installation: Wall mounting
Wall mounting
When operating your S7 in a low-noise environment that conform with permitted ambient
conditions (see Appendix Ambient conditions), you can also mount your S7 in frames or to
the wall.
Interference coupling must be diverted to large metal surfaces. Therefore, always mount
standard profile/shielding/protective conductor rails on metal parts of the construction. Steel
sheet panels reference potential surfaces have been found especially suitable for wall-
mounting.
Provide a shielding conductor bar for connecting your cable shielding. This shielding
conductor bar can also be used as protective ground bar.
Appendix
Reference for ambient conditions
For information on ambient conditions, refer to the S7-300 Automation System, Module data
Reference Manual.
Please note
When mounting on varnished or anodized metal parts, use special contact washers or
remove the insulating layers.
Provide a large-surface and low-impedance metal-to-metal connection for fastening the
shielding/protective protective ground bar.
Always touch-protect live mains conductors.
The figure below shows an example of EMC compatible wall-mounting of an S7.

Appendix
A.2.6 Cable shielding
Purpose of the shielding
A cable is shielded to attenuate the effects of magnetic, electrical and electromagnetic
interference on the cable.
Operating principle
Interference currents on cable shielding is diverted to ground conductive interconnection
between the shielding and the cabinet. To avoid interference as a result of these currents, it
is imperative to provide a low-impedance connection to the protective conductor.
Suitable cables
Whenever possible, use cables equipped with a shielding braid. Shielding density should be
at least 80%. Avoid cables with film shielding, because the film can be easily damaged by
tensile or pressure stress, thus reducing its shielding effect.
Appendix
Handling of the shielding
Note the following points on handling the shielding:
Always use metal clamps to mount shielding braid. The clamps must contact a large area
of the shielding and provide appropriate contact force.
Directly behind the cabinet's cable entry, terminate the shielding on a shielding bus.
Then, route the cable to the module; however, do not connect the shielding once again to
ground in this place.
In installations outside of cabinets (e.g. for wall-mounting) you can also terminate the
shielding on a cable duct.
The figure below shows some options for mounting shielded cables, using cable clamps.

See also
Terminating shielded cables on the shielding contact element (Page 6-12)
Appendix
A.2.7 Equipotential bonding
Potential differences
Potential differences can occur between separate system elements. This can result in high
equipotential currents, e.g. if the cable shielding is terminated at both ends and grounded to
different system components.
The cause of potential difference can be differences in the power supplies.

Warning
Cable shielding is not suitable for equipotential bonding. Always use the prescribed cables
(e.g. with a cross-section of 16 mm
2
). When installing MPI/DP networks, provide a sufficient
conductor cross-section. Otherwise, interface hardware might get damaged or even be
destroyed.

Appendix
Equipotential bonding conductor
To reduce potential differences and ensure proper functioning of your electronic equipment,
you must install equipotential bonding conductors.
Note the following points on the use of equipotential bonding conductors:
The lower the impedance of an equipotential bonding conductor, the more effective is
equipotential bonding.
When shielded signal cables interconnect two system components and the shielding is
connected on both ends to ground/protective conductors, the impedance of the additional
equipotential bonding conductor must not exceed 10% of the shielding impedance.
Determine the cross-section of your equipotential bonding conductor on the basis of the
maximum equalizing current that will flow through it. The equipotential bonding conductor
cross-section that has proven best in practice is 16 mm
2
.
Always use equipotential bonding conductors made of copper or galvanized steel. Always
connect the cables on a large surface to the equipotential conductor bar/protective
conductor and protect it against corrosion.
Route your equipotential bonding conductor to minimize the area between the
equipotential bonding conductor and signal lines as far as possible (see the figure below).

Appendix
A.2.8 Cable routing inside buildings
Introduction
Inside buildings (inside and outside cabinets), clearances must be maintained between
groups of different cables to achieve the necessary electromagnetic compatibility (EMC).
The table contains information on the general rules governing clearances to enable you to
choose the right cables.
How to read the table
To find out how to run two cables of different types, proceed as follows:
1. Look up the type of the first cable in column 1 (Cables for ...).
2. Look up the type of the second cable in the corresponding field in column 2 (and cables
for ...).
3. Note the applicable directives in column 3 (Run ...).
Table A-6 Cable routing inside buildings
Cables for ... and cables for ... Run ...
Bus signals, shielded (PROFIBUS)
Data signals, shielded
(programming devices, operator
panels, printers, counter inputs,
etc.)
Analog signals, shielded
DC voltage ( 60 V), unshielded
Process signals ( 25 V), shielded
AC voltage ( 25 V), unshielded
Monitors (coaxial cable)
In common bundles or cable ducts
DC voltage (> 60 V and 400 V),
unshielded
AC voltage (> 25 V and 400 V),
unshielded
In separate bundles or cable ducts (no
minimum clearance necessary)
etc.)
DC and AC voltage (> 400 V),
unshielded
Inside cabinets:
Outside cabinets:
On separate cable racks with a
clearance of at least 10 cm
Appendix
Cables for ... and cables for ... Run ...
etc.)
unshielded
unshielded
unshielded
unshielded
unshielded
Inside cabinets:
Outside cabinets:
etc.)
Inside cabinets:
Outside cabinets:
unshielded
unshielded
ETHERNET In common bundles or cable ducts ETHERNET
Others In separate bundles or cable ducts with
a clearance of at least 50 cm

Appendix
A.2.9 Outdoor routing of cables
Rules for EMC-compliant cable routing
The same EMC-compliant rules apply both to indoor and outdoor routing of cables. The
following also applies:
Running cables on metal cable trays.
Electrical connection of the joints of cable trays/ducts.
Ground the cable carriers.
If necessary, provide adequate equipotential bonding between connected devices.
Take the necessary (internal and external) lightning protection and grounding measures
in as far as they are applicable to your particular application.
Rules for lightning protection outside buildings
Run your cables either:
in metal conduits grounded at both ends, or
in concrete cable ducts with continuous end-to-end armoring.
Overvoltage protection equipment
An individual appraisal of the entire plant is necessary before any lightning protection
measures are taken.
Appendix
A.3 Lightning and surge voltage protection
A.3.1 Overview
We show you solutions for the protection of your S7-300 against damage as a result of surge
voltage.
Failures are very often the result of surge voltage caused by:
Atmospheric discharge or
Electrostatic discharge.
We will begin by showing you what the theory of surge protection is based on: the lightning
protection zone concept
At the end of this section, you will find rules for the transition points between individual
lightning protection zones.

Note
This section can only provide information on the protection of a PLC against surge voltage.
However, complete surge protection is guaranteed only if the whole surrounding building is
designed to provide protection against overvoltage. This applies especially to constructional
measures for the building at the planning stage.
If you wish to obtain detailed information on surge protection, we therefore recommend you
contact your Siemens partner or a company specialized in lightning protection.

A.3.2 Lightning protection zone concept
Principle of the lightning protection zone concept to DIN EN 62305-4 (VDE 0185-305-4)
The principle of the lightning protection zone concept states that the volume to be protected
against overvoltage, for example, a manufacturing hall, is subdivided into lightning protection
zones in accordance with EMC directives (see Figure ).
The various lightning protection zones (LPZ: Lightning Protection Zone) are formed by:

Lightning protection of the building exterior (field side) Lightning Protection Zone 0
Shielding
Buildings
Rooms and/or
Devices

Lightning Protection Zone 1
Appendix
Effects of the Lightning Strike
Direct lightning strikes occur in lightning protection zone 0. Lightning strike generates high-
energy electromagnetic fields which can be reduced or eliminated from one lightning
protection zone to the next by suitable lightning protection elements/measures.
Overvoltage
In lightning protection zones 1 and higher, a lightning strike might additionally cause
overvoltage as a result of switching operations, coupling etc.
Scheme of the lightning protection zones of a building
The figure below shows a block diagram of the lightning protection zone concept for a
detached building.
Conductive
connection
lT cable
lnternal
cable
Metal
part
Lightning protection
equipotential bonding
Local
equipotential bonding
Building shielding
(steel armor)
Room shielding
Device shielding
(metal enclosure)
Non-
electrical
cable
(metallic)
(steel armor)
Power
cable
External
lightning
protection
Lightning Protection Zone 0 (field end)
Lightning Protection
Zone 2
Lightning
Protection
Zone 3
Device

Appendix
Principle of the transition points between lightning protection zones
At the transitions points between lightning protection zones, you must take measures to
prevent surges being conducted downstream.
The principle of a lightning protection zone also requires that at the transition points between
the lightning protection zones, all cables and piping capable of carrying lightning current (!)
must be included in the equipotential bonding system.
Metallic lines include:
the piping (for example, of water, gas and heat)
Power cables (for example, mains voltage, 24 V supply)
Data cables (for example, bus cable).
A.3.3 Rules for the transition point between lightning protection zones 0 <-> 1
Rules for transition point 0 <-> 1 (lightning protection equipotential bonding)
The following measures are suitable for lightning protection equipotential bonding at the
transition between lightning protection zones 0 <-> 1:
Use grounded, spiraled, current-conducting metal straps or metal braiding as a cable
shield at both ends, for example, NYCY or A2Y(K)Y.
Install cables in one of the following media:
in continuous metal pipes that are grounded at both ends, or
in continuously armored concrete ducts or
on closed metal cable trays grounded at both ends.
use fiber-optic cables instead of metal conductors.
Appendix
Additional measures
If you cannot take measures as described above, you must install a lightning conductor
(Type 1) at the 0 <-> 1 transition point. The table below contains the components you can
use for the so-called lightning protection equipotential bonding (0->1) of your plant.
Table A-7 Lightning conductor (Type 1) of cables with the help of surge protection equipment
Seq.
No.
Cables for ... ... at transition point 0 <-> 1
install:
Order no.
without FM*
Order no. with
FM*
3-phase TN-C system 1 piece DEHNbloc DV TNC 255
phase L1/L2/L3 to PEN
951 300 951 305
3-phase TN-S system 1 piece DEHNbloc DV M 255 (FM)
phase L1/L2/L3 to PE
951 400 951 405
3-phase TT system 1 piece DEHNbloc DV M TT 255 (FM)
phase L1/L2/L3 to N
951 310 951 315
AC TN system 1 piece DEHNbloc DV M TN 255 (FM)
phase L1 + N to PE
951 200 951 205
1
AC TT system 1 piece DEHNbloc DV M TT 2P 255 (FM)
phase to N and PE
951 110 951 115
2 24 VDC power supply 1 piece Blitzductor VT
Type AD 24 V -
918 402 -
3 MPI bus cable, RS485,
RS232 (V.24)
1 piece Surge arresters Blitzductor XT
Type BXT ML4 B 180
920 300 and
920 310
-
4 Inputs/outputs of 24 V digital
modules
DEHNrail DR M 2P 953 206 -
5 Inputs/outputs of digital
modules and 120/230 VAC
power supply
2 pieces Lightning current arrester DEHNbloc
Maxi DBM 1 255 L
900 026 -
6 Inputs/outputs of analog
modules up to 12 V +/-
1 piece Surge arresters Blitzductor XT
Type BXT ML4 B 180
920 300 and
920 310
-

* You can order these components directly from:
DEHN + SHNE GmbH + Co. KG
Hans-Dehn-Str. 1
92318 Neumarkt
Germany
Appendix
A.3.4 Rules for the transition point between lightning protection zones 1 <-> 2 and
higher
Rules for 1 <-> 2 transition points and higher (local equipotential bonding)
The following measures must be taken on all transition points 1 <-> 2 and higher:
Set up local equipotential bonding at each subsequent lightning protection zone transition
points.
Include all lines (also metal conduits, for example) in the local equipotential bonding of all
subsequent lightning protection zone transition points.
Include all metal installations located within the lightning protection zone in the local
equipotential bonding (for example, metal part within lightning protection zone 2 at
transition 1 <-> 2).
Additional measures
We recommend fine-wire fusing for following elements:
All 1 <-> 2 and greater lightning protection zone transitions
All cables that run within a lightning protection zone and are longer than 100 m
Lightning protection element for the 24 VDC power supply module.
Always use the Blitzductor VT, type AD 24 V SIMATIC for the 24 VDC power supply module
of the S7-300. All other surge protection components do not meet the required tolerance
range of 20.4 V to 28.8 V of the S7-300 power supply.
Lightning Conductor for Signal Modules
You can use standard surge protection components for the digital I/O modules. However,
please note that these only permit a maximum of 26.8 V for a rated voltage of 24 VDC. If the
tolerance of your 24 VDC power supply is higher, use surge protection components with 30
VDC rating.
You can also use Blitzductor VT, type AD 24 V. Note that input current can increase if
negative input voltages are generated.
Appendix
Low-voltage protection elements for 1 <-> 2
For the transition points between lightning protection zones 1 <-> 2 we recommend the
surge protection components listed in the table below. This low-voltage protection must be
used in S7-300 for CE compliance.
Table A-8 Surge-protection components for lightning protection zones 1 <-> 2
Seq.
No.
Cables for ... ... equip transition point
1 <-> 2 with:
Order no.
without FM*
Order no. with
FM*
3-phase TN-C system 1 piece Surge arrester DG M TNC 275 952 300 952 305
3-phase TN-S system 1 piece Surge arrester DG M TNS 275 952 400 952 405
3-phase TT system 1 piece Surge arrester DG M TT 275 952 310 952 315
AC TN system 1 piece Surge arrester DG M TN 275 952 200 952 205
1
AC TT system 1 piece Surge arrester DG M TT 2P 275 952 110 952 115
2 24 VDC power supply 1 piece Blitzductor VT, Type AD 24 V 918 402 -
Bus cable
MPI/DP RS485 Blitzductor CT surge arrester,
Type MD/HF
919 506 and
919 570
-
3
RS232 (V.24) 1 piece Combination arrester
Blitzductor XT type BTX ML4
BE12
920 300 and
920 322
-
Industrial Ethernet 1 piece DEHN Patch 929 100 -
4 Inputs of digital modules
DC 24 V
1 piece Suppressor circuit
Type DCO RK E 24
919 988 -
5 Outputs of digital modules 24
V
1 piece Low-voltage protection
type DCO RK D 5 24
919 986 -
Inputs/outputs of digital
modules
2 pieces Surge arrester -
120 VAC DEHNguard S 150 952 072 952 092
6
230 VAC DEHNguard S 275 952 070 952 090
7 Inputs of analog modules up
to 12 V +/-
1 piece Combination arrester
Blitzductor XT type BXT ML4 BD12
920 300 and
920 342
-
* Please order these components directly from:
Hans-Dehn-Str. 1
92318 Neumarkt
Germany
Appendix
Low-voltage protection elements for 2 <-> 3
For the transition points between lightning protection zones 2 <-> 3 we recommend the
surge protection components listed in the table below. This low-voltage protection must be
used in S7-300 for CE compliance.
Table A-9 Surge-protection components for lightning protection zones 2 <-> 3
Seq.
No.
Cables for ... ... equip transition point
2 <-> 3 with:
Order No.
3-phase TN-C system 1 piece Surge arrester DG M TNC 275 FM 952 305
3-phase TN-S system 1 piece Surge arrester DG M TNS 275 FM 952 405
3-phase TT system 1 piece Surge arrester DG M TT 275 FM 952 315
AC TN system 2 pieces Surge arrester DG M TN 275 FM 952 205
1
AC TT system 1 piece Surge arrester DG M TT 2P 275 FM 952 115
2 24 VDC power supply 1 piece Blitzductor VT, Type AD 24 V 918 402*
Bus cable
MPI, RS485 Blitzductor CT surge arrester,
Type MD/HF
919 506* and
919 570*
3
RS232 (V.24) 1 piece Per cable pair
suppressor circuit DCO RK E 12

919 987
Inputs of digital modules
24 VDC 1 piece Low-voltage surge protection
Type DCO RK E 24, on insulated rail
919 988*
2 pieces Surge arrester
120 VAC DEHNrail M 2P 150 FM 953 209*
4
230 VAC DEHNrail M 2P 255 FM 953 205*
5 Outputs of digital modules 24 V 1 piece Low-voltage protection DCO RK D 5
24
919 986
6 Outputs of analog modules up to
12 V +/-
1 piece Low-voltage surge protection
Type DCO RK E 12, on insulated rail
connected with M- of the power
supply for the modules.
919 987*

Hans-Dehn-Str. 1
92318 Neumarkt
Germany
Appendix
A.3.5 Example: Surge protection circuit for networked S7-300 PLCs
The sample in the figure below shows you how install an effective surge protection for two
networked S7-300 PLCs:
MPl MPl
PE PE
CPU SV SM
CPU SV SM
4
5
3
6
4
5
4
4
3
3
1
2 2
6
7
L1
L2
L3
N
PE
10 mm2 10 mm2
Lightning Protection Zone 0, field end
Control cabinet 1
Control cabinet 2
Lightning Protection Zone 2 Lightning Protection Zone 2

Appendix
Key
The table below explains consecutive numbers in the figure above:
Table A-10 Example of a circuit conforming to lightning protection requirements (legend to previous figure)
Seq.
No.
Component Meaning
1 Lightning arrester, depending on the mains system, for
example, a TN-S system:
1 item DEHNbloc DV M TNS 255 (FM)
Order no. without FM: 951 400*
Order no. with FM: 951 405*
Protection against direct lightning strike and surge
voltage as of transition 0 <-> 1
2 Surge arresters,
2 items DEHNguard DG M TN 275 FM
Order no.: 952 205*
Surge protection at transition 1 <-> 2
3 Surge arrester,
Blitzductor CT type MD/HF
Order no.: 919 506* and 919 570*
Surge protection for RS485 interfaces at transition
1 <-> 2
4 Digital input modules:
DCO RK E 24 Order no.: 919 988
Digital output modules: DCO RK D 5 24 Order no.: 919 986
Analog modules:
Blitzductor XT,
Order no.: 920 300 and 920 342
Surge protection of signal module I/O at transition
1 <-> 2
5 Bus cable shielding mounting device with EMC spring clamp
on the basic unit of Blitzductor CT, order no.: 919 508*
Discharge of interference current
6 Cable for equipotential bonding: 16 mm Standardization of reference potentials
7 Blitzductor XT for building transitions;
Order no.: 920 300* and 920 310*
High-voltage surge protection for RS485
interfaces at transition 0 <->1
Hans-Dehn-Str. 1
92318 Neumarkt
Germany
Appendix
A.3.6 How to protect digital output modules against inductive surge voltage
Inductive surge voltage
Overvoltage occurs when inductive devices are switched off. Examples are relay coils and
contactors.
Integrated surge arrester
S7-300 digital output modules are equipped with an integrated surge arrester.
Additional overvoltage protection
Inductive devices require additional surge arresters only in following cases:
If SIMATIC output circuits can be switched off by additionally installed contacts (e.g. relay
contacts).
If the inductive loads are not controlled by SIMATIC modules

Note: Request information on relevant surge protection rating from the supplier of inductive
devices.
Example: EMERGENCY-OFF relay contact in the output circuit
The figures illustrates an output circuit requiring additional overvoltage protectors.
CPU PS SM SM SM SM SM SM
Contact in output circuit
lnductance requires
protective circuit

Refer also to the rest of the information in this section.
Appendix
Circuit for coils operated with DC voltage
The figure below shows DC-operated coils equipped with diode or Zener diode circuit.
+
-
+
-
with diode with Z diode

Diode/Zener diode circuits have the following characteristics:
Opening surge voltage can be totally avoided.
The Zener diode has a higher switch-off voltage capacity.
High switch-off delay (6 to 9 times higher than without protective circuit).
The Zener diode switches off faster than a diode circuit.
Circuit for coils operated with AC voltage
The figure shows coils operated with AC voltage and varistor or RC circuit.
~
~
~
~
with varistor
with RC element

The characteristics of varistor circuits are:
The amplitude of the opening surge is limited rather than attenuated.
The surge rise-ratio remains the same.
Short off-delay.
The characteristics of RC circuits are:
Amplitude and steepness of the opening surge are reduced.
Short off-delay.
Appendix
A.4 Safety of electronic control equipment
Introduction
The notes below apply regardless of the type or manufacturer of the electronic control.
Reliability
Maximum reliability of SIMATIC devices and components is achieved by implementing
extensive and cost-effective measures during development and manufacture:
This includes the following:
Use of high-quality components;
Worst-case design of all circuits;
Systematic and computer-aided testing of all components;
Burn-in of all large-scale integrated circuits (e.g. processors, memory, etc.);
Measures preventing static charge when handling MOS ICs;
Visual checks at different stages of manufacture;
Continuous heat-run test at elevated ambient temperature over a period of several days;
Careful computer-controlled final testing;
Statistical evaluation of all returned systems and components to enable the immediate
initiation of suitable corrective measures;
Monitoring of major control components, using on-line tests (cyclic interrupt for the CPU,
etc.).
These measures are referred to as basic measures.
Risks
In all cases where the occurrence of failures can result in material damage or injury to
persons, special measures must be taken to enhance the safety of the installation and
therefore also of the situation. System-specific and special regulations exist for such
applications. They must be observed on installing the control system (e.g. VDE 0116 for
burner control systems).
For electronic control equipment with a safety function, the measures that have to be taken
to prevent or rectify faults are based on the risks involved in the installation. As of a certain
degree of hazard the basic measures mentioned above are no longer sufficient. Additional
measures must be implemented and approved for the controller.
Important information
The instructions in the operating manual must be followed exactly. Incorrect handling can
render measures intended to prevent dangerous faults ineffective, or generate additional
sources of danger.
Appendix
Which fail-safe systems are available in SIMATIC S7?
Two fail-safe systems are available for integrating safety engineering in the SIMATIC S7
automation systems.
The fail-safe controller S7 Distributed Safety is available for implementing safety concepts in
the area of protection of machine and personnel (e.g. EMERGENCY OFF devices for the
use of processing machines) and in the process industry (e.g. for performing protective
functions for MCE safety devices and burners).
The fail-safe and, in particular, optionally redundant automation system
S7 F/FH systems is perfectly suited for systems in the process technology and the oil
industry.
Fail-safe and redundant S7 FH system
To increase the availability of the automation system and thereby, avoid process interruption
in case of errors in the F system, it is possible to build in fail-safe S7 F systems as optionally
redundant (S7 FH systems). This increase in availability can be achieved via redundancy of
the components (power supply, central module, communication and I/O).
Attainable safety requirements
S7 Distributed Safety F systems and S7 F/FH systems can meet the following safety
requirements:
Requirement class RC1 to RC6 to DIN V 19250/DIN V VDE 0801
Safety Integrity Level SIL1 to SIL3 to IEC 61508
Category Cat.2 to Cat.4 to EN 954-1.
Reference
You can find further information in the Safety Engineering in SIMATIC S7 System
Description manual.
Appendix

Operating Instructions, 12/2006, A5E00105492-07 Glossary-1
Glossary
Accumulator
Accumulators represent CPU register and are used as buffer memory for download, transfer,
comparison, calculation and conversion operations.
Address
An address is the identifier of a specific address or address area. Examples: Input I 12.1;
Flag Word MW 25; Data Block DB 3.
Analog module
Analog modules convert process values (e.g. temperature) into digital values which can be
processing in the CPU, or they convert digital values into analog manipulated variables.
Application
User program
Application
An application is a program that runs directly on the MS-DOS / Windows operating system.
Applications on the PG include the STEP 5 basic package, GRAPH 5 and others.
ASIC
ASIC is the acronym for Application Specific Integrated Circuits.
PROFINET ASICs are components with a wide range of functions for the development of
your own devices. They implement the requirements of the PROFINET standard in a circuit
and allow extremely high packing densities and performance.
Because PROFINET is an open standard, SIMATIC NET offers PROFINET ASICs for the
development of your old devices under the name ERTEC .
Backplane bus
The backplane bus is a serial data bus. It supplies power to the modules and is also used by
the modules to communicate with each other. Bus connectors interconnect the modules.
Glossary

Glossary-2 Operating Instructions, 12/2006, A5E00105492-07
Backup memory
Backup memory ensures buffering of the memory areas of a CPU without backup battery. It
backs up a configurable number of timers, counters, flag bits, data bytes and retentive
timers, counters, flag bits and data bytes).
Bit memory
Flag bits are part of the CPU's system memory. They store intermediate results of
calculations. They can be accessed in bit, word or dword operations.
Bus
A bus is a communication medium connecting several nodes. Data can be transferred via
serial or parallel circuits, that is, via electrical conductors or fiber optic.
Bus segment
A bus segment is a self-contained section of a serial bus system. Bus segments are
interconnected by way of repeaters, for example, in PROFIBUS DP.
Central module
CPU
Clock flag bits
flag bit which can be used to generate clock pulses in the user program (1 byte per flag bit).

Note
When operating with S7-300 CPUs, make sure that the byte of the clock memory bit is not
overwritten in the user program!

Coaxial cable
A coaxial cable, also known as "coax", is a metal conductor system used in HF transmission
circuits, for example, as radio and TV antenna cable, and in modern networks demanding
high data transmission rates. The inner conductor of a coaxial cable is sheathed by a tube-
like outer conductor. These conductors are separated by plastic insulation. In contrast to
other cables, this type of cable provides a high degree of immunity to interference and EMC
compatibility.
Code block
A SIMATIC S7 code block contains part of the STEP 7 user program. (in contrast to a DB:
this contains only data.)
Glossary

Communication processor
Communication processors are modules used for point-to-point and bus topologies.
Component Based Automation
PROFINET CBA
Compress
The PG online function "Compress" is used to rearrange all valid blocks in CPU RAM in a
contiguous area of load memory, starting at the lowest address. This eliminates
fragmentation which occurs when blocks are deleted or edited.
Configuration
Assignment of modules to module racks/slots and (e.g. for signal modules) addresses.
Consistent data
Data which belongs together in terms of content and must not be separated is known as
consistent data.
For example, the values of analog modules must always be handled as a whole, i.e. the
value of an analog module must not be corrupted as a result of read access at two different
times.
Counters
Counters are part of CPU system memory. The content of "Counter cells" can be modified by
STEP 7 instructions (for example, up/down count.)
CP
Communication processor
CPU
Central processing unit = CPU of the S7 automation system with a control and arithmetic
unit, memory, operating system, and interface for programming device.
Cycle time
The cycle time represents the time a CPU requires for one execution of the user program.
Cyclic interrupt
Glossary

Data block
Data blocks (DB) are data areas in the user program which contain user data. There are
global data blocks which can be accessed by all code blocks, and instance data blocks
which are assigned to a specific FB call.
Data, static
Static data can only be used within a function block. These data are saved in an instance
data block that belongs to a function block. Data stored in an instance data block are
retained until the next function block call.
Data, temporary
Temporary data represent local data of a block. They are stored in the L-stack when the
block is executed. After the block has been processed, these data are no longer available.
Default Router
The default router is the router that is used when data must be forwarded to a partner
located within the same subnet.
In STEP 7, the default router is named Router. STEP 7 assigns the local IP address to the
default router.
Determinism
Real Time
Device
Automation systems (e.g. PLC, PC)
Field devices (for example, PLC, PC, hydraulic devices, pneumatic devices)
Active network components (e.g. switches, gateways, routers)
PROFIBUS or other fieldbus systems
The main characteristics of a device is its integration into PROFINET communication by
means of Ethernet or PROFIBUS.
PROFINET devices
PROFIBUS devices
Device
PROFINET device
PROFIBUS device
Glossary

Device Name
Before an IO device can be addressed by an IO controller, it must have a device name. In
PROFINET, this method was selected because it is simpler to work with names than with
complex IP addresses.
The assignment of a device name for a concrete IO device can be compared with setting the
PROFIBUS address of a DP slave.
When it ships, an IO device does not have a device name. An IO device can only be
addressed by an IO controller, for example for the transfer of project engineering data
(including the IP address) during startup or for user data exchange in cyclic operation, after it
has been assigned a device name with the PG/PC .
Modules capable of diagnostics operations report detected system errors to the CPU by
means of diagnostic interrupts.
Diagnostics
System diagnostics
Diagnostics buffer
The diagnostics buffer represents a buffered memory area in the CPU. It stores diagnostic
events in the order of their occurrence.
DP master
A master which behaves in accordance with EN 50170, Part 3 is known as a DP master.
DP slave
A slave operated on PROFIBUS with PROFIBUS DP protocol and in accordance with EN
50170, Part 3 is referred to as DP slave.
DPV1
The designation DPV1 means extension of the functionality of the acyclical services (to
include new interrupts, for example) provided by the DP protocol. The DPV1 functionality has
been incorporated into IEC 61158/EN 50170, volume 2, PROFIBUS.
Electrically isolated
The reference potential of the control and on-load power circuits of isolated I/O modules is
electrically isolated; for example, by optocouplers, relay contact or transformer. I/O circuits
can be interconnected with a root circuit.
Glossary

Electrical connection (equipotential bonding conductor) which eliminates potential difference
between electrical equipment and external conductive bodies by drawing potential to the
same or near the same level, in order to prevent disturbing or dangerous voltages between
these bodies.
Error display
One of the possible reactions of the operating system to a runtime error is to output an error
message. Further reactions: Error reaction in the user program, CPU in STOP.
Error handling via OB
After the operating system has detected a specific error (e.g. access error with STEP 7), it
calls a dedicated block (Error OB) that determines further CPU actions.
Error response
Reaction to a runtime error. Reactions of the operating system: It sets the automation
system to STOP, indicates the error, or calls an OB in which the user can program a
reaction.
ERTEC
ASIC
Fast Ethernet
Fast Ethernet describes the standard with which data is transmitted at 100 Mbps. Fast
Ethernet uses the 100 Base-T standard.
FB
Function block
FC
Function
Flash EPROM
FEPROMs can retain data in the event of power loss, same as electrically erasable
EEPROMs. However, they can be erased within a considerably shorter time (FEPROM =
Flash Erasable Programmable Read Only Memory). They are used on Memory Cards.
Glossary

Force
The Force function can be used to assign the variables of a user program or CPU (also:
inputs and outputs) constant values.
In this context, please note the limitations listed in the Overview of the test functions section
in the chapter entitled Test functions, Diagnostics and Troubleshooting in the S7-300
Installation manual.
Function
According to IEC 1131-3, a function (FC) is a code block without static data. A function
allows parameters to be passed in the user program. Functions are therefore suitable for
programming frequently occurring complex functions, for example calculations.
Function block
According to IEC 1131-3, a function block (FB) is a code block with static data. A function
block allows parameters to be transferred to the user program. Function blocks are therefore
suitable for programming frequently occurring complex functions, for example controls, mode
selections.
Functional ground
Grounding which has the sole purpose of safeguarding the intended function of electrical
equipment. With functional grounding you short-circuit interference voltage which would
otherwise have an unacceptable impact on equipment.
GD circuit
A GD circuit comprises a number of CPUs sharing data by means of global data
communication, and is used as follows:
A CPU broadcasts a GD packet to the other CPUs.
A CPU sends and receives a GD packet from another CPU.
A GD circuit is identified by a GD circuit number.
GD element
A GD element is generated by assigning shared global data. It is identified by a unique
global data ID in the global data table.
GD packet
A GD packet can consist of one or several GD elements transmitted in a single message
frame.
Glossary

Global data
Global data can be addressed from any code block (FC, FB, OB). In particular, this refers to
flag bits M, inputs I, outputs Q, timers, counters and data blocks DB. Global data can be
accessed via absolute or symbolic addressing.
Global data communication is a method of transferring global data between CPUs (without
CFBs).
Ground
The conductive earth whose electrical potential can be set equal to zero at any point.
Ground potential can be different from zero in the area of grounding electrodes. The term
reference ground is frequently used to describe this situation.
Grounding means, to connect an electrically conductive component via an equipotential
grounding system to a grounding electrode (one or more conductive components with highly
conductive contact to earth).
Chassis ground is the totality of all the interconnected passive parts of a piece of equipment
on which dangerous fault-voltage cannot occur.
GSD file
The properties of a PROFINET device are described in a GSD file (General Station
Description) that contains all the information required for configuration.
As with PROFIBUS, you can incorporate a PROFINET device into STEP 7 via a GSD file.
In PROFINET IO, the GSD file is in XML format. The structure of the GSD file conforms to
ISO 15734, which is the world-wide standard for device descriptions.
In PROFIBUS, the GSD file is in ASCII format.
HART
English: Highway Adressable Remote Transducer
Hub
Switch
Industrial Ethernet
Industrial Ethernet (formerly SINEC H1) is a technology that allows data to be transmitted
free of interference in an industrial environment.
Due to the openness of PROFINET, you can use standard Ethernet components. We
recommend, however, that you install PROFINET as Industrial Ethernet.
Fast Ethernet
Glossary

Instance data block
The STEP 7 user program assigns an automatically generated DB to every call of a function
block. The instance data block stores the values of inputs / outputs and in/out parameters, as
well as local block data.
Interface, MPI-compatible
MPI
Interrupt
The CPU's operating system distinguishes between different priority classes for user
program execution. These priority classes include interrupts, e.g. process interrupts. When
an interrupt is triggered, the operating system automatically calls an assigned OB. In this OB
the user can program the desired response (e.g. in an FB).
A cyclic interrupt is generated periodically by the CPU in a configurable time pattern. A
Interrupt, delay
The delay interrupt belongs to one of the priority classes in SIMATIC S7 program
processing. It is generated on expiration of a time started in the user program. A
Interrupt, delay
Interrupt, diagnostic
Interrupt, process
Process interrupt
Interrupt, status
A status interrupt can be generated by a DPV1 slave and causes OB 55 to be called on the
DPV1 master. For detailed information on OB 55, see the Reference Manual System
The time-of-day interrupt belongs to one of the priority classes in
SIMATIC S7 program processing. It is generated at a specific date (or daily) and time-of-day
(e.g. 9:50 or hourly, or every minute). A corresponding OB will be processed.
Glossary

Interrupt, update
An update interrupt can be generated by a DPV1 slave and causes OB56 to be called on the
DPV1 master. For detailed information on OB56, see the Reference Manual System
Interrupt, vendor-specific
A vendor-specific interrupt can be generated by a DPV1 slave. It causes OB57 to be called
on the DPV1 master.
For detailed information on OB 57, see the Reference Manual System Software for
S7-300/400: System and Standard Functions.
IO controller
PROFINET IO device
PROFINET IO system
IO device
PROFINET IO device
PROFINET IO system
IO supervisor
PROFINET IO device
PROFINET IO system
IO system
PROFINET IO system
Glossary

IP address
To allow a PROFINET device to be addressed as a node on Industrial Ethernet, this device
also requires an IP address that is unique within the network. The IP address is made up of
4 decimal numbers with a range of values from 0 through 255. The decimal numbers are
separated by a period.
The IP address is made up of
The address of the (subnet) network and
The address of the node (generally called the host or network node).
LAN
Local Area Network; interconnects multiple computers within a company. The geographical
topology of a LAN is limited to the local premises and is only available to the operating
company or institution.
Load memory
This memory contains objects generated by the programming device. Load memory is
implemented by means of a plug-in Micro Memory Card of different memory capacities. The
SIMATIC Micro Memory Card must be inserted to allow CPU operation.
Load power supply
Power supply to the signal / function modules and the process I/O connected to them.
Local data
Data, temporary
MAC address
Each PROFINET device is assigned a worldwide unique device identifier in the factory. This
6-byte long device identifier is the MAC address.
The MAC address is divided up as follows:
3 bytes vendor identifier and
3 bytes device identifier (consecutive number).
The MAC address is normally printed on the front of the device.
Example: 08-00-06-6B-80-C0
Master
When a master has the token, it can send data to other nodes and request data from other
nodes (= active node).
Slave
Glossary

Memory Card (MC)
Memory Cards are memory media for CPUs and CPs. They are implemented in the form of
RAM or FEPROM. An MC differs from a Micro Memory Card only in its dimensions (MC is
approximately the size of a credit card).
Micro Memory Card (MMC)
Micro Memory Cards are memory media for CPUs and CPs. Their only difference to the
Memory Card is the smaller size.
Module parameters
Module parameters are values which can be used to configure module behavior. A
distinction is made between static and dynamic module parameters.
MPI
The multipoint interface (MPI) represents the programming device interface of SIMATIC S7.
It enables multiple nodes (PGs, text-based displays, OPs) to be operated simultaneously by
one or more CPUs. Each node is identified by its unique (MPI) address.
MPI address
MPI
NCM PC
SIMATIC NCM PC
Nesting depth
A block can be called from another by means of a block call. Nesting depth is referred to as
the number of simultaneously called code blocks.
Network
A network consists of one or more interconnected subnets with any number of nodes.
Several networks can exist alongside each other.
A network is a larger communication system that allows data exchange between a large
number of nodes.
All the subnets together form a network.
Non-isolated
The reference potential of the control and on-load power circuits of non-isolated I/O modules
is electrically interconnected.
Glossary

OB
Organization blocks
OB priority
The CPU operating system distinguishes between different priority classes, for example,
cyclic program execution, process interrupt controlled program processing. Each priority
class is assigned organization blocks (OBs) in which the S7 user can program a response.
The OBs are assigned different default priority classes. These determine the order in which
OBs are executed or interrupt each other when they appear simultaneously.
Operating state
SIMATIC S7 automation systems know the following operating states: STOP, START, RUN.
Operating system
The CPU operating system organizes all the CPU functions and processes which are not
associated with a specific control task.
CPU
Organization blocks
Organization blocks (OBs) form the interface between the CPU operating system and the
user program. The order in which the user program is run is defined in the organization
blocks.
Parameters
1. Variable of a STEP 7 code block
2. Variable for declaring module response (one or several per module). All modules have a
suitable basic factory setting which can be customized in STEP 7.
There are static and dynamic parameters.
Parameters, dynamic
Unlike static parameters, you can change dynamic module parameters during runtime by
calling an SFC in the user program, e.g. limit values of an analog signal input module.
Parameters, static
Unlike dynamic parameters, static parameters of modules cannot be changed by the user
program. You can only modify these parameters by editing your configuration in STEP 7, for
example, modification of the input delay parameters of a digital signal input module.
PC station
SIMATIC PC Station
Glossary

PG
Programming device
PLC
A PLC in the context of SIMATIC S7 --> is a programmable logic controller.
PNO
Technical committee that defines and further develops the PROFIBUS and PROFINET
standards.
Website: http://www.profinet.com
Priority class
The S7 CPU operating system provides up to 26 priority classes (or "Program execution
levels"). Specific OBs are assigned to these classes. The priority classes determine which
OBs interrupt other OBs. Multiple OBs of the same priority class do not interrupt each other.
In this case, they are executed sequentially.
Process image
The process image is part of CPU system memory. At the start of cyclic program execution,
the signal states at the input modules are written to the process image of the inputs. At the
end of cyclic program execution, the signal status of the process image of the outputs is
transferred to the output modules.
Process interrupt
A process interrupt is triggered by interrupt-triggering modules as a result of a specific event
in the process. The process interrupt is reported to the CPU. The assigned organization
block will be processed according to interrupt priority.
Process-Related Function
PROFINET Component
Product version
The product version identifies differences between products which have the same order
number. The product version is incremented when forward-compatible functions are
enhanced, after production-related modifications (use of new parts/components) and for bug
fixes.
Glossary

PROFIBUS
Process Field Bus - European field bus standard.
PROFIBUS DP
PNO
PROFIBUS device
A PROFIBUS device has at least one PROFIBUS link with an electric interface (RS485) or
an optical interface (polymer optical fiber, POF).
A PROFIBUS device cannot take part directly in PROFINET communication, but must be
implemented by means of PROFIBUS master with PROFINET link or Industrial
Device
PROFIBUS DP
A PROFIBUS with the DP protocol that complies with EN 50170. DP stands for distributed
peripheral (IO) = fast, real-time, cyclic data exchange. From the perspective of the user
program, the distributed IOs are addressed in exactly the same way as the central IOs.
PROFIBUS
PNO
PROFINET
Within the framework of Totally Integrated Automation (TIA), PROFINET is the consistent
further development of:
Industrial Ethernet, the communication bus for the cell level.
The experience gained from both systems was and is being integrated in PROFINET.
PROFINET as an Ethernet-based automation standard from PROFIBUS International
(previously PROFIBUS Users Organization) defines a vendor-independent communication,
PNO
PROFINET ASIC
ASIC
Glossary

PROFINET CBA
As part of PROFINET, PROFINET CBA (Component Based Automation) is an automation
concept that focuses on the following:
Implementation of modular applications
Machine - machine communication
PROFINET CBA lets you create distributed automation solutions based on off-the-shelf
components and partial solutions. This concept meets the demand for a greater modularity in
the field of mechanical and systems engineering by extensive distribution of intelligent
processes.
With Component Based Automation you can implement complete technological modules as
standardized components that can be used in large systems.
You create the modular, intelligent components of the PROFINET CBA in an engineering
tool (which may differ according to the device manufacturer). Components that are formed
from SIMATIC devices are created with STEP 7, and are interconnected using the SIMATIC
iMAP tool.
PROFINET Component
A PROFINET component includes the entire data of the hardware configuration, the
parameters of the modules, and the corresponding user program. The PROFINET
component is made up as follows:
Technological Function
The (optional) technological (software) function includes the interface to other PROFINET
components in the form of interconnectable inputs and outputs.
Device
The device is the representation of the physical programmable controller or field device
including the I/O, sensors and actuators, mechanical parts, and the device firmware.
PROFINET device
can also have a PROFIBUS port, that is, as master with proxy functionality.
Device
Glossary

PROFINET IO
As part of PROFINET, PROFINET IO is a communication concept that is used to implement
modular, distributed applications.
PROFINET IO allows you to create automation solutions of the type with which you are
familiar from PROFIBUS.
PROFINET IO is implemented using the PROFINET standard for programmable controllers.
The STEP 7 engineering tool helps you to structure and configure an automation solution.
In STEP 7 you have the same application view, regardless of whether you are configuring
PROFINET devices or PROFIBUS devices. You will program your user program in the same
way for both PROFINET IO and PROFIBUS DP since you will use the extended blocks and
system status lists for PROFINET IO.
Device used to address the connected IO devices. This means that the IO controller
exchanges input and output signals with assigned field devices. The IO controller is often the
controller on which the automation program runs.
PROFINET IO device
PROFINET IO system
PROFINET IO device
Distributed field device assigned to one of the IO controllers (for example, remote IO, valve
terminals, frequency converters, switches)
PROFINET IO system
PG/PC or HMI device for commissioning and diagnostics.
PROFINET IO device
PROFINET IO system
PROFINET IO system
PROFINET IO controller with assigned PROFINET IO devices.
PROFINET IO device
Glossary

Programmable controllers (PLCs) are electronic controllers whose function is stored as a
program in the control unit. The structure and wiring of the device does not therefore depend
on the controller's function. A programmable logic controller is structured like a computer; it
consists of a CPU with memory, input/output modules and an internal bus system. The IOs
and the programming language are oriented to control engineering needs.
Programming device
Programming devices are essentially compact and portable PCs which are suitable for
industrial applications. They are identified by a special hardware and software for
programmable logic controllers.
Proxy
the Ethernet. The proxy functionality allows a PROFIBUS device to communicate not only
with its master but also with all the nodes on the PROFINET.
With PROFINET, existing PROFIBUS systems can be integrated into the PROFINET
communication with the aid of an IE/PB link, for example. The IE/PB link then handles
communication via PROFINET on behalf of the PROFIBUS components.
In this way, you can link both DPV0 and DPV1 slaves to PROFINET.
PROFINET device
Proxy functionality
Proxy
RAM
RAM (Random Access Memory) is a semiconductor read/write memory.
Real Time
Real time means that a system processes external events within a defined time.
Determinism means that a system reacts in a predictable (deterministic) manner.
In industrial networks, both these requirements are important. PROFINET meets these
requirements. PROFINET is implemented as a deterministic real-time network as follows:
The transfer of time-critical data between different stations over a network within a
defined interval is guaranteed.
To achieve this, PROFINET provides an optimized communication channel for real-time
communication : to: Real Time (RT).
An exact prediction of the time at which the data transfer takes place is possible.
It is guaranteed that problem-free communication using other standard protocols, for
example industrial communication for PG/PC can take place within the same network.
Real Time
Glossary

Reduction factor
The reduction rate determines the send/receive frequency for GD packets on the basis of the
CPU cycle.
Reference ground
Ground
Reference potential
Voltages of participating circuits are referenced to this potential when they are viewed and/or
measured.
Restart
On CPU start-up (e.g. after is switched from STOP to RUN mode via selector switch or with
POWER ON), OB100 (restart) is initially executed, prior to cyclic program execution (OB1).
On restart, the input process image is read in and the STEP 7 user program is executed,
starting at the first instruction in OB1.
Retentive memory
A memory area is considered retentive if its contents are retained even after a power loss
and transitions from STOP to RUN. The non-retentive area of memory flag bits, timers and
counters is reset following a power failure and a transition from the STOP mode to the RUN
mode.
Retentive can be the:
Bit memory
S7 timers
S7 counters
Data areas
Router
A router interconnects two subnets. A router works in a similar way to a switch. You can also
enable/disable nodes for communication at the router. The communication nodes on various
sides of a router can only communicate with one another if you have explicitly enabled
communication between these nodes via the router. Real-time data cannot be exchanged
beyond subnet boundaries.
Default Router
Switch
RT
Real Time
Glossary

Runtime error
Errors occurred in the PLC (that is, not in the process itself) during user program execution.
Segment
Bus segment
Send clock
Period between two successive intervals for IRT or RT communication. The send clock is the
shortest possible transmit interval for exchanging data. The calculated update times are
multiples of the send clock.
The minimum possible update time thus depends on the minimum send clock of the IO
controller that can be set.
If both the IO controller and the IO device support a send clock of 250s, you can achieve a
minimum update time of 250s.
It is also possible to operate IO devices that only support a send clock of 1 ms on an IO
controller that works with a send clock of 250s. The minimum update time for the IO
devices concerned is then at least 1 ms, however.
SFB
SFC
System function
Signal module
Signal modules (SM) form the interface between the process and the PLC. There are digital
input and output modules (input/output module, digital) and analog input and output modules
(input/output module, analog).
SIMATIC
The term denotes Siemens AG products and systems for industrial automation.
SIMATIC NCM PC
SIMATIC NCM PC is a version of STEP 7 tailored to PC configuration. For PC stations, it
offers the full range of functions of STEP 7.
SIMATIC NCM PC is the central tool with which you configure the communication services
for your PC station. The configuration data generated with this tool must be downloaded to
the PC station or exported. This makes the PC station ready for communication.
Glossary

SIMATIC NET
Siemens Industrial Communication division for Networks and Network Components.
SIMATIC PC Station
A "PC station" is a PC with communication modules and software components within a
SIMATIC automation solution.
Slave
A slave can only exchange data after being requested to do so by the master.
Master
SNMP
protocol. It consists of two network components, similar to the client/server model. The
SNMP manager monitors the network nodes and the SNMP agents collect the various
network-specific information in the individual network nodes and store them in a structured
form in the MIB (Management Information Base). This information allows a network
management system to run detailed network diagnostics.
STARTUP
A START-UP routine is executed at the transition from STOP to RUN mode. Can be
triggered by means of the mode selector switch, or after power on, or by an operator action
on the programming device. An S7-300 performs a restart.
STEP 7
Engineering system. Contains programming languages for creating user programs for
SIMATIC S7 controllers.
Subnet mask
The bits set in the subnet mask decides the part of the IP address that contains the address
of the subnet/network.
In general:
The network address is obtained by an AND operation on the IP address and subnet
mask.
The node address is obtained by an AND NOT operation on the IP address and subnet
mask.
Glossary

Subnetwork
All the devices connected by switches are located in the same network - a subnet. All the
devices in a subnet can communicate directly with each other.
All devices in the same subnet have the same subnet mask.
A subnet is physically restricted by a router.
Substitute
Proxy
Substitute value
Substitute values are configurable values which output modules transfer to the process when
the CPU switches to STOP mode.
In the event of an I/O access error, a substitute value can be written to the accumulator
instead of the input value which could not be read (SFC 44).
Switch
PROFIBUS is based on a bus topology. Communication nodes are connected by a passive
cable - the bus.
In contrast, Industrial Ethernet is made up of point-to-point links: Each communication node
is connected directly to one other communication node.
If a communication node needs to be connected to several other communication nodes, this
communication node is connected to the port of an active network component- a switch.
Other communications nodes (including switches) can then be connected to the other ports
of the switch. The connection between a communication node and the switch remains a
point-to-point link.
The task of a switch is therefore to regenerate and distribute received signals. The switch
"learns" the Ethernet address(es) of a connected PROFINET device or other switches and
forwards only the signals intended for the connected PROFINET device or connected switch.
A switch has a certain number of ports). At each port, connect a maximum of one
PROFINET device or a further switch.
System diagnostics
System diagnostics refers to the detection, evaluation, and signaling of errors that occur
within the PLC, for example programming errors or module failures. System errors can be
indicated by LEDs or in STEP 7.
System function
A system function (SFC) is a function integrated into the operating system of the CPU that
can be called when necessary in the STEP 7 user program.
Glossary

System function blocks (SFB) are integrated in the CPU operating system and can be called
in the STEP 7 user program.
System memory
System memory is an integrated RAM memory in the CPU. System memory contains the
address areas (e.g. timers, counters, flag bits) and data areas that are required internally by
the operating system (for example, communication buffers).
System status list
The system status list contains data that describes the current status of an S7-300 or S7-
400. You can always use this list to obtain an overview of:
the configuration of the S7-300
the current CPU parameter settings and the programmable signal modules
the current status and processes in the CPU and in the programmable signal modules.
The terminating resistor is used to avoid reflections on data links.
Timer
Timers
Timers
Timers are part of CPU system memory. The content of timer cells is automatically updated
by the operating system, asynchronously to the user program. STEP 7 instructions are used
to define the precise function of the timer cell (for example, on-delay) and to initiate their
execution (for example, start).
TOD interrupt
Token
Allows access to the bus for a limited time.
Glossary

Topology
Network structure. Commonly used structures:
Bus topology
Ring topology
Star topology
Tree topology
Transmission rate
Data transfer rate (in bps)
Twisted-pair
Fast Ethernet over twisted-pair cables is based on the IEEE 802.3u standard (100 base TX).
The transmission medium is a shielded 2x2 twisted-pair cable with an impedance of 100
Ohm (AWG 22). The transmission characteristics of this cable must meet the requirements
of category 5 (see glossary).
The maximum length of the connection between the terminal and the network component
must not exceed 100 m. The cables are wired according to the 100 base TX standard using
the RJ45 connector system.
Ungrounded
Having no direct electrical connection to ground
Glossary

Update Time
The IO controller (outputs) provides new data to all IO devices in the PROFINET IO system
within the update time. This means that all the IO devices have sent their latest data to the
IO controller (inputs).

Note
Update Times for Cyclical Data Exchange
STEP 7 determines the update time on the basis of the existing hardware configuration and
the resulting cyclical data traffic. During this time, a PROFINET IO device has exchanged its
user data with the associated IO controller.
You can set the update date either for a whole bus segment of an IO controller, or for an
individual IO device.
In STEP 7, the update time can be changed manually.
The smallest possible update time in a PROFINET system depends on the following factors:
Number of PROFINET IO devices
Quantity of configured user data
Volume of PROFINET IO communication traffic (compared to the volume of PROFINET
CBA communication traffic)

Additional cyclical PROFINET services
The update time dialog in STEP 7 / HW Config is used to set an update date for the device
to be reserved for PROFINET IO.
See the STEP 7 Online Help for more information.

User program
In SIMATIC, we distinguish between the operating systems of the CPU and user programs.
The user program contains all instructions, declarations and data for signal processing
required to control a plant or a process. It is assigned to a programmable module (for
example CPU or FM) and can be structured in smaller units (blocks).
Operating system
STEP 7
Varistor
Voltage-dependent resistor
WAN
Wide Area Network. Network beyond LAN boundaries which allows, for example,
intercontinental communication. Legal rights do not belong to the user but to the provider of
the communication network.
Glossary

Work memory
The working memory is integrated in the CPU and cannot be extended. It is used to run the
code and process user program data. Programs only run in the working memory and system
memory.

Operating Instructions, 12/2006, A5E00105492-07 Index-1
Index
(
(PtP, 4-26
A
Accessories, 5-2
for wiring, 6-1
Actuator/Sensor Interface, 4-26, 4-60
Addresses
Analog module, 7-5
Digital module, 7-4
Addressing
Addressing PROFINET IO, 7-9
On PROFIBUS DP, 7-8
slotspecific, 7-1
Analog module
Addresses, 7-5
Application
in industrial environments, 11-4
in residential areas, 11-4
Application view, 4-47, 4-52
Approval
CE, 11-1
CSA, 11-2
FM, 11-3
Marine, 11-4
UL, 11-2
Approvals
Standards, 11-1
Arrangement
of the modules, 4-7
ASI, 4-26
Assembly dimensions
of the modules, 4-4
Asynchronous error, 10-6
Automation concept, 4-26, 4-47
B
Back up
Operating system, 9-2
Basic knowledge, iii
Burst pulses, 11-5
Bus cables
Installation rules, 4-36
Bus connector, 4-37
Connecting the bus cable, 6-15
removing, 6-16
Setting the terminating resistor, 6-16
Bus connector
Connecting to module, 6-16
Bus connectors
plugging, 5-7
Bus termination, 4-40
Bus topology
Detection, 10-9
C
Cabinet
Dimensions, 4-10
power loss dissipated, 4-12
Selecting and dimensioning, 4-10
Types, 4-11
Cable lengths
longer, 4-34
maximum, 4-38
MPI subnet, 4-34
PROFIBUS subnet, 4-34
Stub cables, 4-35
Cable routing inside buildings, A-16
Cable shielding, A-12
Ground, 4-19
Cables
Preparing, 6-8
shield, A-12
Category (Cat.)
Attainable, A-31
CE
Approval, 11-1
Central unit, 4-2
Index

Index-2 Operating Instructions, 12/2006, A5E00105492-07
Commissioning
Check list, 8-5
CPU 31x-2 DP as a DP master, 8-26
CPU 31x-2 DP as a DP slave, 8-30, 10-25
CPU 31xC-2 DP as a DP master, 8-26
CPU 31xC-2 DP as a DP slave, 8-30
Hardware Requirements, 8-1
Procedure with the hardware, 8-2
Procedure with the software, 8-4
PROFIBUS DP, 8-25
PROFINET IO, 8-37
Reaction to errors, 8-5
Software requirement, 8-3
Commissioning the CPU as DP master
Constant Bus Cycle Time, 8-28
Isochronous Updating of Process Image
Partitions, 8-28
Sync/Freeze, 8-29
Communication concept, 4-47
Communications concept, 4-26
Component based Automation, 4-26
Component Based Automation, 4-47
Connecting
PG, 8-14, 8-15, 8-16, 8-17, 8-19
Sensors and actuators, 6-7
Spring terminals, 6-7
Connecting actuators, 6-7
Connecting cables
for interface modules, 4-8
Connecting sensors, 6-7
Consistency, 7-8, 7-9
Continuous shock, 11-9
Controlling
of tags, 10-4
CP 343-1, 4-50
CP 443-1 Advanced, 4-50
CPU
CPU memory reset, 8-9, 8-13
Wiring, 6-5
CPU 313C-2 DP
commissioning as a DP master, 8-27
commissioning as DP-Slave, 8-31
CPU 314C-2 DP
CPU 315-2 DP
CPU 316-2 DP
CPU 317-2 DP
CPU 318-2 DP
CPU activities, 8-12
MPI parameters, 8-12
CSA
Approval, 11-2
D
Data consistency, 7-8, 7-9
Default addressing, 7-1
Definition
Degree of protection IP 20, 11-10
Delivery state of the CPU
Lamp images during reset, 9-8
Properties, delivery state, 9-7
Restore delivery state, 9-8
Device-specific diagnostics, 10-36
Diagnostic address, 10-22, 10-28
with direct data exchange, 10-24
Diagnostic buffer, 10-8
Diagnostics
configured address area, 10-34
device-specific, 10-36
in DP Master mode, 10-21
with Diagnosing Hardware, 10-10
with LEDs, 10-12
with system functions, 10-9
Digital module
Addresses, 7-4
Digital output module
Replacement fuse, 9-13
Replacing fuses, 9-14
Direct data exchange, 8-35
DP master, 4-44
Class 2, 4-44
Interrupts, 10-30
DP master system, 4-44
DP slave, 4-44
E
Electrostatic discharge, 11-5
EMC, 11-5
Definition, A-3
Fault-free installation, A-7
Emission of radio interference, 11-6
Engineering tool, 4-47
Index

Equipotential bonding, A-14
Equipotential bonding - lightning protection, A-21, A-24
Equipotential bonding conductor, 4-20
Error
Asynchronous, 10-6
Synchronous, 10-6
Error-free operation of the S7-300, A-1
Event detection, 10-23, 10-29
Expansion module, 4-2
F
F system
Available, A-31
Field bus Integration, 4-46
FM
Approval, 11-3
Forcing, 10-4
Front connector coding
Removing from front connector, 9-12
Removing from module, 9-11
Front connectors
encoding, 6-10
plugging, 6-10
Preparing, 6-8
Wiring, 6-2, 6-9
Full assembly, 4-9
G
General technical data, 11-1
Ground bonding for EMC-compliant installation, A-7
Grounding
Grounding, 4-21
Grounding concept, 4-17
GSD file, 4-50
H
Highest MPI address, 4-28
Highest PROFIBUS DP address, 4-28
HMI, 4-44
I
I&M data, 10-1
Identification, 10-20
Identification and maintenance data, 10-1
Identification code for Australia, 11-3
Identification data, 10-1
Identifier-related diagnostic data, 10-34
IE/PB Link, 4-47
IEC 61131, 11-3
Industrial Ethernet, 4-26, 4-44
Inscription labels, 5-2
installation
arranging modules, 4-7
horizontal, 4-3
vertical, 4-3
Installation
in cabinets, 4-10
of the modules, 5-7
ungrounded reference potential, 4-15
Installation
grounded reference potential, 4-14
Installing
of the modules, 9-11
Installing EMC plants, A-3
Insulation test, 11-10
Interconnection, 4-46
Interface module
Connecting cables, 8-41
Interface modules
Connecting cables, 4-8
Interfaces
MPI interface, 4-30
MPI interface:Connectable devices, 4-31
PROFIBUS DP interface, 4-32
PROFIBUS DP interface:Operating modes with two
DP interfaces, 4-32
PtP interface, 4-60
Interfaces PROFIBUS DP interface
Connectable devices, 4-33
Interferences
electromagnetic, A-3
Interrupt
on the DP master, 10-30
IO controller, 4-44
IO device, 4-44
IO supervisor, 4-44
IO system, 4-44
L
Labeling strips
Assignment to modules, 6-11
inserting, 6-11
Lightning protection equipotential bonding, A-21
Lightning protection zone concept, A-19
Load circuit
Ground, 4-20
Index

Load current
determining, 4-23
Load power supply
from PS 307, 4-24
Load voltage
Connecting the reference potential, 4-20
Local equipotential bonding, A-23
M
Mains
grounded, 4-13
Mains voltage
Selecting the mains voltage, 6-4
Mains voltage selector switch, 6-4
Maintenance data, 10-1
Manufacturer ID, 10-33
Marine
Approval, 11-4
Material
required, 5-3
Mechanical environmental conditions, 11-8
MIB, 10-11
Micro Memory Card, 8-7
Formatting, 8-13
Inserting and removing when power is switched
off, 8-8
Inserting/removing, 8-8
Module
Arrangement, 4-7, 4-8
Assembly dimensions, 4-4
installing, 9-11
Installing, 5-7
isolated, 4-17
labeling, 6-11
non-isolated, 4-17
removing, 9-10
replacing, 9-9
Start addresses, 7-1
Module replacement
Reaction of the S7-300, 9-12
Rules, 9-9
Monitoring
of tags, 10-4
Monitoring and controlling a tag
Monitor tag, 8-21
Monitoring and modifying tags
Creating a tag table, 8-21
modifying tags, 8-22
setting the trigger points, 8-22
Monitoring and modifying variable
establishing a connection to the CPU, 8-23
Modifying outputs in CPU STOP mode, 8-24
opening the VAT, 8-23
Saving the variable table, 8-23
Mounting rail
connecting the protective conductor, 6-3
Fixing screws, 5-5
Ground conductor, 5-4
Length, 4-4
mounting holes, 5-4
Preparing, 5-3
MPI, 4-25, 4-30
Maximum number of nodes, 4-28
Maximum transmission rate, 4-27
MPI address
default, 4-28
highest, 4-28
Recommendation, 4-29
Rules, 4-28
MPI and PROFIBUS subnet, 4-42
MPI interface
MPI subnet
Example, 4-38
maximum distances, 4-39
Segment, 4-34
Terminating resistor, 4-40
Multi-Point Interface, 4-25
N
Network types, 4-46
O
Objective of this documentation, iii
Open components, 5-1
Operating system
Back up, 9-2
Updating, 9-4
Outdoor routing of cables, A-18
P
PC, 4-50
PG
Access to remote networks, 4-58
Connecting, 8-14, 8-15, 8-16, 8-17, 8-19
ungrounded configuration, 8-19
Point-to-point communication, 4-26
Index

Potential differences, 4-20
Power on
initial, 8-9
Requirements, 8-9
Power supply module
Selecting the mains voltage, 6-4
PROFIBUS, 4-25, 4-44, 4-47
PROFIBUS address
Recommendation, 4-29
PROFIBUS bus cable
Properties, 4-35
PROFIBUS device, 4-44
PROFIBUS DP
Commisioning, 8-25
Direct data exchange, 8-35
DP address areas, 8-25
DP diagnostics addresses, 8-26
Maximum number of nodes, 4-28
Maximum transmission rate, 4-27
PROFIBUS DP address
default, 4-28
highest, 4-28
Rules, 4-28
PROFIBUS DP Interface
PROFIBUS subnet
Cable lengths, 4-34
Example, 4-41
PROFIBUS terminator, 4-40
PROFINET, 4-26, 4-44, 4-47
CBA, 4-26
Commisioning, 8-37
Commissioning, 10-8
Commissioning via MPI/DP, 8-38
Commissioning via PN interface, 8-38
Configuring, 8-39
Environment, 4-43
Implementation, 4-47
IO, 4-26
Send clock, 4-52
standard, 4-47
Update times, 4-51
Update times of CPU 319-3 PN/DP, 4-52
PROFINET CBA, 4-26, 4-47
PROFINET devices, 4-43
PROFINET diagnostics
Evaluation, 10-40
Information, 10-39
Maintenance, 10-41
Maintenance information, 10-41
PROFINET IO, 4-26, 4-49
Commisioning, 8-37
Programming, 4-47
Protect digital output modules from inductive surge,
A-28
Protection class, 11-10
Protective conductor
Connecting to the mounting rail, 5-4
Connecting to the rail, 6-3
Protective grounding
measures, 4-19
Protective measures
for the overall system, 4-14
Proxy functionality, 4-47
PtP interface, 4-60
Pulseshaped disturbance, 11-5
R
Redundancy, A-31
Redundant and fail-safe system, A-31
Reference potential
grounded, 4-14
ungrounded, 4-15
Removing
of the modules, 9-10
Replacing
Fuses, 9-14
Module, 9-9
Replacing fuses
Digital output module, 9-14
Requirement class (RC)
Attainable, A-31
Routing, 4-58
Routing an equipotential bonding conductor, A-14
RS 485
Bus connector, 4-37
RS 485 repeater, 4-37
Rules and regulations for error-free operation, A-1
S
S7 Distributed Safety, A-31
S7 F/FH Systems, A-31
S7-300
initial power on, 8-9
S7-300 configuration
Components, 3-2
Example, 3-1
Safety class
Attainable, A-31
Index

Scope of this documentation, v
Scope of this manual, iii
Segment, 4-27
in the MPI subnet, 4-34
on the PROFIBUS subnet, 4-34
SF
LED, evaluation, 10-14
SFB52, 10-9
SFC 103, 4-37, 10-9
SFC 13, 10-9
SFC 51, 10-9
SFC 6, 10-9
SFC14, 7-8, 7-9
SFC15, 7-8, 7-9
Shielding contact element, 4-5, 6-12
installing, 6-13
Terminating cables, 6-14
Shielding terminals, 4-5
Shipping conditions, 11-7
Shock, 11-9
SIMATIC iMap, 4-47
SIMATIC Manager, 8-20
start, 8-20
SIMOTION, 4-50
Sinusoidal disturbance, 11-6
Slave diagnostics
installation, 10-31
Reading, example, 10-25
Slot number label, 5-2
Slot numbers
Assigning, 5-8
Mounting, 5-9
SNMP, 10-12
Integration into STEP 7, 10-11
MIB, 10-11
Network diagnostics, 10-11
SOFTNET PROFINET, 4-50
Standards and approvals, 11-1
Startup
CPU 31x-2 DP as a DP slave, 8-31
CPU 31xC-2 DP as a DP master, 8-27, 8-42
CPU 31xC-2 DP as a DP slave, 8-31
Station status, 10-32
stepping mode, 10-4
Storage conditions, 11-7
Strain relief, 6-9
Stub cables
Length, 4-35
Subnet, 4-25
Substitute, 4-47
SYNC/FREEZE, 8-29
Synchronous error, 10-6
T
Tags
Controlling, 10-4
Forcing, 10-4
Monitoring, 10-4
Technical data
Shipping and storage conditions, 11-7
Temperature, 11-7
MPI subnet, 4-40
Setting the bus connector, 6-16
Test voltage, 11-10
MPI interface, 4-31
Tools
required, 5-3
Transfer memory, 8-32
Troubleshooting, 10-6
U
UL
Approval, 11-2
Ungrounded configuration
connecting a PG, 8-19
Update
Operating system, 9-4
Requirements, 9-4, 9-5
Via network, 9-5
Update via Micro Memory Card, 9-4
V
Vibration, 11-9
W
WinLC, 4-50
Wiring
Accessories required, 6-1
Front connectors, 6-9
Front Connectors, 6-2
PS and CPU, 6-2, 6-5
Rules, 6-2
Tools and materials required, 6-1
SIMATIC Product Information for Fast Connect Connector
______________
______________

Introduction

1
Wiring I/O modules and
compact CPUs with Fast
Connect

2
SIMATIC

Product Information for
Fast Connect Connector
Product Information
07/2007
A5E01163594-01

Safety Guidelines
Safety Guidelines
DANGER
WARNING
CAUTION
CAUTION
NOTICE
account.
property damage.
Qualified Personnel
Prescribed Usage
Note the following:
WARNING
This device may only be used for the applications described in the catalog or the technical description and only
in connection with devices or components from other manufacturers which have been approved or
recommended by Siemens. Correct, reliable operation of the product requires proper transport, storage,
positioning and assembly as well as careful operation and maintenance.
Trademarks
owner.
editions.

Siemens AG
Postfach 48 48
90327 NRNBERG
GERMANY
Ordernumber: A5E01163594-01
08/2007

Product Information for Fast Connect Connector
Product Information, 06/2007, A5E01163594-01 3
Table of contents
1 Introduction................................................................................................................................................ 5
2 Wiring I/O modules and compact CPUs with Fast Connect ....................................................................... 7
Table of contents

4 Product Information, 06/2007, A5E01163594-01

Introduction
1
This product information describes supplements to:
S7-300 CPU 31xC and CPU 31x: Installation Operating Instructions, A5E00105491-07,
Edition 12/2006, Chapter 6, Wiring.
You can find this manual on the Internet at:
http://support.automation.siemens.com/WW/view/en/10805161/133300

Introduction


Wiring I/O modules and compact CPUs with Fast
Connect
2
Order numbers for Fast Connect Connectors
20-pin connector: 6ES7392-1CJ00-0AA0
40-pin connector: 6ES7392-1CM00-0AA0
Wiring I/O modules and compact CPUs with Fast Connect
I/O modules and compact CPUs can be wired with Fast Connect. The individual wires are
connected by means of the front connector using Fast Connect technology, which
requires no stripping.
Fast Connect is a connection method that requires no conductor preparation (i.e., the
conductor insulation does not have to be stripped).
Each terminal with Fast Connect has a test opening (e.g. for measuring the voltage). The
test opening is suitable for test probes with a maximum diameter of
1.5 mm.
Wire end ferrules are not permitted.
1
2
3
4
5
1
2
3
4
5

Numer
al
Designation
Opening for testing: max. 1.5 mm
Opening for a conductor: 0.25 mm
2
to 1.5 mm
2

Toothing for opening the terminal
Guide clip opened (the wire can be inserted)
Guide clip closed (the wire is connected)

Wiring rules for front connector with Fast Connect

20-pin front connector 40-pin front connector
Solid wires No No
Connectable wire cross-section of flexible wires
Without wire end ferrule 0.25 mm
2
to 1.5 mm
2
0.25 mm
2
to 1.5 mm
2

With wire end ferrule - - - - - -
Number of wires per terminal 1 1
Number of terminating cycles for the same conductor
cross-section
25
1
25
1

Maximum external diameter of the wire insulation 3,0 mm
2
3,0 mm
2

1
For 1.5 mm
2
only 10 terminating cycles are possible. If different conductor cross-sections are used in a connecting
terminal as a result of rewiring, it can be wired a maximum of 10 times.
Required tools
Screwdriver, 3.0 mm or 3.5 mm.
Connectable wires
Flexible conductors with PVC insulation and a conductor cross-section of: 0.25 mm
2
to
1.5 mm
2

A list of the tested conductors can be found at: http://www .weidmueller.de
UL-compliant cables and connections
Wiring range for insulating piercing connection 22 -16 AWG solid/stranded PVC insulated
conductors, UL style no. 1015 only.

Procedure for wiring with Fast Connect
1. Insert the unstripped wire into the round opening until it stops (the insulation and
conductor must form a flat surface) and secure the conductor in this position.
For 20-pin connector: at a 90 angle
For 40-pin connector: at a 45 angle
2. Insert the screwdriver into the indentation on the topside of the guide clip.
3. Press the screw driver downwards until the guide clip is engaged in the end position. The
wire is connected.
3 mm
1
2+3
2+3
1
90
45

Note
If you would like to reuse a conductor after it was already connected once then it must be
trimmed beforehand.

Procedure for disconnecting the wiring with Fast Connect
1. Insert the screwdriver into the opening next to the guide clip until it stops.
2. Using the screwdriver, apply upward leverage to the guide clip by means of the
appropriate toothing.
Repeat this action until the guide clip is engaged in the top position.
3. The wiring is disconnected. Remove the wire.

1
2
2
3

Figure 2-1 Disconnecting the wiring of a 40-pin Fast Connect connector

3
1
2
2

Figure 2-2 Disconnecting the wiring of a 20-pin Fast Connect connector
Copyright 2007 by Siemens AG
A5E00169346-04
Product Information
CPU 315F-2 DP, 6ES7 315-6FF01-0AB0, Edition 01, as of
Firmware V2.0.1
Deutsch
Diese Produktinformation enthlt wichtige Informationen zu 6ES7 315-6FF01-0AB0. Sie ist als separater
Bestandteil aufzufassen und in Zweifelsfllen in der Verbindlichkeit anderen Aussagen in Handbchern
und Katalogen bergeordnet.
Gltigkeitsbereich dieser Produktinformation
Diese Produktinformation ist gltig fr die CPU 315F-2 DP mit der Bestellnummer
6ES7 315-6FF01-0AB0, ab dem Hardware-Erzeugnisstand 01 und ab der
Firmware-Version V2.0.1.
In diesem Dokument beschreiben wir Ihnen die Spezifika der CPU 315F-2 DP im Vergleich
zur CPU 315-2 DP. Informationen zu der CPU 315-2 DP und der S7-300 finden Sie im
Dokumentationspaket 6ES7 398-8FA10-8AA0, welches Sie zustzlich zu dieser Produkt-
information bentigen.
Einsatzgebiete
Haupteinsatzgebiete der CPU 315F-2 DP sind Personen- und Maschinenschutz und
Brennersteuerungen. Neben dem Sicherheitsprogramm knnen Sie auch
Standard-Anwendungen programmieren.
Sie mchten die CPU 315F-2 DP einsetzen fr dann bentigen Sie
Anwendungen der Sicherheitstechnik STEP 7 ab Version 5.1 + Servicepack 6
STEP 7 ab Version 5.2 + Servicepack 1 + HSP 126
(fr Firmware ab V2.6.1)
Optionspaket S7 Distributed Safety ab V 5.2
Standard-Anwendungen STEP 7 ab Version 5.1 + Servicepack 6
STEP 7 ab Version 5.2 + Servicepack 1 + HSP 126
(fr Firmware ab V2.6.1)
2
Product Information CPU 315F-2 DP
A5E00169346-04
berblick ber die erweiterten Funktionen der CPU 315F-2 DP
Funktion CPU 315-2 DP
(6ES7315-2AG10-0AB0)
CPU 315F-2 DP
(6ES7 315-6FF01-0AB0)
Integrierter Arbeitsspeicher 128 KByte 192 KByte
Gre Prozessabbild E/A 128 Byte/ 128 Byte 384 Byte/ 384 Byte
Remanenzverhalten von DBs des Standard-Anwenderprogramms bei der CPU 315F-2 DP
Bei der CPU 315F-2 DP stehen Ihnen 192 KByte Arbeitsspeicher zur Verfgung. Davon
knnen Sie 128 KByte Datenspeicher fr Standard-Anwendungen nutzen. berschreiten Sie
diesen Bereich durch das Laden/Erzeugen weiterer DBs, wird dies von der F-CPU durch
eine Fehlermeldung abgewiesen.
Hintergrund:
Datenbausteine des Sicherheitsprogramms werden nicht remanent gespeichert. Sie gehen
deshalb nicht in die 128 KByte des remanenten Datenspeichers ein.
Spezielles Handling bei der Funktion RAMtoROM:
Datenbausteine des Sicherheitsprogramms werden nicht vom Arbeitsspeicher in den
Ladespeicher kopiert.
Anlaufschutz bei inkonsistentem Sicherheitsprogramm
Die CPU 315F-2 DP untersttzt in Verbindung mit Sicherheitsprogrammen, die mit
S7 Distributed Safety ab V5.4 SP1 erstellt wurden, die Erkennung eines inkonsistenten
Sicherheitsprogramms. D. h., erkennt die F-CPU im Anlauf ein inkonsistentes Sicherheitspro-
gramm, dann geht die F-CPU in Stop und im Diagnosepuffer der F-CPU wird das folgende
Diagnoseereignis eingetragen:
S Inkonsistentes Sicherheitsprogramm
Einschrnkungen bei SFC 22 CREAT_DB, SFC 23 DEL_DB und
SFC 82 CREA_DBL
F-DBs knnen weder erzeugt noch gelscht werden.
Einschrnkung bei SFC 83 READ_DBL und SFC 84 WRIT_DBL
Die Zieladresse darf nicht auf einen F-DB zeigen.
3
A5E00169346-04
Einschrnkung bei der Projektierung des Remanenzverhaltens von Datenbausteinen
Die Projektierung der Remanenz von Datenbausteinen wird fr F-DBs nicht untersttzt.
D. h., bei NETZ-AUS/EIN und Neustart (STOP-RUN) der F-CPU sind die Aktualwerte der
F-DBs nicht remanent. Die F-DBs erhalten die Anfangswerte aus dem Ladespeicher.
In den Baustein-Eigenschaften der F-DBs ist das Kontrollkstchen Non-Retain (nicht
remanent) aktiviert und gegraut dargestellt.
Versagenswahrscheinlichkeiten
Nachfolgend erhalten Sie die Werte fr die Versagenswahrscheinlichkeit der
CPU 315F-2 DP
Betrieb im geringen
Anforderungsmodus
low demand mode
(average probability of
failure on demand)
Betrieb im hufigen
Anforderungs- oder
kontinuierlichen Modus
high demand/continuous
mode (probability of a
dangerous failure per
hour)
Proof-Test-
Intervall
F-fhige CPU 315F-2 DP
6ES7315-6FF01-0AB0
2,38E-05 5,43E-10 10 Jahre
Betrieb mit der Trennbaugruppe 6ES7 195-7KF00-0XA0
!
Sicherheitshinweis
Die Trennbaugruppe (Best.-Nr. 6ES7 195-7KF00-0XA0, Erzeugnisstand 01 und 02) darf
nicht wie andere Baugruppen auf den selben Baugruppentrger wie die F-CPU gesteckt
werden. Ab Erzeugnisstand 03 der Trennbaugruppe gilt diese Einschrnkung nicht mehr.
Verzgerung des Anwenderprogramms bei Stationsausfall des DP-Masters
Beachten Sie bitte beim Einsatz der CPU 315F-2 DP als I-Slave Folgendes:
Ein Stationsausfall des DP-Masters (z. B. durch Leitungsunterbrechung der PROFIBUS-
Verbindung) kann die Bearbeitung des Anwenderprogramms im I-Slave durch die Fehlerbe-
handlung um bis zu 20 ms verlngern.
4
A5E00169346-04
English
This Product Information contains additional information about 6ES7 315-6FF01-0AB0. It is a separate
component and should be considered more up-to-date than the information in the manuals and catalogs if
uncertainties arise.
Validity of this Product Information
This product information is valid for CPU 315F-2 DP with order number
6ES7 315-6FF01-0AB0, as of hardware release 01 and as of Firmware V2.0.1.
This product information describes the essentials of CPU 315F-2 DP compared to CPU
315-2 DP. You will find more information on CPU 315-2 DP and S7-300 in the
6ES7 398-8FA10-8BA0 documentation package, which you require in addition to this
product information.
Areas of Application
CPU 315F-2 DP is mainly designed for personal and machine safety and burner controls.
In addition to the safety program, you can also program standard applications.
You intend to use CPU 315F-2 DP for then you require
Safety-related systems STEP 7 as of Version 5.1 + Service pack 6
STEP 7 as of Version 5.2 + Service pack 1 +
HSP 126 (for Firmware as of V2.6.1)
Option package S7 Distributed Safety as of V 5.2
Standard applications STEP 7 as of Version 5.1 + Service pack 6
STEP 7 as of Version 5.2 + Service pack 1 +
HSP 126 (for Firmware as of V2.6.1)
Overview of the extended functions of CPU 315F-2 DP
Function CPU 315-2 DP
(6ES7315-2AG10-0AB0)
CPU 315F-2 DP
(6ES7 315-6FF01-0AB0)
Integrated Memory 128 Kbytes 192 Kbytes
Size of I/O process image 128 Bytes/ 128 Bytes 384 Bytes/ 384 Bytes
Retentive Behavior of DBs for the Standard CPU 315F-2 DP User Program
With CPU 315F-2 DP, you have 192 Kbytes of memory and you can use 128 Kbytes of it for
the standard applications. If you exceed this range by downloading/creating additional DBs,
the F-CPU will reject them by sending an error message.
Background:
The data blocks of the safety program are not saved retentively. For this reason, they are not
placed in the retentive 128-Kbyte memory.
5
A5E00169346-04
Special Handling of the RAMtoROM Function:
Data blocks of the safety program are not copied to the the load memory by the work
memory.
Startup protection for inconsistent safety program
The CPU 315F-2 DP in connection with safety programs which were created with S7 Distri-
buted Safety as of V5.4 SP1, supports the detection of an inconsistent safety program. The
F-CPU therefore detects an inconsistent safety program in the startup. The F-CPU then goes
in Stop and the following diagnostic event is then entered in the diagnostic buffer of the F-
CPU:
S Inconsistent safety program
Restrictions with SFC 22 CREAT_DB, SFC 23 DEL_DB and
SFC 82 CREA_DBL
F-DBs can neither be created nor deleted.
Restrictions with SFC 83 READ_DBL and SFC 84 WRIT_DBL
The target address may not point to an F-DB.
Restrictions to Configuring the Retentive Behavior of Data Blocks
The configuration of retentive data blocks is not supported for F-DBs.
This means, in the event of Power OFF/ON and Restart (STOP-RUN) of the F-CPU, the
current values of the F-DBs will not be retentive. The F-DBs retain the intial values from the
loading memory. In the block properties of the F-DBs, the check box Non-Retain is not
activated and is thus grayed out.
Probabilities of Failure
Below are the values for the CPU 315F-2 DP probabilities of failure
Low Demand Mode of
Operation
low demand mode
failure on demand)
High Demand
Continuous Mode of
Operation
hour)
Proof Test
Interval
F-compatible CPU 315F-2 DP
6ES7315-6FF01-0AB0
2.38E-05 5.43E-10 10 years
6
A5E00169346-04
Operation with Safety Protector 6ES7 195-7KF00-0XA0
!
Safety Note
The isolation module (order number 6ES7 195-7KF00-0XA0, product version 01 and 02),
unlike other modules, must not be inserted in the same rack as the F-CPU. This restriction
does not apply to isolation module product versions 03 and higher.
Delay in the User Program During Station Failure of the DP Master
Please take note of the following while using the CPU 315F-2 DP as an I-slave:
A station failure of the DP master (e.g. because of a line break in the PROFIBUS connection)
can prolong the processing of the user program in I slave up to 20 ms due to error handling.
Franais
Cette Information produit contient des indications importantes concernant 6ES7 315-6FF01-0AB0. Elle
constitue un document spar et, en cas de doute, elle doit tre considre comme prioritaire par rapport
aux indications figurant dans les manuels et catalogues.
Domaine de validit de cette information produit
Cette information produit est valable pour la CPU 315F-2 DP avec le numro de rfrence
6ES7 315-6FF01-0AB0 partir de la version du matriel 01 et partir de la version du Firm-
ware V2.0.1.
Cette information produit dcrit les spcificits de la CPU 315F-2 DP compare la CPU
315-2 DP. Vous trouverez la description de la CPU 315-2 DP et du S7-300 dans
le pack de documentation 6ES7 398-8FA10-8CA0 dont vous aurez besoin en plus
de cette information produit.
Champs dapplication
Les principaux champs dapplication de la CPU 315F-2 DP sont la scurit des
personnes et des machines ainsi que la commande de brleurs. Outre le programme de
scurit, vous pouvez programmer des applications standard.
Pour utiliser la CPU 315F-2 DP dans des ... vous avez besoin de
applications de scurit STEP 7 partir de la version 5.1 + Servicepack 6
STEP 7 partir de la version 5.2 + Servicepack 1 +
HSP 126 ( partir de la version du Firmware V2.6.1)
Logiciel optionnel S7 Distributed Safety partir de la
version V 5.2
applications standard STEP 7 partir de la version 5.1 + Servicepack 6
STEP 7 partir de la version 5.2 + Servicepack 1 +
HSP 126 ( partir de la version du Firmware V2.6.1)
7
A5E00169346-04
Aperu des fonctions tendues de la CPU 315F-2 DP
Fonction CPU 315-2 DP
(6ES7315-2AG10-0AB0)
CPU 315F-2 DP
(6ES7 315-6FF01-0AB0)
Mmoire de travail intgre 128 Ko 192 Ko
Grande image mmoire E/S 128 octets / 128 octets 384 octets / 384 octets
Comportement de rmanence des DB du programme utilisateur standard pour la
CPU 315F-2 DP
La CPU 315F-2 DP dispose de 192 Ko de mmoire de travail. Vous pouvez en utiliser
128 Ko de mmoire de donnes pour les applications standard. Si vous dpassez cette
limite en chargeant/crant des DB supplmentaires, la F-CPU gnre un message derreur.
Explication :
Les blocs de donnes du programme de scurit ne sont pas mmoriss de manire rma-
nente. Ilns ne sont donc pas stocks dans les 128 Ko de la mmoire de donnes
rmanente.
Cas particulier de la fonction RAMtoROM :
Les blocs de donnes du programme de scurit ne sont pas copis de la mmoire de
travail vers la mmoire de chargement.
Protection contre le dmarrage en cas de programme de scurit incohrent
La CPU 315F-2 DP et partir prend en charge la dtection de lincohrence dun pro-
gramme de scurit si ce dernier a t cr avec S7 Distributed Safety partir de la version
V5.4 SP1. Cest--dire que si la CPU F dtecte un programme de scurit incohrent, elle
passe en STOP et lvnement de diagnostic suivant est alors inscrit dans le tampon de dia-
gnostic de la CPU F :
S Programme de scurit incohrent
Restrictions pour les SFC 22 CREAT_DB, SFC 23 DEL_DB et
SFC 82 CREA_DBL
Les blocs de donnes F ne peuvent tre ni gnrs ni effacs.
Restrictions pour les SFC 83 READ_DBL et SFC 84 WRIT_DBL
Ladresse de destination ne peut pas tre celle dun bloc de donnes F.
8
A5E00169346-04
Restriction relative la configuration de la rmanence des blocs de donnes
La configuration de la rmanence des blocs de donnes F nest pas prise en charge ;
cest--dire que les valeurs effectives des DB F ne sont pas rmanentes aprs une mise
hors tension et mise sous tension et redmarrage (STOP-RUN) de la CPU F. Les DB F
contiennent les valeurs initiales de la mmoire de chargement.
La case cocher Non-Retain (non rmanent) est active et grise dans les proprits
des blocs des DB F.
Probabilits de dfaillances
Le tableau suivant indique les probabilits de dfaillances de la CPU 315F-2 DP :
Fonctionnement en
mode demande faible
low demand mode
failure on demand)
Fonctionnement en
mode demande leve
hour)
Proof-Test-
Intervall
CPU F 315F-2 DP
6ES7 315-6FF01-0AB0
2,38E-05 5,43E-10 10 ans
Fonctionnement avec le module de sparation 6ES7 195-7KF00-0XA0
!
Information de scurit
Le module de sparation (numro de rfrence 6ES7 195-7KF00-0XA0, version 01 et 02)
ne doit pas tre enfich comme dautres modules dans le mme chssis que la CPU F.
Cette restriction ne sapplique plus partir de la version 03 du module de sparation.
Allongement du programme utilisateur en cas de dfaillance de la station du matre DP
Tenez compte de ce qui suit lors de lutilisation dune CPU 315F-2 DP comme esclave
intelligent :
Une dfaillance de la station du matre DP (par exemple due une rupture de fil de la liaison
PROFIBUS) peut entraner un allongement pouvant aller jusqu 20 ms de lexcution du
programme utilisateur dans lesclave I d au traitement des erreurs.
S7-300 Instruction List
CPU 31xC, CPU 31x,
IM 151-7 CPU, IM 154-8 CPU, BM 147-1 CPU, BM 147-2 CPU
This instruction list is part of the
documentation package with the order number:
6ES7398-8FA10-8BA0
6ES7198-8FA01-8BA0
05/2007
A5E00105517-09
We have checked the contents of this manual for agreement with the
hardware and software described. Since deviations cannot be pre-
cluded entirely, we cannot guarantee full agreement. However, the
data in this manual are reviewed regularly and any necessary cor-
rections included in subsequent editions. Suggestions for improve-
ment are welcomed.
Disclaim of Liability Copyright W Siemens AG 2007 All rights reserved
The reproduction, transmission or use of this document or its
contents is not permitted without express written authority.
Offenders will be liable for damages. All rights, including rights
created by patent grant or registration of a utility model or design, are
reserved.
Siemens AG
Postfach 4848
90437 NRNBERG / GERMANY
Siemens AG 2007
Technical data subject to change.
A5E00105517-09
Contents
1
S7-300 Instruction list, CPU 31xC, CPU 31x, IM 151-7 CPU, IM 154-8 CPU, BM 147-1 CPU, BM 147-2 CPU
A5E00105517-09
Contents
Validity Range of the Instructions List 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address Identifiers and Parameter Ranges 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Abbreviations and Mnemonics 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registers 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Examples of Addressing 18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Examples of how to calculate the pointer 21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Execution Times with Indirect Addressing 22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calculating the Execution Time Using a CPU 314C-2 DP as an Example 25 . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Instructions 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bit Logic Instructions 31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bit Logic Instructions with Parenthetical Expressions 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ORing of AND Operations 39 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Instructions with Timers and Counters 40 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Word Logic Instructions with the Contents of Accumulator 1 45 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Evaluating Conditions Using AND, OR and EXCLUSIVE OR 47 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Edge-Triggered Instructions 49 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
2
A5E00105517-09
Setting/Resetting Bit Addresses 51 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instructions Directly Affecting the RLO 54 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer Instructions 56 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter Instructions 58 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Instructions 60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Instructions for Timers and Counters 65 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transfer Instructions 66 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load and Transfer Instructions for Address Registers 72 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load and Transfer Instructions for the Status Word 74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Instructions for DB Number and DB Length 75 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Integer Math (16 Bits) 76 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Integer Math (32 Bits) 77 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Floating-Point Math (32 Bits) 78 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Square Root and Square Instructions (32 Bits) 80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logarithmic Function (32 Bits) 81 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trigonometrical Functions (32 Bits) 82 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adding Constants 83 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
3
A5E00105517-09
Adding Using Address Registers 84 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparison Instructions with Integers (16 Bits) 85 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparison Instructions with Integers (32 Bits) 86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparison Instructions with Real Numbers (32 Bits) 87 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shift Instructions 88 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rotate Instructions 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulator Transfer Instructions, Incrementing and Decrementing 91 . . . . . . . . . . . . . . . . . . . . . . . .
Program Display and Null Operation Instructions 92 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Type Conversion Instructions 93 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Forming the Ones and Twos Complements 95 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Call Instructions 96 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block End Instructions 98 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exchanging Shared Data Block and Instance Data Block 99 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Jump Instructions 100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instructions for the Master Control Relay (MCR) 105 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
4
A5E00105517-09
Organisation Blocks (OB) 106 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Blocks (FB) 113 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functions (FC) 113 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Blocks 114 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memory required by the SFBs for the integrated inputs and outputs 115 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Functions (SFC) 116 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Function Blocks (SFB) 132 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Function Blocks for S7-Communication via CP or Integrated
PROFINET Interface 138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function blocks for open system interconnection over Industrial Ethernet 140 . . . . . . . . . . . . . . . . . . . . . . . .
IEC Functions 141 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Status Sublist 145 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PROFIBUS DP Sublists 154 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
S7 Communication Sublists and PROFINET Sublists 157 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Validity Range of the Instructions List
5
A5E00105517-09
CPU As of order no.

As of Version In the following referred to as

Firmware
CPU 312 6ES7 312-1AE13-0AB0 V2.6 312
CPU 312C 6ES7 312-5BE03-0AB0
CPU 313C 6ES7 313-5BF03-0AB0 V2.6 31x
CPU 313C-2 PtP 6ES7 313-6BF03-0AB0
CPU 313C-2 DP 6ES7 313-6CF03-0AB0
CPU 314 6ES7 314-1AG13-0AB0
CPU 314C-2 PtP 6ES7 314-6BG03-0AB0
CPU 314C-2 DP 6ES7 314-6CG03-0AB0
CPU 315-2 DP 6ES7 315-2AG10-0AB0 V2.6 31x or 315
CPU 315-2 PN/DP 6ES7 315-2EH13-0AB0 V2.6 315 or 315 PN
CPU 315T-2 DP 6ES7 315-6TG10-0AB0 V2.4 315 or 315T
CPU 317-2 DP 6ES7 317-2AJ10-0AB0 V2.6 31x, 317
CPU 317-2 PN/DP 6ES7 317-2EK13-0AB0 V2.6 317 or 317 PN
CPU 317T-2 DP 6ES7 317-6TJ10-0AB0 V2.4 317 or 317T
CPU 3193 PN/DP 6ES7 3183EL000AB0 V2.6 319 or 319 PN
6
A5E00105517-09
CPU As of order no.

As of Version In the following referred to as

Firmware
BM 147-1 CPU 6ES7 147-1AA10-0AB0 V2.1.0 147
BM 147-2 CPU 6ES7 147-2AA00-0XB0 V2.1.0 147
IM 151-7 CPU 6ES7 151-7AA20-0AB0 V2.6 151
IM 154-8 CPU 6ES7 154-8AB00-0AB0 V2.5 154
Address Identifiers and Parameter Ranges
7
A5E00105517-09
Addr ID
Parameter Ranges
Description
Addr. ID
31x 147 151 154 317 / 319
Description
31x, 147, 151, 154 317 / 319
p
Q 0.0 to 127.7 (can be set up 2047.7
1)
) 0.0 to 255.7 (can be set up 2047.7
1)
) Output (in PIQ)
QB 0 to 127 (can be set up 2047
1)
) 0 to 255 (can be set up 2047
1)
) Output byte (in PIQ)
QW 0 to 126 (can be set up 2046
1)
1)
) Output word (in PIQ)
QD 0 to 124 (can be set up 2044
1)
1)
) Output double word (in PIQ)
1)
only CPU 315-2 PN, CPU 317-2 DP, CPU 317-2 PN/DP, CPU 319-3 PN/DP and IM 154-8 CPU
8
A5E00105517-09
Parameter Ranges Parameter Ranges
Addr. ID 31xC, 312, 314,
147, 151
315, 154 317 319
Description
DBX 0.0 to 16383.7 0.0 to 16383.7 0.0 to 65535.7 0.0 to 65535.7 Data bit in data block
DB 1 to 511 1 to 1023 1 to 2047 1 to 4095 Data block
DBB 0 to 16383 0 to 16383 0 to 65535 0 to 65535 Data byte in DB
DBW 0 to 16382 0 to 16382 0 to 65534 0 to 65534 Data word in DB
DBD 0 to 16380 0 to 16380 0 to 65532 0 to 65532 Data double word in DB
DIX 0.0 to 16383.7 0.0 to 16383.7 0.0 to 65535.7 0.0 to 65535.7 Data bit in instance DB
DI 1 to 511 1 to 1023 1 to 2047 1 to 2047 Instance data block
DIB 0 to 16383 0 to 16383 0 to 65535 0 to 65535 Data byte in instance DB
DIW 0 to 16382 0 to 16382 0 to 65534 0 to 65534 Data word in instance DB
DID 0 to 16380 0 to 16380 0 to 65532 0 to 65532 Data double word in instance DB
9
A5E00105517-09
Addr ID
Parameter Ranges
Description Addr. ID
31x, 147, 151, 154 317 / 319
Description
I 0.0 to 127.7 (can be set up 2047.7
1)
) 0.0 to 255.7 (can be set up 2047.7
1)
) Inputs (in PII)
IB 0 to 127 0 to 255 (can be set up 2047
1)
1)
) Input byte (in PII)
IW 0 to 126 0 to 254 (can be set up 2046
1)
1)
) Input word (in PII)
ID 0 to 124 0 to 252 (can be set up 2044
1)
1)
) Input double word (in PII)
Parameter Ranges
Addr. ID
312
313C, 314, 314C, 147,
151
315, 154 317 / 319
Description
L 0.0 to 255.7 0.0 to 509.7 0.0 to 509.7 0.0 to 1023.7 Local data bit
LB 0 to 255 0 to 509 0 to 509 0 to 1023 Local data byte
LW 0 to 254 0 to 508 0 to 508 0 to 1022 Local data word
LD 0 to 252 0 to 506 0 to 506 0 to 1020 Local data double word
1)
only CPU 315-2 PN, CPU 317-2 DP, CPU 317-2 PN/DP, CPU 319-3 PN/DP and IM 154-8 CPU
10
A5E00105517-09
Parameter Ranges
D i ti
Addr. ID 312 313C, 314, 314C,
147, 151
315, 154 317 319
Description
M 0.0 to 127.7 0.0 to 255.7 0.0 to 2047.7 0.0 to 4095.7 0.0 to 8191.7 Bit memory bit
MB 0 to 127 0 to 255 0 to 2047 0 to 4095 0 to 8191 Bit memory byte
MW 0 to 126 0 to 254 0 to 2046 0 to 4094 0 to 8190 Bit memory word
MD 0 to 124 0 to 252 0 to 2044 0 to 4092 0 to 8188 Bit memory double word
Addr. ID
Except for CPU 315, 317
and 319
315, 154 317 319 Description
PQB 0 to 1023 0 to 2047 0 to 8191 0 to 8191 Peripheral output byte
(direct I/O access)
PQW 0 to 1022 0 to 2046 0 to 8190 0 to 8190 Peripheral output word
(direct I/O access)
PQD 0 to 1020 0 to 2044 0 to 8188 0 to 8188 Peripheral output double word
(direct I/O access)
PIB 0 to 1023 0 to 2047 0 to 8191 0 to 8191 Peripheral input byte
(direct I/O access)
PIW 0 to 1022 0 to 2046 0 to 8190 0 to 8190 Peripheral input word
(direct I/O access)
PID 0 to 1020 0 to 2044 0 to 8188 0 to 8188 Peripheral input double word
(direct I/O access)
11
A5E00105517-09
Addr ID
Parameter Ranges
312 31x, 147, 151, 154 317 319
Description
T 0 127 0 255 0 to 511 0 to 2047 Timer
Z 0 127 0 255 0 to 511 0 to 2047 Counter
Parameter Instruction adressed via parameter
B#16#
W#16#
DW#16#
Byte
Word
Double word
hexadecimal
D# IEC date constant
L# 32-bit integer constant
P# Pointer constant
S5T#Time S5 time constant
1)
(16 bits),
T#1D_5H-3M_1S_2MS
T#Time IEC time constant,
T#1D_5H-3M_1S_2MS
TOD#Time time constant (16-/32-Bit),
T#1D_5H-3M_1S_2MS
C# Counter constant (BCD-codiert)
1)
for loading of S5 timers
12
A5E00105517-09
Addr ID
Parameter Ranges
312 31x, 147, 151, 154 317 319
Description
2# Binary constant
B (b1,b2)
B (b1,b2;
b3,b4)
Constant, 2 or 4 Byte
Abbreviations and Mnemonics
13
A5E00105517-09
The following abbreviations and mnemonics are used in the Instruction List:
Abbre-
viations
Description Example
k8 8-bit constant 32
k16 16-bit constant 631
k32 32-bit constant 1272 5624
i8 8-bit integer 155
i16 16-bit integer +6523
i32 32-bit integer 2 222 222
m P#x.y (pointer) P#240.3
n Binary constant 1001 1100
p Hexadecimal constant EA12
q Real number (32-bit floating-point number) 12.34567E+5
LABEL Symbolic jump address (max. 4 characters) DEST
a Byte address 2
b Bit address x.1
c Operand range I, Q, M, L, DBX, DIX
14
A5E00105517-09
Abbre-
viations
Description Example
f Timer/Counter No. 5
g Operand range IB, QB, PIB, MB, LB, DBB, DIB
h Operand range IW, QW, PIW, MW, LW, DBW, DIW
i Operand range ID, QD, PID, MD, LD, DBD, DID
r Block No. 10
Registers
15
A5E00105517-09
Registers
ACCU1 and ACCU2 (32 Bits)
The accumulators are registers for processing bytes, words or double words. The operands are loaded into the accumulators, where they
are logically gated. The result of the logic operation (RLO) is in ACCU1.
Accumulator designations:
ACCU Bits
ACCUx (x = 1 to 2) Bits 0 to 31
ACCUx-L Bits 0 to 15
ACCUx-H Bits 16 to 31
ACCUx-LL Bits 0 to 7
ACCUx-LH Bits 8 to 15
ACCUx-HL Bits 16 to 23
ACCUx-HH Bits 24 to 31
Registers
16
A5E00105517-09
Address Registers AR1 and AR2 (32 Bits)
The address registers contain the area-internal or area-crossing addresses for instructions using indirect addressing. The address regis-
ters are 32 bits long.
The area-internal and/or area-crossing addresses have the following syntax:
Area-internal address
00000000 00000bbb bbbbbbbb bbbbbxxx
Area-crossing address
10000yyy 00000bbb bbbbbbbb bbbbbxxx
Legend: b Byte address
x Bit number
y Area identifier (see section Examples of Addressing)
Registers
17
A5E00105517-09
Status Word (16 Bits)
The status word bits are evaluated or set by the instructions.
The status word is 16 bits long.
Bit Assignment Description
0 FC First check bit , Bit cannot be written and evaluated in the user program since it is not updated at program
runtime
1 RLO Result of (previous) logic operation
2 STA Status, Bit cannot be written and evaluated in the user program since it is not updated at program runtime
3 OR Or, Bit cannot be written and evaluated in the user program since it is not updated at program runtime
4 OS Stored overflow
5 OV Overflow
6 CC 0 Condition code
7 CC 1 Condition code
8 BR Binary result
9 ... 15 Unassigned
Examples of Addressing
18
A5E00105517-09
Addressing Examples Description
Immediate Addressing
L +27 Load 16-bit integer constant 27 into ACCU1
L L#1 Load 32-bit integer constant 1 into ACCU1
L 2#1010101010101010 Load binary constant into ACCU1
L DW#16#A0F0_BCFD Load hexadecimal constant into ACCU1
L END Load ASCII character into ACCU1
L T#500 ms Load time value into ACCU1
L C#100 Load count value into ACCU1
L B#(100,12) Load 2-byte constant
L B#(100,12,50,8) Load 4-byte constant
L P#10.0 Load area-internal pointer into ACCU1
L P#E20.6 Load area-crossing pointer into ACCU1
L 2.5 Load real number into ACCU1
L D#19950120 Load date
L TOD#13:20:33.125 Load time of day
19
A5E00105517-09
Direct Addressing
A I 0.0 ANDing of input bit 0.0
L IB 1 Load input byte 1 into ACCU1
L IW 0 Load input word 0 into ACCU1
L ID 0 Load input double word 0 into ACCU1
Indirect Addressing of Timers/Counters
SP T [LW 8] Start timer; the timer number is in local word 8
CU C [LW 10] Start counter; the counter number is in local data word 10
Area-Internal Memory-Indirect Addressing
A I [LD 12]
Example: L P#22.2
T LD 12
A I [LD 12]
AND operation: The address of the input is in local data double word 12 as pointer
A I [DBD 1] AND operation: The address of the input is in data double word 1 of the DB as pointer
A Q [DID 12] AND operation: The address of the output is in data double word 12 of the instance DB as pointer
A Q [MD 12] AND operation: The address of the output is in memory marker double word 12 of the instance DB as
pointer
20
A5E00105517-09
Area-Internal Register-Indirect Addressing
A I [AR1,P#12.2] AND operation: The address of the input is calculated from the pointer value in AR1+ P#12.2
Area-Crossing Register-Indirect Addressing
For area-crossing register-indirect addressing, bits 24 to 26 of the address must also contain an area identifier. The address is in the
address register.
Area Coding Coding Area
identifier (binary) (hex.)
P 1000 0000 80 I/O area
I 1000 0001 81 Input area
Q 1000 0010 82 Output area
M 1000 0011 83 Bit memory area
DB 1000 0100 84 Data area
DI 1000 0101 85 Instance data area
L 1000 0110 86 Local data area
VL 1000 0111 87 Predecessor local data (access to local data of invoking block)
L B [AR1,P#8.0] Load byte into ACCU1: The address is calculated from the pointer value in AR1+ P#8.0
A [AR1,P#32.3] AND operation: The address of the operand is calculated from the pointer value in AR1+ P#32.3
Addressing Via Parameters
A Parameter Addressing via parameters
Examples of how to calculate the pointer
21
A5E00105517-09
Examples of how to calculate the pointer
Example for sum of bit addresses x7:
LAR1 P#8.2
A I [AR1,P#10.2]
Result: Input 18.4 is addressed (by adding the byte and bit addresses)
Example for sum of bit addressesu7:
L MD 0 Random pointer, e.g. P#10.5
LAR1
A I [AR1,P#10.7]
Result: Input 21.4 is addressed (by adding the byte and bit addresses with carry)
Execution Times with Indirect Addressing
22
A5E00105517-09
You must calculate the execution times when using indirect addressing. This chapter shows you how.
Two-Part Statement
A statement with indirectly addressed instructions consists of two parts:
Part 1: Load the address of the instruction
Part 2: Execute the instruction
In other words, you must calculate the execution time of a statement with indirectly addressed instructions from these two parts.
23
A5E00105517-09
Calculating the Execution Time
The total execution time is calculated as follows:
Time required for loading the address
+ execution time of the instruction
= Total execution time of the instruction
The execution times listed in the chapter entitled List of Instructions apply to the execution times of the second part of an instruction, i.e.
for the actual execution of an instruction.
You must then add the time required for loading the address of the instruction to this execution time (see Table on following page).
24
A5E00105517-09
The execution time for loading the address of the instruction from the various areas is shown in the following table.
Address is in
Execution Time in ms
Address is in ...
312 31x, 147, 151, 154 317 319
Bit memory area M
Word (for times, counters and block calls)
Double word
0.7
1.6
0.4
0.9
0.08
0.21
0.02
0.05
Data block DB/DX
Double word
1.5
3.7
0.8
2.0
0.20
0.25
0.02
0.05
Local data area L
Double word
0.9
2.2
0.5
1.2
0.08
0.20
0.02
0.05
AR1/AR2 (area-internal) 1.0 0.5 0.20 0.02
1)
AR1/AR2 (area-crossing) 3.0 1.6 0.31 0.05
Parameter (word) ... for:
Timers
Counters
Block calls
2.0 1.0 0.08 0.02
Parameter (double word) ... for
Bits, bytes, words and double words
4.0 2.0 0.26 0.01
The pages that follow contain examples for calculating the instruction run time for the various indirectly addressed instructions.
1)
For the adress areas I/Q/M/L 0.05 ms
Calculating the Execution Time Using a CPU 314C-2 DP as an Example
25
A5E00105517-09
You will find a few examples here for calculating the execution times for the various methods of indirect addressing. Execution times are
calculated for the CPU 314C-2 DP.
Calculating the Execution Times for Area-Internal Memory-Indirect Addressing
Example: A I [DBD 12]
Step 1: Load the contents of DBD 12 (time required is listed in the table on page 24)
Address is in ... Execution Time in ms
Bit memory area M
Word
Double word
0.4
0.9
Data block DB/DI
Word
Double word
2.0
0.8
26
A5E00105517-09
Step 2: AND the input addressed in this way (you will find the execution time in the tables in the chapter entitled List of Instructions)
Typical Execution Time in ms
Direct Addressing Indirect Addressing
0.1
:
1.6+
:
Time for
A I
Total execution time:
2.0 s
+ 1.6 s
= 3.6 s
27
A5E00105517-09
Calculating the Execution Time for Area-Internal Register-Indirect Addressing
Example: A I [AR1, P#34.3]
Step 1: Load the contents of AR1, and increment it by the offset 34.3 (the time required is listed in the table on page 24)
: :
AR1/AR2 (area-internal) 0.5
: :
0.1
:
1.6+
:
Time for
A I
0.5 s
+ 1.6 s
= 2.1 s
28
A5E00105517-09
Calculating the Execution Time for Area-Crossing Memory-Indirect Addressing
Example: A [AR1, P#23.1] ... with I 1.0 in AR1
Step 1: Load the contents of AR1, and increment them by the offset 23.1 (the time required is in the table on page 24)
: :
AR1/AR2 (area-crossing) 1.6
: :
0.1
:
1.6+
:
Time for
A I
1.6 s
+ 1.6 s
= 3.2 s
29
A5E00105517-09
Execution Time for Addressing via Parameters
Example: A Parameter ... with I 0.5 in the block parameter list
Step 1: Load input I 0.5 addressed via the parameter (the time required is in the table on page 24).
: :
: :
Parameter (double word) 2.0
0.1
:
1.6+
:
Time for
A I
2.0 s
+ 1.6 s
= 3.6 s
List of Instructions
30
A5E00105517-09
List of Instructions
This chapter contains the complete list of S7-300 instructions. The descriptions have been kept as concise as possible. You will find a de-
tailed functional description in the various STEP 7 reference manuals.
Please note that, in the case of indirect addressing (examples see page 19), you must add the time required for loading the address of the
particular instruction to the execution times listed (see page 24).
Bit Logic Instructions
31
A5E00105517-09
Examining the signal state of the addressed instruction and gating the result with the RLO according to the appropriate logic function.
Instruc- Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
A
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
AND
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.2
0.4
0.7
2.9
2.9
0.1
0.2
0.3
1.4
1.4
0.05
0.05
0.06
0.17
0.17
0.01
0.01
0.02
0.02
0.02
3.0+
3.2+
3.7+
4.5+
4.5+
1.6+
1.7+
2.0+
2.4+
2.4+
0.09+
0.09+
0.07+
0.08+
0.07+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Register-ind., area-internal (AR1)
Area-crossing via (AR1)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: A BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes Yes Yes
Instruction affects: Yes Yes Yes 1
1)
Plus time required for loading the address of the instruction (see page 24)
2)
With direct instruction addressing/ with indirect instruction adressing
32
A5E00105517-09
Instruc- Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
AN
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
AND NOT
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.3
0.4
0.8
3.0
3.0
0.2
0.2
0.4
1.5
1.5
0.05
0.05
0.06
0.17
0.17
0.01
0.01
0.02
0.02
0.02
3.2+
3.4+
3.9+
4.7+
4.7+
1.7+
1.8+
2.1+
2.5+
2.5+
0.09+
0.09+
0.08+
0.09+
0.07+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Register-ind., area-inter-
nal (AR1)
nal (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: AN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
33
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
O
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
OR
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.2
0.3
0.7
2.9
2.9
0.1
0.2
0.3
1.4
1.4
0.05
0.05
0.06
0.20
0.20
0.01
0.01
0.02
0.02
0.02
3.0+
3.2+
3.7+
4.6+
4.6+
1.6+
1.7+
2.0+
2.4+
2.4+
0.11+
0.11+
0.10+
0.11+
0.09+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
nal (AR1)
nal (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: O BR CC 1 CC 0 OV OS OR STA RLO2 FC
Instruction depends on: Yes Yes
Instruction affects: 0 Yes Yes 1
1)
2)
34
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
ON
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
OR NOT
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.3
0.4
0.8
3.0
3.0
0.2
0.2
0.4
1.5
1.5
0.05
0.05
0.06
0.20
0.20
0.01
0.01
0.02
0.02
0.02
3.2+
3.5+
3.9+
4.7+
4.7+
1.7+
1.8+
2.1+
2.5+
2.5+
0.11+
0.11+
0.10+
0.11+
0.09+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
nal (AR1)
nal (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: ON BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
35
A5E00105517-09
Instruc-
tion
Length
in
Words
2)
Description
Address
Identifier
Instruc- Address
Description
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruc
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
X
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
EXCLUSIVE OR
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.2
0.3
0.7
2.9
2.9
0.1
0.2
0.3
1.4
1.4
0.05
0.05
0.06
0.20
0.20
0.01
0.01
0.02
0.02
0.02
2.9+
3.2+
3.7+
4.5+
4.5+
1.6+
1.7+
2.0+
2.4+
2.4+
0.11+
0.11+
0.10+
0.11+
0.09+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Register-ind., area-in-
ternal (AR1)
Register-ind., area-in-
ternal (AR2)
Area-crossing via
(AR1)
Area-crossing via
(AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: X BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
36
A5E00105517-09
Instruc- Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
XN
I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
EXCLUSIVE OR NOT
Input/output
Bit memory
Local data bit
Data bit
Instance data bit
1/2
1/2
2
2
2
0.3
0.4
0.8
3.0
3.0
0.2
0.2
0.4
1.5
1.5
0.05
0.05
0.06
0.20
0.20
0.01
0.01
0.02
0.02
0.02
3.2+
3.5+
3.9+
4.7+
4.7+
1.7+
1.8+
2.1+
2.5+
2.5+
0.11+
0.11+
0.10+
0.11+
0.10+
0.01+
0.01+
0.01+
0.01+
0.01+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
nal (AR1)
nal (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: XN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
Bit Logic Instructions with Parenthetical Expressions
37
A5E00105517-09
Saving the BR, RLO and OR bits and a function identifier (A, AN, ...) to the nesting stack. Seven nesting levels are possible per block. The
listed parenthesese also apply to the right parenthesis-Instructions.
Address
1)
1
Instruction
Address
Identifier
Description Length in
Words
312
31x, 147,
151, 154
317 319
A( AND left parenthesis 1 3.2 1.6 0.18 0.02
AN( AND NOT left parenthesis 1 3.3 1.6 0.18 0.02
O( OR left parenthesis 1 3.0 1.5 0.11 0.02
ON( OR NOT left parenthesis 1 3.0 1.5 0.11 0.02
X( EXCLUSIVE OR left pa-
renthesis
1 3.0 1.5 0.11 0.02
XN( EXCLUSIVE OR NOT
left parenthesis
1 3.0 1.5 0.11 0.02
Status word for: A(, AN(, O(, ON(, X(, XN( BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes Yes Yes Yes
Instruction affects: 0 1 0
1)
also applies to right parenthesis- Instructions
38
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
) Right parenthesis, pop-
ping an entry off the nest-
ing stack, gating the RLO
with the current RLO in
the processor
1 1.0 1.0 0.1 0.02
Status word for: ) BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes
Instruction affects: Yes Yes 1 Yes 1
ORing of AND Operations
39
A5E00105517-09
ORing of AND Operations
The ORing of AND operations is implemented according to the rule: AND before OR.
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
O ORing of AND
operations according
to the rule:
AND before OR
1 0.2 0.1 0.04 0.01
Status word for: O BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes 1 Yes
Logic Instructions with Timers and Counters
40
A5E00105517-09
Examining the signal state of the addressed timer/counter and gating the result with the RLO according to the appropriate logic function.
Address
Length
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
A
T f
C f
AND
Timer
Counter
1/2+
1/2+
0.6
0.3
0.3
0.2
0.36
0.10
0.13
0.09
2.1+
2.0+
1.1+
1.1+
0.42+
0.13+
0.13+
0.09+
Timer para.
Counter p.
Timer/counter
(adressed via
parameter)
2
+
+
+
+
+
+
+
+
Status word for: A CC 1 BR CC 0 OV OS OR STA RLO FC
1)
2)
41
A5E00105517-09

Instruction
Address
Description
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
AN
T f
C f
AND NOT
Timer
Counter
1/2
1/2
0.8
0.5
0.4
0.3
0.36
0.10
0.13
0.09
2.3+
2.2+
1.2+
1.2+
0.42+
0.13+
0.13+
0.09+
Timer para.
Counter p.
Timer/counter
(addressed via
parameter)
2
+
+
+
+
+
+
+
+
Status word for: AN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
42
A5E00105517-09
Address
Length
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
O T f
C f
OR timer
OR counter
1/2
1/2
0.6
0.3
0.3
0.2
0.36
0.10
0.13
0.09
2.1+
2.0+
1.1+
1.0+
0.42+
0.13+
0.13+
0.09+
Timerpara.
Counter p.
OR timer/counter
(adressed via pa-
rameter)
2
+
+
+
+
+
+
+
+
ON T f
C f
OR NOT timer
OR NOT counter
1/2
1/2
0.8
0.5
0.4
0.3
0.36
0.10
0.13
0.09
2.3+
2.2+
1.2+
1.1+
0.42+
0.13+
0.13+
0.09+
Timerpara.
Counter p.
OR NOT timer/
counter (ad-
dressed via pa-
rameter)
2
+
+
+
+
+
+
+
+
1)
2)
43
A5E00105517-09
Instruction
Length
in
Words
2)
Description
Address
Identifier
Instruction
Indirect
Addressing
1)
Direct
Addressing
Length
in
Words
2)
Description
Address
Identifier
Instruction
319 317
31x,
147,
151,
154
312 319 317
31x,
147,
151,
154
312
Length
in
Words
2)
Description
Address
Identifier
X T f
C f
EXCLUSIVE OR
timer
EXCLUSIVE OR
counter
1/2
1/2
0.6
0.4
0.3
0.2
0.36
0.10
0.13
0.09
2.1+
2.0+
1.1+
1.1+
0.42+
0.13+
0.13+
0.09+
Timerpara.
Counter p.
EXCLUSIVE OR
timer/counter
(addressed via
parameter)
2
+
+
+
+
+
+
+
+
Status word for: O, ON, X BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
44
A5E00105517-09
Address
Length
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
XN T f
C f
EXCLUSIVE OR
NOT timer
EXCLUSIVE OR
NOT counter
1/2
1/2
0.8
0.5
0.4
0.3
0.36
0.10
0.13
0.09
2.3+
2.2+
1.2+
1.2+
0.42+
0.13+
0.13+
0.09+
Timerpara.
Counter p.
EXCLUSIVE OR
NOT timer/coun-
ter (addressed
via parameter)
2
+
+
+
+
+
+
+
+
Status word for: XN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
Word Logic Instructions with the Contents of Accumulator 1
45
A5E00105517-09
Gating the contents of ACCU1 and/or ACCU1-L with a word or double word according to the appropriate function. The word or double word
is either a constant in the instruction or in ACCU2. The result is in ACCU1 and/or ACCU1-L.
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
AW AND ACCU2-L 1 0.6 0.3 0.21 0.02
AW k16 AND 16-bit constant 2 0.6 0.3 0.19 0.02
OW OR ACCU2-L 1 0.6 0.3 0.18 0.02
OW k16 OR 16-bit constant 2 0.6 0.3 0.18 0.02
XOW EXCLUSIVE OR ACCU2-L 1 0.6 0.3 0.21 0.02
XOW k16 EXCLUSIVE OR 16-bit constant 2 0.6 0.3 0.21 0.02
AD AND ACCU2 1 1.9 1.0 0.13 0.02
AD k32 AND 32-bit constant 3 2.1 1.0 0.18 0.02
Status word for: AW, OW, XOW, AD BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on:
Instruction affects: Yes 0 0
46
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
OD OR ACCU2 1 1.9 1.0 0.13 0.02
OD k32 OR 32-bit constant 3 2.1 1.0 0.18 0.02
XOD EXCLUSIVE OR ACCU2 1 1.9 1.0 0.13 0.02
XOD k32 EXCLUSIVE OR 32-bit constant 3 2.1 1.0 0.18 0.02
Status word for: OD, XOD BR CC 1 CC 0 OV OS OR STA RLO FC
Evaluating Conditions Using AND, OR and EXCLUSIVE OR
47
A5E00105517-09
Examining the specified conditions for their signal status, and gating the result with the RLO according to the appropriate function.
In-
Ad-
dress
In-
struc-
tion
dress
Identi-
fier
Description
Length
in Words
312
31x, 147,
151, 154
317 319
A/
O/
X
==0 AND, OR, EXCLUSIVE OR
Result=0 (CC 1=0)and (CC 0=0)
1 0.3 0.2 0.03 0.03
X
>0 Result>0 (CC 1=1) and (CC 0=0) 1 0.5 0.3 0.05 0.03
<0 Result<0 (CC 1=0)and (CC 0=1) 1 0.5 0.3 0.05 0.03
<>0 Result00 ((CC1=0)and(CC 0=1)or (CC1=1)and(CC 0=0)) 1 0.3 0.2 0.05 0.03
<=0 R<=0((CC 1=0) and (CC 0=1) or (CC1=0) and (CC 0=0)) 1 0.3 0.2 0.03 0.03
>=0 R>=0((CC 1=1) and (CC 0=0) or (CC1=0) and (CC 0=0)) 1 0.3 0.2 0.03 0.03
UO AND
unordered math instruction (CC 1=1) and (CC 0=1)
1 0.3 0.2 0.03 0.03
OS AND OS=1 1 0.2 0.1 0.03 0.03
BR AND BR=1 1 0.2 0.1 0.03 0.03
OV AND OV=1 1 0.2 0.1 0.03 0.03
Status word for: A/ O/ X BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes Yes Yes Yes Yes Yes Yes Yes
48
A5E00105517-09
In-
Address
In-
struc-
tion
Address
Identifier
Description Length
in Words
312
31x, 147,
151, 154
317 319
AN/
ON/
XN
==0 AND NOT, OR NOT, EXCLUSIVE OR NOT
Result=0 (CC 1=0) and (CC 0=0)
1 0.3 0.2 0.03 0.03
XN
>0 Result>0 (CC 1=1) and (CC 0=0) 1 0.5 0.3 0.05 0.03
<0 Result<0 (CC 1=0) and (CC 0=1) 1 0.5 0.3 0.05 0.03
<>0 Result00
((CC 1=0) and (CC 0=1) or (CC 1=1) and (CC 0=0))
1 0.5 0.3 0.05 0.03
<=0 Result<=0
1 0.2 0.1 0.03 0.03
>=0 Result>=0
1 0.2 0.1 0.03 0.03
UO unordered math instruction (CC 1=1) and (CC
0=1)
1 0.5 0.3 0.03 0.03
OS OS=1 1 0.3 0.2 0.03 0.03
BR BR=1 1 0.3 0.2 0.03 0.03
OV OV=1 1 0.3 0.2 0.03 0.03
Status word for: AN/ ON/ XN BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes Yes Yes Yes Yes Yes Yes Yes
Edge-Triggered Instructions
49
A5E00105517-09
Detection of an edge change. The current signal state of the RLO is compared with the signal state of the instruction or edge bit memory.
FP detects a change in the RLO from 0 to 1; FN detects a change in the RLO from 1 to 0.
Instruc- Address Length
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
Length
in Words
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
FP I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
Detecting the positive
edge in the RLO. The
bit addressed in the
instruction is the
auxiliary edge bit me-
mory
2
2
2
2
2
0.5
1.0
1.2
3.6
3.6
0.3
0.5
0.6
1.8
1.8
0.13
0.29
0.30
0.20
0.20
0.04
0.04
0.04
0.04
0.04
3.3+
3.6+
4.0+
5.2+
5.2+
1.8+
1.9+
2.1+
2.7+
2.7+
0.10+
0.10+
0.08+
0.11+
0.09+
0.02+
0.02+
0.02+
0.02+
0.02+
mory.
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: FP BR CC 1 CC 0 OV OS OR STA RLO FC
1)
50
A5E00105517-09
Instruc- Address Length
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
Length
in Words
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
FN I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
Detecting the negtive
edge in the RLO. The
bit addressed in the
intruction is the auxi-
liary edge bit memory.
2
2
2
2
2
0.7
1.1
1.3
3.7
3.7
0.3
0.5
0.7
1.9
1.9
0.13
0.13
0.14
0.20
0.20
0.04
0.04
0.04
0.04
0.04
3.5+
3.8+
4.2+
5.2+
5.2+
1.9+
2.0+
2.2+
2.8+
2.8+
0.10+
0.10+
0.08+
0.11+
0.09+
0.02+
0.02+
0.02+
0.02+
0.02+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: FN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
Setting/Resetting Bit Addresses
51
A5E00105517-09
Assigning the value 1 or 0 or the RLO o the addressed instruction. The instructions can be MCRdependent.
L th
In-
struc-
Address
Identifier
Description
Length
in
Words
Direct
Addressing
Indirect
Addressing
1)
struc
tion
Identifier
p
Words
2)
312
31x,147
151,154
317 319 312
31x,147
151,154
317 319
S I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
Set input/output to 1
(MCR-dependent)
Set bit memory to 1
(MCR-dependent)
Set local data bit to 1
(MCR-dependent)
Set data bit to 1
(MCR-dependent)
Set instance data bit to 1
(MCR-dependent)
1/2
1/2
2
2
2
0.2
0.3
0.4
1.8
0.9
2.0
3.4
3.5
3.4
3.5
0.1
0.2
0.2
0.9
0.4
1.0
1.7
1.7
1.7
1.7
0.11
0.13
0.11
0.13
0.12
0.14
0.19
0.19
0.19
0.19
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
3.1+
3.3+
3.4+
3.7+
3.8+
3.9+
4.8+
5.0+
4.8+
5.0+
1.7+
1.8+
1.8+
2.0+
2.0+
2.1+
2.6+
2.7+
2.6+
2.7+
0.08+
0.10+
0.11+
0.12+
0.07+
0.09+
0.10+
0.11+
0.09+
0.11+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: S BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: 0 Yes 0
1)

2)
With direct instruction addressing/ with indirect instruction addressing
52
A5E00105517-09
Address
Length
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Word
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
R I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
Reset input/output to 0
(MCR-dependent)
Set bit memory to 0
(MCR-dependent)
Set local data bit to 0
(MCR-dependent)
Set data bit to 0
(MCR-dependent)
Set instance data bit to 0
(MCR-dependent)
1/2
1/2
2
2
2
0.3
0.3
0.5
1.8
0.9
2.0
3.4
3.6
3.4
3.6
0.1
0.2
0.3
0.9
0.4
1.0
1.7
1.8
1.7
1.8
0.12
0.13
0.12
0.13
0.12
0.14
0.23
0.25
0.23
0.25
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
3.2+
3.5+
3.5+
3.6+
3.9+
4.0+
5.0+
5.1+
5.0+
5.1+
1.7+
1.8+
1.8+
1.9+
2.1+
2.1+
2.6+
2.7+
2.6+
2.7+
0.08+
0.11+
0.11+
0.13+
0.10+
0.12+
0.14+
0.16+
0.13+
0.16+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Register-ind., area-internal
(AR1)
Register-ind., area-internal
(AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: R BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
53
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
= I/Q a.b
M a.b
L a.b
DBX a.b
DIX a.b
Assign RLO to input/output
(MCR-dependent)
Assign RLO to bit memory
(MCR-dependent)
Assign RLO to local data bit
(MCR-dependent)
Assign RLO to data bit
(MCR-dependent)
Assign RLO to instance data bit
(MCR-dependent)
1/2
1/2
2
2
2
0.2
0.3
0.6
1.8
0.8
2.1
3.4
3.6
3.4
3.6
0.1
0.2
0.3
0.9
0.4
1.0
1.7
1.8
1.7
1.8
0.08
0.10
0.08
0.10
0.09
0.11
0.23
0.23
0.23
0.23
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
0.02
0.06
3.2+
3.4+
3.5+
3.7+
3.9+
4.1+
5.0+
5.1+
5.0+
5.1+
1.7+
1.8+
1.8+
2.0+
2.0+
2.2+
2.6+
2.7+
2.6+
2.7+
0.10+
0.11+
0.13+
0.13+
0.12+
0.12+
0.16+
0.16+
0.15+
0.16+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
0.02+
0.06+
c[AR1,m]
c[AR2,m]
[AR1,m]
[AR2,m]
Parameter
Register-ind., area-internal(AR1)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Status word for: = BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
Instructions Directly Affecting the RLO
54
A5E00105517-09
The following instructions have a direct effect on the RLO.
Address
Length in Typical Execution Time in ms
Instruction
Address
Identifier
Description
g
Words
312
31x, 147,
151, 154
317 319
CLR Set RLO to 0 2 0.2 0.1 0.03 0.01
Status word for: CLR BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: 0 0 0 0
SET Set RLO to 1 2 0.2 0.1 0.03 0.01
Status word for: SET BR CC 1 CC 0 OV OS OR STA RLO FC
NOT Negate RLO 2 0.2 0.1 0.03 0.01
Status word for: NOT BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: 1 Yes
55
A5E00105517-09
Address
Length in Typical Execution Time in ms
Instruction
Address
Identifier
Description
g
Words
312
31x, 147,
151, 154
317 319
SAVE Retain the RLO in
the Bit BR
1 0.2 0.1 0.03 0.01
Status word for: SAVE BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes
Timer Instructions
56
A5E00105517-09
Timer Instructions
Starting or resetting a timer (addressed directly or via a parameter). The time value must be in ACCU1-L.
Instruction
Address
Identifier
Description
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruction
Identifier
Description in
Words
2)
312
31x, 147,
151, 154
317 319 312
31x, 147,
151, 154
317 319
SP T f Start timer as pulse
on edge change from
4/6 4.4 2.3 0.91 0.20 5.4+ 2.9+ 0.84+ 0.20+
Timer para.
on edge change from
0 to 1
2 + + + +
SE T f Start timer as exded
pulse on edge change
4/6 2.2 1.1 0.91 0.18 2.2+ 1.2+ 0.84+ 0.18+
Timer para.
pulse on edge change
from 0 to 1
2 + + + +
SD T f Start timer as ON
delay on edge change
4/6 4.6 2.4 0.91 0.23 5.5+ 3.0+ 0.85+ 0.23+
Timer para.
delay on edge change
from 0 to 1
2 + + + +
SS T f Start timer as retive
ON delay on edge
4/6 4.7 2.4 0.91 0.20 5.7+ 3.0+ 0.86+ 0.20+
Timer para.
ON delay on edge
change from 0 to 1
2 + + + +
Status word for: SP, SE, SD, SS BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: 0 0
1)

2)
Timer Instructions
57
A5E00105517-09
Length Direct Addressing Indirect Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
SA T f Start timer as off-delay
timer when the edge
4/6 4.9 2.5 0.97 0.24 5.9+ 3.2+ 0.88+ 0.24+
Timer para.
timer when the edge
changes from 1 to 0.
2 + + + +
FR T f Enable timer for restarting
on edge change from 0
4/6 2.3 1.2 0.79 0.10 2.8+ 1.5+ 0.70 0.10+
Timer para.
on edge change from 0
to 1 (reset edge bit
memory for starting timer)
2 + + + +
R T f Reset timer 4/6 2.3 1.1 0.44 0.12 2.8+ 1.5+ 0.41 0.12+
Timer para. 2 + + + +
Status word for: SA, FR, R BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
With direct instruction addressing
Counter Instructions
58
A5E00105517-09
The count value is in ACCU1-L or in the address transferred as parameter.
Length Direct Addressing Indirect Addressing
1)
Instruction
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
S C f Presetting of counter
on edge change from
4/6 3.3 1.7 0.33 0.14 4.5+ 2.4+ 0.29+ 0.14+
Counter p.
on edge change from
0 to 1
2 + + + +
R C f Reset counter to 0 4/6 1.3 0.6 0.17 0.10 2.1+ 1.1+ 0.13+ 0.10+
Counter p. 2 + + + +
CU C f Increment counter by
1 on edge change
4/6 1.9 1.0 0.20 0.10 2.9+ 1.6+ 0.17+ 0.10+
Counter p.
1 on edge change
from 0 to 1
2 + + + +
CD C f Decrement counter
by 1 on edge change
4/6 1.9 0.9 0.20 0.10 2.9+ 1.5+ 0.17+ 0.10+
Counter p.
by 1 on edge change
from 0 to 1
2 + + + +
Status word for: S, R, CU, CD BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
59
A5E00105517-09
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
FR C f Enable counter on
edge change from 0
2 1.6 0.8 0.20 0.10 2.6+ 1.4 0.17+ 0.10+
Counter p.
memory for up and
down counting)
2 + +
Status word for: FR BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
Load Instructions
60
A5E00105517-09
Load Instructions
Loading address identifiers into ACCU1. The conts of ACCU1 and ACCU2 are saved first. The status word is not affected.
In- Length
1)
In-
struc-
tion
Address
Identifier
Description
Length
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
L
IB a
QB a
PIB a
PIB a
PIB a
PIB a
PIB a
PIB a
PIB a
Load ...
Input byte
Output byte
Peripheral input byte for 31x
... for 147
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
Digital Onboard I/O
3)
Analog Onboard I/O
4)
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
0.4
0.4
70.2
51.5
0.2
0.2
43.3
50.5
104.8
136.4
68.3
48.3
162.1
0.05
0.05
15.01
0.01
0.01
13.1
2.7+
2.7+
108.4+
65.2+
1.4+
1.4+
44.6+
51.8+
105.0+
138.2+
69.6+
55.6+
169.4+
0.14+
0.14+
15.08+
0.01+
0.01+
13.1+
MB a
LB a
DBB a
DIB a
Bit memory byte
Local data byte
Data byte
Instance data byte into ACCU1
1/2
2
2
2
0.5
0.9
3.0
3.0
0.2
0.5
1.5
1.5
0.05
0.05
0.17
0.17
0.01
0.02
0.02
0.02
2.6+
3.3+
4.7+
4.7+
1.4+
1.7+
2.5+
2.5+
0.14+
0.13+
0.12+
0.12+
0.01+
0.01+
0.01+
0.01+
g[AR1,m]
g[AR2,m]
B[AR1,m]
B[AR2,m]
Parameter
Area-crossing (AR1)
Area-crossing (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)

3)
Access to digital onboard I/O

4)
Access to analog onboard I/O
Load Instructions
61
A5E00105517-09
In-
Lengt
1)
In-
struc-
tion
Address
Identifier
Description
g
h in
Words
2) 312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
L
IW a
QW a
PIW a
PIW a
PIW a
PIW a
PIW a
PIW a
PIW a
Load ...
Input word
Output word
Peripheral input word for 31x
... for 147
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
Digital Onboard I/O
3)
Analog Onboard I/O
4)
1/2
1/2
2
2
2
2
2
2
2
0.6
0.6
76.7
61.4
0.3
0.3
47.4
56.2
105.8
141.7
72.9
57.6
170.5
0.10
0.10
20.71
0.01
0.01
16.7
2.9+
2.9+
131.1+
77.6+
1.6+
1.6+
48.9+
57.8+
108.4+
142.5+
74.2+
66.3+
179.2+
0.15+
0.15+
20.75+
0.01+
0.01+
16.7+
MW a
LW a
Bit memory word
Local data word
1/2
2
0.8
1.1
0.4
0.6
0.10
0.10
0.01
0.02
3.2+
3.8+
1.7+
2.0+
0.15+
0.16+
0.01+
0.01+ LW a
DBW a
DIW a
Local data word
Data word
Instance data word...into ACCU1
2
1/2
1/2
1.1
3.5
3.5
0.6
1.8
1.8
0.10
0.24
0.24
0.02
0.02
0.02
3.8+
5.6+
5.6+
2.0+
3.0+
3.0+
0.16+
0.16+
0.16+
0.01+
0.01+
0.01+
h[AR1,m]
h[AR2,m]
W[AR1,m]
W[AR2,m]
Parameter
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)

3)

4)
Load Instructions
62
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312x
31x,
147,
151,
154
317 319
L
ID a
QD a
PID a
PID a
PID a
PID a
PID a
PID a
Load ...
Input double word
Output double word
Peripheral input double word
... for 147
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
Analog Onboard I/O
3)
1/2
1/2
2
2
2
2
2
2
0.8
0.8
95.9
0.4
0.4
60.2
68.7
120.2
161.0
81.6
303.0
0.20
0.20
27.58
0.02
0.02
24.9
3.1+
3.1+
150.6+
1.6+
1.6+
61.9+
70.8+
21.8+
163.6+
82.9+
323.0+
0.17+
0.17+
27.65+
0.01+
0.01+
24.9+
MD a
LD a
DBD a
Bit memory double word
Local data double word
Data double word
1/2
2
2
1.0
1.5
4 7
0.5
0.7
2 3
0.19
0.19
0 33
0.02
0.02
0 02
3.8+
4.4+
6 9+
2.0+
2.3+
3 7+
0.17+
0.19+
0 19+
0.01+
0.01+
0 01+ DBD a
DID a
Data double word
Instance data double word
... into ACCU1
2
2
4.7
4.7
2.3
2.3
0.33
0.33
0.02
0.02
6.9+
6.9+
3.7+
3.7+
0.19+
0.19+
0.01+
0.01+
i[AR1.m]
i[AR2,m]
D[AR1.m]
D[AR2,m]
Parameter
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)
Load Instructions
63
A5E00105517-09
Instruc- Address
Length
Direct
Addressing
Indirect
Addressing
1)
Instruc-
tion
Address
Identifier
Description
Length
in
Words
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
L
k8
k16
k32
Load ...
8-bit constant into ACCU1-LL
16-bit constant into ACCU1-L
32-bit constant into ACCU1
1
2
3
0.4
0.4
0.5
0.2
0.2
0.3
0.05
0.05
0.05
0.01
0.01
0.01
Parameter Load constant into ACCU1 (ad- 2 + + + + Parameter Load constant into ACCU1 (ad
dressed via parameter)
2 + + + +
L 2#n Load 16-bit binary constant into
ACCU1-L
2 0.4 0.2 0.05 0.01
Load 32-bit binary constant into
ACCU1
3 0.5 0.3 0.05 0.01
L B#8#p Load 8-bit hexadecimal constant
into ACCU1-L
1 0.4 0.2 0.05 0.01
W#16#p Load 16-bit hexadecimal constant
into ACCU1-L
2 0.4 0.2 0.05 0.01
DW#16#p Load 32-bit hexadecimal constant
into ACCU1-L
3 0.5 0.3 0.05 0.01

3)
1)
Load Instructions
64
A5E00105517-09
Add
Instruc-
tion
Address
Identifier
Description
Length
in Words
312
31x, 147,
151, 154
317 319
L x Load 1 characters 0.4 0.2 0.05 0.01
L xx Load 2 characters 2 0.4 0.2 0.05 0.01
L xxx Load 3 characters 0.5 0.3 0.08 0.01
L xxxx Load 4 characters 3 0.5 0.3 0.08 0.01
L D# date Load IEC date (BCD) 3 0.5 0.3 0.08 0.01
L S5T# time va-
lue
Load S5 time constant (16 bits) 2 0.5 0.3 0.05 0.01
L TOD# time va-
lue
Load 32-bit time constant
IEC daytime
3 0.5 0.3 0.08 0.01
L T# time value Load 16-bit timer constant 2 0.4 0.2 0.05 0.01
Load 32-bit timer constant 3 0.5 0.3 0.08 0.01
L C# count value Load 16-bit counter constant 2 0.4 0.2 0.05 0.01
L P# bit pointer Load bit pointer 3 0.5 0.3 0.08 0.01
L L# integer Load 32 bit integer constant 3 0.5 0.3 0.08 0.01
L Real number Load real number 3 0.5 0.3 0.08 0.01
Load Instructions for Timers and Counters
65
A5E00105517-09
Load Instructions for Timers and Counters
Loading a time value or count value into ACCU1. The contents of ACCU1 are first saved to ACCU2. The bits of the status word are not
affected.
L t
Instruc-
tion
Operand Description
Lengt
h in
Words
Direct
Addressing
Indirect
Addressing
1)
tion
p p
Words
2)
312
31x, 147,
151, 154
317 319 312
31x, 147,
151, 154
317 319
L T f Load time value 1/2 1.7 0.8 0.43 0.19 2.0+ 1.1+ 0.39+ 0.19+
Timer para. Load time value (adres-
sed via parameter)
2 + + + +
L C f Load count value 1/2 1.4 0.7 0.14 0.08 2.3+ 1.2+ 0.11+ 0.08+
Counter para. Load count value (adres-
sed via parameter)
2 + + + +
LD T f Load time value in BCD 1/2 4.2 2.2 0.87 0.30 5.0+ 2.5+ 0.84+ 0.30+
Timer para. Load time value in BCD
(adressed via parameter)
2 + + + +
LD C f Load count value in BCD 1/2 4.4 2.2 0.56 0.19 5.4+ 2.9+ 0.53+ 0.19+
Counter para. Load count value (adres-
sed via parameter)
2 + + + +
1)

2)
Transfer Instructions
66
A5E00105517-09
Transferring the contents of ACCU1 to the addressed Inrand. The status word is not affected. Remember that some transfer instructions
depend on the MCR.
Length
In-
struc-
Address
Identifier
Description
Length
in
Words
Direct
Addressing
Indirect
Addressing
1)
struc
tion
Identifier
Description
Words
2)
312
31x,147,
151,154
317 319 312
31x,147,
151,154
317 319
T
IB a
QB a
PQB a
PQB a
PQB a
PQB a
PQB a
Transfer contents of
ACCU1-LL to ...
input byte
(MCR-dependent)
output byte
(MCR-dependent)
peripheral output byte for 31x
(MCRdependent)
... for 147
... for 147 (MCRdependent)
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
1/2
1/2
1/2
1/2
1/2
1/2
1/2
0.2
1.1
0.2
1.1
58.7
58.8
0.1
0.5
0.1
0.5
35.9
36.1
45.1
45.3
93.1
93.6
118.9
119.2
63.7
64.6
0.06
0.12
0.06
0.12
13.10
13.53
0.01
0.05
0.01
0.05
10.3
10.3
2.4+
2.7+
2.4+
2.7+
104.8+
105.2+
1.3+
1.5+
1.3+
1.5+
37.5+
37.8+
46.6+
46.8+
94.9+
95.4+
121.2+
121.4+
65.0+
65.9+
0.13+
0.15+
0.12+
0.15+
13.11+
13.51+
0.01+
0.05+
0.01+
0.05+
10.3+
10.3+
1)

2)
67
A5E00105517-09
Length
In-
Address
Length
in
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
T PQB a
PQB a
Digital Onboard I/O
3)
(MCR-dependent)
Analog Onboard I/O
4)
(MCR-dependent)
1/2
1/2
57.3
58.2
53.9
54.4
49.2
49.7
70.6+
71.2+
61.0+
61.3+
56.3+
56.8+
T MB a
LB a
DBB a
DIB a
bit memory byte
(MCR-dependent)
local data byte
(MCR-dependent)
data byte
(MCR-dependent)
instance data byte
(MCR-dependent)
1/2
2
2
2
0.2
1.2
0.4
1.5
2.7
2.7
2.4
2.7
0.1
0.6
0.2
0.8
1.3
1.3
1.3
1.3
0.06
0.12
0.06
0.14
0.24
0.16
0.24
0.16
0.01
0.05
0.02
0.05
0.02
0.05
0.02
0.05
2.4+
2.7+
3.3+
2.9+
4.1+
4.5+
4.1+
4.5+
1.3+
1.5+
1.7+
1.5+
2.2+
2.4+
2.2+
2.4+
0.13+
0.15+
0.11+
0.16+
0.13+
0.16+
0.14+
0.16+
0.01+
0.05+
0.01+
0.05+
0.01+
0.05+
0.01+
0.05+
T g[AR1,m]
g[AR2,m]
B[AR1,m]
B[AR2,m]
Parameter
Area-crossing (AR1)
Area-crossing (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)

3)

4)
68
A5E00105517-09
In-
struc-
Address
Description
Length
in
Direct
Addressing
Indirect
Addressing
1)
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,147,
151,154
317 319 312
31x,
147,
151, 154
317 319
T
IW
QW
PQW
PQW
PQW
PQW
PQW
PQW
PQW
Transfer contents of ACCU1-L
to...
input word
(MCR-dependent)
output word
(MCR-dependent)
peripheral output word
(MCR-dependent)
... for 147
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
Digital Onboard I/O
3)
(MCR-dependent)
Analog Onboard I/O
4)
(MCR-dependent)
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
0.4
1.1
0.4
1.1
64.4
64.6
70.5
71.1
0.2
0.6
0.2
0.6
40.4
40.6
52.8
53.1
98.9
99.0
126.9
126.4
67.8
69.6
66.1
66.4
66.1
66.4
0.13
0.13
0.13
0.13
15.04
15.32
0.01
0.05
0.01
0.05
11.6
11.6
2.6+
2.9+
2.6+
2.9+
121.6+
120.5+
85.8+
86.4+
1.4+
1.5+
1.4+
1.5+
41.8+
42.1+
53.9+
54.1+
100.3+
100.6+
128.1+
128.4+
69.1+
70.9+
74.2+
74.8+
74.2+
74.8+
0.14+
0.16+
0.14+
0.16+
14.99+
15.43+
0.01+
0.05+
0.01+.
0.05+
11.6+
11.6+
1)

2)

3)

4)
69
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
T MW
LW
DBW
DIW
bit memory word
(MCR-dependent)
local data word
(MCR-dependent)
data word
(MCR-dependent)
Instanz-data word
(MCR-dependent)
1/2
2
2
2
0.4
1.5
0.5
1.6
3.2
3.2
3.2
3.2
0.2
0.7
0.2
0.8
1.6
1.6
1.5
1.6
0.18
0.15
0.12
0.15
0.30
0.16
0.30
0.15
0.01
0.05
0.02
0.05
0.02
0.05
0.02
0.05
3.2+
3.5+
3.8+
3.3+
4.8+
5.2+
4.8+
5.2+
1.7+
1.9+
2.0+
1.8+
2.6+
2.8+
2.6+
2.8+
0.16+
0.18+
0.15+
0.22+
0.17+
0.19+
0.17+
0.19+
0.01+
0.05+
0.01+
0.05+
0.01+
0.05+
0.01+
0.05+
T h[AR1,m]
h[AR2,m]
W[AR1,m]
W[AR2,m]
Parameter
Area-crossing (AR1)
Area-crossing (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)
70
A5E00105517-09
In-
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
In
struc-
tion
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
T
ID
QD
PQD
PQD
PQD
PQD
PQD
PQD
Transfer contents of ACCU1 to ...
input double word
(MCR-dependent)
output double word
(MCR-dependent)
peripheral output double word
(MCR-dependent)
... for 147
... for 151 (Bus <= 1m)
... for 151 (Bus > 1m)
... for 154
Analog Onboard I/O
3)
(MCR-dependend)
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
0.6
1.4
0.6
1.4
73.1
73.4
0.3
0.7
0.3
0.7
45.4
45.5
63.7
63.7
111.7
111.8
148.9
149.4
76.1
86.4
91.3
91.9
0.22
0.16
0.22
0.16
18.43
18.87
0.01
0.05
0.01
0.05
15.1
15.1
2.8+
3.2+
2.8+
3.2+
130.1+
128.0+
1.5+
1.7+
1.5+
1.7+
46.8+
47.0+
65.0+
65.3+
113.5+
113.8+
150.7+
151.1+
77.4+
87.7+
100.4+
101.3+
0.16+
0.18+
0.16+
0.18+
18.44+
19.07+
0.01+
0.05+
0.01+
0.05+
15.1+
15.1+
1)

2)

3)
71
A5E00105517-09
Address
Length
in
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
in
Words
2)
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
T MD
LD
DBD
DID
bit memory double word
(MCR-dependent)
local data double word
(MCR-dependent)
Data double word
(MCR-dependend)
Instanz data double word
(MCR-dependend)
1/2
2
2
2
0.6
1.7
0.9
2.0
4.5
4.4
4.5
4.4
0.3
0.8
0.4
1.0
2.2
2.2
2.2
2.2
0.27
0.18
0.22
0.18
0.19
0.21
0.18
0.20
0.01
0.05
0.02
0.05
0.02
0.05
0.02
0.05
3.8+
4.2+
4.4+
4.0+
5.7+
6.1+
5.7+
6.1+
2.0+
2.3+
2.4+
2.1+
3.0+
3.3+
3.0+
3.3+
0.19+
0.22+
0.18+
0.25+
0.20+
0.23+
0.19+
0.22+
0.01+
0.05+
0.02+
0.05+
0.02+
0.05+
0.02+
0.05+
T i[AR1,m]
i[AR2,m]
D[AR1,m]
D[AR2,m]
Parameter
nal (AR1)
Register-ind., area -in-
ternal (AR2)
Area-crossing (AR1)
Area-crossing (AR2)
Via parameter
2
2
2
2
2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
1)

2)
Load and Transfer Instructions for Address Registers
72
A5E00105517-09
Loading a double word from a memory area or register into AR1 or AR2.
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
LAR1
AR2
DBD a
DID a
m
LD a
MD a
Load contents from ...
ACCU1
Address register 2
Data double word
32-bit constant as pointer
... into AR1
1
1
2
2
3
2
2
0.2
0.2
4.6
4.6
0.3
1.5
1.0
0.1
0.1
2.3
2.3
0.2
0.7
0.5
0.03
0.03
0.20
0.20
0.05
0.20
0.20
0.02
0.04
0.06
0.06
0.03
0.06
0.06
LAR2
DBD a
DID a
m
LD a
MD a
Load contents from ...
ACCU1
Data double word
... into AR2
1
2
2
3
2
2
0.2
4.6
4.6
0.3
1.5
1.0
0.1
2.3
2.3
0.2
0.7
0.5
0.03
0.20
0.20
0.05
0.20
0.20
0.02
0.06
0.06
0.03
0.06
0.06
73
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
TAR1
AR2
DBD a
DID a
m
LD a
MD a
Transfer contents of AR1 to ...
ACCU1
Address register 2
Data double word
1
1
2
2
2
2
0.3
0.2
4.4
4.4
0.9
0.6
0.2
0.1
2.2
2.2
0.4
0.3
0.04
0.03
0.20
0.20
0.22
0.22
0.04
0.04
0.06
0.06
0.06
0.06
TAR2
DBD a
DID a
LD a
MD a
Transfer contents of AR2 to ...
ACCU1
Data double word
1
2
2
2
2
0.3
0.2
4.4
4.4
0.9
0.2
0.1
2.2
2.2
0.4
0.04
0.20
0.20
0.20
0.20
0.04
0.06
0.06
0.06
0.06
TAR Exchange the contents of AR1 and
AR2
1 0.6 0.3 0.06 0.02
Load and Transfer Instructions for the Status Word
74
A5E00105517-09
Load and Transfer Instructions for the Status Word
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
L STW Load status word
1)
into
ACCU1
1.1 0.6 0.09 0.03
Status word for: L STW BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction depends on: Yes Yes Yes Yes Yes 0 0 Yes 0
Instruction affects:
T STW Transfer ACCU1 (bits 0 to
8) to the status word
1)
1.1 0.6 0.23 0.02
Status word for: T STW BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes Yes Yes Yes Yes
1)
For the structure of the status word see page 17
Load Instructions for DB Number and DB Length
75
A5E00105517-09
Load Instructions for DB Number and DB Length
Loading the number/length of a data block into ACCU1. The old contents of ACCU1 are saved to ACCU2. The condition code bits are not
affected.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
L DBNO Load number of data block 1 2.4 1.3 0.18 0.03
L DINO Load number of instance data
block
1 2.4 1.3 0.18 0.03
L DBLG Load length of data block into byte 1 0.5 0.3 0.04 0.03
L DILG Load length of instance data block
into byte
1 0.5 0.3 0.04 0.03
Integer Math (16 Bits)
76
A5E00105517-09
Math instructions on two 16-bit words. The result is in ACCU1 and ACCU1-L, resp.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
+I Add 2 integers (16 bits)
(ACCU1-L)=(ACCU1-L)+ (ACCU2-L)
1 1.3 0.6 0.20 0.02
I Subtract 1 integer from another (16 bits)
(ACCU1-L)=(ACCU2-L) (ACCU1-L)
1 1.5 0.7 0.17 0.02
*
I Multiply 1 integer by another (16 bits)
(ACCU1)=(ACCU2-L)
*
(ACCU1-L)
1 2.2 1.1 0.22 0.02
/I Divide 1 integer by another (16 bits)
(ACCU1-L)= (ACCU2-L):(ACCU1-L)
The remainder is in ACCU1-H
1 2.6 1.3 0.35 0.06
Status word for: +I, I,*I, /I BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes Yes Yes
77
A5E00105517-09
Math instructions on two 32-bit words. The result is in ACCU1.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
+D Add 2 integers (32 bits)
(ACCU1)=(ACCU2)+ (ACCU1)
1 1.6 0.8 0.16 0.01
D Subtract 1 integer from another (32 bits)
(ACCU1)=(ACCU2) (ACCU1)
1 2.2 1.1 0.18 0.01
*
D Multiply 1 integer by another (32 bits)
(ACCU1)=(ACCU2)
*
(ACCU1)
1 7.1 3.5 0.17 0.01
/D Divide 1 integer by another (32 bits)
(ACCU1)=(ACCU2): (ACCU1)
1 5.7 2.8 0.43 0.06
MOD Divide 1 integer by another (32 bits) and load
the remainder into ACCU1:
(ACCU1)=remainder of [(ACCU2):(ACCU1)]
1 3.8 1.9 0.15 0.06
Status word for: +D, D,
*
D, /D, MOD BR CC 1 CC 0 OV OS OR STA RLO FC
Floating-Point Math (32 Bits)
78
A5E00105517-09
The result of the math instruction is in ACCU1. The execution time of the instruction depends on the value to be calculated.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
+R Add 2 real numbers (32 bits)
(ACCU1)=(ACCU2)+(ACCU1)
1 5.5 2.7 0.98 0.04
R Subtract 1 real number from another (32 bits)
(ACCU1)=(ACCU2)(ACCU1)
1 5.5 2.7 0.98 0.04
*
R Multiply 1 real number by another (32 bits)
(ACCU1)=(ACCU2)
*
(ACCU1)
1 6.4 3.2 0.55 0.04
/R Divide 1 real number by another (32 bits)
(ACCU1)=(ACCU2):(ACCU1)
1 6.1 3.0 1.46 0.06
Status word for: +R, R,
*
R, /R BR CC 1 CC 0 OV OS OR STA RLO FC
79
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
NEGR Negate the real number in ACCU1 1 0.8 0.4 0.03 0.01
ABS Form the absolute value of the real
number in ACCU1
1 0.8 0.4 0.03 0.01
Status word for: NEGR, ABS BR CC 1 CC 0 OV OS OR STA RLO FC
Square Root and Square Instructions (32 Bits)
80
A5E00105517-09
Square Root and Square Instructions (32 Bits)
The result of the instruction is in ACCU1. The instructions can be interrupted.
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
SQRT Calculate the square root of a real
number in ACCCU1
1 643 322 30.03 0.64
SQR Form the square of a real number in
ACCU1
1 177 89 5.02 0.04
Status word for: SQRT, SQR BR CC 1 CC 0 OV OS OR STA RLO FC
Logarithmic Function (32 Bits)
81
A5E00105517-09
Logarithmic Function (32 Bits)
The result of the logarithmic function is in ACCU1. The instructions can be interrupted.
Address Length in
Instruction
Address
Identifier
Description
Length in
Words 312
31x, 147,
151, 154
317 319
LN Form the natural logarithm of a
real number in ACCU1
1 455 227 14.97 0.69
EXP Calculate the exponential value of
a real number in ACCU1 to the
base e (= 2.71828)
1 898 449 33.71 0.67
Status word for: LN, EXP BR CC 1 CC 0 OV OS OR STA RLO FC
Trigonometrical Functions (32 Bits)
82
A5E00105517-09
Trigonometrical Functions (32 Bits)
The result of the instruction is in ACCU1. The instructions can be interrupted.
Address Length
Instruction
Address
Identifier
Description
Length
in Words 312
31x, 147,
151, 154
317 319
SIN
1)
Calculate the sine of a real number 1 545 272 21.52 0.48
ASIN
2)
Calculate the arcsine of a real number 1 1584 792 61.07 0.73
COS
1)
Calculate the cosine of a real number 1 606 303 23.54 0.50
ACOS
2)
Calculate the arccosine of a real number 1 1762 881 67.47 0.73
TAN
1)
Calculate the tangent of a real number 1 549 274 21.39 0.62
ATAN
2)
Calculate the arctangent of a real number 1 595 297 22.09 0.54
Status word for: SIN, ASIN,
COS, ACOS, TAN, ATAN
BIE BR CC 1 CC 0 OV OS OR STA RLO FC
1)
Specify the angle in radians; the angle must be given as a floating point value in ACCU 1.
2)
The result is an angle in radians.
Adding Constants
83
A5E00105517-09
Adding Constants
Adding integer constants and storing the result in ACCU1. The condition code bits are not affected.
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
+ i8 Add an 8-bit integer constant 1 0.2 0.1 0.08 0.01
+ i16 Add a 16-bit integer constant 2 0.2 0.1 0.08 0.01
+ i32 Add a 32-bit integer constant 3 0.3 0.2 0.08 0.01
Adding Using Address Registers
84
A5E00105517-09
Adding Using Address Registers
Adding a 16-bit integer to the contents of the address register. The value is in the instruction or in ACCU1-L. The condition code bits are not
affected.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
+AR1 Add the contents of ACCU1-L to those of AR1 1 0.2 0.1 0.1 0.02
+AR1 m Add a pointer constant to the contents of AR1 2 0.4 0.2 0.1 0.02
+AR2 Add the contents of ACCU1-L to those of AR2 1 0.2 0.1 0.1 0.02
+AR2 m Add pointer constant to the contents of AR2 2 0.4 0.2 0.1 0.02
Comparison Instructions with Integers (16 Bits)
85
A5E00105517-09
Comparing the 16-bit integers in ACCU1-L and ACCU2-L. RLO = 1 if the condition is satisfied.
Address Length in
Identier
Address
Instruction
Description
Length in
Words 312
31x, 147,
151, 154
317 319
==I ACCU2-L=ACCU1-L 1 1.4 0.7 0.14 0.03
<>I ACCU2-L0ACCU1-L 1 1.6 0.8 0.14 0.03
<I ACCU2-L<ACCU1-L 1 1.6 0.7 0.14 0.03
<=I ACCU2-L<=ACCU1-L 1 1.4 0.7 0.14 0.03
>I ACCU2-L>ACCU1-L 1 1.3 0.7 0.14 0.03
>=I ACCU2-L>=ACCU1-L 1 1.4 0.7 0.14 0.03
Status word for: ==I, <>I, <I, <=I, >I, >=I BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes 0 0 Yes Yes 1
86
A5E00105517-09
Comparing the 32-bit integers in ACCU1 and ACCU2. RLO = 1 if the condition is satisfied.
Address Length in
Instruction
Address
Identifier
Description
Length in
Words 312
31x, 147,
151, 154
317 319
==D ACCU2=ACCU1 1 1.4 0.7 0.10 0.03
<>D ACCU20ACCU1 1 1.4 0.7 0.10 0.03
<D ACCU2<ACCU1 1 1.4 0.7 0.10 0.03
<=D ACCU2<=ACCU1 1 1.4 0.7 0.10 0.03
>D ACCU2>ACCU1 1 1.3 0.7 0.10 0.03
>=D ACCU2>=ACCU1 1 1.3 0.7 0.10 0.03
Status word for: ==D,< >D, <D, <=D, >D, >=D BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes 0 0 Yes Yes 1
Comparison Instructions with Real Numbers (32 Bits)
87
A5E00105517-09
Comparison Instructions with Real Numbers (32 Bits)
Comparing the 32-bit real numbers in ACCU1 and ACCU2. RLO = 1 if the condition is satisfied. The execution time of the instruction de-
pends on the value to be compared.
Address Length in
Instruction
Address
Identifier
Description
Length in
Words 312
31x, 147,
151, 154
317 319
== R ACCU2=ACCU1 1 6.3 3.1 0.50 0.06
<> R ACCU20ACCU1 1 6.3 3.1 0.47 0.06
< R ACCU2<ACCU1 1 6.4 3.2 0.47 0.06
< = R ACCU2<=ACCU1 1 6.3 3.1 0.47 0.06
> R ACCU2>ACCU1 1 6.3 3.1 0.49 0.06
> = R ACCU2>=ACCU1 1 6.4 3.2 0.48 0.06
Status word for: ==R, <>R, <R, <=R, >R, >=R BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes Yes Yes 0 Yes Yes 1
Shift Instructions
88
A5E00105517-09
Shift Instructions
Shifting the contents of ACCU1 and ACCU1-L to the left or right by the specified number of places. If no address identifier is specified, shift
the number of places into ACCU2-LL. Any positions that become free are padded with zeros or the sign. The last bit shifted is in condition
code bit CC 1.
Instruction
Address
Description
Length
in
Instruction
Address
Identifier
Description in
Words
312 31x, 147, 151, 154 317 319
SLW Shift the contents of ACCU1-L to
the left Positions that become free
1 1.9 1.0 0.19 0.03
0 ... 15
the left. Positions that become free
are provided with zeros.
0.6 0.3 0.19 0.03
SLD Shift the contents of ACCU1 to the
left Positions that become free are
1 2.5 1.2 0.22 0.03
0 ... 32
left. Positions that become free are
provided with zeros.
2.5 1.3 0.26 0.03
SRW Shift the contents of ACCU1-L to
the right Positions that become
1 1.9 0.9 0.23 0.03
0 ... 15
the right. Positions that become
free are provided with zeros.
0.6 0.3 0.33 0.03
SRD Shift the contents of ACCU1 to the
right Positions that become free
1 2.5 1.2 0.24 0.03
0 ... 32
right. Positions that become free
are provided with zeros.
2.5 1.3 0.28 0.03
Status word for: SLW, SLD, SRW, SRD BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes Yes
Shift Instructions
89
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
SSI Shift the contents of ACCU1-L
with sign to the right. Positions
1 1.8 0.9 0.22 0.03
0 ... 15
with sign to the right. Positions
that become free are pro-
vided with the sign (bit 15).
0.6 0.3 0.33 0.03
SSD Shift the contents of ACCU1
with sign to the right
1 2.5 1.2 0.24 0.03
0 ... 32
with sign to the right
2.5 1.3 0.28 0.03
Status word for: SSI, SSD BR CC 1 CC 0 OV OS OR STA RLO FC
Rotate Instructions
90
A5E00105517-09
Rotate Instructions
Rotate the contents of ACCU1 to the left or right by the specified number of places. If no address identifier is specified, rotate the number of
places into ACCU2-LL.
Address
Instruction
Address
Identifier
Description Length
in Words
312
31x, 147,
151, 154
317 319
RLD Rotate the contents of ACCU1 to the left 1 2.2 1.1 0.18 0.03
0 ... 32 3.2 1.6 0.24 0.03
RRD Rotate the contents of ACCU1 to the right 1 2.2 1.1 0.23 0.03
0 ... 32 2.4 1.2 0.28 0.03
Status word for: RLD, RRD BR CC 1 CC 0 OV OS OR STA RLO FC
RLDA Rotate the contents of ACCU1 one bit
position to the left t
1 1.7 0.8 0.14 0.02
RRDA Rotate the contents of ACCU1 one bit
position to the right
1 1.7 0.8 0.14 0.02
Status word for: RLDA, RRDA BR CC 1 CC 0 OV OS OR STA RLO FC
Accumulator Transfer Instructions, Incrementing and Decrementing
91
A5E00105517-09
Accumulator Transfer Instructions, Incrementing and Decrementing
The status word is not affected.
Instruc Address
Length
Instruc-
tion
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
CAW Reverse the order of the bytes in ACCU1-L.
LL, LH becomes LH, LL.
1 0.2 0.1 0.10 0.01
CAD Reverse the order of the bytes in ACCU1.
LL, LH, HL, AA becomes HH, HL, LH, LL.
1 0.4 0.2 0.23 0.01
TAK Swap the contents of ACCU1 and ACCU2 1 0.5 0.3 0.06 0.01
PUSH The contents of ACCU1 are transferred to ACCU2. 1 0.2 0.1 0.03 0.01
POP The contents of ACCU2 are transferred to ACCU1: 1 0.2 0.1 0.03 0.01
INC 0 ... 255 Increment ACCU1-LL 1 0.2 0.1 0.10 0.01
DEC 0 ... 255 Decrement ACCU1-LL 1 0.2 0.1 0.10 0.01
Program Display and Null Operation Instructions
92
A5E00105517-09
Program Display and Null Operation Instructions
The status word is not affected.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
BLD 0 ... 255 Program display instruction:
Is treated by the CPU like a null operation
instruction.
1 0.2 0.1 0.04 0
NOP 0
1
Null Operation instruction: 1 0.2
0.2
0.1
0.1
0.04
0.04
0
Data Type Conversion Instructions
93
A5E00105517-09
The results of the conversion are in ACCU1. When converting real numbers, the execution time depends on the value.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
BTI Conv. cont. of ACCU1 from BCD to inte-
ger (16 bits) (BCD To Int)
1 3.9 1.9 0.32 0.03
BTD Conv. cont. of ACCU1 from BCD to double
int. (32 bits) (BCD To Doubleint)
1 8.6 4.3 0.68 0.05
DTR Convert contents of ACCU1 from double
integer to real (32 bits) (Doubleint To Real)
1 5.5 2.7 0.33 0.02
ITD Convert contents of ACCU1 from integer
(16 bits) to double int. (32 bits) (Int To
Doubleint)
1 0.2 0.1 0.03 0.02
Status word for: BTI, BTD, DTR, ITD BR CC 1 CC 0 OV OS OR STA RLO FC
ITB Conv. cont. of ACCU1 from int. (16 bits) to
BCD from 0 to +/ 999 (Int To BCD)
1 4.4 2.2 0.57 0.13
DTB Conv. cont. of ACCU1 f. double int. (32
bits) t. BCD f. 0 to +/9 999 999 (Doubleint
To BCD)
1 10.0 5.0 1.38 0.33
94
A5E00105517-09
Address Length
Instruction
Address
Identifier
Description
Length
in Words 312
31x, 147,
151, 154
317 319
RND Convert a real number into a 32-bit integer. 1 6.5 3.2 0.41 0.02
RND Convert a real number into a 32-bit integer.
The number is rounded to the next whole
number.
1 6.5 3.3 0.41 0.02
Status word for: ITB, DTB, RND, RND BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes
RND+ Convert a real number into a 32-bit integer.
The number is rounded to the next whole
number.
1 6.7 3.3 0.42 0.02
TRUNC Convert a real number into a 32-bit integer.
The places after the decimal point are trun-
cated.
1 6.3 3.1 0.41 0.02
Status word for: RND+,TRUNC BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes Yes
Forming the Ones and Twos Complements
95
A5E00105517-09
Forming the Ones and Twos Complements
Address Length in
Instruction
Address
Identifier
Description
Length in
Words 312
31x, 147,
151, 154
317 319
INVI Form the ones complement of
ACCU1-L
1 0.2 0.1 0.05 0.01
INVD Form the ones complement of
ACCU1
1 0.2 0.1 0.08 0.01
Status word for: INVI, INVD BR CC 1 CC 0 OV OS OR STA RLO FC
NEGI Form the twos complement of
ACCU1-L (integer)
1 1.4 0.7 0.19 0.01
NEGD Form the twos complement of
ACCU1 (double integer)
1 1.6 0.8 0.16 0.01
Status word for: NEGI, NEGD BR CC 1 CC 0 OV OS OR STA RLO FC
Block Call Instructions
96
A5E00105517-09
Address Length
Direct
Addressing
Indirect
Addressing
1)
Instruction
Address
Identifier
Description
Length
in Words
312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
CALL FB q,
DB q
Unconditional call of an
FB,
with parameter transfer
1 16.4 8.8 1.9 0.68
CALL SFB q,
DB q
Unconditional call of an
SFB,
2
2) 2) 2) 2)

CALL FC q Unconditional call of a
function,
1 15.6 7.5 1.72 0.61
CALL SFC q Unconditional call of an
SFC,
2
2) 2) 2) 2)

Status word for: CALL BR CC 1 CC 0 OV OS OR STA RLO FC
1)

2)
See chapter System Functions (SFCs)/ see chapter System Function Blocks (SFBs)
97
A5E00105517-09
Length
1)
Instruction
Address
Identifier
Description
Length
in
Words 312
31x,
147,
151,
154
317 319 312
31x,
147,
151,
154
317 319
UC FB q
FC q
Parameter
Unconditional call of blocks
without parameter transfer
FB/FC call via parameter
1
3)
9.1
9.1
9.1
6.0
6.0
6.0
1.47
1.55
0.59
0.59
0.59
9.8+
9.8+
9.8+
6.4+
6.4+
6.4+
1.63+
1.70+
0.59+
0.59+
0.59+
CC FB q
FC q
Parameter
Conditional call of blocks wi-
thout parameter transfer
FB/FC call via parameter
1
3)
9.4
9.4
9.4
6.2
6.2
6.2
1.53
1.59
0.59
0.59
0.59
9.9+
9.9+
9.9+
6.6+
6.6+
6.6+
1.65+
1.73+
0.59+
0.59+
0.59+
Status word for: UC, CC BR CC 1 CC 0 OV OS OR STA RLO FC
OPN
DB q
DI q
Parameter
Open:
Data block
Instance data block
Data block using parameters
1/2
2)
2
2
0.7 0.7 0.15 0.03 1.2+ 1.2+ 0.25+ 0.03+
Status word for: OPN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
2)
Block No. > 255
3)
Block End Instructions
98
A5E00105517-09
Block End Instructions
Length in
Instruction Address Identifier Description
Length in
Words 312
31x, 147,
151, 154
317 319
BE End block 1 4.4 2.2 0.05 0.07
BEU End block unconditionally 1 4.4 2.2 0.05 0.07
Status word for: BE, BEU BR CC 1 CC 0 OV OS OR STA RLO FC
BEC End block conditionally if
RLO = 1
1 1.2 0.6 0.14 0.07
Status word for: BEC BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes 0 1 1 0
Exchanging Shared Data Block and Instance Data Block
99
A5E00105517-09
Exchanging Shared Data Block and Instance Data Block
Exchanging the two current data blocks. The current shared data block becomes the current instance data block, and vice versa. The con-
dition code bits are not affected.
Instruction
Address
Description
Length
in
Instruction
Address
Identifier
Description in
Words 312
31x, 147,
151, 154
317 319
CDB Exchange shared data block and instance data block 1 0.2 0.1 0.18 0.06
Jump Instructions
100
A5E00105517-09
Jump Instructions
Jumping as a function of conditions. With 8-bit operands the jump width is between 128 and +127. In the case of 16-bit operands, the
jump width lies between 32768 and 129 (+128 and +32767).
Note:
Please note for S7-300 CPU programs that the jump destination always forms the beginning of a Boolean logic string in the case of jump
instructions. The jump destination must not be included in the logic string.
Address Length in
Instruction
Address
Identifier
Description
Length in
Words 312
31x, 147,
151, 154
317 319
JU LABEL Jump unconditionally 1
1)
/2 3.6 1.8 0.43 0.03
Status word for: JU BR CC 1 CC 0 OV OS OR STA VKE FC
JC LABEL Jump if RLO = 1 1
1)
/2 3.8 1.9 0.51 0.03
JCN LABEL Jump if RLO = 0 2 3.8 1.9 0.51 0.03
Status word for: JC, JCN BR CC 1 CC 0 OV OS OR STA RLO FC
1)
1 word long for jump widths between 128 and +127
Jump Instructions
101
A5E00105517-09
Address
Length Typical Execution Time in ms
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
JCB LABEL Jump if RLO = 1.
Save the RLO in the BR bit
2 3.8 1.9 0.51 0.06
JNB LABEL Jump if RLO = 0.
Save the RLO in the BR bit
2 3.8 1.9 0.51 0.06
Status word for: JCB, JNB BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: Yes 0 1 1 0
JBI LABEL Jump if BR = 1 2 3.8 1.9 0.51 0.06
JNBI LABEL Jump if BR = 0 2 3.8 1.9 0.51 0.06
Status word for: JBI, JNBI BR CC 1 CC 0 OV OS OR STA RLO FC
JO LABEL Jump on stored overflow (OV = 1) 1
1)
/2 3.8 1.9 0.51 0.06
Status word for: JO BR CC 1 CC 0 OV OS OR STA RLO FC
1)
Jump Instructions
102
A5E00105517-09
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
JOS LABEL Jump on stored overflow (OS = 1) 2 3.8 1.9 0.51 0.06
Status word for: JOS BR CC 1 CC 0 OV OS OR STA RLO FC
Instruction affects: 0
JUO LABEL Jump if unordered instruction
(CC 1=1 and CC 0=1)
2 3.8 1.9 0.51 0.06
JZ LABEL Jump if result=0 (CC 1=0 and CC 0=0) 1
1)
/2 3.8 1.9 0.51 0.06
JP LABEL Jump if result>0 (CC 1=1 and CC 0=0) 1
1)
/2 3.8 1.9 0.51 0.06
JM LABEL Jump if result<0 (CC 1=0 and CC 0=1) 1
1)
/2 3.8 1.9 0.51 0.06
Status word for: JUO, JZ, JP, JM BR CC 1 CC 0 OV OS OR STA RLO FC
1)
Jump Instructions
103
A5E00105517-09
Address
Instruction
Address
Identifier
Words
312
31x, 147,
151, 154
317 319
JN LABEL Jump if result00 (CC 1=1 and CC
0=0) or (CC 1=0) and (CC 0=1)
1
1)
/2 3.8 1.9 0.51 0.06
JMZ LABEL Jump if resultv0 (CC 1=0 and CC
0=1) or (CC 1=0 and CC 0=0)
2 3.8 1.9 0.51 0.06
JPZ LABEL Jump if resultw0 (CC 1=1 and CC
0=0) or (CC 1=0) and (CC 0=0)
2 3.8 1.9 0.51 0.06
Status word for: JN, JMZ, JPZ BR CC 1 CC 0 OV OS OR STA RLO FC
1)
Jump Instructions
104
A5E00105517-09
Instruc- Address
Instruc-
tion
Address
Identifier
Description Length in Words
312
31x, 147,
151, 154
317 319
JL LABEL Jump distributor
This instruction is followed by a list of jump
instructions.
The operand is a jump label to subsequent
instructions in this list.
ACCU1-L contains the number of the jump
instruction to be executed.
2 5.0 2.5 0.78 0.04
LOOP LABEL Decrement ACCU1-L and jump if
ACCU1-L00
(loop programming)
2 3.5 1.8 0.30 0.03
Status word for: JL, LOOP BR CC 1 CC 0 OV OS OR STA RLO FC
Instructions for the Master Control Relay (MCR)
105
A5E00105517-09
Instructions for the Master Control Relay (MCR)
MCR=1MCR is deactivated
MCR=0MCR is activated; T and = instructions write 0 to the corresponding address identifiers; S and R instructions leave the
memory contents unchanged.
Address
Length
Instruction
Address
Identifier
Description
Length
in
Words
312
31x, 147,
151, 154
317 319
MCR( Open an MCR zone.
Save the RLO to the MCR stack.
1 1.3 0.8 0.24 0.06
)MCR Close an MCR-Zone.
Pop an entry off the MCR-Stack.
1 1.3 0.8 0.24 0.06
Status word for: MCR( BR CC 1 CC 0 OV OS OR STA RLO FC
MCRA Activate the MCR 1 0.2 0.1 0.02 0.05
MCRD Deactivate the MCR 1 0.2 0.1 0.02 0.03
Status word for: MCRA, MCRD BR CC 1 CC 0 OV OS OR STA RLO FC
Organisation Blocks (OB)
106
A5E00105517-09
A user program for an S7-300 consists of blocks which contain the instructions, parameters, and data for the respective CPU. The indivi-
dual CPUs of the S7-300 differ in the number of blocks which you can define for the respective CPU, and of those which are supplied by
the operating system of the CPU. You can find a detailed description of the OBs and their use in the STEP 7 online help system.
Organisa-
tion Blocks
312 31x, 147,
151, 154
317 319 Starting Events
(Hexadecimal Values)
Cycle:
OB 1 x x x x 1101
H
1103
H
OB1 starting event
Running OB1 start event
(conclusion of the free cycle)
Time-of-day interrupt:
OB 10 x x x x 1111
H
Time-of-day interrupt event
Delay Interrupt:
OB 20 x x x x 1121
H
Delay interrupt event
OB 21 x x 1122
H
Delay interrupt event
107
A5E00105517-09
Organisa-
tion Blocks
Starting Events
319 317 31x, 147,
151, 154
312
Cyclic interrupt:
OB 32 x x 1133
H
Cyclic interrupt event
OB 33 x x 1134
H
OB 34 x x 1135
H
OB 35
1)
x x x x 1136
H
Process interrupt:
OB 40 x x x x 1141
H
Process interrupt
DPV1-Interrupt (only DP-CPUs)
OB 55 x x x 1155
H
Status interrupt
OB 56 x x x 1156
H
Update-interrupt
OB 57 x x x 1157
H
Manufacture-specific interrupt
Synchronous cycle interrupt
OB 61 X
2)
X
3)
x 1164
H
Synchronous cycle interrupt
1)
For CPU 319: in addition to the ms granular setting of the OB35 call interval, you can also select a s granular setting in STEP 7 for
the OB35. This makes it possible for you to also configure the shortest alarm cycle of 500s and multiples thereof (value range of
500s to 60000ms can be set).
2)
for CPU315-2 PN/DP with firmware as of V2.5 and IM154-8 CPU
3)
for all CPUs 317 with firmware as of V2.5
108
A5E00105517-09
Organisa-
tion Blocks
Starting Events
319 317 31x, 147,
151, 154
312
Technology synchronous interrupt (only Technology CPU)
OB 65 only 315T only 317T - 116A
H
Technology synchronous interrupt
Error responses:
OB 80 x x x x 3501
H
3502
H
3505
H
3507
H
Cycle time violation
OB or FB request error
Time-of-day interrupt elapsed due to time jump
Multiple OB request error caused start info buffer
overflow
109
A5E00105517-09
Organisa-
tion Blocks
Starting Events
319 317 31x, 147,
151, 154
312
Diagnostic interrupt:
OB 82 x x x x 3842
H
Module o. k.
3942
H
Module fault
OB 83 only 151
1)
,
315 PN
2)
IM 154
3)
only
317 PN
2)
x
2)
3854
H

3855
H

3861
H
3951
H
3961
H
PROFINET IO-Submodule plugged in and is pro-
portional to a parameteterized submodule
PROFINET IO-Submodule plugged in and is not
proportional to a parameteterized submodule
Module is inserted
Pull out PROFINET IO-Module
Module is removed
1)
only for central IO
2)
only for PROFINET IO
3)
for central IO and PROFINET IO
110
A5E00105517-09
Organisation
Blocks
312 31x, 147,
151, 154
317 319 Starting Events
OB 85 x x x x 35A1
H
35A3
H

39B1
H

39B2
H

38B3
H

38B4
H

39B4
H
No OB or FB
Error during access of a block by
the operating system
I/O access error during process
image updating of the inputs
(during each access)
I/O access error during transfer of
the process image to the output
modules (during each access)
I/O access error during process
image updating of the inputs
(outgoing event)
modules (outgoing event)
modules (incoming event)
111
A5E00105517-09
Organisation
Blocks
Starting Events
319 317 31x, 147,
151, 154
312
OB 86 only DP,
PN IO
only DP,
PN IO
only DP,
PN IO
38C4
H
38CB
H
39C4
H
39CB
H
Distributed I/O: station failed, outgoing
PROFINET I/O: Station restart
Distributed I/O: station failed, incoming
PROFINET I/O: Station failure
OB 87 x x x x 35E1
H
35E2
H
35E6
H
Incorrect frame identifier in GD 35E2
H
GD packet status cannot be entered in DB
GD whole status cannot be entered in DB
Restart:
OB 100 x x x x 1381
H
1382
H
Manual restart requests
Automatic restart requests
112
A5E00105517-09
Organisation
Blocks
Starting Events
319 317 31x, 147,
151, 154
312
Synchronous error responses:
OB 121 x x x x 2521
H
2522
H
2523
H
2524
H
2525
H
2526
H
2527
H
2528
H
2529
H
2530
H
2531
H
2532
H
2533
H
2534
H
2535
H
253A
H
253C
H
253E
H
BCD conversion error
Range length error during reading
Range length error during writing
Range error during reading
Range error during writing
Timer number error
Counter number error
Alignment error during reading
Alignment error during writing
Write error during access to DB
Write error during access to DI
Block number error opening a DB
Block number error opening a DI
Block number error at FC call
Block number error at FB call
DB not loaded
FC not loaded
FB not loaded
OB 122 x x x x 2944
H
2945
H
I/O access error at nth read access (n > 1)
I/O access error at nth write access (n > 1)
Function Blocks (FB)
113
A5E00105517-09
Function Blocks (FB)
The following tables list the quantities, numbers, and maximal sizes of the function blocks, functions and data blocks that you can define in
the individual CPUs of the S7-300.
Blocks 31x (except for 315)
147, 151
315, 154 317 319
Quantity
1)
1024 1024 2048 2048
Admissible numbers 0 to 2047 0 to 2047 0 bis 2047 0 bis 2047
Maximal size of an FB (process-relevant code) 16 kB 16 kB 64 kByte 64 kByte
Functions (FC)
147, 151
315, 154 317 319
Quantity
1)
1024 1024 2048 2048
Maximal size of an FC (process-relevant code) 16 kByte 16 kByte 64 kByte 64 kByte
1)
Entire number FB, FC, DB: 1024
CPU 317: 2048
CPU 319: 4096
Data Blocks
114
A5E00105517-09
Data Blocks
147, 151
315, 154 317 319
Quantity
1)
511 1023 2047 4095
Maximal size of an FB (process-relevant code) 16 kByte 16 kByte 64 kByte 64 kByte
1)
Entire number FB, FC, DB: 1024
CPU 317: 2048
CPU 319: 4096
Memory required by the SFBs for the integrated inputs and outputs
115
A5E00105517-09
Memory required by the SFBs for the integrated inputs and outputs
SFB Data Load memory Work memory (RAM)
41 CONT_C 126 330 162
42 CONT_S 90 266 126
43 PULSEGEN 34 168 70
44 ANALOG 98 316 134
46 DIGITAL 88 286 124
47 COUNT 34 178 70
48 FREQUENC 34 176 70
49 PULSE 24 138 60
60 SEND_PTP 40 290 76
61 RCV_PTP 44 298 80
62 RES_RCVB 28 272 64
63 SEND_RK 432 1074 468
64 FETCH_RK 432 1074 468
65 SERVE_RK 408 1032 444
System Functions (SFC)
116
A5E00105517-09
The following tables show the system functions offered by the
operating systems of the S7-300 CPUs and the execution times on the respective CPUs.
SFC
SFC
No.
SFC Name Description 312 31x, 147, 151,
154
317 319
0 SET_CLK Sets the clock time 235 195 44 3.0
1 READ_CLK Reads the clock time 70 60 17 1.4
2 SET_RTM Sets the operating hours counter 75 65 14 1.1
3 CTRL_RTM Starts/stops the operating hours counter 70 60 12 1.0
4 READ_RTM Reads the operating hours counter 105 90 16 1.3
5 GADR_LGC Determine logical channel address 160 135 23 2.3
6 RD_SINFO Reads start information of the current OB. 135 110 19 1.9
117
A5E00105517-09
SFC
SFC
No.
SFC Name Description 312 31x, 147, 151,
154
317 319
7 DP_PRAL
1)
Triggers a process interrupt from the user program
of the CPU as DP slave through to DP master.
90 19 9.0
concurrent running requests, max. 34 requests together with SFB 75
requests
11 SYC_FR
1)
Synchronizes groups of DP slaves 300 63 16.0
concurrent running requests, max. 2 requests
12 D_ACT_DP
2)
Activates or deactivates DP slaves 410 90 13.0
13 DPNRM_DG
1)
Reads the DP-compliant slave
diagnosis (CPU31)
150 32 30.0
14 DPRD_DAT
1)
Reads/writes consistent data
(n bytes)
150 30 25.0
15 DPWR_DAT
1)
Reads/writes consistent data
(n bytes)
150 32 10.5
1)
only DP-CPUs
2)
only DP-CPUs and PROFINET-CPUs
118
A5E00105517-09
SFC
SFC
No.
SFC Name Description 312 31x, 147,
151, 154
317 319
17 ALARM_SQ Generates block-related messages
that can be acknowledged
250 250 52 12.0
18 ALARM_S Generates block-related messages
that can not be acknowledged
250 250 50 9.0
19 ALARM_SC Acknowledgment state of the last
ALARM_SQ received message
110 110 23 8.0
20 BLKMOV Copies variables
within the working memory
90 ms + 2ms/
Byte
75 ms+1.6ms/
Byte
16 ms+0.05ms/
Byte
1.6ms+0.0015m
s/ Byte
21 FILL Sets array default variables
within the working memory
90ms+2.6ms/
Byte
75 ms+2.2ms/
Byte
16 ms+0.08ms/
Byte
1.6ms+0.013ms/
Byte
119
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
22 CREAT_DB Generates a data block 110ms+3.5ms/
DB in the
specified
areas
110ms+3.5ms/
DB in the speci-
fied areas
23.1ms+0.75ms/
DB in the spe-
cified areas
10.0
23 DEL_DB Deletes a data block 402 402 80 13.0
24 TEST_DB Tests a data block 130 110 18 2.1
28 SET_TINT Sets the times of a time-of-day interrupt 190 160 40 2.5
29 CAN_TINT Cancels a time-of-day interrupt 85 70 2 0.8
30 ACT_TINT Activates a time-of-day interrupt 140 120 28 1.7
31 QRY_TINT Queries the status of a timeof-day in-
terrupt
90 75 12 1.3
32 SRT_DINT Starts a delay interrupt 90 75 22 3.8
33 CAN_DINT Cancels a delay interrupt 60 50 11 3.2
120
A5E00105517-09
SFC
SFC Name Description
SFC
No.
SFC Name Description
312 31x, 147, 151, 154 317 319
34 QRY_DINT Queries started delay interrupts 85 71 13 1.4
36 MSK_FLT Masks sync faults 132 110 17 1.8
37 DMSK_FLT Enables sync faults 143 120 18 1.9
38 READ_ERR Reads event status register 140 120 18 1.9
39 DIS_IRT Disables the handling of new inter-
rupts
180 155 64 3.5
40 EN_IRT Enables the handling of new inter-
rupt events
125 105 31 3.0
41 DIS_AIRT Delays the handling of interrupts 50 45 9 1.0
42 EN_AIRT Enables the handling of interrupts 55 45 9 1.0
43 RE_TRIGR Re-triggers the scan time monitor 50 40 23 4.7
44 REPL_VAL Copies a substitute value into accu-
mulator 1
60 50 39 3.9
46 STP Forces the CPU into the STOP
mode
47 WAIT Delays program execution in addi-

tion to waiting times
250 250 198 193
121
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
49 LGC_GADR Converts a free address to the slot
and rack for a module
250 210 33 2.3
50 RD_LGADR Reads all the declared free addres-
ses for a module
500 420 59 3.7
51 RDSYSST Reads out the information from the
system state list.
SFC 51 is not interruptible through
interrupts.
250ms + 10ms
/ Byte
224ms + 10ms /
Byte
44ms + 2 ms
/ Byte
3.6ms+0.013ms
/ Byte
52 WR_USMSG Writes specific diagnostic informa-
tion in the diagnostic buffer
280 235 66 3.0
55 WR_PARM Writes dynamic parameters to a
module
2000 1700 349 130
concurrent running requests, max. 1 request
56 WR_DPARM Writes predefined dynamic parame-
ters to a module
1750 1750 346 130
122
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
57 PARM_MOD Assigns a modules parameters <1650 <1400 <190 < 160 _
concurrent running requests to dif-
ferent modules,
1 request
58 WR_REC Writes a module-specific data re-
cord
1400ms +32ms
/ Byte
1400ms+32ms /
Byte
278ms + 6.5ms
/ Byte
180ms +
5.11ms
/ Byte
ferent modules to different modu-
les, max
4 requests together with
SFB 53 requests
SFB 53 requests
59 RD_REC Reads a module-specific data re-
cord
500 500 275ms + 6.4ms
/ Byte
212ms +
6.25ms
/ Byte
ferent modules, max.
SFB 52 requests
SFB 52 requests
64 TIME_TICK Reads out the system time 55 50 9 0.8
1)
CPU 313: 6 requests
CPU 314 and IM 151-7: 10 requests
123
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
65 X_SEND Sends data to a communication
partner external to your own S7 sta-
tion
310 310 155 40.0
The maximum number of simulta-
neous SFC65, SFC67, SFC68,
SFC72 or SFC73 jobs to different
remote communication partners
(Note: only one SFC65, SFC67,
SFC68, SFC72 or SFC73 job at a
time is possible to a remote com-
munication partner).
4 requests
1)
30 requests
66 X_RCV Receives data from a communica-
tion partner external to your own S7
station
120 120 24 9.0
1)
CPU 313: 6 requests
124
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
67 X_GET Reads data from a communication
tion
190 190 38 10.0
4 requests
1)
30 requests
1)
CPU 313: 6 requests
125
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
68 X_PUT Writes data to a communication
tion
190 190 38 10.0
4 requests
1)
30 requests
1)
CPU 313: 6 requests
126
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
69 X_ABORT Aborts connection to a communication
partner external to your own S7 station
100 100 20 5.0
70 GEO_LOG
1)
Determine module start address 135 100 17 8.0
71 LOG_GEO
1)
Querying the module slot belonging to
a logical address
275 116 20 10.0
72 I_GET Reads data from a communication
partner within your own S7 station
190 190 38 10.0
The maximum number of simultaneous
SFC65, SFC67, SFC68, SFC72 or
SFC73 jobs to different remote commu-
nication partners (Note: only one
SFC73 job at a time is possible to a re-
mote communication partner).
4 requests
2)
30 requests
1)
only CPUs with firmware as of V 2.3.0
2)
CPU 313: 6 requests
127
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
73 I_PUT Writes data to a communication partner
within your own S7 station
190 190 38 10.0
The maximum number of simultaneous
SFC73 jobs to different remote commu-
nication partners (Note: only one
SFC73 job at a time is possible to a re-
mote communication partner).
4 requests
1)
30 requests
74 I_ABORT Aborts connection to a communication
partner within your own S7 station
100 100 20 5.0
1)
CPU 313: 6 requests
128
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
81 UBLKMOV Copy the variable without interrup-
tion, length of the data to be copied
up to 32 bytes
90ms+ 2ms
/ Byte
75ms + 2ms
/ Byte
16ms+0.05ms
/ Byte
1.6ms + 0.013ms
/ Byte
82 CREA_DBL Create data block in load memory. <1250 <1050 <320 <100
83 READ_DBL Read from a data block in load
memory
<1100 <950 <300 <300
84 WRIT_DBL Write to a data block in load
memory.
<1100 <900 <300 <300
129
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
101 RTM Handling the Run-time meter 170 150 35 4.0
102 RD_DPARA Read predefined parameter. <1750 <1500 <320 <150
103 DP_TOPOL Detemine bus topology in a DP Master
system fist call
_ 250.0
1)2)
19.0
2)
3.0
105 READ_SI
2)
Read dynamically assigned system re-
sources
2122.0 +
40.5 per
alarm
2122.0 +
37.0per
alarm
125.0 + 1.0
per alarm
30.0 + 0.2
per alarm
106 DEL_SI
2)
Enable dynamically assigned system
resources
2040.0 +
57.0 per
alarm
2040.0 +
29.0 per
alarm
246.0 + 2.6
per alarm
56.0 + 0.2
per alarm
107 ALARM_DQ
2)
Acknowledgeable block-related messa-
ges create first call
354.0 354.0 33.0 9.0
108 ALARM_D
2)
Not acknowledgeable block-related
messages create first call
344.0 344.0 35.0 11.0
109 PROTECT
2)
Activate write protection 45 45 7 3
1)
only DP-CPUs
2)
130
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
112 PN_IN
1)
Update inputs of the PROFINET com-
ponent user program interface
_ <20200 <20200 <6000
113 PN_OUT
1)
Update outputs of the PROFINET com-
ponent interface
_ <21400 <21400 <6000
114 PN_DP
1)
Update DP interconnection _ <4000 <4000 <5000
1)
only CPU 315-2 PN/DP / 317-2 PN/DP. / 319-3 PN/DP / IM 154-8 CPU
The runtimes of these blocks depend on their respective interconnection configuration.
See also manual CPU 31xC and CPU 31x, technical data: chapter cycle and response times, extending the OB1 cycle for cyclical
PROFINET interconnections.
131
A5E00105517-09
SFC
SFC
No.
151, 154
317 319
126 SYNC_PI Update the process image partition of
the inputs in a synchronous cycle
_ 230ms + 20ms/
Byte
1)2)
80ms + 10ms/
Byte
2)
7ms + 2ms /
Byte
concurrent running requests, max. _ 1 request
1)2)
1 request
127 SYNC_PO Update the process image partition of
the outputs in a synchronous cycle
_ 230ms + 20ms/
Byte
1)2)
80ms + 10ms/
Byte
2)
7ms + 2ms/
Byte
concurrent running requests, max. _ 1 request
1)2)
1 request
1)
only CPU 315-2DP, 315-2 PN/DP, IM 154-8 CPU
2)
availiable as of V 2.5
System Function Blocks (SFB)
132
A5E00105517-09
The following table lists the system function blocks supplied by the operating system of the S7-300s CPUs, and the execution times on the
respective CPUs.
SFB
SFB
No.
SFB Name Description 312 31x, 147,
151, 154
317 319
0 CTU Counts up 101 90 19 3.0
1 CTD Counts down 101 90 19 3.0
2 CTUD Counts up and counts down 109 100 21 3.0
3 TP Generates a pulse 135 115 26 3.0
4 TON Delays a leading edge 120 101 20 3.0
5 TOF Delays a falling edge 120 100 21 3.0
32 DRUM Implements a sequence processor with
a maximum of 16 s
90 80 16 3.0
133
A5E00105517-09
SFB
SFB
No.
151, 154
317 319
SFBs for the integrated inputs/outputs (only CPU 31xC)
41 CONT_C Continuous control 3300
42 CONT_S Step control 2800
43 PULSEGEN Pulse generation 1500
44 ANALOG
1)
positioning with analog output
idle run
start positioning run
request
880
2900
1300
46 DIGITAL
1)
positioning with digital outputs
idle run
start positioning run
request
810
2200
1200
SFBs for the integrated inputs/outputs (only CPU 31xC)

47 COUNT counting 1222
48 FREQUENC frequency measurement 1240
49 PULSE pulse width modulation 1101
1)
only CPU 314C-2
134
A5E00105517-09
SFB
SFB
No.
151, 154
317 319
52 RDREC Read Data set from DP slave,
PROFINET IO-Device or central module
500 272 ms + 6.4 ms
/ Bytes
214ms+6.25 ms
/ Byte
concurrent running requests to different
modules, max.
4 requests together
with
SFC 59 requests
SFC 59 requests
53 WRREC Write Data set to DP slave,
PROFINET IO-Device or central module
1400 ms + 32 ms / Byte 248 ms+5.25 ms
/ Byte
181 ms+5.11 ms
/ Byte
concurrent running requests to different
modules, max.
4 requests together
with
SFC 58 requests
SFC 58 requests
54 RALRM Read out interrupt status information
from interrupts of a DP slave,
PROFINET IO-Device or of a central mo-
dule in the respective OB
650 137 25.0
60 SEND_PTP
1)
send data (n characters)
idle run
operationalmode
405
600+n
*
11
(1n1024)

1)
only CPU 31xC-2 PtP
135
A5E00105517-09
SFB
SFB
No.
151, 154
317 319
61 RCV_PTP
1)
receive data (n characters)
idle run
operationalmode
430
600+n
*
7
(1n1024)

62 RES_RCVB
1)
clear input buffer
idle run
operational mode
390
700

63 SEND_RK
2)
send data (n characters, data exceeding
a length of 128 characters are transfer-
red in blocks with a maximum length of
128 characters)
idle run
operational mode
450
1210+n
*
11
(1n128)

1)
only CPU 31xC-2 PtP
2)
only CPU 314C-2PtP
136
A5E00105517-09
SFB
SFB
No.
151, 154
317 319
64 FETCH_RK
1)
send data (n characters, data exceeding a
length of 128 characters are transferred in
blocks with a maximum length of 128 charac-
ters)
idle run
operational mode
620
1680+n
*
7
(1n128)

65 SERVE_RK
1)
receive/provide data (n characters, data excee-
ding a length of 128 characters are transferred
in blocks with a maximum length of 128 charac-
ters)
idle run
operational mode
510
1320+n
*
7
(1n128)

1)
only CPU 31xC-2 PtP
2)
only CPU 314C-2 PtP
137
A5E00105517-09
SFB
SFB
No.
151, 154
317 319
75 SALRM
1)
Set desired interrupts of I-slaves 90 19 9.0
concurrent running requests, max. 34 requests together with
SFC 7 requests
81 RD_DPAR Reading predefined parameters < 1500 < 1500 < 300 < 200
1)
only DP-CPUs
138
A5E00105517-09
PROFINET Interface
For some communication services, pre-fabricated blocks are available as an interface your STEP7 user
program. See also STEP7 (as of version V5.3), Standard-Library, Communication Blocks.
may be used with
FB
No.
FB Name Description
31x, 315
(without PROFINET-
Interface)
147, 151 31x, 317, 319, 154
8 USEND Uncoordinated data sending Communication via
CP
Communication via CP

9 URCV Uncoordinated data reception
CP
or
integrated PROFINET-
12 BSEND Block-oriented data sending
Interface
13 BRCV Block-oriented data reception
14 GET Read data from a remote CPU
15 PUT Write data from a remote CPU
139
A5E00105517-09
may be used with
FC
No.
FC-Name Description
31x
(without
PROFINET-
Interface)
147, 151 317, 319, 154
62 C_CNTRL Request connection status which be-
longs to a local connection.
Communication via
CP
Communication via CP
or
Interface
See also STEP7, Standard-Library, Communication Blocks
Function blocks for open system interconnection over Industrial Ethernet
140
A5E00105517-09
Function blocks for open system interconnection over Industrial Ethernet
In order to be able to exchange data via user programs with other TCP/IPcapable communication partners, STEP7 places FBs and UDTs
at your disposal. These blocks are saved in the Standard-Library,Communication Blocks.
FB Nr FB Name Description
315 PN,
319 PN IM 154 8 Communication protocol FB-Nr. FB-Name Description
315 PN,
317 PN
319 PN IM 154-8 Communication protocol
63
1)2)
TSEND Sending of data with firmware
as of V 2.3.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
TCP, ISO-on-TCP
64
1)2)
TRCV Receiving of data with firmware
as of V 2.3.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
TCP, ISO-on-TCP
65
1)2)
TCON Establishing a
communication link
with firmware
as of V 2.3.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
TCP, ISO-on-TCP, UDP
66
1)2)
TDISCON Disconnecting a
communication link
with firmware
as of V 2.3.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
TCP, ISO-on-TCP, UDP
67
2)
TUSEND Sending of data with firmware
as of V 2.5.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
UDP
68
2)
TURCV Receiving of data with firmware
as of V 2.5.0
with firmware
as of V 2.4.0
with firmware
as of V 2.5.0
UDP
1)
as of STEP 7, V5.3, SP1
You can find blocks for UDP protocol on the internet at: http://support.automation.siemens.com/ww/view/en/22146612
2)
as of STEP 7, V5.4
IEC Functions
141
A5E00105517-09
IEC Functions
You can use the following functions in STEP 7:
These blocks are saved in the Standard Library, IEC Function-Blocks in STEP 7.
FC
FC Name Description
FC
No.
FC Name Description
DATE_AND_TIME
3 D_TOD_DT Concatenates the data formats DATE and TIME_OF_DAY (TOD) and converts to data format
DATE_AND_TIME.
6 DT_DATE Extracts the DATE data format from the DATE_AND_TIME data format.
7 DT_DAY Extracts the day of the week from the data format DATE_AND_TIME.
8 DT_TOD Extracts the TIME_OF_DAY data format from the DATE_AND_TIME data format.
Time Formats
33 S5TI_TIM Converts S5 TIME data format to TIME data format
40 TIM_S5TI Converts TIME data format to S5 TIME data format
Duration
1 AD_DT_TM Adds a duration in the TIME format to a time in the DT format. The result is a new time in the DT
format.
35 SB_DT_TM Subtracts a duration in the TIME format from a time in the DT format. The result is a new time in
the DT format.
34 SB_DT_DT Subtracts two times in the DT format. The result is a duration in the TIME format.
IEC Functions
142
A5E00105517-09
FC
FC Name Description
FC
No.
FC Name Description
Compare DATE_AND_TIME
9 EQ_DT Compares the contents of two variables in the DATE_AND_TIME format for equal to.
12 GE_DT Compares the contents of two variables in the DATE_AND_TIME format for greater than or equal
to.
14 GT_DT Compares the contents of two variables in the DATE_AND_TIME format for greater than.
18 LE_DT Compares the contents of two variables in the DATE_AND_TIME format for less than or equal to.
23 LT_DT Compares the contents of two variables in the DATE_AND_TIME format for less than.
28 NE_DT Compares the contents of two variables in the DATE_AND_TIME format for not equal to.
Compare STRING
10 EQ_STRNG Compares the contents of two variables in the STRING format for equal to.
13 GE_STRNG Compares the contents of two variables in the STRING format for greater than or equal to.
15 GT_STRNG Compares the contents of two variables in the STRING format for greater than.
19 LE_STRNG Compares the contents of two variables in the STRING format for less than or equal to.
24 LT_STRNG Compares the contents of two variables in the STRING format for less than.
29 NE_STRNG Compares the contents of two variables in the STRING format for not equal to.
IEC Functions
143
A5E00105517-09
FC-
FC Name Description
FC-
Nr.
FC-Name Description
STRING Variable Processing
21 LEN Reads the length of a STRING variable.
20 LEFT Reads the first L characters of a STRING variable.
32 RIGHT Reads the last L characters of a STRING variable.
26 MID Reads the middle L characters of a STRING variable (starting at the defined character).
2 CONCAT Concatenates two STRING variables in one STRING variable.
17 INSERT Inserts a STRING variable into another STRING variable at a defined point.
4 DELETE Deletes L characters of a STRING variable.
31 REPLACE Replaces L characters of a STRING variable with a second STRING variable.
11 FIND Finds the position of the second STRING variable in the first STRING variable.
IEC Functions
144
A5E00105517-09
FC
FC Name Description
FC
No.
FC Name Description
Format Conversions with STRING
16 I_STRNG Converts a variable from INTEGER format to STRING format.
5 DI_STRNG Converts a variable from INTEGER (32-bit) format to STRING format.
30 R_STRNG Converts a variable from REAL format to STRING format.
38 STRNG_I Converts a variable from STRING format to INTEGER format.
37 STRNG_DI Converts a variable from STRING format to INTEGER (32-bit) format.
39 STRNG_R Converts a variable from STRING format to REAL format.
Number Processing
22 LIMIT Limits a number to a defined limit value.
25 MAX Selects the largest of three numeric variables.
27 MIN Selects the smallest of three numeric variables.
36 SEL Selects one of two variables.
see also STEP 7 Online Help
System Status Sublist
145
A5E00105517-09
SZL_ID Sublist Index
(= ID of the individual
records of the sublist)
Record Contents
(Sublist Excerpt)
0111
H
CPU identification
One record of the sublist 0001
H
0006
H
0007
H
CPU type and version number
Identification of the basic hardware
Identification of the basic firmware
0012
H
0112
H
0F12
H
CPU features
All records of the sublist
Only those records of a group of fea-
tures
Header information only
0000
H
0100
H
0300
H
STEP 7 processing
Time system in the CPU
STEP 7 operation set
0013
H
User memory areas Work memory
146
A5E00105517-09
SZL_ID Record Contents
(Sublist Excerpt)
Index
Sublist
0014
H
Operating system areas Process image of the inputs
(number in bytes)
Process image of the outputs
(number in bytes)
Number of memory markers
Number of timers
Number of counters
Size of the I/O address area
Entire local data area of the CPU
(in bytes)
0015
H
Block types
All records of the sublist OBs (number and size)
DBs (number and size)
SDBs (number and size)
FCs (number and size)
FBs (number and size)
147
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
0019
H
0074
H
0174
H
State of module LEDs
Status of each LED
0001
H
0004
H
0005
H
0006
H
001B
H
001C
H
0014
H
0015
H
SF-LED
RUN-LED
STOP-LED
FRCE-LED
BF1-LED
BF2-LED
BF3-LED
MAINT-LED
0F19
H
0F74
H
148
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
001C
H
All Records for the
Component Identifications
Station name
Module name
Module plant identification
Copyright spezification
Module serial number
MMC serial number
OEM identification
011C
H
Component-Identification 0001
H

1)
0002
H

1)
0003
H

1)
0004
H

1)
0005
H

1)
0008
H

1)
000A
H

1)
Station name
Module name
Module plant identification
Copyright spezification
Module serial number
MMC serial number
OEM identification
1)
as Firmware V2.2.0
149
A5E00105517-09
Record Contents
(Sublist Excerpt)
0132
H
Communications status
on the communications type specified
0001
H
0004
H
0005
H
0006
H

0008
H
000B
H
000C
H
Number and type of connections
CPU protection level, position of the key
switch, version identification of the user
program and configuration
Diagnostic status data
PBK state parameter
(only CPU 317-2 PN/DP)
Target system, correction factor,
Runtime meter, Date/Time
Runtime meter (32 bits) 0 to 7
Runtime meter (32 bits) 8 to 15
0222
H
Interrupt status
Record for the specified interrupt OB number
150
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
0232
H
CPU Protection Level 0004
H
CPU protection level and position of the
key switch, version identification of the
user program and hardware
configuration
0092
H
0292
H
0692
H
Status information of module racks
Expected status of the module rack in
the central configuration
Actual status of module rack in
OK status of the expansion devices
in the central configuration
0000
H
Information about the status of the
module rack in the central configuration
151
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
0094
H
0294
H
0694
H
0794
H
0F94
H
Status information of module racks
Expected status of the module rack in
Actual status of module rack in
Faulty status of the rack in a central con-
figuration
Faulty and/or maintenance status of the
rack in a central configuration
0000
H
0000
H
0000
H
0000
H
Information about the status of the module
rack in the central configuration
152
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
0591
H
0C91
H
0D91
H
Module status information
of all submodules of the host module
of a module in the central rack or con-
nected to an integrated DP interface mo-
dule
of all modules in the specified rack
(all CPUs)
any logic address of
a module
0000
H
0001
H
0002
H
0003
H
Features/parameters of the module
plugged in
plugged in
Rack 0
Rack 1
Rack 2
Rack 3
153
A5E00105517-09
Record Contents
(Sublist Excerpt)
00A0
H
01A0
H
Diagnostic buffer
All entered event information
The x latest information entries
Event information
The information in each case depends on
the event
00B1
H
00B2
H
00B3
H

Module diagnostics
Data record 0 of the module diagnostics
information
Complete module-dependent record of
the module diagnostics information
Complete module-dependent record of
the module diagnostics information
Module starting
address
Module rack and
slot number
Module starting
address
Module-dependent diagnostics informa-
tion
PROFIBUS DP Sublists
154
A5E00105517-09
Record Contents
(Sublist Excerpt)
0591
H

1)

0A91
H

0C91
H
Module status data in the CPU
Module status information of all submodules

Status information of all DP subsystems and
DP masters
Module status information of a module

a module

plugged in
0D91
H
In the station named (for CPU 315-2 DP) xxyy
H
All modules of station yy in the DP
subnet xx
As DP slave: Status data for transfer
memory areas
1)
155
A5E00105517-09
(Sublist Excerpt)
Index
Sublist

0092
H

0292
H

0692
H
Status information of module racks or
stations in the DP network
Target status of racks in central configura-
tion or of stations in a subnet

Actual status of racks in central configura-
tion or of stations in a subnet

OK status of expansion racks in central con-
figuration or of stations in a subnet
0000
H
DP master system ID
Information on the state of the mount-
ing rack in the central configuration

Information of status of stations in
subnet

0094
H

1)
0294
H

1)
0694
H

1)

0F94
H

1)
Station status in a DP subnet
Expected status of the stations in a subnet
Current status of the stations
all faulty or non-existing stations
only header information
DP master system ID
DP master system ID
DP master system ID
Status of the devices in a DP subnet
1)
156
A5E00105517-09
(Sublist Excerpt)
Index
Sublist

0696
H

1)

0C96
H

1)

Module status information for PROFI-
BUS DP
Module status information of all configured
submodules of a module

Module status information of a submodule

a module/submodule

a module/submodule
Status of the devices in a PROFIBUS
subnet
00B4
H
Module diagnostics
All standard diagnostic data of a station
(only with DP master)
Module
start address
(Diagnostic address)
Module-dependent diagnostic infor-
mation
1)
The system status list ID: SZL_ID 0696
H
is no longer valid. This error is corrected in the
printed output of the operation list.
S7 Communication Sublists and PROFINET Sublists
157
A5E00105517-09
Record Contents
(Sublist Excerpt)
0591
H
0A91
H

0C91
H
Module status information in PROFINET IO
Module status information of all submodules
Module status information of all PN I/O subsy-
stems
Module status information of a module

any logic address of a mo-
dule/submodule
1)

Module status data of in-
serted modules
1)
When specifying logical output addresses the most significant bit (bit 15) must be set in the INDEX parameter (Example: Output ad-
dress 10dez=>INDEX:=W#16#800A)
158
A5E00105517-09
(Sublist Excerpt)
Index
Sublist
0D91
H
in the specified station Slot number of the PROFI-
NET I/O Device
Bit 15: is always = 1
Bit 11-14: PN I/O-Subsy-
stem ID (Value range
100-115; where only 0 to
15 is specified)
Bit 0-10: Station number
of the PROFINET I/O De-
vice
of all modules in the cor-
responding PROFI-
NET I/O Device
159
A5E00105517-09
(Sublist Excerpt)
Index
Sublist

0094
H

0294
H

0694
H

0794
H

0F94
H
Station status in PROFINET IO
Expected status of the stations in a subnet

Current status of the stations

all faulty or non-existing stations

Faulty and/or maintenance status of the stations

only header information
PN IO Subsystem number



Status of the PROFINET
devices in a PROFINET
subnet
0696
H

0C96
H

Module status information for PROFINET IO
Module status information of all configured sub-
modules of a module

Module status information of a submodule
dule/submodule

dule/submodule
Status of the PROFINET
devices in a PROFINET-
I/O subnet
0xB3
H

Read diagnostic data record 1
Alphabetical Index of Instructions
160
A5E00105517-09
Instruction Page Instruction Page
) 38 = 53
)MCR 105 ==D 86
+ 83 ==I 85
+AR1 84 ==R 87
+AR2 84 <=D 86
+D 77 <=I 85
+I 76 <=R 87
+R 78 <>D 86
D 77 <>I 85
I 76 <>R 87
R 78 <D 86
*D 77 <I 85
*I 76 <R 87
*R 78 >=D 86
/D 77 >=I 85
/I 76 >=R 87
/R 78 >D 86
161
A5E00105517-09
>I 85 CAD 91
>R 87 CALL 96
A 31, 40, 47 CAW 91
A( 37 CC 97
ABS 79 CD 58
ACOS 82 CDB 99
AD 45 CLR 54
AN 32, 41, 48 COS 82
AN( 37 CU 58
ASIN 82 DEC 91
ATAN 82 DTB 93
AW 45 DTR 93
BE 98 EXP 81
BEC 98 FN 50
BEU 98 FP 49
BLD 92 FR 57, 59
BTD 93 INC 91
BTI 93 INVD 95
162
A5E00105517-09
INVI 95 JUO 102
ITB 93 JZ 102
ITD 93 L 60, 61, 62, 63, 64, 65, 74, 75
JBI 101 LAR1 72
JC 100 LAR2 72
JCB 101 LD 65
JCN 100 LN 81
JL 104 LOOP 104
JM 102 MCR( 105
JMZ 103 MCRA 105
JN 103 MCRD 105
JNB 101 MOD 77
JNBI 101 NEGD 95
JO 101 NEGI 95
JOS 102 NEGR 79
JP 102 NOP 92
JPZ 103 NOT 54
JU 100
163
A5E00105517-09
O 33, 39, 42, 47 S 51, 58
O( 37 SA 57
OD 46 SAVE 55
ON 34, 42, 48 SD 56
ON( 37 SE 56
OPN 97 SET 54
OW 45 SIN 82
POP 91 SLD 88
PUSH 91 SLW 88
R 52, 57, 58 SP 56
RLD 90 SQR 80
RLDA 90 SQRT 80
RND 94 SRD 88
RND+ 94 SRW 88
RND 94 SS 56
RRD 90 SSD 89
RRDA 90 SSI 89
164
A5E00105517-09
T 66, 67, 68, 69, 70, 71, 74 UC 97
TAK 91 X 35, 43, 47
TAN 82 X( 37
TAR 73 XN 36, 44, 48
TAR1 73 XN( 37
TAR2 73 XOD 46
TRUNC 94 XOW 45

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SIMATIC S7-300 SIMATIC S7-300 CPU 31xC and CPU 31x, Technical Specifications

47 WAIT Delays program execution in addi-

SFBs for the integrated inputs/outputs (only CPU 31xC)

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