Timer

What is a timer/counter?

A counter is one of many registers in a modern microprocessor and simply counts events, that is, electrical pulses

Each time a pulse is applied to a counter, the value in the counter increments by one.
If the pulses are applied at a known, constant rate, then the counter becomes a timer.

Limits of Timer
There are two limits: The pulse properties (minimum pulse width and duration), and The maximum value that can be counted to. When using the internal clock sources (those provided by the processor),

Analyzing the Limits

However, these must be considered if were driving the counter with an external signal. Well just use the internal clocks and worry about external clocking another time. The other limit, maximum count value, is determined by the width of the register in bits. An eight bit wide counter can count to 2^8-1 or 255, while a 16 bit wide counter can count to 2^16-1 or 65,535. On the 256th count (or 65,536th count), the counter starts over at zero. We say that the counter rolls over, or overflows,

Basic Timer Operation

Timer Control Registers

In addition to the register that holds COUNT (TCNT) and the register that holds the overflow flags (TIFR), there are additional registers that control the behavior of the timer/counters TCNT-Timer counter TIFR-Timer Interrupt Flag Register

Clock Sources and Clock Control

A source of pulses at a known rate (pulses per second) is commonly called a clock.

The clock pulse rate is called the frequency and is measured in Hertz (abbreviated Hz). One Hertz is one cycle (one pulse) per second. Its quite easy to change the processor clock rate by selecting a different prescaler value.

Prescale

The Prescalar is a mechanism for generating clock for timer by CPU clock. Every CPU has a clock source and the frequency of this source decides the rate at which instructions are executed by the processor. Atmega has clocks of several frequencies such as 1 MHz, 8 MHz, 12 MHz, 16 MHz (max). The Prescalar is used to divide this clock frequency and produce a clock for TIMER. The Prescalarc an be set to produce the following types of clocks: No Clock(Timer stop) No prescaling (clock frequency = CPU frequency) FCPU/8 FCPU/64 FCPU/256 FCPU/1024 External clock, however, it will rarely be used

Timer Modes

Timers are usually used in one of the following modes:

Normal CTC Fast PWM Phase correct PWM

Normal Mode

A timer running in normal mode will count up to its maximum value.

When it reaches this maximum value, it issues an Overflow interrupt and resets the value of the timer to its original value.

Diagram

Description
In the above case, you can see that the time period is 256 times the time period of the clock. 255 clock cycles are required to attain the maximum value and one clock cycle to clear the timer value.

CTC Mode
CTC stands for Clear Timer on Compare Match Mode. CTC mode works nearly identically to Normal Mode, but allows us to change the value of TOP. Instead of being limited to MAX (maximum counter value), we can put a value in another register, OCR1A

Diagram

CTC
In this case, suppose we set our event to toggle the output pin. In that case, the output pin will remain high for one time period of the timer and will remain low for another time period. From the normal case, we can draw an analogy to find out t timer.

Why Frequency changes???and Duty cycle is same

Pulse Width Modulation (PWM) Mode

A microcontroller can only generate two levels on its output lines, HIGH=5V and LOW=0V. But what if we want to generate 2.5V or 3.1V or any voltage between 05 volt as output? For these requirements, instead of generating a constant DC voltage output we generate a square wave, which has high = 5V and Low = 0V. A term called as Duty Cycle is defined as d = ton / ttotal * 100%

PWM Mode

In this Mode Frequency is constant and we vary duty cycle

PWM Mode
A term called as Duty Cycle is defined as d = ton / ttotal * 100% So you can see that the duty cycle in the above case is 50%. If the frequency of such a wave is sufficiently high (say 500 Hz) then the output you get is half of 5V i.e. 2.5 V. Thus if this output is connected to a motor (by means of suitable drivers) it will run at 50% of its full speed at 5V. The PWM technique utilizes this fact to generate any voltage between two extremes (for example between 012 volts). The trick is to vary the duty cycle between 0 to 100% and get same percentage of input voltage to output.

Fast PWM Mode

Fast PWM Mode works very much like CTC mode, but adds another register for controlling the pulses on the OC1A pins. Fast PWM allows us to use the Input Capture Register (ICR1) as TOP. Now the value placed in the OCR1A register will be continuously compared to COUNT (the timer/counter value) as it increments. When the COUNT is equal to the value in OCR1A, the output on OC1A will go high. As soon as the count reaches TOP, OC1A will be

Cont

cleared. So we can again generate a square wave, but now we can easily vary the duty cycle. The duty cycle is simply the ratio of the time the output is high divided by the total length of one cycle.

Diagram

Phase Correct PWM Mode

This mode is very similar to the Fast PWM mode except that whenever the value of the timer reaches its maximum value then instead of clearing the value of the timer it simply starts counting down.

Diagram