602 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO.

3, MARCH 2010
Passive Lossless Snubber for Boost PFC With
Minimum Voltage and Current Stress
River T. H. Li, Student Member, IEEE, Henry Shu-Hung Chung, Senior Member, IEEE, and Anson K. T. Sung
AbstractA passive lossless snubber for boost power-factor cor-
rector (PFC) is presented. It has a number of advantages over the
prior art. First, it does not introduce extra voltage and current
stress on the main switch. Second, it provides soft-switching condi-
tions for the main switch over wide input and load range. Third, it
limits the turn-ON current of the main switch resulting from the re-
verse recovery current of the output diode. The operating principle
of the proposed snubber and procedure of designing the compo-
nent values are given. A comparative study into the performance
characteristics between the prior-art passive lossless snubbers and
the proposed snubber will be performed. The performance of the
proposed snubber has been evaluated experimentally on a 750-W
PFC with universal input. The boost converter is operated in con-
tinuous conduction mode and its input current is shaped by using
average current-mode control. Experimental results show that soft
switching of the main switch is maintained over 88% with an input
of 110 V, 60 Hz, and 91.8% an the input of 220 V, 50 Hz, over
one line cycle, and from full load to 20% load. The efciencies of
the PFC with unsnubbered hard switching, conventional resistor
capacitordiode snubber, and proposed snubber will be compared.
Results show that the proposed snubber can signicantly improve
the efciency over the designed operating range.
Index TermsBoost converter, passive lossless snubber, power-
factor corrector, snubbers.
I. INTRODUCTION
B
OOST-TYPE power-factor corrector (PFC) has been pop-
ular in todays ac/dc power applications. For high-power
applications, the boost converter is usually operated in continu-
ous conduction mode (CCM). Signicant effort has been made
to improve the performance of the boost converter by switch-
ing the main switch and output diode softly. Apart from re-
ducing switching losses, the electromagnetic compatibility will
also be improved by the modied switching trajectories of the
main switch and reverse-recovery characteristic of the output
diode [1][3]. A number of soft-switched boost converters that
utilize active [4][19] and passive snubbers [19][53] have been
proposed.
Active snubber circuits create zero-voltage-switching (ZVS)
and/or zero-current-switching (ZCS) condition(s) for the main
switch. However, their merits are often offset by requiring ad-
ditional switch(es) and control circuitry, having limited soft-
switching range, and introducing additional voltage/current
stress on the switches. In addition, some of them only create
Manuscript received June 9, 2009; revised September 4, 2009. Current version
published April 2, 2010. This work was supported by the Research Grants
Council of the Hong Kong Special Administrative Region, China, under Project
CityU 112708. Recommended for publication by Associate Editor Y.-F. Liu.
The authors are with the Center for Power Electronics, City University of
Hong Kong, Kowloon, Hong Kong (e-mail: eeshc@cityu.edu.hk).
Digital Object Identier 10.1109/TPEL.2009.2035123
Fig. 1. Basic architecture of a snubber.
soft-switching conditions for the main switch and the switch in
the active snubber is hard-switched [8][15].
Passive snubbers are attractive alternatives as they only use
passive components and their design is simple [19][53]. The
main switch is turned on and off softly, resulting in reduced
switching losses. As shown in Fig. 1, the simplest form of the
energy absorbing circuit for the turn-ON snubber is an inductor
in series with the switching device (i.e., L
s
), while the one for
the turn-OFF snubber is a capacitor in parallel with the switching
device (i.e., C
s
). The diode D
1
provides polarized charging of
C
s
when the switching device is turned off, and avoids direct
discharging of C
s
when the switching device turned on. Most
snubber structures distinguish themselves from others by the
energy-reset circuit, which is used to reset the energy stored
in the snubber inductor and snubber capacitor. The simplest
energy-reset circuit is a resistor [1]. The energy stored in L
s
and
C
s
is totally dissipated as heat in the resistor.
The conventional resistorcapacitordiode (RCD) turn-OFF
snubber limits the rate of rise of the switch voltage so as to
reduce the voltage overshoot and turn-OFF loss. A simple turn-
ON snubber proposed in [49] can limit the reverse recovery
current i
rr
as well as the related loss. Such method is suitable for
boost-type PFCas the magnitude of i
rr
is considerably high, due
to the high reverse voltage across the output diode. Nevertheless,
even though the structure of the RCDsnubber is simple, its main
disadvantage is the loss of energy on the snubber resistor, thus
reducing the overall efciency. As a result, different snubbers
with the energy-recovery function have been proposed in the
literature.
A straightforward approach to resetting the snubber is to use
a switching converter, such as the ones for forward or yback
0885-8993/$26.00 2010 IEEE
LI et al.: PASSIVE LOSSLESS SNUBBER FOR BOOST PFC WITH MINIMUM VOLTAGE AND CURRENT STRESS 603
converter in [18], [20][30], to recirculate the energy stored in
the snubber. The switching action of the main switching device is
made common to both the main power conversion and snubber
energy conversion. However, the transformer coupling effect
causes additional voltage stress across the switching device and
the leakage inductance of the transformer or coupled inductors
also generate undesirable voltage spikes.
In passive resonant snubber circuit, the energy-reset circuit
has reactive elements and diodes only. The energy stored in L
s
and C
s
in Fig. 1 is recycled in each switching cycle [31][43]. A
systematic approach to studying the properties and synthesis of
a generalized form of that category of snubbers has been carried
out in [42], [43], in which different minimum voltage stress
(MVS) and nonminimumvoltage stress (non-MVS) circuit cells
have been discussed. Many prior-art structures can be derived
and constructed from these cells. The basic operating principle
is briey described as follows. First, the energy stored in L
s
is released to C
s
after the main switch is turned off softly.
Then, due to the presence of the snubber inductor, the rate of
rise of the switch current is limited and the switch is softly
turned on. The energy stored in C
s
will then be released to a
storage capacitor in the energy-reset circuit and/or another part
of the converter, such as the load, through different resonant
paths. Some improved circuits with saturable inductors added
to reduce reverse recovery current of the output diode have been
proposed [44][46]. However, the voltage generated across the
saturable inductor causes extra voltage stress on the main switch,
and thus, voltage clamping devices, like lossy Zener diode, have
to be used to clamp the switch voltage. Some methods can
only be applicable for particular operating modes, for example
the snubber circuit in [50] is used in converters operating in
discontinuous conduction mode and critical mode.
Even though the earlier snubbers reduce the switching loss
of the main switch, the soft-switching range is limited by the
minimum ON time t
ON,min
, and minimum OFF time t
OFF,min
of
the main switch. t
ON,min
is the minimum time required to in-
crease the main switch current from zero to the rated value and
completely transfer the charges stored in C
s
to the energy-reset
circuit and/or other part of the converter through different res-
onant paths. t
OFF,min
is the minimum time required to charge
up C
s
from zero to the rated value and completely transfer the
energy stored in L
s
to C
s
, energy-reset circuit, and/or other part
of the converter.
For MVS circuit cells, in order to ensure soft switching of
the main switch, it is necessary to ensure that the energy stored
in L
s
is lower than the energy stored in C
s
. Otherwise, the
main switch will be hard-switched. Thus, this criterion limits
the maximum value of the main switch current. For non-MVS
circuit cells, with an extra inductor added in the energy-reset
circuit, the earlier criterion for MVS circuit cells is relaxed, and
thus, the load range is widened and the resonant current can
be reduced. However, an extra voltage stress will be introduced
across the main switch. Although t
ON,min
can be reduced by
reducing the value of L
s
, the current stress on the main switch
will also be increased.
A passive lossless snubber that retains the merit of simple
structure is presented. It tackles the limitations of the prior-art
Fig. 2. Circuit schematic of the proposed snubber.
structures for boost PFC. It does not introduce extra voltage and
current stress on the main switch, has wide soft-switching range
over wide input and load variations, and can limit the turn-ON
current of the main switch resulting from the reverse recovery
current of the output diode. The switch voltage stress equals the
output voltage and current stress is within the designed max-
imum input current. The operating principles of the snubber
will be described in Section II and its design procedures will be
given in Section III. The performance of the proposed snubber
was evaluated on a 750 W with universal input PFC. The boost
converter is operated in CCM. A comparative study into the op-
erational characteristics between the commonly studied passive
snubbers and the proposed one will be given.
II. OPERATING PRINCIPLES
Fig. 2 shows the circuit schematic of the proposed lossless
snubber. The key voltage and current waveforms are given in
Fig. 3. There are eight operating modes in one switching cycle.
They are shown in Fig. 4. For the sake of simplicity in the
analysis, the following assumptions have been made.
1) All semiconductor switching devices are ideal. They have
zero ON-state resistance, innite OFF-state resistance, and
zero junction capacitance.
2) All energy storage components have no parasitic elements,
and are thus, free of loss.
3) The input is considered as a constant current source of
value equal to I
in
.
Before the start of a switching cycle, the converter is in the
freewheeling stage, as shown in Fig. 4(j). The cyclical operation
is described as follows.
Mode 1a [see Fig. 4(a)] (t
0
t < t

1
): The main switch is
turned on softly. The inductor L
s
and saturable inductor L
sr
limit the rate of rise of the switch current. As the value of L
sr
is large, the function of L
sr
is used to delay the rate of rise of
the switch current immediately after the switch is turned on in
this mode. This can enhance soft turn-ON of the main switch
(L
s
+ L
sr
)
di
L
s
dt
= V
out
(1)
604 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010
Fig. 3. Key voltage and current waveforms of the proposed snubber.
where i
L
s
is the current through L
s
and V
out
is the output
voltage.
Although the value of L
sr
is large, L
sr
is easily saturated
with small current, this mode lasts a very short time. This mode
ends at t

1
when L
sr
is saturated at i
L
s
= I
sat
. Thus,
t

1
t
0
=
(L
s
+ L
sr
)I
sat
V
out
. (2)
Mode 1b [see Fig. 4(b)] (t

1
t < t

1
): Since L
sr
is saturated,
the rate of rise of the switch current is limited by L
s
. Thus,
L
s
di
L
s
dt
= V
out
. (3)
This mode ends when the switch current equals the input
inductor current I
in
. Hence,
t

1
t

1
=
L
s
(I
in
I
sat
)
V
out
. (4)
Mode 1c [see Fig. 4(b)] (t

1
t < t
1
): The output diode enters
into the reverse recovery process. The duration of the process is
approximated by the following equation:
1
2
(t
1
t

1
)I
rr
= Q
rr
t
1
t

1
=
2Q
rr
I
rr
(5)
where Q
rr
and I
rr
are the reverse recovery charge and current
of the diode, respectively.
As
L
s
I
rr
t
1
t

1
(1 + S) = V
out
. (6)
Equation (5) can be expressed as
I
rr
=

2 Q
rr
(1 + S)
di
D
dt
(7)
where di
D
/dt = V
out
/L
s
is the turn-OFF rate of the output diode
current and S is snappiness factor [1].
The peak current

I
S
owing through the switch is

I
S
= I
in
+ I
rr
. (8)
By using (5) and (7), the diode is completely off when
t
1
t

1
=

2Q
rr
L
s
(1 + S)
_
di
D
dt
_
1
. (9)
Mode 2a [see Fig. 4(c)] (t
1
t < t
2
): The energy stored in
C
s
is transferred to C
st
through the resonance path C
s
L
st

D
3
C
st
L
s
i
L
s
(t) = I
in
+
V
out
Z
2a
sin
2a
(t t
1
) (10)
i
L
s t
(t) = i
L
s
(t) I
in
=
V
out
Z
2a
sin
2a
(t t
1
) (11)
v
C
s
(t) = V
out
_
1
1 + x
[x + cos
2a
(t t
1
)]
_
(12)
v
C
s t
(t) = V
out
x
1 + x
[1 cos
2a
(t t
1
)] (13)
where Z
2a
=
_
L
eq
/C
eq
,
2a
= 1/
_
L
eq
C
eq
, L
eq
= L
s
+
L
st
, C
eq
= C
s
C
st
/(C
s
+ C
st
), and x = C
s
/C
st
is the ratio
between C
s
and C
st
.
This mode ends when v
C
s
(t
2
) = 0. Thus, by using (12), we
have
cos
2a
(t
2
t
1
) = x. (14)
By substituting (14) into (13), we have
v
C
s t
(t
2
) = xV
out
. (15)
In order to ensure the existence of t
2
for discharging C
s
completely, i.e., v
C
s
(t
2
) = 0, the value of x in (14) should be
less than or equal to one. Therefore,
C
st
C
s
(16)
t
2
t
1
=
1

2a
_

2
+ sin
1
x
_
(17)
sin
2a
(t
2
t
1
) =
_
1 x
2
. (18)
By substituting (18) into (10) and (11), we have
i
L
s
(t
2
) = I
in
+

C
s
L
eq

1 xV
out
(19)
i
L
s t
(t
2
) =

C
s
L
eq

1 xV
out
. (20)
Mode 2b [see Fig. 4(d)] (t
2
< t < t
3
): D
1
conducts. The
energy stored in L
st
is transferred to C
st
through the resonance
LI et al.: PASSIVE LOSSLESS SNUBBER FOR BOOST PFC WITH MINIMUM VOLTAGE AND CURRENT STRESS 605
Fig. 4. Modes of operation. (a) Mode 1a (t
0
t < t

1
). (b) Mode 1b (t

1
t < t

1
) and mode 1c (t

1
t < t
1
). (c) Mode 2a (t
1
t < t
2
). (d) Mode 2b
(t
2
t < t
3
). (e) Mode 3 (t
3
t < t
4
). (f) Mode 4 (t
4
t < t
5
). (g) Mode 5 (t
5
t < t
6
). (h) Mode 6 (t
6
t < t
7
). (i) Mode 7 (t
7
t < t
8
). (j) Mode 8
(t
8
t < t
9
).
path, D
1
L
st
D
3
C
st
L
s
i
L
s
(t) = I
in
+ V
out

C
s
L
eq
cos[
2b
(t t
2
) +
2b
] (21)
i
L
s t
(t) = V
out

C
s
L
eq
cos[
2b
(t t
2
) +
2b
] (22)
v
C
s
(t) = 0 (23)
v
C
s t
(t) =

xV
out
sin[
2b
(t t
2
) +
2b
] (24)
where Z
2b
=
_
L
eq
/C
st
,
2b
=
1

L
e q
C
s t
, and
2b
=
tan
1
_
x
1x
.
This mode ends when L
st
is fully discharged, i.e., i
L
s t
(t
3
) =
0. Thus, by using (22), we have
t
3
t
2
=
1

2b
tan
1
_
1 x
x
. (25)
By substituting (25) into (21)(24), it can be shown that
i
L
s
(t
3
) = I
in
(26)
i
L
s t
(t
3
) = 0 (27)
v
C
s
(t
3
) = 0 (28)
v
C
s t
(t
3
) =

x V
out
. (29)
Mode 3 [see Fig. 4(e)] (t
3
< t < t
4
): The switch current
equals I
in
. This mode denes the duty cycle of the main switch.
Equations (26)(29) still hold in this mode. This mode ends
when the main switch is turned off softly at t
4
.
Mode 4 [see Fig. 4(f)] (t
4
< t < t
5
): C
s
is charged up by I
in
.
Thus,
i
L
s
(t) = I
in
(30)
i
L
s t
(t) = 0 (31)
v
C
s
(t) =
I
in
C
s
(t t
4
) (32)
v
C
s t
(t) =

xV
out
. (33)
606 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010
This mode ends at t
5
when
v
C
s
(t
5
) = V
out
v
C
s t
(t
5
)
= (1

x)V
out
. (34)
By using (32),
t
5
t
4
= (1

x)
C
s
I
in
V
out
. (35)
Mode 5 [see Fig. 4(g)] (t
5
< t < t
6
): C
s
continues to be
charged up by the input inductor. C
st
starts discharging to the
load through D
4
i
L
s
(t) =
I
in
1 + x
[x + cos
5
(t t
5
)] (36)
i
L
s t
(t) = 0 (37)
v
C
s
(t) = V
out
_
1

x
_
+
I
in
C
st
(1 + x)
(t t
5
)
+
I
in
x
5
C
st
(1 + x)
sin
5
(t t
5
) (38)
v
C
s t
(t) = V
out

x
I
in
C
st
(1 + x)
(t t
5
)
+
I
in

5
C
st
(1 + x)
sin
5
(t t
5
) (39)
where
5
= 1/
_
L
s
C
eq
.
This mode ends at t
6
when i
L
s
(t
6
) = 0. By using (36),
t
6
t
5

=
1

5
_

2
+ sin
1
x
_
(40)
i
L
s t
(t
6
) = i
L
s t
(t
5
) = 0 (41)
v
C
s
(t
6
)

= (1

x)V
out
+ I
in
_
L
s
C
st

x
(1 + x)

1 + x

2
+ sin
1
x +

1 x
2
x
_
(42)
v
C
s t
(t
6
) =

xV
out

I
in
1 + x
_
L
s
C
st
_
x
1 + x

2
+ sin
1
x
_
1 x
2
_
. (43)
Mode 6 [see Fig. 4(h)] (t
6
< t < t
7
): C
st
is discharged to the
load by I
in
i
L
s
(t) = 0 (44)
i
L
s t
(t) = 0 (45)
v
C
s
(t) = v
C
s
(t
6
) (46)
v
C
s t
(t) = v
C
s t
(t
6
)
I
in
C
st
(t t
6
). (47)
This mode ends at t
7
when
v
C
s t
(t
7
) = V
out
v
C
s
(t
6
). (48)
By using (46) and (47), we have
t
7
t
6
=
_
L
s
C
st
_
1 x
x
(49)
v
C
s t
(t
7
) =

x V
out
I
in
_
L
s
C
st
1
1 + x
_
x
1 + x

2
+ sin
1
x +

1 x
2
x
_
. (50)
Mode 7 [see Fig. 4(i)] (t
7
< t < t
8
): C
s
continues to be
charged up by I
in
through D
2
and C
st
continues to discharge to
the load. This mode ends when C
st
is fully discharged
i
L
s
(t) = 0 (51)
i
L
s t
(t) = 0 (52)
v
C
s
(t) = V
out
v
C
s t
(t
7
) +
I
in
C
st
(1 + x)
(t t
7
) (53)
v
C
s t
(t) = v
C
s t
(t
7
)
I
in
C
st
(1 + x)
(t t
7
). (54)
This mode ends at t
8
when v
C
s t
(t
8
) = 0 and v
C
s
(t
8
) = V
out
.
By using (50) and (54), we have
t
8
t
7
=
_
L
s
C
s
_
V
out
I
in
_
C
s
xL
s
(1 + x)
1

1 + x

2
+ sin
1
x +

1 x
2
x
__
. (55)
Mode 8 [see Fig. 4(j)] (t
8
< t < t
9
): D conducts and I
in
will
supply to the load. This mode ends when the main switch is
turned on again. This completes one switching cycle.
III. OPERATING RANGE OF THE SNUBBER
AND STRESS ON THE MAIN SWITCH
The operating range of the passive lossless snubber shown in
Fig. 2 is dened by the minimum ON time t
ON,min
and minimum
OFF time t
OFF,min
of the main switch. t
ON,min
is the minimumtime
required to transfer the energy stored in the snubber capacitor C
s
to the reset circuit while t
OFF,min
is the minimum time required
to transfer the energy stored in the reset circuit to the other part
of the converter circuit. The value of t
ON,min
of the proposed
snubber is the time taken from mode 1 to mode 2b (i.e., from t
0
to t
3
) while the one of t
OFF,min
is the time taken from mode 4
to mode 7 (i.e., from t
4
to t
8
). t
ON,min
is obtained by adding up
the time durations given in (2), (4), (17), and (25), and t
OFF,min
is obtained by adding up the time durations given in (35), (40),
(49), and (55). Thus,
t
ON, min
=
(L
s
+ L
sr
)I
sat
V
out
+
L
s
I
in
V
out
+
1

2a
_

2
+ sin
1
x
_
+
1

2b
tan
1
_
1 x
x
(56)
and
t
OFF,min
=
C
s
V
out
I
in
_
1 +
1

x
_
. (57)
LI et al.: PASSIVE LOSSLESS SNUBBER FOR BOOST PFC WITH MINIMUM VOLTAGE AND CURRENT STRESS 607
Fig. 5. t
ON, min
and t
OFF, min
versus I
in
with the output voltage equal to 380 V.
TABLE I
COMPONENT VALUES OF THE PROTOTYPE
Fig. 5 shows the relationships of t
ON,min
and t
OFF,min
versus
I
in
. The parameters used in the analysis are given in Table I.
The output voltage of the PFC is 380 V.
The values of t
ON,min
and t
OFF,min
of the MVS snubber in [42],
non-MVS snubber in [43], and the proposed snubber are com-
pared in the following. The same design specications studied
in [42] and [43] are used in the analysis. Fig. 6 shows the
circuit schematics of the two snubbers. The supply voltage is
90132 V
rms
, 60 Hz, the rated output power is 750 W, and the
output voltage is 250 V. The component values of the proposed
snubber shown in Table II are designed with the procedure given
in Section IV. The ones designed in [42] and [43] are used for
the MVS and non-MVS snubbers, respectively. Fig. 7 shows a
comparison of t
ON,min
and t
OFF,min
versus I
in
of the three snub-
bers. Table III shows the minimum and maximum input current
and duty cycle that can maintain soft switching. With MVS, soft
switching is ensured for input current varying between 2.7 and
11.9 A. With non-MVS, soft switching is ensured for input cur-
rent varying between 2.4 and 12 A. With the proposed snubber,
soft switching is ensured for input current varying between 1.13
and 14.14 A. Thus, the proposed snubber has a wider operating
range.
The voltage and current stress on the main switch with the
three snubbers are also given in Table III, in which the volt-
age and current stress of the MVS and non-MVS snubbers are
derived in [42] and [43], respectively. By using (10), the peak
current I
pk
owing through the main switch with the proposed
Fig. 6. Circuit schematics of two snubbers. (a) Snubber with MVS [42].
(b) Snubber with non-MVS [43].
TABLE II
COMPONENT VALUES OF THE SNUBBER FOR COMPARISON
snubber is
I
pk
I
in
+ V
out

C
s
L
eq
(1 + x)
. (58)
The main reasons that make the proposed snubber outperform
the other two snubbers in [42] and [43] are as follows.
1) The values of the snubber inductor and snubber capacitor
used in the proposed snubber are comparatively smaller.
This makes the energy absorbed by them be small and
the time taken for resetting them be short. Therefore, the
proposed snubber gives a wider soft-switching range for
the main switch.
2) Instead of using snubber inductor only, a saturable induc-
tor connected in series with the snubber inductor is used
to delay the rise of the switch current. Thus, the required
value of the snubber inductor is small. As the energy stored
in the saturable inductor is small, it does not affect energy-
resetting period.
3) The resonant current in the energy-reset process is limited
by an added inductor L
st
. Thus, the value of the snubber
608 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010
Fig. 7. Comparison of the operating range of the three snubbers with the same
operating requirements in [42] and [43]. (a) t
ON, min
versus I
in
. (b) t
OFF, min
versus I
in
.
TABLE III
PERFORMANCE COMPARISON OF THE MVS SNUBBER IN [42], NON-MVS
IN [43], AND PROPOSED SNUBBER
inductor is small. For the MVS snubber, resonant current
is limited by the snubber inductor. Thus, a larger value of
snubber inductor is needed. For the non-MVS snubber, an
added inductor, that is L
s
in Fig. 6(b), is used to assist
the resonance at a lower current. However, its presence
introduces extra voltage stress on the main switch.
The non-MVS snubber in [43] gives wider soft-switching
range than the MVSsnubber in [42] at the expense of introducing
extra voltage stress on the main switch. The proposed snubber
gives the same voltage stress of V
out
as the MVS snubber and
lowest current stress on the main switch.
A very large value of the input inductor is undesired in
the PFC design because it will increase the overall physical
size and conduction loss, perform slow dynamic response, re-
duce phase margin and increase parasitic capacitance [47]. The
value of the inductor is practically designed to give an input rip-
ple current between 20% and 40% of the peak current at the low
line and full-load conditions [48], [54]. Thus, the value of I
pk
in (58) is designed to be less than a value, i.e., the average input
current plus the ripple current. Thus, no extra current stress will
be imposed on the main switch.
IV. DESIGN PROCEDURE
The values of the passive components are designed as follows.
1) Design the value of L
s
: The value of L
s
is determined by
considering the rate of change of the output diode current
in mode 1b. As described in (7),
L
s
= V
out
_
di
D
dt
_
1
(59)
where di
D
/dt is the value of the turn-OFF rate of the output
diode current obtained from the data sheet.
2) Design the values of C
s
and C
st
: C
s
and C
st
are designed
by the following iterative procedure. First, x [0, 1] is
randomly selected. Secondly, in order to ensure that the
switch voltage stress in mode 5 is less than V
out
. By sub-
stituting x into (42) and make v
C
s
less than V
out
, it can be
shown that
C
s
L
s
x
1 + x
_

I
in
V
out
(1 + x)
_
2

2
+ sin
1
x +

1 x
2
x
_
2
. (60)
The minimum value of I
in
, I
in,min
, which can ensure soft
switching, is calculated by substituting x into (57) with
the designed minimum OFF time t
OFF,min,d
. Thus,
I
in,min
=
C
s
V
out
t
OFF,min,d
_
1 +
1

x
_
. (61)
The value of x is accepted if I
in,min
is below the designed
minimuminput current, for example, 5%of the peak input
current with the PFC powering rated load at minimum
input voltage. Otherwise, another value of x is chosen and
the earlier iterative process is repeated. With the chosen
value of x, C
st
is calculated from the value of C
s
because
C
st
=
C
s
x
.
3) Design of L
st
: The value of L
st
is determined by con-
sidering that the current stress on the main switch is not
higher than the designed current ripple I on the main
switch. Thus, based on (11),
L
st
=
_
V
out
I
_
2
C
s
1 + x
L
s
. (62)
4) The value of t
ON,min
is calculated by using (56) and the
values of C
s
, C
st
, L
s
, and L
st
designed earlier and com-
pared with the designed minimum duty time of the main
LI et al.: PASSIVE LOSSLESS SNUBBER FOR BOOST PFC WITH MINIMUM VOLTAGE AND CURRENT STRESS 609
Fig. 8. Switching waveforms of the main switch at the peak input voltage
and current with the input voltage equal to 220 V (timebase: 400 ns/division).
(a) Without snubber (v
ds
: 100 V/division, i
d
: 2 A/division). (b) With an RCD
snubber. (v
ds
: 100 V/division, i
d
: 2 A/division).
switch d
min
T
s
. If the condition of d
min
T
s
t
ON,min
is sat-
ised, the earlier set of component values will be taken.
Otherwise, new set of values will be chosen again.
The calculated component values may not be available prac-
tically. Thus, for L
s
, the value used is chosen to be smaller than
the calculated value obtained by (59). This can ensure the actual
minimum ON time of the main switch is shorter than the one
determined by (56). For C
s
and L
st
, their actual values have to
be greater than the calculated values by (60) and (62) so as to
avoid voltage and current overstresses on the main switch.
V. EXPERIMENTAL VERIFICATION
A 750-W PFC with the universal input voltage from 90 to
265 V has been built and evaluated. The output voltage is 380 V
plus 5% voltage ripple due to the ac line. The switching fre-
quency is 100 kHz and the power stage is operated in CCM
controlled by the controller UC3854. The designed ripple cur-
rent is 20% of the rated current at low line [48] and [54]. Thus,
the theoretical peak current through the main switch I
s,pk
is
I
s,pk
= 1.2

2
750
90
= 14.14 A.
Fig. 9. Switching waveforms with the proposed snubber with the input voltage
equal to 110 V(timebase: 1 s/division). (a) Rated load (v
ds
: 100 V/division, i
d
:
5 A/division). (b) 20% of the rated load (v
ds
: 100 V/division, i
d
: 5 A/division).
The peak current in the resonance period, i.e., (58) in mode
2a, should be less than 14.14 A.
Based on the procedure given in Section IV, the values of the
components used in the snubber are designed as follows.
1) The maximum value of di
D
/dt of the diode used in the
prototype is 1000 A/s. Then, a value of 400 A/s is used
to determine the value of L
s
. Based on (59), the value of
L
s
is found to be (380/400) = 0.95 H. Then, an inductor
of 1 H is used.
2) By setting x = 0.95 in (60), C
s
1.76 nF and C
st
=
1.85 nF. Thus, practical values of 1.8 and 2.2 nF for C
s
and C
st
, respectively, are chosen.
3) By using (62), L
st
is found to be 25 H. An inductor
of 30 H is chosen for reducing the peak value of the
resonant current.
4) The earlier set of components can fulll the condition
dened in (56) for the duty cycle down to 0.089, at which
the input voltage is 346 V.
The components values of the snubber circuit are calculated
and given in Table I. The performances of the PFC with hard
switching (i.e., without any snubber), an RCDsnubber designed
by the method given in [1], and the proposed snubber have been
compared.
610 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010
Fig. 10. Switching waveforms with the proposed snubber with the input
voltage equal to 220 V (timebase: 400 ns/division). (a) Rated load (v
ds
:
100 V/division, i
d
: 2 A/division). (b) 20%of the rated load (v
ds
: 100 V/division,
i
d
: 2 A/division).
Fig. 8 shows the switching waveformof the main switch at the
peak input voltage (i.e.,

2 220 = 311 V) and input current

(i.e., 4.8 A) without any snubber [see Fig. 8(a)] and the RCD
snubber [see Fig. 8(b)]. The RCDsnubber can reduce the voltage
stress across the main switch, but it cannot reduce the overlap
between the switch voltage and current. With the proposed snub-
ber, Figs. 9 and 10 showthe switching waveforms, including the
switch voltage v
ds
and switch current i
d
, with the input voltage
equal 110 and 220 V, respectively. Figs. 9(a) and 10(a) show the
waveforms with the output at the rated power, while Figs. 9(b)
and 10(b) show the ones with the output at 20% of the rated
power. Comparing the waveforms shown in Figs. 810, it can
be noted that the proposed snubber modies the switching tra-
jectories and does not introduce extra voltage and current on
the main switch. The peak current owing through the main
switch in the resonance period does not exceed the maximum
allowable value of 14.14 A. A voltage spike appears immedi-
ately after the main switch is turned off. It is caused by the stray
inductance of the copper track connecting between the drain of
the MOSFETand the diode D
1
. Alarge reverse recovery current
owing through the main switch immediately after the main is
switched on. Among the three snubbers, such current pulse in
Fig. 11. Switching trajectories of the main switch at the peak input voltage
and current with input voltage equal to 220 V (x-axis: i
d
2 A/division, y-
axis: v
ds
100 V/division) (a) Without any snubber. (b) With an RCD snubber.
(c) With the proposed snubber.
the proposed snubber is limited by the saturable inductor L
sr
and resonant inductor L
s
.
Fig. 11 shows the switching trajectories of the main switch
at the peak input voltage and input current without snubber [see
Fig. 11(a)], with an RCD snubber [see Fig. 11(b)], and with
the proposed snubber [see Fig. 11(c)]. Fig. 11(a)(c) shows the
xy plots of the corresponding switching waveforms shown
in Fig. 8(a) and (b), and Fig. 10(a), respectively. Comparing
Fig. 11(a) and (b), the trajectory loop area is reduced by the RCD
snubber, the switching loss is thus reduced. However, there is
additional loss in the resistor. With the proposed snubber, the
trajectory loop area, and thus, the switching loss, is signicantly
reduced. Thus, the proposed snubber gives the advantages of
both reducing the stress and switching loss. Most importantly,
the energy is the snubber circuit is regenerated.
Fig. 12(a) and (b) shows the waveforms of the input volt-
age v
ac
and snubber capacitor voltage v
C
s
at the zero crossing
LI et al.: PASSIVE LOSSLESS SNUBBER FOR BOOST PFC WITH MINIMUM VOLTAGE AND CURRENT STRESS 611
Fig. 12. Waveforms of v
ac
and v
Cs
at the rated load (v
ac
: 100 V/division,
v
Cs
: 100 V/division, timebase: 200 s/division). (a) v
ac
= 110 V
rms
. (b) v
ac
= 220 V
rms
.
regions with v
ac
= 110 V
rms
and v
ac
= 220 V
rms
, respectively,
at the rated load condition. Around the zero crossing regions,
C
s
cannot be fully discharged due to low input current and
short turn-OFF time. It cannot be charged up to V
out
, and thus,
the voltage across C
st
is nonzero at the end of mode 7. The
charge stored in C
s
cannot be completely transferred to C
st
in
the successive on period. As a result, the zero-voltage turn-OFF
condition cannot be created in the successive turn-OFF action.
As marked in Fig. 12(a) and (b), the hard-switching regions last
about 1 ms and 820 s for v
ac
= 110 V
rms
and v
ac
= 220 V
rms
,
respectively. Such durations are equivalent to 12% of a 60 Hz
line cycle and 8.2% of a 50 Hz line cycle, respectively. Nev-
ertheless, even though the main switch is hard-switched in the
region, the switching loss is low because the input current is
low within the regions. Based on (56) and (57), the minimum
ON time and OFF time of the main switch are dependent on the
component values. The variation of component values, for ex-
ample, the component tolerance, will affect the soft-switching
range.
Fig. 13. Efciency versus the input voltage. (a) Rated load. (b) 20% of the
rated load.
The converter efciency has been measured with the input
voltage ranging from 90 to 265 V. Fig. 13(a) and (b) shows
the efciencies versus the input voltage at the rated load and
20% of the rated load, respectively. With the proposed snubber
circuit, the converter efciency is consistently higher than 93%
at the full load and 92.5% at 20% of the rated load. If the PFC
has no snubber, the efciency is decreased by about 2% at the
rated load. If the PFC has an RCD snubber [1], the efciency is
reduced by more than 4%. The signicant increase of the energy
loss is due to the increase of the turn-OFF energy loss without
energy recovery. Not only does the proposed snubber improve
the efciency, it can also reduce the voltage and stresses on the
main switch.
Fig. 14 shows the efciency versus the output power at the
input voltages of 110 and 220 V, respectively. It can be noted
that the efciency is consistently higher than 92.5% and 95%
respectively over the load range. The efciency with 110 Vinput
is comparatively lower than that with 220 V input, because the
conduction loss is higher due to having a higher input current.
It can be noted from the earlier testing results that the pro-
posed snubber gives the highest efciency among the three
switch congurations. Although the trajectory loop area (and
thus the switching loss) can be reduced with the RCD snubber,
some energy is lost in the snubber resistor.
Finally, Fig. 15 shows the picture of the prototype. It can be
seen that the proposed snubber only occupies a little space over
the entire PFC.
612 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010
Fig. 14. Efciency versus the output power. (a) v
ac
= 110 V
rms
. (b) v
ac
=
220 V
rms
.
Fig. 15. Prototype.
VI. CONCLUSION
A simple passive lossless snubber for boost PFC has been
presented. Compared with prior-art passive lossless snubbers, it
has wide operating range and introduces no extra voltage/current
stress on the main switch. The proposed snubber has been eval-
uated on a 750-W boost-type PFC with universal input. It can
increase the converter efciency by more than 2%3% over the
operating voltage range. The importance does not lie only on the
energy efciency, but also the improved switching trajectories
that can enhance the electromagnetic compatibility.
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River T. H. Li (S06) was born in Hong Kong in
1980. He received the B.Eng. degree (Honors) and
M.Phil. degree in electronic engineering, in 2004
and 2006, respectively, from the City University of
Hong Kong, Kowloon, Hong Kong, where he is cur-
rently working toward the Ph.D. degree in power
electronics.
His current research interests include soft switch-
ing of power converter, current source inverter, and
grid-connected energy recycling technique.
Henry Shu-Hung Chung (M95SM03) received
the B.Eng. degree in electrical engineering in 1991
and the Ph.D. degree in 1994, both from the Hong
Kong Polytechnic University, Kowloon, Hong Kong.
Since 1995, he has been with the City University of
Hong Kong (CityU), Kowloon, where he is currently
a Professor with the Department of Electronic En-
gineering. He is also the Chief Technical Ofcer of
e.Energy Technology Limitedan associated com-
pany of CityU. His current research interests include
time- and frequency-domain analysis of power elec-
tronic circuits, switched-capacitor-based converters, random-switching tech-
niques, control methods, digital audio ampliers, soft-switching converters, and
electronic ballast design. He has authored or coauthored six research book chap-
ters, and more than 260 technical papers including 120 refereed journal papers
in his research areas. He holds 12 patents.
Dr. Chung is the recipient of the Grand Applied Research Excellence Award
in 2001 from the City University of Hong Kong. He was the IEEE Student
Branch Counselor and was the Track Chair of the technical committee on
power electronics circuits and power systems of the IEEE Circuits and Sys-
tems Society in 19971998. He was an Associate Editor and a Guest Editor of
the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, PART I: FUNDAMENTAL
THEORY AND APPLICATIONS in 19992003. He is currently an Associate Editor
of the IEEE TRANSACTIONS ON POWER ELECTRONICS and the IEEE TRANS-
ACTIONS ON CIRCUITS AND SYSTEMS, PART I: FUNDAMENTAL THEORY AND
APPLICATIONS.
Anson K. T. Sung was born in Hong Kong in 1982.
He received the B.Eng. degree (Honors) in elec-
tronic and communication engineering in 2008 from
the City University of Hong Kong, Kowloon, Hong
Kong, where he is currently working toward the M.Sc.
degree in electronic and information engineering.
His current research interests include soft switch-
ing of power converter, circuit and system control,
and energy harvesting.