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Objectives
To know and understand the concepts and fundamentals related to the study of microcontrollers
Microcontrollers
Contents
Review of a microcomputer system Central processing unit, CPU CPU cycles Definition of buses PIC microcontroller architecture
Microcontrollers
Microcontrollers
Microcontrollers
4 8
LD_IR
LD_IR_LSN
INSTRUCTION DECODER
R0-R15
IR 4
PROGRAM 17
1111111111111 0000000000
C 7 7
AOP
ALU
SEL_DATA_RAM
PC 7
JUMP_PC
7 +
INC_PC
ACC 4
Microcontrollers
CPU Cycles
The operation of a typical CPU can be decomposed into three main cycles: fetch, decode and execute The fetch cycle consists in getting an instruction from the instruction memory and storing it in the instruction register The decode cycle consists in translating the bit pattern of the instruction into control signals (instruction decoder) The execute cycle consists in inputting data to the ALU, selection an ALU operation and storing the result in either an internal register or the data memory
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Buses
Three buses can be found in a microcomputer system: data, control and address bus
The data bus is the communication channel between the CPU and the rest of the system The address bus allows the selection of the source/destination of the data The control bus determines the type of communication that takes place, i.e. reading or writing access
Microcontrollers
Buses
A schematic diagram indicating the communication of the three buses with the CPU is shown below
Microcontrollers
Microcontrollers
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PIC Microcontrollers
Among the most important features of the PIC microcontrollers are
Harvard architecture Pipeline processing scheme Orthogonal instruction format Register-banks internal organizations
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CPU
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Harvard Architecture
Data and program have their own memory The bit widths may differ Simultaneous access are allowed
CPU
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Pipeline Processing
The internal architecture is divided into independent blocks that are serially connected forming a pipeline The execution of an instruction is allocated to a certain number of blocks Execution of several instructions can be simultaneously executed in an one-after-the-other fashion
BLOCK 1 BLOCK 2 BLOCK 3 BLOCK 4
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Orthogonal Architecture
In a traditional architecture, the outcome of an ALU operation can only be stored in the accumulator In an orthogonal architecture, the outcome of an ALU operation can be stored in an internal register as well as the accumulator Orthogonal
DATA MEMORY DATA MEMORY W
Traditional
ALU
ALU
ACC
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Summary
Microcontrollers are microcomputer systems made up of a CPU, memories and peripherals presented as an IC The execution of instructions by the CPU has three phases: fetch, decode and execute Microchips PIC have a harvard, RISC and orthogonal architecture The microcontrollers that will be studied are 8-bit data wide
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